/* AST1030 CPU Core */
armv7m = DEVICE(&a->armv7m);
qdev_prop_set_uint32(armv7m, "num-irq", 256);
- qdev_prop_set_string(armv7m, "cpu-type", sc->cpu_type);
+ qdev_prop_set_string(armv7m, "cpu-type", aspeed_soc_cpu_type(sc));
qdev_connect_clock_in(armv7m, "cpuclk", s->sysclk);
object_property_set_link(OBJECT(&a->armv7m), "memory",
OBJECT(s->memory), &error_abort);
}
for (i = 0; i < sc->num_cpus; i++) {
- object_initialize_child(obj, "cpu[*]", &a->cpu[i], sc->cpu_type);
+ object_initialize_child(obj, "cpu[*]", &a->cpu[i],
+ aspeed_soc_cpu_type(sc));
}
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
}
for (i = 0; i < sc->num_cpus; i++) {
- object_initialize_child(obj, "cpu[*]", &a->cpu[i], sc->cpu_type);
+ object_initialize_child(obj, "cpu[*]", &a->cpu[i],
+ aspeed_soc_cpu_type(sc));
}
snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname);
#include "hw/char/serial.h"
+const char *aspeed_soc_cpu_type(AspeedSoCClass *sc)
+{
+ return sc->cpu_type;
+}
+
qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int dev)
{
return ASPEED_SOC_GET_CLASS(s)->get_irq(s, dev);
qemu_irq (*get_irq)(AspeedSoCState *s, int dev);
};
+const char *aspeed_soc_cpu_type(AspeedSoCClass *sc);
enum {
ASPEED_DEV_SPI_BOOT,