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x86/mm: Make mmap(MAP_32BIT) work correctly
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1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
4614139c 18#ifndef __ASSEMBLY__
55a6ca25
PA
19#include <asm/x86_init.h>
20
ef6bea6d 21void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
e1a58320
SS
22void ptdump_walk_pgd_level_checkwx(void);
23
24#ifdef CONFIG_DEBUG_WX
25#define debug_checkwx() ptdump_walk_pgd_level_checkwx()
26#else
27#define debug_checkwx() do { } while (0)
28#endif
ef6bea6d 29
8405b122
JF
30/*
31 * ZERO_PAGE is a global shared page that is always zero: used
32 * for zero-mapped memory areas etc..
33 */
277d5b40
AK
34extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
35 __visible;
8405b122
JF
36#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
37
e3ed910d
JF
38extern spinlock_t pgd_lock;
39extern struct list_head pgd_list;
8405b122 40
617d34d9
JF
41extern struct mm_struct *pgd_page_get_mm(struct page *page);
42
54321d94
JF
43#ifdef CONFIG_PARAVIRT
44#include <asm/paravirt.h>
45#else /* !CONFIG_PARAVIRT */
46#define set_pte(ptep, pte) native_set_pte(ptep, pte)
47#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 48#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
a00cc7d9 49#define set_pud_at(mm, addr, pudp, pud) native_set_pud_at(mm, addr, pudp, pud)
54321d94 50
54321d94
JF
51#define set_pte_atomic(ptep, pte) \
52 native_set_pte_atomic(ptep, pte)
53
54#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
55
56#ifndef __PAGETABLE_PUD_FOLDED
57#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
58#define pgd_clear(pgd) native_pgd_clear(pgd)
59#endif
60
61#ifndef set_pud
62# define set_pud(pudp, pud) native_set_pud(pudp, pud)
63#endif
64
65#ifndef __PAGETABLE_PMD_FOLDED
66#define pud_clear(pud) native_pud_clear(pud)
67#endif
68
69#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
70#define pmd_clear(pmd) native_pmd_clear(pmd)
71
72#define pte_update(mm, addr, ptep) do { } while (0)
54321d94 73
54321d94
JF
74#define pgd_val(x) native_pgd_val(x)
75#define __pgd(x) native_make_pgd(x)
76
77#ifndef __PAGETABLE_PUD_FOLDED
78#define pud_val(x) native_pud_val(x)
79#define __pud(x) native_make_pud(x)
80#endif
81
82#ifndef __PAGETABLE_PMD_FOLDED
83#define pmd_val(x) native_pmd_val(x)
84#define __pmd(x) native_make_pmd(x)
85#endif
86
87#define pte_val(x) native_pte_val(x)
88#define __pte(x) native_make_pte(x)
89
224101ed
JF
90#define arch_end_context_switch(prev) do {} while(0)
91
54321d94
JF
92#endif /* CONFIG_PARAVIRT */
93
4614139c
JF
94/*
95 * The following only work if pte_present() is true.
96 * Undefined behaviour if not..
97 */
3cbaeafe
JP
98static inline int pte_dirty(pte_t pte)
99{
a15af1c9 100 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
101}
102
a927cb83
DH
103
104static inline u32 read_pkru(void)
105{
106 if (boot_cpu_has(X86_FEATURE_OSPKE))
107 return __read_pkru();
108 return 0;
109}
110
9e90199c
XG
111static inline void write_pkru(u32 pkru)
112{
113 if (boot_cpu_has(X86_FEATURE_OSPKE))
114 __write_pkru(pkru);
115}
116
3cbaeafe
JP
117static inline int pte_young(pte_t pte)
118{
a15af1c9 119 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
120}
121
c164e038
KS
122static inline int pmd_dirty(pmd_t pmd)
123{
124 return pmd_flags(pmd) & _PAGE_DIRTY;
125}
3cbaeafe 126
f2d6bfe9
JW
127static inline int pmd_young(pmd_t pmd)
128{
129 return pmd_flags(pmd) & _PAGE_ACCESSED;
130}
131
a00cc7d9
MW
132static inline int pud_dirty(pud_t pud)
133{
134 return pud_flags(pud) & _PAGE_DIRTY;
135}
136
137static inline int pud_young(pud_t pud)
138{
139 return pud_flags(pud) & _PAGE_ACCESSED;
140}
141
3cbaeafe
JP
142static inline int pte_write(pte_t pte)
143{
a15af1c9 144 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
145}
146
3cbaeafe
JP
147static inline int pte_huge(pte_t pte)
148{
a15af1c9 149 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
150}
151
3cbaeafe
JP
152static inline int pte_global(pte_t pte)
153{
a15af1c9 154 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
155}
156
157static inline int pte_exec(pte_t pte)
158{
a15af1c9 159 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
160}
161
7e675137
NP
162static inline int pte_special(pte_t pte)
163{
c819f37e 164 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
165}
166
91030ca1
HD
167static inline unsigned long pte_pfn(pte_t pte)
168{
169 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
170}
171
087975b0
AM
172static inline unsigned long pmd_pfn(pmd_t pmd)
173{
f70abb0f 174 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
087975b0
AM
175}
176
0ee364eb
MG
177static inline unsigned long pud_pfn(pud_t pud)
178{
f70abb0f 179 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
0ee364eb
MG
180}
181
91030ca1
HD
182#define pte_page(pte) pfn_to_page(pte_pfn(pte))
183
3cbaeafe
JP
184static inline int pmd_large(pmd_t pte)
185{
027ef6c8 186 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
187}
188
f2d6bfe9 189#ifdef CONFIG_TRANSPARENT_HUGEPAGE
f2d6bfe9
JW
190static inline int pmd_trans_huge(pmd_t pmd)
191{
5c7fb56e 192 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
f2d6bfe9 193}
4b7167b9 194
a00cc7d9
MW
195#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
196static inline int pud_trans_huge(pud_t pud)
197{
198 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
199}
200#endif
201
fd8cfd30 202#define has_transparent_hugepage has_transparent_hugepage
4b7167b9
AA
203static inline int has_transparent_hugepage(void)
204{
16bf9226 205 return boot_cpu_has(X86_FEATURE_PSE);
4b7167b9 206}
5c7fb56e
DW
207
208#ifdef __HAVE_ARCH_PTE_DEVMAP
209static inline int pmd_devmap(pmd_t pmd)
210{
211 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
212}
a00cc7d9
MW
213
214#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
215static inline int pud_devmap(pud_t pud)
216{
217 return !!(pud_val(pud) & _PAGE_DEVMAP);
218}
219#else
220static inline int pud_devmap(pud_t pud)
221{
222 return 0;
223}
224#endif
5c7fb56e 225#endif
f2d6bfe9
JW
226#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
227
6522869c
JF
228static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
229{
230 pteval_t v = native_pte_val(pte);
231
232 return native_make_pte(v | set);
233}
234
235static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
236{
237 pteval_t v = native_pte_val(pte);
238
239 return native_make_pte(v & ~clear);
240}
241
3cbaeafe
JP
242static inline pte_t pte_mkclean(pte_t pte)
243{
6522869c 244 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
245}
246
247static inline pte_t pte_mkold(pte_t pte)
248{
6522869c 249 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
250}
251
252static inline pte_t pte_wrprotect(pte_t pte)
253{
6522869c 254 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
255}
256
257static inline pte_t pte_mkexec(pte_t pte)
258{
6522869c 259 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
260}
261
262static inline pte_t pte_mkdirty(pte_t pte)
263{
0f8975ec 264 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
265}
266
267static inline pte_t pte_mkyoung(pte_t pte)
268{
6522869c 269 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
270}
271
272static inline pte_t pte_mkwrite(pte_t pte)
273{
6522869c 274 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
275}
276
277static inline pte_t pte_mkhuge(pte_t pte)
278{
6522869c 279 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
280}
281
282static inline pte_t pte_clrhuge(pte_t pte)
283{
6522869c 284 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
285}
286
287static inline pte_t pte_mkglobal(pte_t pte)
288{
6522869c 289 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
290}
291
292static inline pte_t pte_clrglobal(pte_t pte)
293{
6522869c 294 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 295}
4614139c 296
7e675137
NP
297static inline pte_t pte_mkspecial(pte_t pte)
298{
6522869c 299 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
300}
301
01c8f1c4
DW
302static inline pte_t pte_mkdevmap(pte_t pte)
303{
304 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
305}
306
f2d6bfe9
JW
307static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
308{
309 pmdval_t v = native_pmd_val(pmd);
310
311 return __pmd(v | set);
312}
313
314static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
315{
316 pmdval_t v = native_pmd_val(pmd);
317
318 return __pmd(v & ~clear);
319}
320
321static inline pmd_t pmd_mkold(pmd_t pmd)
322{
323 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
324}
325
590a471c
MK
326static inline pmd_t pmd_mkclean(pmd_t pmd)
327{
328 return pmd_clear_flags(pmd, _PAGE_DIRTY);
329}
330
f2d6bfe9
JW
331static inline pmd_t pmd_wrprotect(pmd_t pmd)
332{
333 return pmd_clear_flags(pmd, _PAGE_RW);
334}
335
336static inline pmd_t pmd_mkdirty(pmd_t pmd)
337{
0f8975ec 338 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
339}
340
f25748e3
DW
341static inline pmd_t pmd_mkdevmap(pmd_t pmd)
342{
343 return pmd_set_flags(pmd, _PAGE_DEVMAP);
344}
345
f2d6bfe9
JW
346static inline pmd_t pmd_mkhuge(pmd_t pmd)
347{
348 return pmd_set_flags(pmd, _PAGE_PSE);
349}
350
351static inline pmd_t pmd_mkyoung(pmd_t pmd)
352{
353 return pmd_set_flags(pmd, _PAGE_ACCESSED);
354}
355
356static inline pmd_t pmd_mkwrite(pmd_t pmd)
357{
358 return pmd_set_flags(pmd, _PAGE_RW);
359}
360
361static inline pmd_t pmd_mknotpresent(pmd_t pmd)
362{
21d9ee3e 363 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
f2d6bfe9
JW
364}
365
a00cc7d9
MW
366static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
367{
368 pudval_t v = native_pud_val(pud);
369
370 return __pud(v | set);
371}
372
373static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
374{
375 pudval_t v = native_pud_val(pud);
376
377 return __pud(v & ~clear);
378}
379
380static inline pud_t pud_mkold(pud_t pud)
381{
382 return pud_clear_flags(pud, _PAGE_ACCESSED);
383}
384
385static inline pud_t pud_mkclean(pud_t pud)
386{
387 return pud_clear_flags(pud, _PAGE_DIRTY);
388}
389
390static inline pud_t pud_wrprotect(pud_t pud)
391{
392 return pud_clear_flags(pud, _PAGE_RW);
393}
394
395static inline pud_t pud_mkdirty(pud_t pud)
396{
397 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
398}
399
400static inline pud_t pud_mkdevmap(pud_t pud)
401{
402 return pud_set_flags(pud, _PAGE_DEVMAP);
403}
404
405static inline pud_t pud_mkhuge(pud_t pud)
406{
407 return pud_set_flags(pud, _PAGE_PSE);
408}
409
410static inline pud_t pud_mkyoung(pud_t pud)
411{
412 return pud_set_flags(pud, _PAGE_ACCESSED);
413}
414
415static inline pud_t pud_mkwrite(pud_t pud)
416{
417 return pud_set_flags(pud, _PAGE_RW);
418}
419
420static inline pud_t pud_mknotpresent(pud_t pud)
421{
422 return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE);
423}
424
2bf01f9f 425#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
426static inline int pte_soft_dirty(pte_t pte)
427{
428 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
429}
430
431static inline int pmd_soft_dirty(pmd_t pmd)
432{
433 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
434}
435
a00cc7d9
MW
436static inline int pud_soft_dirty(pud_t pud)
437{
438 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
439}
440
0f8975ec
PE
441static inline pte_t pte_mksoft_dirty(pte_t pte)
442{
443 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
444}
445
446static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
447{
448 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
449}
450
a00cc7d9
MW
451static inline pud_t pud_mksoft_dirty(pud_t pud)
452{
453 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
454}
455
a7b76174
MS
456static inline pte_t pte_clear_soft_dirty(pte_t pte)
457{
458 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
459}
460
461static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
462{
463 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
464}
465
a00cc7d9
MW
466static inline pud_t pud_clear_soft_dirty(pud_t pud)
467{
468 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
469}
470
2bf01f9f
CG
471#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
472
b534816b
JF
473/*
474 * Mask out unsupported bits in a present pgprot. Non-present pgprots
475 * can use those bits for other purposes, so leave them be.
476 */
477static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
478{
479 pgprotval_t protval = pgprot_val(pgprot);
480
481 if (protval & _PAGE_PRESENT)
482 protval &= __supported_pte_mask;
483
484 return protval;
485}
486
6fdc05d4
JF
487static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
488{
b534816b
JF
489 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
490 massage_pgprot(pgprot));
6fdc05d4
JF
491}
492
493static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
494{
b534816b
JF
495 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
496 massage_pgprot(pgprot));
6fdc05d4
JF
497}
498
a00cc7d9
MW
499static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
500{
501 return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) |
502 massage_pgprot(pgprot));
503}
504
38472311
IM
505static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
506{
507 pteval_t val = pte_val(pte);
508
509 /*
510 * Chop off the NX bit (if present), and add the NX portion of
511 * the newprot (if present):
512 */
1c12c4cf 513 val &= _PAGE_CHG_MASK;
b534816b 514 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
515
516 return __pte(val);
517}
518
c489f125
JW
519static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
520{
521 pmdval_t val = pmd_val(pmd);
522
523 val &= _HPAGE_CHG_MASK;
524 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
525
526 return __pmd(val);
527}
528
1c12c4cf
VP
529/* mprotect needs to preserve PAT bits when updating vm_page_prot */
530#define pgprot_modify pgprot_modify
531static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
532{
533 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
534 pgprotval_t addbits = pgprot_val(newprot);
535 return __pgprot(preservebits | addbits);
536}
537
bbac8c6d
TK
538#define pte_pgprot(x) __pgprot(pte_flags(x))
539#define pmd_pgprot(x) __pgprot(pmd_flags(x))
540#define pud_pgprot(x) __pgprot(pud_flags(x))
c6ca18eb 541
b534816b 542#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 543
1adcaafe 544static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
545 enum page_cache_mode pcm,
546 enum page_cache_mode new_pcm)
afc7d20c 547{
1adcaafe 548 /*
55a6ca25 549 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 550 */
8a271389 551 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
552 return 1;
553
afc7d20c 554 /*
555 * Certain new memtypes are not allowed with certain
556 * requested memtype:
557 * - request is uncached, return cannot be write-back
558 * - request is write-combine, return cannot be write-back
ecb2feba
TK
559 * - request is write-through, return cannot be write-back
560 * - request is write-through, return cannot be write-combine
afc7d20c 561 */
d85f3334
JG
562 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
563 new_pcm == _PAGE_CACHE_MODE_WB) ||
564 (pcm == _PAGE_CACHE_MODE_WC &&
ecb2feba
TK
565 new_pcm == _PAGE_CACHE_MODE_WB) ||
566 (pcm == _PAGE_CACHE_MODE_WT &&
567 new_pcm == _PAGE_CACHE_MODE_WB) ||
568 (pcm == _PAGE_CACHE_MODE_WT &&
569 new_pcm == _PAGE_CACHE_MODE_WC)) {
afc7d20c 570 return 0;
571 }
572
573 return 1;
574}
575
458a3e64
TH
576pmd_t *populate_extra_pmd(unsigned long vaddr);
577pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
578#endif /* __ASSEMBLY__ */
579
96a388de 580#ifdef CONFIG_X86_32
a1ce3928 581# include <asm/pgtable_32.h>
96a388de 582#else
a1ce3928 583# include <asm/pgtable_64.h>
96a388de 584#endif
6c386655 585
aca159db 586#ifndef __ASSEMBLY__
f476961c 587#include <linux/mm_types.h>
fa0f281c 588#include <linux/mmdebug.h>
4cbeb51b 589#include <linux/log2.h>
aca159db 590
a034a010
JF
591static inline int pte_none(pte_t pte)
592{
97e3c602 593 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
a034a010
JF
594}
595
8de01da3
JF
596#define __HAVE_ARCH_PTE_SAME
597static inline int pte_same(pte_t a, pte_t b)
598{
599 return a.pte == b.pte;
600}
601
7c683851 602static inline int pte_present(pte_t a)
c46a7c81
MG
603{
604 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
605}
606
3565fce3
DW
607#ifdef __HAVE_ARCH_PTE_DEVMAP
608static inline int pte_devmap(pte_t a)
609{
610 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
611}
612#endif
613
2c3cf556 614#define pte_accessible pte_accessible
20841405 615static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 616{
20841405
RR
617 if (pte_flags(a) & _PAGE_PRESENT)
618 return true;
619
21d9ee3e 620 if ((pte_flags(a) & _PAGE_PROTNONE) &&
20841405
RR
621 mm_tlb_flush_pending(mm))
622 return true;
623
624 return false;
2c3cf556
RR
625}
626
eb63657e 627static inline int pte_hidden(pte_t pte)
dfec072e 628{
eb63657e 629 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
630}
631
649e8ef6
JF
632static inline int pmd_present(pmd_t pmd)
633{
027ef6c8
AA
634 /*
635 * Checking for _PAGE_PSE is needed too because
636 * split_huge_page will temporarily clear the present bit (but
637 * the _PAGE_PSE flag will remain set at all times while the
638 * _PAGE_PRESENT bit is clear).
639 */
21d9ee3e 640 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
649e8ef6
JF
641}
642
e7bb4b6d
MG
643#ifdef CONFIG_NUMA_BALANCING
644/*
645 * These work without NUMA balancing but the kernel does not care. See the
646 * comment in include/asm-generic/pgtable.h
647 */
648static inline int pte_protnone(pte_t pte)
649{
e3a1f6ca
DV
650 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
651 == _PAGE_PROTNONE;
e7bb4b6d
MG
652}
653
654static inline int pmd_protnone(pmd_t pmd)
655{
e3a1f6ca
DV
656 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
657 == _PAGE_PROTNONE;
e7bb4b6d
MG
658}
659#endif /* CONFIG_NUMA_BALANCING */
660
4fea801a
JF
661static inline int pmd_none(pmd_t pmd)
662{
663 /* Only check low word on 32-bit platforms, since it might be
664 out of sync with upper half. */
97e3c602
DH
665 unsigned long val = native_pmd_val(pmd);
666 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
4fea801a
JF
667}
668
3ffb3564
JF
669static inline unsigned long pmd_page_vaddr(pmd_t pmd)
670{
f70abb0f 671 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
3ffb3564
JF
672}
673
e5f7f202
IM
674/*
675 * Currently stuck as a macro due to indirect forward reference to
676 * linux/mmzone.h's __section_mem_map_addr() definition:
677 */
f70abb0f
TK
678#define pmd_page(pmd) \
679 pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT)
20063ca4 680
e24d7eee
JF
681/*
682 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
683 *
684 * this macro returns the index of the entry in the pmd page which would
685 * control the given virtual address
686 */
ce0c0f9e 687static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
688{
689 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
690}
691
97e2817d
JF
692/*
693 * Conversion functions: convert a page and protection to a page entry,
694 * and a page entry and page directory to the page they refer to.
695 *
696 * (Currently stuck as a macro because of indirect forward reference
697 * to linux/mm.h:page_to_nid())
698 */
699#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
700
346309cf
JF
701/*
702 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
703 *
704 * this function returns the index of the entry in the pte page which would
705 * control the given virtual address
706 */
ce0c0f9e 707static inline unsigned long pte_index(unsigned long address)
346309cf
JF
708{
709 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
710}
711
3fbc2444
JF
712static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
713{
714 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
715}
716
99510238
JF
717static inline int pmd_bad(pmd_t pmd)
718{
18a7a199 719 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
720}
721
cc290ca3
JF
722static inline unsigned long pages_to_mb(unsigned long npg)
723{
724 return npg >> (20 - PAGE_SHIFT);
725}
726
98233368 727#if CONFIG_PGTABLE_LEVELS > 2
deb79cfb
JF
728static inline int pud_none(pud_t pud)
729{
97e3c602 730 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
deb79cfb
JF
731}
732
5ba7c913
JF
733static inline int pud_present(pud_t pud)
734{
18a7a199 735 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 736}
6fff47e3
JF
737
738static inline unsigned long pud_page_vaddr(pud_t pud)
739{
f70abb0f 740 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
6fff47e3 741}
f476961c 742
e5f7f202
IM
743/*
744 * Currently stuck as a macro due to indirect forward reference to
745 * linux/mmzone.h's __section_mem_map_addr() definition:
746 */
f70abb0f
TK
747#define pud_page(pud) \
748 pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT)
01ade20d
JF
749
750/* Find an entry in the second-level page table.. */
751static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
752{
753 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
754}
3180fba0 755
3f6cbef1
JF
756static inline int pud_large(pud_t pud)
757{
e2f5bda9 758 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
759 (_PAGE_PSE | _PAGE_PRESENT);
760}
a61bb29a
JF
761
762static inline int pud_bad(pud_t pud)
763{
18a7a199 764 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 765}
e2f5bda9
JF
766#else
767static inline int pud_large(pud_t pud)
768{
769 return 0;
770}
98233368 771#endif /* CONFIG_PGTABLE_LEVELS > 2 */
5ba7c913 772
98233368 773#if CONFIG_PGTABLE_LEVELS > 3
9f38d7e8
JF
774static inline int pgd_present(pgd_t pgd)
775{
18a7a199 776 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 777}
c5f040b1
JF
778
779static inline unsigned long pgd_page_vaddr(pgd_t pgd)
780{
781 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
782}
777cba16 783
e5f7f202
IM
784/*
785 * Currently stuck as a macro due to indirect forward reference to
786 * linux/mmzone.h's __section_mem_map_addr() definition:
787 */
788#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
7cfb8102
JF
789
790/* to find an entry in a page-table-directory. */
ce0c0f9e 791static inline unsigned long pud_index(unsigned long address)
7cfb8102
JF
792{
793 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
794}
3d081b18
JF
795
796static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
797{
798 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
799}
30f10316
JF
800
801static inline int pgd_bad(pgd_t pgd)
802{
18a7a199 803 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 804}
7325cc2e
JF
805
806static inline int pgd_none(pgd_t pgd)
807{
97e3c602
DH
808 /*
809 * There is no need to do a workaround for the KNL stray
810 * A/D bit erratum here. PGDs only point to page tables
811 * except on 32-bit non-PAE which is not supported on
812 * KNL.
813 */
26c8e317 814 return !native_pgd_val(pgd);
7325cc2e 815}
98233368 816#endif /* CONFIG_PGTABLE_LEVELS > 3 */
9f38d7e8 817
4614139c
JF
818#endif /* __ASSEMBLY__ */
819
fb15a9b3
JF
820/*
821 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
822 *
823 * this macro returns the index of the entry in the pgd page which would
824 * control the given virtual address
825 */
826#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
827
828/*
829 * pgd_offset() returns a (pgd_t *)
830 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
831 */
832#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
833/*
834 * a shortcut which implies the use of the kernel's pgd, instead
835 * of a process's
836 */
837#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
838
839
68db065c
JF
840#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
841#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
842
195466dc
JF
843#ifndef __ASSEMBLY__
844
2c1b284e 845extern int direct_gbpages;
22ddfcaa 846void init_mem_mapping(void);
8d57470d 847void early_alloc_pgt_buf(void);
2c1b284e 848
b234e8a0
TG
849#ifdef CONFIG_X86_64
850/* Realmode trampoline initialization. */
851extern pgd_t trampoline_pgd_entry;
0483e1fa 852static inline void __meminit init_trampoline_default(void)
b234e8a0
TG
853{
854 /* Default trampoline pgd value */
855 trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
856}
0483e1fa
TG
857# ifdef CONFIG_RANDOMIZE_MEMORY
858void __meminit init_trampoline(void);
859# else
860# define init_trampoline init_trampoline_default
861# endif
b234e8a0
TG
862#else
863static inline void init_trampoline(void) { }
864#endif
865
4891645e
JF
866/* local pte updates need not use xchg for locking */
867static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
868{
869 pte_t res = *ptep;
870
871 /* Pure native function needs no input for mm, addr */
872 native_pte_clear(NULL, 0, ptep);
873 return res;
874}
875
f2d6bfe9
JW
876static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
877{
878 pmd_t res = *pmdp;
879
880 native_pmd_clear(pmdp);
881 return res;
882}
883
a00cc7d9
MW
884static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
885{
886 pud_t res = *pudp;
887
888 native_pud_clear(pudp);
889 return res;
890}
891
4891645e
JF
892static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
893 pte_t *ptep , pte_t pte)
894{
895 native_set_pte(ptep, pte);
896}
897
0a47de52
AA
898static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
899 pmd_t *pmdp , pmd_t pmd)
900{
901 native_set_pmd(pmdp, pmd);
902}
903
a00cc7d9
MW
904static inline void native_set_pud_at(struct mm_struct *mm, unsigned long addr,
905 pud_t *pudp, pud_t pud)
906{
907 native_set_pud(pudp, pud);
908}
909
195466dc
JF
910#ifndef CONFIG_PARAVIRT
911/*
912 * Rules for using pte_update - it must be called after any PTE update which
913 * has not been done using the set_pte / clear_pte interfaces. It is used by
914 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
915 * updates should either be sets, clears, or set_pte_atomic for P->P
916 * transitions, which means this hook should only be called for user PTEs.
917 * This hook implies a P->P protection or access change has taken place, which
d6ccc3ec 918 * requires a subsequent TLB flush.
195466dc
JF
919 */
920#define pte_update(mm, addr, ptep) do { } while (0)
195466dc
JF
921#endif
922
195466dc
JF
923/*
924 * We only update the dirty/accessed state if we set
925 * the dirty bit by hand in the kernel, since the hardware
926 * will do the accessed bit for us, and we don't want to
927 * race with other CPU's that might be updating the dirty
928 * bit at the same time.
929 */
bea41808
JF
930struct vm_area_struct;
931
195466dc 932#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
933extern int ptep_set_access_flags(struct vm_area_struct *vma,
934 unsigned long address, pte_t *ptep,
935 pte_t entry, int dirty);
195466dc
JF
936
937#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
938extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
939 unsigned long addr, pte_t *ptep);
195466dc
JF
940
941#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
942extern int ptep_clear_flush_young(struct vm_area_struct *vma,
943 unsigned long address, pte_t *ptep);
195466dc
JF
944
945#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
946static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
947 pte_t *ptep)
195466dc
JF
948{
949 pte_t pte = native_ptep_get_and_clear(ptep);
950 pte_update(mm, addr, ptep);
951 return pte;
952}
953
954#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
955static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
956 unsigned long addr, pte_t *ptep,
957 int full)
195466dc
JF
958{
959 pte_t pte;
960 if (full) {
961 /*
962 * Full address destruction in progress; paravirt does not
963 * care about updates and native needs no locking
964 */
965 pte = native_local_ptep_get_and_clear(ptep);
966 } else {
967 pte = ptep_get_and_clear(mm, addr, ptep);
968 }
969 return pte;
970}
971
972#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
973static inline void ptep_set_wrprotect(struct mm_struct *mm,
974 unsigned long addr, pte_t *ptep)
195466dc 975{
d8d89827 976 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
977 pte_update(mm, addr, ptep);
978}
979
2ac13462 980#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 981
f2d6bfe9
JW
982#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
983
984#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
985extern int pmdp_set_access_flags(struct vm_area_struct *vma,
986 unsigned long address, pmd_t *pmdp,
987 pmd_t entry, int dirty);
a00cc7d9
MW
988extern int pudp_set_access_flags(struct vm_area_struct *vma,
989 unsigned long address, pud_t *pudp,
990 pud_t entry, int dirty);
f2d6bfe9
JW
991
992#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
993extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
994 unsigned long addr, pmd_t *pmdp);
a00cc7d9
MW
995extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
996 unsigned long addr, pud_t *pudp);
f2d6bfe9
JW
997
998#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
999extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1000 unsigned long address, pmd_t *pmdp);
1001
1002
f2d6bfe9
JW
1003#define __HAVE_ARCH_PMD_WRITE
1004static inline int pmd_write(pmd_t pmd)
1005{
1006 return pmd_flags(pmd) & _PAGE_RW;
1007}
1008
8809aa2d
AK
1009#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1010static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
f2d6bfe9
JW
1011 pmd_t *pmdp)
1012{
d6ccc3ec 1013 return native_pmdp_get_and_clear(pmdp);
f2d6bfe9
JW
1014}
1015
a00cc7d9
MW
1016#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1017static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1018 unsigned long addr, pud_t *pudp)
1019{
1020 return native_pudp_get_and_clear(pudp);
1021}
1022
f2d6bfe9
JW
1023#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1024static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1025 unsigned long addr, pmd_t *pmdp)
1026{
1027 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
f2d6bfe9
JW
1028}
1029
85958b46
JF
1030/*
1031 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1032 *
1033 * dst - pointer to pgd range anwhere on a pgd page
1034 * src - ""
1035 * count - the number of pgds to copy.
1036 *
1037 * dst and src can be on the same page, but the range must not overlap,
1038 * and must not cross a page boundary.
1039 */
1040static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1041{
1042 memcpy(dst, src, count * sizeof(pgd_t));
1043}
1044
4cbeb51b
DH
1045#define PTE_SHIFT ilog2(PTRS_PER_PTE)
1046static inline int page_level_shift(enum pg_level level)
1047{
1048 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1049}
1050static inline unsigned long page_level_size(enum pg_level level)
1051{
1052 return 1UL << page_level_shift(level);
1053}
1054static inline unsigned long page_level_mask(enum pg_level level)
1055{
1056 return ~(page_level_size(level) - 1);
1057}
85958b46 1058
602e0186
KS
1059/*
1060 * The x86 doesn't have any external MMU info: the kernel page
1061 * tables contain all the necessary information.
1062 */
1063static inline void update_mmu_cache(struct vm_area_struct *vma,
1064 unsigned long addr, pte_t *ptep)
1065{
1066}
1067static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1068 unsigned long addr, pmd_t *pmd)
1069{
1070}
a00cc7d9
MW
1071static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1072 unsigned long addr, pud_t *pud)
1073{
1074}
85958b46 1075
2bf01f9f 1076#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
fa0f281c
CG
1077static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1078{
fa0f281c
CG
1079 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1080}
1081
1082static inline int pte_swp_soft_dirty(pte_t pte)
1083{
fa0f281c
CG
1084 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1085}
1086
1087static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1088{
fa0f281c
CG
1089 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1090}
2bf01f9f 1091#endif
fa0f281c 1092
33a709b2
DH
1093#define PKRU_AD_BIT 0x1
1094#define PKRU_WD_BIT 0x2
84594296 1095#define PKRU_BITS_PER_PKEY 2
33a709b2
DH
1096
1097static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1098{
84594296 1099 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1100 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1101}
1102
1103static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1104{
84594296 1105 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1106 /*
1107 * Access-disable disables writes too so we need to check
1108 * both bits here.
1109 */
1110 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1111}
1112
1113static inline u16 pte_flags_pkey(unsigned long pte_flags)
1114{
1115#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1116 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1117 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1118#else
1119 return 0;
1120#endif
1121}
1122
195466dc
JF
1123#include <asm-generic/pgtable.h>
1124#endif /* __ASSEMBLY__ */
1125
1965aae3 1126#endif /* _ASM_X86_PGTABLE_H */