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Commit | Line | Data |
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0ebc4cda BH |
1 | /* |
2 | * This file contains the 64-bit "server" PowerPC variant | |
3 | * of the low level exception handling including exception | |
4 | * vectors, exception return, part of the slb and stab | |
5 | * handling and other fixed offset specific things. | |
6 | * | |
7 | * This file is meant to be #included from head_64.S due to | |
25985edc | 8 | * position dependent assembly. |
0ebc4cda BH |
9 | * |
10 | * Most of this originates from head_64.S and thus has the same | |
11 | * copyright history. | |
12 | * | |
13 | */ | |
14 | ||
7230c564 | 15 | #include <asm/hw_irq.h> |
8aa34ab8 | 16 | #include <asm/exception-64s.h> |
46f52210 | 17 | #include <asm/ptrace.h> |
7cba160a | 18 | #include <asm/cpuidle.h> |
8aa34ab8 | 19 | |
0ebc4cda BH |
20 | /* |
21 | * We layout physical memory as follows: | |
22 | * 0x0000 - 0x00ff : Secondary processor spin code | |
c1fb6816 MN |
23 | * 0x0100 - 0x17ff : pSeries Interrupt prologs |
24 | * 0x1800 - 0x4000 : interrupt support common interrupt prologs | |
25 | * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1 | |
26 | * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1 | |
0ebc4cda | 27 | * 0x7000 - 0x7fff : FWNMI data area |
c1fb6816 MN |
28 | * 0x8000 - 0x8fff : Initial (CPU0) segment table |
29 | * 0x9000 - : Early init and support code | |
0ebc4cda | 30 | */ |
742415d6 MN |
31 | /* Syscall routine is used twice, in reloc-off and reloc-on paths */ |
32 | #define SYSCALL_PSERIES_1 \ | |
33 | BEGIN_FTR_SECTION \ | |
34 | cmpdi r0,0x1ebe ; \ | |
35 | beq- 1f ; \ | |
36 | END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \ | |
37 | mr r9,r13 ; \ | |
38 | GET_PACA(r13) ; \ | |
39 | mfspr r11,SPRN_SRR0 ; \ | |
40 | 0: | |
41 | ||
42 | #define SYSCALL_PSERIES_2_RFID \ | |
43 | mfspr r12,SPRN_SRR1 ; \ | |
a24553dd | 44 | LOAD_HANDLER(r10, system_call_common) ; \ |
742415d6 MN |
45 | mtspr SPRN_SRR0,r10 ; \ |
46 | ld r10,PACAKMSR(r13) ; \ | |
47 | mtspr SPRN_SRR1,r10 ; \ | |
48 | rfid ; \ | |
49 | b . ; /* prevent speculative execution */ | |
50 | ||
51 | #define SYSCALL_PSERIES_3 \ | |
52 | /* Fast LE/BE switch system call */ \ | |
53 | 1: mfspr r12,SPRN_SRR1 ; \ | |
54 | xori r12,r12,MSR_LE ; \ | |
55 | mtspr SPRN_SRR1,r12 ; \ | |
56 | rfid ; /* return to userspace */ \ | |
742415d6 MN |
57 | b . ; /* prevent speculative execution */ |
58 | ||
4700dfaf MN |
59 | #if defined(CONFIG_RELOCATABLE) |
60 | /* | |
05b05f28 AB |
61 | * We can't branch directly so we do it via the CTR which |
62 | * is volatile across system calls. | |
4700dfaf MN |
63 | */ |
64 | #define SYSCALL_PSERIES_2_DIRECT \ | |
a24553dd | 65 | LOAD_HANDLER(r12, system_call_common) ; \ |
6a404806 | 66 | mtctr r12 ; \ |
4700dfaf | 67 | mfspr r12,SPRN_SRR1 ; \ |
18e3f56b NP |
68 | li r10,MSR_RI ; \ |
69 | mtmsrd r10,1 ; \ | |
6a404806 | 70 | bctr ; |
4700dfaf MN |
71 | #else |
72 | /* We can branch directly */ | |
73 | #define SYSCALL_PSERIES_2_DIRECT \ | |
74 | mfspr r12,SPRN_SRR1 ; \ | |
75 | li r10,MSR_RI ; \ | |
76 | mtmsrd r10,1 ; /* Set RI (EE=0) */ \ | |
d20be433 | 77 | b system_call_common ; |
4700dfaf | 78 | #endif |
0ebc4cda | 79 | |
0ebc4cda BH |
80 | /* |
81 | * This is the start of the interrupt handlers for pSeries | |
82 | * This code runs with relocation off. | |
83 | * Code from here to __end_interrupts gets copied down to real | |
84 | * address 0x100 when we are running a relocatable kernel. | |
85 | * Therefore any relative branches in this section must only | |
86 | * branch to labels in this section. | |
87 | */ | |
88 | . = 0x100 | |
89 | .globl __start_interrupts | |
90 | __start_interrupts: | |
91 | ||
948cf67c BH |
92 | .globl system_reset_pSeries; |
93 | system_reset_pSeries: | |
948cf67c BH |
94 | SET_SCRATCH0(r13) |
95 | #ifdef CONFIG_PPC_P7_NAP | |
96 | BEGIN_FTR_SECTION | |
97 | /* Running native on arch 2.06 or later, check if we are | |
77b54e9f | 98 | * waking up from nap/sleep/winkle. |
948cf67c BH |
99 | */ |
100 | mfspr r13,SPRN_SRR1 | |
371fefd6 PM |
101 | rlwinm. r13,r13,47-31,30,31 |
102 | beq 9f | |
103 | ||
7cba160a | 104 | cmpwi cr3,r13,2 |
371fefd6 | 105 | GET_PACA(r13) |
5fa6b6bd | 106 | bl pnv_restore_hyp_resource |
77b54e9f | 107 | |
7cba160a SP |
108 | li r0,PNV_THREAD_RUNNING |
109 | stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */ | |
371fefd6 | 110 | |
3a167bea | 111 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
f0888f70 PM |
112 | li r0,KVM_HWTHREAD_IN_KERNEL |
113 | stb r0,HSTATE_HWTHREAD_STATE(r13) | |
114 | /* Order setting hwthread_state vs. testing hwthread_req */ | |
115 | sync | |
116 | lbz r0,HSTATE_HWTHREAD_REQ(r13) | |
117 | cmpwi r0,0 | |
118 | beq 1f | |
371fefd6 PM |
119 | b kvm_start_guest |
120 | 1: | |
121 | #endif | |
122 | ||
56548fc0 PM |
123 | /* Return SRR1 from power7_nap() */ |
124 | mfspr r3,SPRN_SRR1 | |
17065671 | 125 | blt cr3,2f |
5fa6b6bd SP |
126 | b pnv_wakeup_loss |
127 | 2: b pnv_wakeup_noloss | |
aca79d2b | 128 | |
371fefd6 | 129 | 9: |
969391c5 | 130 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
948cf67c | 131 | #endif /* CONFIG_PPC_P7_NAP */ |
b01c8b54 PM |
132 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
133 | NOTEST, 0x100) | |
0ebc4cda BH |
134 | |
135 | . = 0x200 | |
b01c8b54 PM |
136 | machine_check_pSeries_1: |
137 | /* This is moved out of line as it can be patched by FW, but | |
138 | * some code path might still want to branch into the original | |
139 | * vector | |
140 | */ | |
1707dd16 | 141 | SET_SCRATCH0(r13) /* save r13 */ |
bc14c491 MS |
142 | /* |
143 | * Running native on arch 2.06 or later, we may wakeup from winkle | |
144 | * inside machine check. If yes, then last bit of HSPGR0 would be set | |
145 | * to 1. Hence clear it unconditionally. | |
1c51089f | 146 | */ |
bc14c491 MS |
147 | GET_PACA(r13) |
148 | clrrdi r13,r13,1 | |
149 | SET_PACA(r13) | |
1707dd16 | 150 | EXCEPTION_PROLOG_0(PACA_EXMC) |
1e9b4507 | 151 | BEGIN_FTR_SECTION |
2513767d | 152 | b machine_check_powernv_early |
1e9b4507 | 153 | FTR_SECTION_ELSE |
1707dd16 | 154 | b machine_check_pSeries_0 |
1e9b4507 | 155 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
0ebc4cda BH |
156 | |
157 | . = 0x300 | |
158 | .globl data_access_pSeries | |
159 | data_access_pSeries: | |
673b189a | 160 | SET_SCRATCH0(r13) |
b01c8b54 | 161 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD, |
697d3899 | 162 | KVMTEST, 0x300) |
0ebc4cda BH |
163 | |
164 | . = 0x380 | |
165 | .globl data_access_slb_pSeries | |
166 | data_access_slb_pSeries: | |
673b189a | 167 | SET_SCRATCH0(r13) |
1707dd16 | 168 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
697d3899 | 169 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380) |
0ebc4cda BH |
170 | std r3,PACA_EXSLB+EX_R3(r13) |
171 | mfspr r3,SPRN_DAR | |
b01c8b54 | 172 | mfspr r12,SPRN_SRR1 |
f0f558b1 | 173 | crset 4*cr6+eq |
0ebc4cda | 174 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 175 | b slb_miss_realmode |
0ebc4cda BH |
176 | #else |
177 | /* | |
ad0289e4 | 178 | * We can't just use a direct branch to slb_miss_realmode |
0ebc4cda BH |
179 | * because the distance from here to there depends on where |
180 | * the kernel ends up being put. | |
181 | */ | |
182 | mfctr r11 | |
ad0289e4 | 183 | LOAD_HANDLER(r10, slb_miss_realmode) |
0ebc4cda BH |
184 | mtctr r10 |
185 | bctr | |
186 | #endif | |
187 | ||
2613265c | 188 | STD_EXCEPTION_PSERIES(0x400, instruction_access) |
0ebc4cda BH |
189 | |
190 | . = 0x480 | |
191 | .globl instruction_access_slb_pSeries | |
192 | instruction_access_slb_pSeries: | |
673b189a | 193 | SET_SCRATCH0(r13) |
1707dd16 | 194 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
31a40e2b | 195 | EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x480) |
0ebc4cda BH |
196 | std r3,PACA_EXSLB+EX_R3(r13) |
197 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | |
b01c8b54 | 198 | mfspr r12,SPRN_SRR1 |
f0f558b1 | 199 | crclr 4*cr6+eq |
0ebc4cda | 200 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 201 | b slb_miss_realmode |
0ebc4cda BH |
202 | #else |
203 | mfctr r11 | |
ad0289e4 | 204 | LOAD_HANDLER(r10, slb_miss_realmode) |
0ebc4cda BH |
205 | mtctr r10 |
206 | bctr | |
207 | #endif | |
208 | ||
b3e6b5df BH |
209 | /* We open code these as we can't have a ". = x" (even with |
210 | * x = "." within a feature section | |
211 | */ | |
a5d4f3ad | 212 | . = 0x500; |
b3e6b5df BH |
213 | .globl hardware_interrupt_pSeries; |
214 | .globl hardware_interrupt_hv; | |
a5d4f3ad | 215 | hardware_interrupt_pSeries: |
b3e6b5df | 216 | hardware_interrupt_hv: |
a5d4f3ad | 217 | BEGIN_FTR_SECTION |
b01c8b54 PM |
218 | _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, |
219 | EXC_HV, SOFTEN_TEST_HV) | |
220 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502) | |
de56a948 PM |
221 | FTR_SECTION_ELSE |
222 | _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, | |
31a40e2b | 223 | EXC_STD, SOFTEN_TEST_PR) |
de56a948 | 224 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500) |
969391c5 | 225 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206) |
a5d4f3ad | 226 | |
2613265c | 227 | STD_EXCEPTION_PSERIES(0x600, alignment) |
31a40e2b | 228 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x600) |
b01c8b54 | 229 | |
2613265c | 230 | STD_EXCEPTION_PSERIES(0x700, program_check) |
31a40e2b | 231 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x700) |
b01c8b54 | 232 | |
2613265c | 233 | STD_EXCEPTION_PSERIES(0x800, fp_unavailable) |
31a40e2b | 234 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x800) |
a5d4f3ad | 235 | |
a485c709 PM |
236 | . = 0x900 |
237 | .globl decrementer_pSeries | |
238 | decrementer_pSeries: | |
239 | _MASKABLE_EXCEPTION_PSERIES(0x900, decrementer, EXC_STD, SOFTEN_TEST_PR) | |
240 | ||
dabe859e | 241 | STD_EXCEPTION_HV(0x980, 0x982, hdecrementer) |
a5d4f3ad | 242 | |
1dbdafec | 243 | MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super) |
31a40e2b | 244 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xa00) |
b01c8b54 | 245 | |
2613265c | 246 | STD_EXCEPTION_PSERIES(0xb00, trap_0b) |
31a40e2b | 247 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xb00) |
0ebc4cda BH |
248 | |
249 | . = 0xc00 | |
250 | .globl system_call_pSeries | |
251 | system_call_pSeries: | |
8b91a255 SW |
252 | /* |
253 | * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems | |
254 | * that support it) before changing to HMT_MEDIUM. That allows the KVM | |
255 | * code to save that value into the guest state (it is the guest's PPR | |
256 | * value). Otherwise just change to HMT_MEDIUM as userspace has | |
257 | * already saved the PPR. | |
258 | */ | |
b01c8b54 PM |
259 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
260 | SET_SCRATCH0(r13) | |
261 | GET_PACA(r13) | |
262 | std r9,PACA_EXGEN+EX_R9(r13) | |
8b91a255 SW |
263 | OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); |
264 | HMT_MEDIUM; | |
b01c8b54 | 265 | std r10,PACA_EXGEN+EX_R10(r13) |
8b91a255 | 266 | OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR); |
b01c8b54 PM |
267 | mfcr r9 |
268 | KVMTEST(0xc00) | |
269 | GET_SCRATCH0(r13) | |
8b91a255 SW |
270 | #else |
271 | HMT_MEDIUM; | |
b01c8b54 | 272 | #endif |
742415d6 MN |
273 | SYSCALL_PSERIES_1 |
274 | SYSCALL_PSERIES_2_RFID | |
275 | SYSCALL_PSERIES_3 | |
b01c8b54 PM |
276 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00) |
277 | ||
2613265c | 278 | STD_EXCEPTION_PSERIES(0xd00, single_step) |
31a40e2b | 279 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xd00) |
b3e6b5df BH |
280 | |
281 | /* At 0xe??? we have a bunch of hypervisor exceptions, we branch | |
282 | * out of line to handle them | |
283 | */ | |
284 | . = 0xe00 | |
d671ddd6 | 285 | hv_data_storage_trampoline: |
1707dd16 PM |
286 | SET_SCRATCH0(r13) |
287 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 288 | b h_data_storage_hv |
1707dd16 | 289 | |
b3e6b5df | 290 | . = 0xe20 |
d671ddd6 | 291 | hv_instr_storage_trampoline: |
1707dd16 PM |
292 | SET_SCRATCH0(r13) |
293 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 294 | b h_instr_storage_hv |
1707dd16 | 295 | |
b3e6b5df | 296 | . = 0xe40 |
d671ddd6 | 297 | emulation_assist_trampoline: |
1707dd16 PM |
298 | SET_SCRATCH0(r13) |
299 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
b3e6b5df | 300 | b emulation_assist_hv |
1707dd16 | 301 | |
b3e6b5df | 302 | . = 0xe60 |
d671ddd6 | 303 | hv_exception_trampoline: |
1707dd16 PM |
304 | SET_SCRATCH0(r13) |
305 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0869b6fd | 306 | b hmi_exception_early |
1707dd16 | 307 | |
655bb3f4 | 308 | . = 0xe80 |
d671ddd6 | 309 | hv_doorbell_trampoline: |
1707dd16 PM |
310 | SET_SCRATCH0(r13) |
311 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
655bb3f4 | 312 | b h_doorbell_hv |
0ebc4cda | 313 | |
9baaef0a BH |
314 | . = 0xea0 |
315 | hv_virt_irq_trampoline: | |
316 | SET_SCRATCH0(r13) | |
317 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
318 | b h_virt_irq_hv | |
319 | ||
0ebc4cda BH |
320 | /* We need to deal with the Altivec unavailable exception |
321 | * here which is at 0xf20, thus in the middle of the | |
322 | * prolog code of the PerformanceMonitor one. A little | |
323 | * trickery is thus necessary | |
324 | */ | |
325 | . = 0xf00 | |
fa111f1f | 326 | performance_monitor_pseries_trampoline: |
1707dd16 PM |
327 | SET_SCRATCH0(r13) |
328 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
329 | b performance_monitor_pSeries |
330 | ||
331 | . = 0xf20 | |
fa111f1f | 332 | altivec_unavailable_pseries_trampoline: |
1707dd16 PM |
333 | SET_SCRATCH0(r13) |
334 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
335 | b altivec_unavailable_pSeries |
336 | ||
337 | . = 0xf40 | |
fa111f1f | 338 | vsx_unavailable_pseries_trampoline: |
1707dd16 PM |
339 | SET_SCRATCH0(r13) |
340 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
0ebc4cda BH |
341 | b vsx_unavailable_pSeries |
342 | ||
d0c0c9a1 | 343 | . = 0xf60 |
fa111f1f | 344 | facility_unavailable_trampoline: |
d0c0c9a1 MN |
345 | SET_SCRATCH0(r13) |
346 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
021424a1 | 347 | b facility_unavailable_pSeries |
d0c0c9a1 | 348 | |
b14b6260 | 349 | . = 0xf80 |
fa111f1f | 350 | hv_facility_unavailable_trampoline: |
b14b6260 ME |
351 | SET_SCRATCH0(r13) |
352 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
40e1b1cf | 353 | b hv_facility_unavailable_hv |
b14b6260 | 354 | |
0ebc4cda | 355 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 356 | STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error) |
5ccf55dd | 357 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202) |
0ebc4cda | 358 | #endif /* CONFIG_CBE_RAS */ |
b01c8b54 | 359 | |
2613265c | 360 | STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint) |
31a40e2b | 361 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1300) |
b01c8b54 | 362 | |
b92a66a6 | 363 | . = 0x1500 |
51cf2b30 | 364 | .global denorm_exception_hv |
b92a66a6 | 365 | denorm_exception_hv: |
b92a66a6 | 366 | mtspr SPRN_SPRG_HSCRATCH0,r13 |
1707dd16 | 367 | EXCEPTION_PROLOG_0(PACA_EXGEN) |
630573c1 | 368 | EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500) |
b92a66a6 MN |
369 | |
370 | #ifdef CONFIG_PPC_DENORMALISATION | |
371 | mfspr r10,SPRN_HSRR1 | |
372 | mfspr r11,SPRN_HSRR0 /* save HSRR0 */ | |
373 | andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */ | |
374 | addi r11,r11,-4 /* HSRR0 is next instruction */ | |
375 | bne+ denorm_assist | |
376 | #endif | |
377 | ||
630573c1 | 378 | KVMTEST(0x1500) |
b92a66a6 MN |
379 | EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV) |
380 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500) | |
381 | ||
0ebc4cda | 382 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 383 | STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance) |
5ccf55dd | 384 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602) |
0ebc4cda | 385 | #endif /* CONFIG_CBE_RAS */ |
b01c8b54 | 386 | |
2613265c | 387 | STD_EXCEPTION_PSERIES(0x1700, altivec_assist) |
31a40e2b | 388 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x1700) |
b01c8b54 | 389 | |
0ebc4cda | 390 | #ifdef CONFIG_CBE_RAS |
b3e6b5df | 391 | STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal) |
5ccf55dd | 392 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802) |
faab4dd2 MN |
393 | #else |
394 | . = 0x1800 | |
0ebc4cda BH |
395 | #endif /* CONFIG_CBE_RAS */ |
396 | ||
0ebc4cda | 397 | |
b3e6b5df BH |
398 | /*** Out of line interrupts support ***/ |
399 | ||
faab4dd2 | 400 | .align 7 |
b01c8b54 | 401 | /* moved from 0x200 */ |
2513767d | 402 | machine_check_powernv_early: |
1e9b4507 MS |
403 | BEGIN_FTR_SECTION |
404 | EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200) | |
405 | /* | |
406 | * Register contents: | |
407 | * R13 = PACA | |
408 | * R9 = CR | |
409 | * Original R9 to R13 is saved on PACA_EXMC | |
410 | * | |
e75ad93a MS |
411 | * Switch to mc_emergency stack and handle re-entrancy (we limit |
412 | * the nested MCE upto level 4 to avoid stack overflow). | |
413 | * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1 | |
1e9b4507 MS |
414 | * |
415 | * We use paca->in_mce to check whether this is the first entry or | |
416 | * nested machine check. We increment paca->in_mce to track nested | |
417 | * machine checks. | |
418 | * | |
419 | * If this is the first entry then set stack pointer to | |
420 | * paca->mc_emergency_sp, otherwise r1 is already pointing to | |
421 | * stack frame on mc_emergency stack. | |
422 | * | |
423 | * NOTE: We are here with MSR_ME=0 (off), which means we risk a | |
424 | * checkstop if we get another machine check exception before we do | |
425 | * rfid with MSR_ME=1. | |
426 | */ | |
427 | mr r11,r1 /* Save r1 */ | |
428 | lhz r10,PACA_IN_MCE(r13) | |
429 | cmpwi r10,0 /* Are we in nested machine check */ | |
430 | bne 0f /* Yes, we are. */ | |
431 | /* First machine check entry */ | |
432 | ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */ | |
433 | 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ | |
434 | addi r10,r10,1 /* increment paca->in_mce */ | |
435 | sth r10,PACA_IN_MCE(r13) | |
e75ad93a MS |
436 | /* Limit nested MCE to level 4 to avoid stack overflow */ |
437 | cmpwi r10,4 | |
438 | bgt 2f /* Check if we hit limit of 4 */ | |
1e9b4507 MS |
439 | std r11,GPR1(r1) /* Save r1 on the stack. */ |
440 | std r11,0(r1) /* make stack chain pointer */ | |
441 | mfspr r11,SPRN_SRR0 /* Save SRR0 */ | |
442 | std r11,_NIP(r1) | |
443 | mfspr r11,SPRN_SRR1 /* Save SRR1 */ | |
444 | std r11,_MSR(r1) | |
445 | mfspr r11,SPRN_DAR /* Save DAR */ | |
446 | std r11,_DAR(r1) | |
447 | mfspr r11,SPRN_DSISR /* Save DSISR */ | |
448 | std r11,_DSISR(r1) | |
449 | std r9,_CCR(r1) /* Save CR in stackframe */ | |
450 | /* Save r9 through r13 from EXMC save area to stack frame. */ | |
451 | EXCEPTION_PROLOG_COMMON_2(PACA_EXMC) | |
452 | mfmsr r11 /* get MSR value */ | |
453 | ori r11,r11,MSR_ME /* turn on ME bit */ | |
454 | ori r11,r11,MSR_RI /* turn on RI bit */ | |
1e9b4507 | 455 | LOAD_HANDLER(r12, machine_check_handle_early) |
e75ad93a | 456 | 1: mtspr SPRN_SRR0,r12 |
1e9b4507 MS |
457 | mtspr SPRN_SRR1,r11 |
458 | rfid | |
459 | b . /* prevent speculative execution */ | |
e75ad93a MS |
460 | 2: |
461 | /* Stack overflow. Stay on emergency stack and panic. | |
462 | * Keep the ME bit off while panic-ing, so that if we hit | |
463 | * another machine check we checkstop. | |
464 | */ | |
465 | addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */ | |
466 | ld r11,PACAKMSR(r13) | |
e75ad93a MS |
467 | LOAD_HANDLER(r12, unrecover_mce) |
468 | li r10,MSR_ME | |
469 | andc r11,r11,r10 /* Turn off MSR_ME */ | |
470 | b 1b | |
471 | b . /* prevent speculative execution */ | |
1e9b4507 MS |
472 | END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) |
473 | ||
b01c8b54 PM |
474 | machine_check_pSeries: |
475 | .globl machine_check_fwnmi | |
476 | machine_check_fwnmi: | |
b01c8b54 | 477 | SET_SCRATCH0(r13) /* save r13 */ |
1707dd16 PM |
478 | EXCEPTION_PROLOG_0(PACA_EXMC) |
479 | machine_check_pSeries_0: | |
480 | EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200) | |
a74599a5 NP |
481 | /* |
482 | * The following is essentially EXCEPTION_PROLOG_PSERIES_1 with the | |
483 | * difference that MSR_RI is not enabled, because PACA_EXMC is being | |
484 | * used, so nested machine check corrupts it. machine_check_common | |
485 | * enables MSR_RI. | |
486 | */ | |
a74599a5 NP |
487 | ld r10,PACAKMSR(r13) |
488 | xori r10,r10,MSR_RI | |
489 | mfspr r11,SPRN_SRR0 | |
490 | LOAD_HANDLER(r12, machine_check_common) | |
491 | mtspr SPRN_SRR0,r12 | |
492 | mfspr r12,SPRN_SRR1 | |
493 | mtspr SPRN_SRR1,r10 | |
494 | rfid | |
495 | b . /* prevent speculative execution */ | |
496 | ||
b01c8b54 | 497 | KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200) |
697d3899 PM |
498 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300) |
499 | KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380) | |
31a40e2b PM |
500 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x400) |
501 | KVM_HANDLER(PACA_EXSLB, EXC_STD, 0x480) | |
502 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x900) | |
b01c8b54 PM |
503 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982) |
504 | ||
b92a66a6 MN |
505 | #ifdef CONFIG_PPC_DENORMALISATION |
506 | denorm_assist: | |
507 | BEGIN_FTR_SECTION | |
508 | /* | |
509 | * To denormalise we need to move a copy of the register to itself. | |
510 | * For POWER6 do that here for all FP regs. | |
511 | */ | |
512 | mfmsr r10 | |
513 | ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1) | |
514 | xori r10,r10,(MSR_FE0|MSR_FE1) | |
515 | mtmsrd r10 | |
516 | sync | |
d7c67fb1 MN |
517 | |
518 | #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1 | |
519 | #define FMR4(n) FMR2(n) ; FMR2(n+2) | |
520 | #define FMR8(n) FMR4(n) ; FMR4(n+4) | |
521 | #define FMR16(n) FMR8(n) ; FMR8(n+8) | |
522 | #define FMR32(n) FMR16(n) ; FMR16(n+16) | |
523 | FMR32(0) | |
524 | ||
b92a66a6 MN |
525 | FTR_SECTION_ELSE |
526 | /* | |
527 | * To denormalise we need to move a copy of the register to itself. | |
528 | * For POWER7 do that here for the first 32 VSX registers only. | |
529 | */ | |
530 | mfmsr r10 | |
531 | oris r10,r10,MSR_VSX@h | |
532 | mtmsrd r10 | |
533 | sync | |
d7c67fb1 MN |
534 | |
535 | #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1) | |
536 | #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2) | |
537 | #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4) | |
538 | #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8) | |
539 | #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16) | |
540 | XVCPSGNDP32(0) | |
541 | ||
b92a66a6 | 542 | ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206) |
fb0fce3e MN |
543 | |
544 | BEGIN_FTR_SECTION | |
545 | b denorm_done | |
546 | END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) | |
547 | /* | |
548 | * To denormalise we need to move a copy of the register to itself. | |
549 | * For POWER8 we need to do that for all 64 VSX registers | |
550 | */ | |
551 | XVCPSGNDP32(32) | |
552 | denorm_done: | |
b92a66a6 MN |
553 | mtspr SPRN_HSRR0,r11 |
554 | mtcrf 0x80,r9 | |
555 | ld r9,PACA_EXGEN+EX_R9(r13) | |
44e9309f | 556 | RESTORE_PPR_PACA(PACA_EXGEN, r10) |
630573c1 PM |
557 | BEGIN_FTR_SECTION |
558 | ld r10,PACA_EXGEN+EX_CFAR(r13) | |
559 | mtspr SPRN_CFAR,r10 | |
560 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) | |
b92a66a6 MN |
561 | ld r10,PACA_EXGEN+EX_R10(r13) |
562 | ld r11,PACA_EXGEN+EX_R11(r13) | |
563 | ld r12,PACA_EXGEN+EX_R12(r13) | |
564 | ld r13,PACA_EXGEN+EX_R13(r13) | |
565 | HRFID | |
566 | b . | |
567 | #endif | |
568 | ||
b01c8b54 | 569 | .align 7 |
b3e6b5df | 570 | /* moved from 0xe00 */ |
1707dd16 | 571 | STD_EXCEPTION_HV_OOL(0xe02, h_data_storage) |
b01c8b54 | 572 | KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02) |
1707dd16 | 573 | STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage) |
b01c8b54 | 574 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22) |
1707dd16 | 575 | STD_EXCEPTION_HV_OOL(0xe42, emulation_assist) |
b01c8b54 | 576 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42) |
0869b6fd | 577 | MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception) |
b01c8b54 | 578 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62) |
0869b6fd | 579 | |
1707dd16 | 580 | MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell) |
655bb3f4 | 581 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82) |
0ebc4cda | 582 | |
9baaef0a BH |
583 | MASKABLE_EXCEPTION_HV_OOL(0xea2, h_virt_irq) |
584 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xea2) | |
585 | ||
0ebc4cda | 586 | /* moved from 0xf00 */ |
1707dd16 | 587 | STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
31a40e2b | 588 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf00) |
1707dd16 | 589 | STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) |
31a40e2b | 590 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf20) |
1707dd16 | 591 | STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) |
31a40e2b | 592 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf40) |
021424a1 | 593 | STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
31a40e2b | 594 | KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xf60) |
40e1b1cf | 595 | STD_EXCEPTION_HV_OOL(0xf82, hv_facility_unavailable) |
b14b6260 | 596 | KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82) |
0ebc4cda BH |
597 | |
598 | /* | |
fe9e1d54 IM |
599 | * An interrupt came in while soft-disabled. We set paca->irq_happened, then: |
600 | * - If it was a decrementer interrupt, we bump the dec to max and and return. | |
601 | * - If it was a doorbell we return immediately since doorbells are edge | |
602 | * triggered and won't automatically refire. | |
0869b6fd MS |
603 | * - If it was a HMI we return immediately since we handled it in realmode |
604 | * and it won't refire. | |
fe9e1d54 IM |
605 | * - else we hard disable and return. |
606 | * This is called with r10 containing the value to OR to the paca field. | |
0ebc4cda | 607 | */ |
7230c564 BH |
608 | #define MASKED_INTERRUPT(_H) \ |
609 | masked_##_H##interrupt: \ | |
610 | std r11,PACA_EXGEN+EX_R11(r13); \ | |
611 | lbz r11,PACAIRQHAPPENED(r13); \ | |
612 | or r11,r11,r10; \ | |
613 | stb r11,PACAIRQHAPPENED(r13); \ | |
fe9e1d54 IM |
614 | cmpwi r10,PACA_IRQ_DEC; \ |
615 | bne 1f; \ | |
7230c564 BH |
616 | lis r10,0x7fff; \ |
617 | ori r10,r10,0xffff; \ | |
618 | mtspr SPRN_DEC,r10; \ | |
619 | b 2f; \ | |
fe9e1d54 | 620 | 1: cmpwi r10,PACA_IRQ_DBELL; \ |
0869b6fd MS |
621 | beq 2f; \ |
622 | cmpwi r10,PACA_IRQ_HMI; \ | |
fe9e1d54 IM |
623 | beq 2f; \ |
624 | mfspr r10,SPRN_##_H##SRR1; \ | |
7230c564 BH |
625 | rldicl r10,r10,48,1; /* clear MSR_EE */ \ |
626 | rotldi r10,r10,16; \ | |
627 | mtspr SPRN_##_H##SRR1,r10; \ | |
628 | 2: mtcrf 0x80,r9; \ | |
629 | ld r9,PACA_EXGEN+EX_R9(r13); \ | |
630 | ld r10,PACA_EXGEN+EX_R10(r13); \ | |
631 | ld r11,PACA_EXGEN+EX_R11(r13); \ | |
632 | GET_SCRATCH0(r13); \ | |
633 | ##_H##rfid; \ | |
0ebc4cda | 634 | b . |
7230c564 BH |
635 | |
636 | MASKED_INTERRUPT() | |
637 | MASKED_INTERRUPT(H) | |
0ebc4cda | 638 | |
7230c564 BH |
639 | /* |
640 | * Called from arch_local_irq_enable when an interrupt needs | |
fe9e1d54 IM |
641 | * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate |
642 | * which kind of interrupt. MSR:EE is already off. We generate a | |
7230c564 BH |
643 | * stackframe like if a real interrupt had happened. |
644 | * | |
645 | * Note: While MSR:EE is off, we need to make sure that _MSR | |
646 | * in the generated frame has EE set to 1 or the exception | |
647 | * handler will not properly re-enable them. | |
648 | */ | |
649 | _GLOBAL(__replay_interrupt) | |
650 | /* We are going to jump to the exception common code which | |
651 | * will retrieve various register values from the PACA which | |
652 | * we don't give a damn about, so we don't bother storing them. | |
653 | */ | |
654 | mfmsr r12 | |
655 | mflr r11 | |
656 | mfcr r9 | |
657 | ori r12,r12,MSR_EE | |
fe9e1d54 IM |
658 | cmpwi r3,0x900 |
659 | beq decrementer_common | |
660 | cmpwi r3,0x500 | |
661 | beq hardware_interrupt_common | |
662 | BEGIN_FTR_SECTION | |
663 | cmpwi r3,0xe80 | |
664 | beq h_doorbell_common | |
9baaef0a BH |
665 | cmpwi r3,0xea0 |
666 | beq h_virt_irq_common | |
fd7bacbc MS |
667 | cmpwi r3,0xe60 |
668 | beq hmi_exception_common | |
fe9e1d54 IM |
669 | FTR_SECTION_ELSE |
670 | cmpwi r3,0xa00 | |
671 | beq doorbell_super_common | |
672 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) | |
673 | blr | |
a5d4f3ad | 674 | |
0ebc4cda BH |
675 | #ifdef CONFIG_PPC_PSERIES |
676 | /* | |
677 | * Vectors for the FWNMI option. Share common code. | |
678 | */ | |
679 | .globl system_reset_fwnmi | |
680 | .align 7 | |
681 | system_reset_fwnmi: | |
673b189a | 682 | SET_SCRATCH0(r13) /* save r13 */ |
b01c8b54 PM |
683 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, |
684 | NOTEST, 0x100) | |
0ebc4cda BH |
685 | |
686 | #endif /* CONFIG_PPC_PSERIES */ | |
687 | ||
4f6c11db PM |
688 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
689 | kvmppc_skip_interrupt: | |
690 | /* | |
691 | * Here all GPRs are unchanged from when the interrupt happened | |
692 | * except for r13, which is saved in SPRG_SCRATCH0. | |
693 | */ | |
694 | mfspr r13, SPRN_SRR0 | |
695 | addi r13, r13, 4 | |
696 | mtspr SPRN_SRR0, r13 | |
697 | GET_SCRATCH0(r13) | |
698 | rfid | |
699 | b . | |
700 | ||
701 | kvmppc_skip_Hinterrupt: | |
702 | /* | |
703 | * Here all GPRs are unchanged from when the interrupt happened | |
704 | * except for r13, which is saved in SPRG_SCRATCH0. | |
705 | */ | |
706 | mfspr r13, SPRN_HSRR0 | |
707 | addi r13, r13, 4 | |
708 | mtspr SPRN_HSRR0, r13 | |
709 | GET_SCRATCH0(r13) | |
710 | hrfid | |
711 | b . | |
712 | #endif | |
713 | ||
0ebc4cda | 714 | /* |
057b6d7e HB |
715 | * Ensure that any handlers that get invoked from the exception prologs |
716 | * above are below the first 64KB (0x10000) of the kernel image because | |
717 | * the prologs assemble the addresses of these handlers using the | |
718 | * LOAD_HANDLER macro, which uses an ori instruction. | |
0ebc4cda BH |
719 | */ |
720 | ||
721 | /*** Common interrupt handlers ***/ | |
722 | ||
35425501 | 723 | STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception) |
0ebc4cda | 724 | |
7450f6f0 | 725 | STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ) |
35425501 AB |
726 | STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt) |
727 | STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt) | |
1dbdafec | 728 | #ifdef CONFIG_PPC_DOORBELL |
35425501 | 729 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception) |
1dbdafec | 730 | #else |
35425501 | 731 | STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception) |
1dbdafec | 732 | #endif |
35425501 AB |
733 | STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception) |
734 | STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception) | |
735 | STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception) | |
736 | STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt) | |
0869b6fd | 737 | STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception) |
655bb3f4 | 738 | #ifdef CONFIG_PPC_DOORBELL |
35425501 | 739 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception) |
655bb3f4 | 740 | #else |
35425501 | 741 | STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception) |
655bb3f4 | 742 | #endif |
9baaef0a | 743 | STD_EXCEPTION_COMMON_ASYNC(0xea0, h_virt_irq, do_IRQ) |
35425501 AB |
744 | STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception) |
745 | STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception) | |
746 | STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception) | |
0ebc4cda | 747 | #ifdef CONFIG_ALTIVEC |
35425501 | 748 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception) |
0ebc4cda | 749 | #else |
35425501 | 750 | STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception) |
0ebc4cda | 751 | #endif |
0ebc4cda | 752 | |
c1fb6816 MN |
753 | /* |
754 | * Relocation-on interrupts: A subset of the interrupts can be delivered | |
755 | * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering | |
756 | * it. Addresses are the same as the original interrupt addresses, but | |
757 | * offset by 0xc000000000004000. | |
758 | * It's impossible to receive interrupts below 0x300 via this mechanism. | |
759 | * KVM: None of these traps are from the guest ; anything that escalated | |
760 | * to HV=1 from HV=0 is delivered via real mode handlers. | |
761 | */ | |
762 | ||
763 | /* | |
764 | * This uses the standard macro, since the original 0x300 vector | |
765 | * only has extra guff for STAB-based processors -- which never | |
766 | * come here. | |
767 | */ | |
768 | STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access) | |
769 | . = 0x4380 | |
770 | .globl data_access_slb_relon_pSeries | |
771 | data_access_slb_relon_pSeries: | |
c1fb6816 | 772 | SET_SCRATCH0(r13) |
1707dd16 | 773 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
c1fb6816 MN |
774 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380) |
775 | std r3,PACA_EXSLB+EX_R3(r13) | |
776 | mfspr r3,SPRN_DAR | |
777 | mfspr r12,SPRN_SRR1 | |
f0f558b1 | 778 | crset 4*cr6+eq |
c1fb6816 | 779 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 780 | b slb_miss_realmode |
c1fb6816 MN |
781 | #else |
782 | /* | |
ad0289e4 | 783 | * We can't just use a direct branch to slb_miss_realmode |
c1fb6816 MN |
784 | * because the distance from here to there depends on where |
785 | * the kernel ends up being put. | |
786 | */ | |
787 | mfctr r11 | |
ad0289e4 | 788 | LOAD_HANDLER(r10, slb_miss_realmode) |
c1fb6816 MN |
789 | mtctr r10 |
790 | bctr | |
791 | #endif | |
792 | ||
793 | STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access) | |
794 | . = 0x4480 | |
795 | .globl instruction_access_slb_relon_pSeries | |
796 | instruction_access_slb_relon_pSeries: | |
c1fb6816 | 797 | SET_SCRATCH0(r13) |
1707dd16 | 798 | EXCEPTION_PROLOG_0(PACA_EXSLB) |
c1fb6816 MN |
799 | EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480) |
800 | std r3,PACA_EXSLB+EX_R3(r13) | |
801 | mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */ | |
802 | mfspr r12,SPRN_SRR1 | |
f0f558b1 | 803 | crclr 4*cr6+eq |
c1fb6816 | 804 | #ifndef CONFIG_RELOCATABLE |
b1576fec | 805 | b slb_miss_realmode |
c1fb6816 MN |
806 | #else |
807 | mfctr r11 | |
ad0289e4 | 808 | LOAD_HANDLER(r10, slb_miss_realmode) |
c1fb6816 MN |
809 | mtctr r10 |
810 | bctr | |
811 | #endif | |
812 | ||
813 | . = 0x4500 | |
814 | .globl hardware_interrupt_relon_pSeries; | |
815 | .globl hardware_interrupt_relon_hv; | |
816 | hardware_interrupt_relon_pSeries: | |
817 | hardware_interrupt_relon_hv: | |
818 | BEGIN_FTR_SECTION | |
819 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV) | |
820 | FTR_SECTION_ELSE | |
821 | _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR) | |
3e96ca7f | 822 | ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE) |
c1fb6816 MN |
823 | STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment) |
824 | STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check) | |
825 | STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable) | |
826 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer) | |
827 | STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer) | |
1dbdafec | 828 | MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super) |
c1fb6816 MN |
829 | STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b) |
830 | ||
831 | . = 0x4c00 | |
832 | .globl system_call_relon_pSeries | |
833 | system_call_relon_pSeries: | |
834 | HMT_MEDIUM | |
835 | SYSCALL_PSERIES_1 | |
836 | SYSCALL_PSERIES_2_DIRECT | |
837 | SYSCALL_PSERIES_3 | |
838 | ||
839 | STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step) | |
840 | ||
841 | . = 0x4e00 | |
1d567cb4 | 842 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 MN |
843 | |
844 | . = 0x4e20 | |
1d567cb4 | 845 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 MN |
846 | |
847 | . = 0x4e40 | |
d671ddd6 | 848 | emulation_assist_relon_trampoline: |
1707dd16 PM |
849 | SET_SCRATCH0(r13) |
850 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
851 | b emulation_assist_relon_hv |
852 | ||
c1fb6816 | 853 | . = 0x4e60 |
1d567cb4 | 854 | b . /* Can't happen, see v2.07 Book III-S section 6.5 */ |
c1fb6816 | 855 | |
655bb3f4 | 856 | . = 0x4e80 |
d671ddd6 | 857 | h_doorbell_relon_trampoline: |
1707dd16 PM |
858 | SET_SCRATCH0(r13) |
859 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
655bb3f4 | 860 | b h_doorbell_relon_hv |
c1fb6816 | 861 | |
9baaef0a BH |
862 | . = 0x4ea0 |
863 | h_virt_irq_relon_trampoline: | |
864 | SET_SCRATCH0(r13) | |
865 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
866 | b h_virt_irq_relon_hv | |
867 | ||
c1fb6816 | 868 | . = 0x4f00 |
fa111f1f | 869 | performance_monitor_relon_pseries_trampoline: |
1707dd16 PM |
870 | SET_SCRATCH0(r13) |
871 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
872 | b performance_monitor_relon_pSeries |
873 | ||
c1fb6816 | 874 | . = 0x4f20 |
fa111f1f | 875 | altivec_unavailable_relon_pseries_trampoline: |
1707dd16 PM |
876 | SET_SCRATCH0(r13) |
877 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
878 | b altivec_unavailable_relon_pSeries |
879 | ||
c1fb6816 | 880 | . = 0x4f40 |
fa111f1f | 881 | vsx_unavailable_relon_pseries_trampoline: |
1707dd16 PM |
882 | SET_SCRATCH0(r13) |
883 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
c1fb6816 MN |
884 | b vsx_unavailable_relon_pSeries |
885 | ||
d0c0c9a1 | 886 | . = 0x4f60 |
fa111f1f | 887 | facility_unavailable_relon_trampoline: |
d0c0c9a1 MN |
888 | SET_SCRATCH0(r13) |
889 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
021424a1 | 890 | b facility_unavailable_relon_pSeries |
d0c0c9a1 | 891 | |
b14b6260 | 892 | . = 0x4f80 |
fa111f1f | 893 | hv_facility_unavailable_relon_trampoline: |
b14b6260 ME |
894 | SET_SCRATCH0(r13) |
895 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
88f09412 | 896 | b hv_facility_unavailable_relon_hv |
b14b6260 | 897 | |
c1fb6816 MN |
898 | STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) |
899 | #ifdef CONFIG_PPC_DENORMALISATION | |
900 | . = 0x5500 | |
901 | b denorm_exception_hv | |
902 | #endif | |
c1fb6816 | 903 | STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist) |
c1fb6816 | 904 | |
fe1952fc | 905 | ppc64_runlatch_on_trampoline: |
b1576fec | 906 | b __ppc64_runlatch_on |
fe1952fc | 907 | |
0ebc4cda BH |
908 | /* |
909 | * Here r13 points to the paca, r9 contains the saved CR, | |
910 | * SRR0 and SRR1 are saved in r11 and r12, | |
911 | * r9 - r13 are saved in paca->exgen. | |
912 | */ | |
913 | .align 7 | |
914 | .globl data_access_common | |
915 | data_access_common: | |
916 | mfspr r10,SPRN_DAR | |
917 | std r10,PACA_EXGEN+EX_DAR(r13) | |
918 | mfspr r10,SPRN_DSISR | |
919 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
920 | EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN) | |
9daf112b | 921 | RECONCILE_IRQ_STATE(r10, r11) |
a546498f | 922 | ld r12,_MSR(r1) |
0ebc4cda BH |
923 | ld r3,PACA_EXGEN+EX_DAR(r13) |
924 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
925 | li r5,0x300 | |
caca285e AK |
926 | std r3,_DAR(r1) |
927 | std r4,_DSISR(r1) | |
928 | BEGIN_MMU_FTR_SECTION | |
b1576fec | 929 | b do_hash_page /* Try to handle as hpte fault */ |
caca285e AK |
930 | MMU_FTR_SECTION_ELSE |
931 | b handle_page_fault | |
5a25b6f5 | 932 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) |
0ebc4cda | 933 | |
b3e6b5df | 934 | .align 7 |
278a6cdc | 935 | .globl h_data_storage_common |
b3e6b5df | 936 | h_data_storage_common: |
278a6cdc MN |
937 | mfspr r10,SPRN_HDAR |
938 | std r10,PACA_EXGEN+EX_DAR(r13) | |
939 | mfspr r10,SPRN_HDSISR | |
940 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
941 | EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN) | |
b1576fec | 942 | bl save_nvgprs |
9daf112b | 943 | RECONCILE_IRQ_STATE(r10, r11) |
278a6cdc | 944 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
945 | bl unknown_exception |
946 | b ret_from_except | |
b3e6b5df | 947 | |
0ebc4cda BH |
948 | .align 7 |
949 | .globl instruction_access_common | |
950 | instruction_access_common: | |
951 | EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN) | |
9daf112b | 952 | RECONCILE_IRQ_STATE(r10, r11) |
a546498f | 953 | ld r12,_MSR(r1) |
0ebc4cda BH |
954 | ld r3,_NIP(r1) |
955 | andis. r4,r12,0x5820 | |
956 | li r5,0x400 | |
caca285e AK |
957 | std r3,_DAR(r1) |
958 | std r4,_DSISR(r1) | |
959 | BEGIN_MMU_FTR_SECTION | |
b1576fec | 960 | b do_hash_page /* Try to handle as hpte fault */ |
caca285e AK |
961 | MMU_FTR_SECTION_ELSE |
962 | b handle_page_fault | |
5a25b6f5 | 963 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_TYPE_RADIX) |
0ebc4cda | 964 | |
35425501 | 965 | STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception) |
b3e6b5df | 966 | |
4e243b79 MS |
967 | /* |
968 | * Machine check is different because we use a different | |
969 | * save area: PACA_EXMC instead of PACA_EXGEN. | |
970 | */ | |
971 | .align 7 | |
972 | .globl machine_check_common | |
973 | machine_check_common: | |
974 | ||
975 | mfspr r10,SPRN_DAR | |
3f3b5dc1 | 976 | std r10,PACA_EXMC+EX_DAR(r13) |
4e243b79 | 977 | mfspr r10,SPRN_DSISR |
3f3b5dc1 | 978 | stw r10,PACA_EXMC+EX_DSISR(r13) |
4e243b79 MS |
979 | EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC) |
980 | FINISH_NAP | |
9daf112b | 981 | RECONCILE_IRQ_STATE(r10, r11) |
3f3b5dc1 NP |
982 | ld r3,PACA_EXMC+EX_DAR(r13) |
983 | lwz r4,PACA_EXMC+EX_DSISR(r13) | |
a74599a5 NP |
984 | /* Enable MSR_RI when finished with PACA_EXMC */ |
985 | li r10,MSR_RI | |
986 | mtmsrd r10,1 | |
4e243b79 MS |
987 | std r3,_DAR(r1) |
988 | std r4,_DSISR(r1) | |
b1576fec | 989 | bl save_nvgprs |
4e243b79 | 990 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
991 | bl machine_check_exception |
992 | b ret_from_except | |
4e243b79 | 993 | |
0ebc4cda BH |
994 | .align 7 |
995 | .globl alignment_common | |
996 | alignment_common: | |
997 | mfspr r10,SPRN_DAR | |
998 | std r10,PACA_EXGEN+EX_DAR(r13) | |
999 | mfspr r10,SPRN_DSISR | |
1000 | stw r10,PACA_EXGEN+EX_DSISR(r13) | |
1001 | EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN) | |
1002 | ld r3,PACA_EXGEN+EX_DAR(r13) | |
1003 | lwz r4,PACA_EXGEN+EX_DSISR(r13) | |
1004 | std r3,_DAR(r1) | |
1005 | std r4,_DSISR(r1) | |
b1576fec | 1006 | bl save_nvgprs |
9daf112b | 1007 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1008 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1009 | bl alignment_exception |
1010 | b ret_from_except | |
0ebc4cda BH |
1011 | |
1012 | .align 7 | |
1013 | .globl program_check_common | |
1014 | program_check_common: | |
1015 | EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN) | |
b1576fec | 1016 | bl save_nvgprs |
9daf112b | 1017 | RECONCILE_IRQ_STATE(r10, r11) |
922b9f86 | 1018 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1019 | bl program_check_exception |
1020 | b ret_from_except | |
0ebc4cda BH |
1021 | |
1022 | .align 7 | |
1023 | .globl fp_unavailable_common | |
1024 | fp_unavailable_common: | |
1025 | EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN) | |
1026 | bne 1f /* if from user, just load it up */ | |
b1576fec | 1027 | bl save_nvgprs |
9daf112b | 1028 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1029 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1030 | bl kernel_fp_unavailable_exception |
0ebc4cda | 1031 | BUG_OPCODE |
bc2a9408 MN |
1032 | 1: |
1033 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
1034 | BEGIN_FTR_SECTION | |
1035 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1036 | * transaction), go do TM stuff | |
1037 | */ | |
1038 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1039 | bne- 2f | |
1040 | END_FTR_SECTION_IFSET(CPU_FTR_TM) | |
1041 | #endif | |
b1576fec | 1042 | bl load_up_fpu |
0ebc4cda | 1043 | b fast_exception_return |
bc2a9408 MN |
1044 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1045 | 2: /* User process was in a transaction */ | |
b1576fec | 1046 | bl save_nvgprs |
9daf112b | 1047 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1048 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1049 | bl fp_unavailable_tm |
1050 | b ret_from_except | |
bc2a9408 | 1051 | #endif |
0ebc4cda BH |
1052 | .align 7 |
1053 | .globl altivec_unavailable_common | |
1054 | altivec_unavailable_common: | |
1055 | EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) | |
1056 | #ifdef CONFIG_ALTIVEC | |
1057 | BEGIN_FTR_SECTION | |
1058 | beq 1f | |
bc2a9408 MN |
1059 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1060 | BEGIN_FTR_SECTION_NESTED(69) | |
1061 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1062 | * transaction), go do TM stuff | |
1063 | */ | |
1064 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1065 | bne- 2f | |
1066 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) | |
1067 | #endif | |
b1576fec | 1068 | bl load_up_altivec |
0ebc4cda | 1069 | b fast_exception_return |
bc2a9408 MN |
1070 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1071 | 2: /* User process was in a transaction */ | |
b1576fec | 1072 | bl save_nvgprs |
9daf112b | 1073 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1074 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1075 | bl altivec_unavailable_tm |
1076 | b ret_from_except | |
bc2a9408 | 1077 | #endif |
0ebc4cda BH |
1078 | 1: |
1079 | END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |
1080 | #endif | |
b1576fec | 1081 | bl save_nvgprs |
9daf112b | 1082 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1083 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1084 | bl altivec_unavailable_exception |
1085 | b ret_from_except | |
0ebc4cda BH |
1086 | |
1087 | .align 7 | |
1088 | .globl vsx_unavailable_common | |
1089 | vsx_unavailable_common: | |
1090 | EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN) | |
1091 | #ifdef CONFIG_VSX | |
1092 | BEGIN_FTR_SECTION | |
7230c564 | 1093 | beq 1f |
bc2a9408 MN |
1094 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1095 | BEGIN_FTR_SECTION_NESTED(69) | |
1096 | /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in | |
1097 | * transaction), go do TM stuff | |
1098 | */ | |
1099 | rldicl. r0, r12, (64-MSR_TS_LG), (64-2) | |
1100 | bne- 2f | |
1101 | END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69) | |
1102 | #endif | |
b1576fec | 1103 | b load_up_vsx |
bc2a9408 MN |
1104 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
1105 | 2: /* User process was in a transaction */ | |
b1576fec | 1106 | bl save_nvgprs |
9daf112b | 1107 | RECONCILE_IRQ_STATE(r10, r11) |
bc2a9408 | 1108 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1109 | bl vsx_unavailable_tm |
1110 | b ret_from_except | |
bc2a9408 | 1111 | #endif |
0ebc4cda BH |
1112 | 1: |
1113 | END_FTR_SECTION_IFSET(CPU_FTR_VSX) | |
1114 | #endif | |
b1576fec | 1115 | bl save_nvgprs |
9daf112b | 1116 | RECONCILE_IRQ_STATE(r10, r11) |
0ebc4cda | 1117 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec AB |
1118 | bl vsx_unavailable_exception |
1119 | b ret_from_except | |
0ebc4cda | 1120 | |
61383407 | 1121 | /* Equivalents to the above handlers for relocation-on interrupt vectors */ |
1707dd16 | 1122 | STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist) |
1707dd16 | 1123 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell) |
9baaef0a | 1124 | MASKABLE_RELON_EXCEPTION_HV_OOL(0xea0, h_virt_irq) |
61383407 | 1125 | |
1707dd16 PM |
1126 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor) |
1127 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) | |
1128 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) | |
021424a1 | 1129 | STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) |
88f09412 | 1130 | STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) |
61383407 | 1131 | |
8ed8ab40 HB |
1132 | /* |
1133 | * The __end_interrupts marker must be past the out-of-line (OOL) | |
1134 | * handlers, so that they are copied to real address 0x100 when running | |
1135 | * a relocatable kernel. This ensures they can be reached from the short | |
1136 | * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch | |
1137 | * directly, without using LOAD_HANDLER(). | |
1138 | */ | |
1139 | .align 7 | |
1140 | .globl __end_interrupts | |
1141 | __end_interrupts: | |
1142 | ||
61383407 BH |
1143 | #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) |
1144 | /* | |
1145 | * Data area reserved for FWNMI option. | |
1146 | * This address (0x7000) is fixed by the RPA. | |
1147 | */ | |
1148 | .= 0x7000 | |
1149 | .globl fwnmi_data_area | |
1150 | fwnmi_data_area: | |
1151 | ||
1152 | /* pseries and powernv need to keep the whole page from | |
1153 | * 0x7000 to 0x8000 free for use by the firmware | |
1154 | */ | |
1155 | . = 0x8000 | |
1156 | #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */ | |
1157 | ||
b88d4bce BH |
1158 | STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception) |
1159 | STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception) | |
1160 | ||
1161 | #ifdef CONFIG_CBE_RAS | |
1162 | STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception) | |
1163 | STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception) | |
1164 | STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception) | |
1165 | #endif /* CONFIG_CBE_RAS */ | |
1166 | ||
11d54904 GR |
1167 | .globl hmi_exception_early |
1168 | hmi_exception_early: | |
fd7bacbc | 1169 | EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, 0xe62) |
11d54904 GR |
1170 | mr r10,r1 /* Save r1 */ |
1171 | ld r1,PACAEMERGSP(r13) /* Use emergency stack */ | |
1172 | subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */ | |
1173 | std r9,_CCR(r1) /* save CR in stackframe */ | |
1174 | mfspr r11,SPRN_HSRR0 /* Save HSRR0 */ | |
1175 | std r11,_NIP(r1) /* save HSRR0 in stackframe */ | |
1176 | mfspr r12,SPRN_HSRR1 /* Save SRR1 */ | |
1177 | std r12,_MSR(r1) /* save SRR1 in stackframe */ | |
1178 | std r10,0(r1) /* make stack chain pointer */ | |
1179 | std r0,GPR0(r1) /* save r0 in stackframe */ | |
1180 | std r10,GPR1(r1) /* save r1 in stackframe */ | |
1181 | EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN) | |
1182 | EXCEPTION_PROLOG_COMMON_3(0xe60) | |
1183 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1184 | bl hmi_exception_realmode | |
1185 | /* Windup the stack. */ | |
11d54904 GR |
1186 | /* Move original HSRR0 and HSRR1 into the respective regs */ |
1187 | ld r9,_MSR(r1) | |
1188 | mtspr SPRN_HSRR1,r9 | |
1189 | ld r3,_NIP(r1) | |
1190 | mtspr SPRN_HSRR0,r3 | |
1191 | ld r9,_CTR(r1) | |
1192 | mtctr r9 | |
1193 | ld r9,_XER(r1) | |
1194 | mtxer r9 | |
1195 | ld r9,_LINK(r1) | |
1196 | mtlr r9 | |
1197 | REST_GPR(0, r1) | |
1198 | REST_8GPRS(2, r1) | |
1199 | REST_GPR(10, r1) | |
1200 | ld r11,_CCR(r1) | |
1201 | mtcr r11 | |
1202 | REST_GPR(11, r1) | |
1203 | REST_2GPRS(12, r1) | |
1204 | /* restore original r1. */ | |
1205 | ld r1,GPR1(r1) | |
1206 | ||
1207 | /* | |
1208 | * Go to virtual mode and pull the HMI event information from | |
1209 | * firmware. | |
1210 | */ | |
1211 | .globl hmi_exception_after_realmode | |
1212 | hmi_exception_after_realmode: | |
1213 | SET_SCRATCH0(r13) | |
1214 | EXCEPTION_PROLOG_0(PACA_EXGEN) | |
1215 | b hmi_exception_hv | |
1216 | ||
61383407 | 1217 | |
4e243b79 MS |
1218 | #define MACHINE_CHECK_HANDLER_WINDUP \ |
1219 | /* Clear MSR_RI before setting SRR0 and SRR1. */\ | |
1220 | li r0,MSR_RI; \ | |
1221 | mfmsr r9; /* get MSR value */ \ | |
1222 | andc r9,r9,r0; \ | |
1223 | mtmsrd r9,1; /* Clear MSR_RI */ \ | |
1224 | /* Move original SRR0 and SRR1 into the respective regs */ \ | |
1225 | ld r9,_MSR(r1); \ | |
1226 | mtspr SPRN_SRR1,r9; \ | |
1227 | ld r3,_NIP(r1); \ | |
1228 | mtspr SPRN_SRR0,r3; \ | |
1229 | ld r9,_CTR(r1); \ | |
1230 | mtctr r9; \ | |
1231 | ld r9,_XER(r1); \ | |
1232 | mtxer r9; \ | |
1233 | ld r9,_LINK(r1); \ | |
1234 | mtlr r9; \ | |
1235 | REST_GPR(0, r1); \ | |
1236 | REST_8GPRS(2, r1); \ | |
1237 | REST_GPR(10, r1); \ | |
1238 | ld r11,_CCR(r1); \ | |
1239 | mtcr r11; \ | |
1240 | /* Decrement paca->in_mce. */ \ | |
1241 | lhz r12,PACA_IN_MCE(r13); \ | |
1242 | subi r12,r12,1; \ | |
1243 | sth r12,PACA_IN_MCE(r13); \ | |
1244 | REST_GPR(11, r1); \ | |
1245 | REST_2GPRS(12, r1); \ | |
1246 | /* restore original r1. */ \ | |
1247 | ld r1,GPR1(r1) | |
1248 | ||
1249 | /* | |
1250 | * Handle machine check early in real mode. We come here with | |
1251 | * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack. | |
1252 | */ | |
1253 | .align 7 | |
1254 | .globl machine_check_handle_early | |
1255 | machine_check_handle_early: | |
1256 | std r0,GPR0(r1) /* Save r0 */ | |
1257 | EXCEPTION_PROLOG_COMMON_3(0x200) | |
b1576fec | 1258 | bl save_nvgprs |
4e243b79 | 1259 | addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1260 | bl machine_check_early |
2749a2f2 | 1261 | std r3,RESULT(r1) /* Save result */ |
4e243b79 MS |
1262 | ld r12,_MSR(r1) |
1263 | #ifdef CONFIG_PPC_P7_NAP | |
1264 | /* | |
1265 | * Check if thread was in power saving mode. We come here when any | |
1266 | * of the following is true: | |
1267 | * a. thread wasn't in power saving mode | |
bc14c491 MS |
1268 | * b. thread was in power saving mode with no state loss, |
1269 | * supervisor state loss or hypervisor state loss. | |
4e243b79 | 1270 | * |
bc14c491 | 1271 | * Go back to nap/sleep/winkle mode again if (b) is true. |
4e243b79 MS |
1272 | */ |
1273 | rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ | |
1274 | beq 4f /* No, it wasn;t */ | |
1275 | /* Thread was in power saving mode. Go back to nap again. */ | |
1276 | cmpwi r11,2 | |
bc14c491 MS |
1277 | blt 3f |
1278 | /* Supervisor/Hypervisor state loss */ | |
4e243b79 MS |
1279 | li r0,1 |
1280 | stb r0,PACA_NAPSTATELOST(r13) | |
b1576fec | 1281 | 3: bl machine_check_queue_event |
4e243b79 MS |
1282 | MACHINE_CHECK_HANDLER_WINDUP |
1283 | GET_PACA(r13) | |
1284 | ld r1,PACAR1(r13) | |
bc14c491 MS |
1285 | /* |
1286 | * Check what idle state this CPU was in and go back to same mode | |
1287 | * again. | |
1288 | */ | |
1289 | lbz r3,PACA_THREAD_IDLE_STATE(r13) | |
1290 | cmpwi r3,PNV_THREAD_NAP | |
1291 | bgt 10f | |
1292 | IDLE_STATE_ENTER_SEQ(PPC_NAP) | |
1293 | /* No return */ | |
1294 | 10: | |
1295 | cmpwi r3,PNV_THREAD_SLEEP | |
1296 | bgt 2f | |
1297 | IDLE_STATE_ENTER_SEQ(PPC_SLEEP) | |
1298 | /* No return */ | |
1299 | ||
1300 | 2: | |
1301 | /* | |
1302 | * Go back to winkle. Please note that this thread was woken up in | |
1303 | * machine check from winkle and have not restored the per-subcore | |
1304 | * state. Hence before going back to winkle, set last bit of HSPGR0 | |
1305 | * to 1. This will make sure that if this thread gets woken up | |
1306 | * again at reset vector 0x100 then it will get chance to restore | |
1307 | * the subcore state. | |
1308 | */ | |
1309 | ori r13,r13,1 | |
1310 | SET_PACA(r13) | |
1311 | IDLE_STATE_ENTER_SEQ(PPC_WINKLE) | |
1312 | /* No return */ | |
4e243b79 MS |
1313 | 4: |
1314 | #endif | |
1315 | /* | |
1316 | * Check if we are coming from hypervisor userspace. If yes then we | |
1317 | * continue in host kernel in V mode to deliver the MC event. | |
1318 | */ | |
1319 | rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */ | |
1320 | beq 5f | |
1321 | andi. r11,r12,MSR_PR /* See if coming from user. */ | |
1322 | bne 9f /* continue in V mode if we are. */ | |
1323 | ||
1324 | 5: | |
44d5f6f5 | 1325 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
4e243b79 MS |
1326 | /* |
1327 | * We are coming from kernel context. Check if we are coming from | |
1328 | * guest. if yes, then we can continue. We will fall through | |
1329 | * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest. | |
1330 | */ | |
1331 | lbz r11,HSTATE_IN_GUEST(r13) | |
1332 | cmpwi r11,0 /* Check if coming from guest */ | |
1333 | bne 9f /* continue if we are. */ | |
1334 | #endif | |
1335 | /* | |
1336 | * At this point we are not sure about what context we come from. | |
1337 | * Queue up the MCE event and return from the interrupt. | |
1338 | * But before that, check if this is an un-recoverable exception. | |
1339 | * If yes, then stay on emergency stack and panic. | |
1340 | */ | |
1341 | andi. r11,r12,MSR_RI | |
1342 | bne 2f | |
2749a2f2 | 1343 | 1: mfspr r11,SPRN_SRR0 |
2749a2f2 MS |
1344 | LOAD_HANDLER(r10,unrecover_mce) |
1345 | mtspr SPRN_SRR0,r10 | |
1346 | ld r10,PACAKMSR(r13) | |
1347 | /* | |
1348 | * We are going down. But there are chances that we might get hit by | |
1349 | * another MCE during panic path and we may run into unstable state | |
1350 | * with no way out. Hence, turn ME bit off while going down, so that | |
1351 | * when another MCE is hit during panic path, system will checkstop | |
1352 | * and hypervisor will get restarted cleanly by SP. | |
1353 | */ | |
1354 | li r3,MSR_ME | |
1355 | andc r10,r10,r3 /* Turn off MSR_ME */ | |
1356 | mtspr SPRN_SRR1,r10 | |
1357 | rfid | |
1358 | b . | |
4e243b79 | 1359 | 2: |
2749a2f2 MS |
1360 | /* |
1361 | * Check if we have successfully handled/recovered from error, if not | |
1362 | * then stay on emergency stack and panic. | |
1363 | */ | |
1364 | ld r3,RESULT(r1) /* Load result */ | |
1365 | cmpdi r3,0 /* see if we handled MCE successfully */ | |
1366 | ||
1367 | beq 1b /* if !handled then panic */ | |
4e243b79 MS |
1368 | /* |
1369 | * Return from MC interrupt. | |
1370 | * Queue up the MCE event so that we can log it later, while | |
1371 | * returning from kernel or opal call. | |
1372 | */ | |
b1576fec | 1373 | bl machine_check_queue_event |
4e243b79 MS |
1374 | MACHINE_CHECK_HANDLER_WINDUP |
1375 | rfid | |
1376 | 9: | |
1377 | /* Deliver the machine check to host kernel in V mode. */ | |
1378 | MACHINE_CHECK_HANDLER_WINDUP | |
1379 | b machine_check_pSeries | |
1380 | ||
2749a2f2 MS |
1381 | unrecover_mce: |
1382 | /* Invoke machine_check_exception to print MCE event and panic. */ | |
1383 | addi r3,r1,STACK_FRAME_OVERHEAD | |
ad718622 | 1384 | bl machine_check_exception |
2749a2f2 MS |
1385 | /* |
1386 | * We will not reach here. Even if we did, there is no way out. Call | |
1387 | * unrecoverable_exception and die. | |
1388 | */ | |
1389 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | |
ad718622 | 1390 | bl unrecoverable_exception |
2749a2f2 | 1391 | b 1b |
087aa036 CG |
1392 | /* |
1393 | * r13 points to the PACA, r9 contains the saved CR, | |
1394 | * r12 contain the saved SRR1, SRR0 is still ready for return | |
1395 | * r3 has the faulting address | |
1396 | * r9 - r13 are saved in paca->exslb. | |
1397 | * r3 is saved in paca->slb_r3 | |
f0f558b1 | 1398 | * cr6.eq is set for a D-SLB miss, clear for a I-SLB miss |
087aa036 CG |
1399 | * We assume we aren't going to take any exceptions during this procedure. |
1400 | */ | |
ad0289e4 | 1401 | slb_miss_realmode: |
087aa036 CG |
1402 | mflr r10 |
1403 | #ifdef CONFIG_RELOCATABLE | |
1404 | mtctr r11 | |
1405 | #endif | |
1406 | ||
1407 | stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */ | |
1408 | std r10,PACA_EXSLB+EX_LR(r13) /* save LR */ | |
f0f558b1 | 1409 | std r3,PACA_EXSLB+EX_DAR(r13) |
087aa036 | 1410 | |
f0f558b1 | 1411 | crset 4*cr0+eq |
caca285e AK |
1412 | #ifdef CONFIG_PPC_STD_MMU_64 |
1413 | BEGIN_MMU_FTR_SECTION | |
b1576fec | 1414 | bl slb_allocate_realmode |
5a25b6f5 | 1415 | END_MMU_FTR_SECTION_IFCLR(MMU_FTR_TYPE_RADIX) |
caca285e | 1416 | #endif |
087aa036 CG |
1417 | |
1418 | ld r10,PACA_EXSLB+EX_LR(r13) | |
1419 | ld r3,PACA_EXSLB+EX_R3(r13) | |
1420 | lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */ | |
087aa036 | 1421 | mtlr r10 |
f0f558b1 PM |
1422 | |
1423 | beq 8f /* if bad address, make full stack frame */ | |
1424 | ||
087aa036 CG |
1425 | andi. r10,r12,MSR_RI /* check for unrecoverable exception */ |
1426 | beq- 2f | |
f0f558b1 PM |
1427 | |
1428 | /* All done -- return from exception. */ | |
087aa036 CG |
1429 | |
1430 | .machine push | |
1431 | .machine "power4" | |
1432 | mtcrf 0x80,r9 | |
f0f558b1 | 1433 | mtcrf 0x02,r9 /* I/D indication is in cr6 */ |
087aa036 CG |
1434 | mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */ |
1435 | .machine pop | |
1436 | ||
1437 | RESTORE_PPR_PACA(PACA_EXSLB, r9) | |
1438 | ld r9,PACA_EXSLB+EX_R9(r13) | |
1439 | ld r10,PACA_EXSLB+EX_R10(r13) | |
1440 | ld r11,PACA_EXSLB+EX_R11(r13) | |
1441 | ld r12,PACA_EXSLB+EX_R12(r13) | |
1442 | ld r13,PACA_EXSLB+EX_R13(r13) | |
1443 | rfid | |
1444 | b . /* prevent speculative execution */ | |
1445 | ||
1446 | 2: mfspr r11,SPRN_SRR0 | |
087aa036 CG |
1447 | LOAD_HANDLER(r10,unrecov_slb) |
1448 | mtspr SPRN_SRR0,r10 | |
1449 | ld r10,PACAKMSR(r13) | |
1450 | mtspr SPRN_SRR1,r10 | |
1451 | rfid | |
1452 | b . | |
1453 | ||
1454 | unrecov_slb: | |
1455 | EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB) | |
9daf112b | 1456 | RECONCILE_IRQ_STATE(r10, r11) |
b1576fec | 1457 | bl save_nvgprs |
087aa036 | 1458 | 1: addi r3,r1,STACK_FRAME_OVERHEAD |
b1576fec | 1459 | bl unrecoverable_exception |
087aa036 CG |
1460 | b 1b |
1461 | ||
f0f558b1 | 1462 | 8: mfspr r11,SPRN_SRR0 |
f0f558b1 PM |
1463 | LOAD_HANDLER(r10,bad_addr_slb) |
1464 | mtspr SPRN_SRR0,r10 | |
1465 | ld r10,PACAKMSR(r13) | |
1466 | mtspr SPRN_SRR1,r10 | |
1467 | rfid | |
1468 | b . | |
1469 | ||
1470 | bad_addr_slb: | |
1471 | EXCEPTION_PROLOG_COMMON(0x380, PACA_EXSLB) | |
1472 | RECONCILE_IRQ_STATE(r10, r11) | |
1473 | ld r3, PACA_EXSLB+EX_DAR(r13) | |
1474 | std r3, _DAR(r1) | |
1475 | beq cr6, 2f | |
1476 | li r10, 0x480 /* fix trap number for I-SLB miss */ | |
1477 | std r10, _TRAP(r1) | |
1478 | 2: bl save_nvgprs | |
1479 | addi r3, r1, STACK_FRAME_OVERHEAD | |
1480 | bl slb_miss_bad_addr | |
1481 | b ret_from_except | |
087aa036 CG |
1482 | |
1483 | #ifdef CONFIG_PPC_970_NAP | |
1484 | power4_fixup_nap: | |
1485 | andc r9,r9,r10 | |
1486 | std r9,TI_LOCAL_FLAGS(r11) | |
1487 | ld r10,_LINK(r1) /* make idle task do the */ | |
1488 | std r10,_NIP(r1) /* equivalent of a blr */ | |
1489 | blr | |
1490 | #endif | |
1491 | ||
0ebc4cda BH |
1492 | /* |
1493 | * Hash table stuff | |
1494 | */ | |
1495 | .align 7 | |
6a3bab90 | 1496 | do_hash_page: |
caca285e | 1497 | #ifdef CONFIG_PPC_STD_MMU_64 |
9c7cc234 | 1498 | andis. r0,r4,0xa410 /* weird error? */ |
0ebc4cda | 1499 | bne- handle_page_fault /* if not, try to insert a HPTE */ |
9c7cc234 P |
1500 | andis. r0,r4,DSISR_DABRMATCH@h |
1501 | bne- handle_dabr_fault | |
9778b696 | 1502 | CURRENT_THREAD_INFO(r11, r1) |
9c1e1052 PM |
1503 | lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */ |
1504 | andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */ | |
1505 | bne 77f /* then don't call hash_page now */ | |
0ebc4cda BH |
1506 | |
1507 | /* | |
1508 | * r3 contains the faulting address | |
106713a1 | 1509 | * r4 msr |
0ebc4cda | 1510 | * r5 contains the trap number |
aefa5688 | 1511 | * r6 contains dsisr |
0ebc4cda | 1512 | * |
7230c564 | 1513 | * at return r3 = 0 for success, 1 for page fault, negative for error |
0ebc4cda | 1514 | */ |
106713a1 | 1515 | mr r4,r12 |
aefa5688 | 1516 | ld r6,_DSISR(r1) |
106713a1 AK |
1517 | bl __hash_page /* build HPTE if possible */ |
1518 | cmpdi r3,0 /* see if __hash_page succeeded */ | |
0ebc4cda | 1519 | |
7230c564 | 1520 | /* Success */ |
0ebc4cda | 1521 | beq fast_exc_return_irq /* Return from exception on success */ |
0ebc4cda | 1522 | |
7230c564 BH |
1523 | /* Error */ |
1524 | blt- 13f | |
caca285e | 1525 | #endif /* CONFIG_PPC_STD_MMU_64 */ |
9c7cc234 | 1526 | |
0ebc4cda BH |
1527 | /* Here we have a page fault that hash_page can't handle. */ |
1528 | handle_page_fault: | |
0ebc4cda BH |
1529 | 11: ld r4,_DAR(r1) |
1530 | ld r5,_DSISR(r1) | |
1531 | addi r3,r1,STACK_FRAME_OVERHEAD | |
b1576fec | 1532 | bl do_page_fault |
0ebc4cda | 1533 | cmpdi r3,0 |
a546498f | 1534 | beq+ 12f |
b1576fec | 1535 | bl save_nvgprs |
0ebc4cda BH |
1536 | mr r5,r3 |
1537 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1538 | lwz r4,_DAR(r1) | |
b1576fec AB |
1539 | bl bad_page_fault |
1540 | b ret_from_except | |
0ebc4cda | 1541 | |
a546498f BH |
1542 | /* We have a data breakpoint exception - handle it */ |
1543 | handle_dabr_fault: | |
b1576fec | 1544 | bl save_nvgprs |
a546498f BH |
1545 | ld r4,_DAR(r1) |
1546 | ld r5,_DSISR(r1) | |
1547 | addi r3,r1,STACK_FRAME_OVERHEAD | |
b1576fec AB |
1548 | bl do_break |
1549 | 12: b ret_from_except_lite | |
a546498f | 1550 | |
0ebc4cda | 1551 | |
caca285e | 1552 | #ifdef CONFIG_PPC_STD_MMU_64 |
0ebc4cda BH |
1553 | /* We have a page fault that hash_page could handle but HV refused |
1554 | * the PTE insertion | |
1555 | */ | |
b1576fec | 1556 | 13: bl save_nvgprs |
0ebc4cda BH |
1557 | mr r5,r3 |
1558 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1559 | ld r4,_DAR(r1) | |
b1576fec AB |
1560 | bl low_hash_fault |
1561 | b ret_from_except | |
caca285e | 1562 | #endif |
0ebc4cda | 1563 | |
9c1e1052 PM |
1564 | /* |
1565 | * We come here as a result of a DSI at a point where we don't want | |
1566 | * to call hash_page, such as when we are accessing memory (possibly | |
1567 | * user memory) inside a PMU interrupt that occurred while interrupts | |
1568 | * were soft-disabled. We want to invoke the exception handler for | |
1569 | * the access, or panic if there isn't a handler. | |
1570 | */ | |
b1576fec | 1571 | 77: bl save_nvgprs |
9c1e1052 PM |
1572 | mr r4,r3 |
1573 | addi r3,r1,STACK_FRAME_OVERHEAD | |
1574 | li r5,SIGSEGV | |
b1576fec AB |
1575 | bl bad_page_fault |
1576 | b ret_from_except | |
4e2bf01b ME |
1577 | |
1578 | /* | |
1579 | * Here we have detected that the kernel stack pointer is bad. | |
1580 | * R9 contains the saved CR, r13 points to the paca, | |
1581 | * r10 contains the (bad) kernel stack pointer, | |
1582 | * r11 and r12 contain the saved SRR0 and SRR1. | |
1583 | * We switch to using an emergency stack, save the registers there, | |
1584 | * and call kernel_bad_stack(), which panics. | |
1585 | */ | |
1586 | bad_stack: | |
1587 | ld r1,PACAEMERGSP(r13) | |
1588 | subi r1,r1,64+INT_FRAME_SIZE | |
1589 | std r9,_CCR(r1) | |
1590 | std r10,GPR1(r1) | |
1591 | std r11,_NIP(r1) | |
1592 | std r12,_MSR(r1) | |
1593 | mfspr r11,SPRN_DAR | |
1594 | mfspr r12,SPRN_DSISR | |
1595 | std r11,_DAR(r1) | |
1596 | std r12,_DSISR(r1) | |
1597 | mflr r10 | |
1598 | mfctr r11 | |
1599 | mfxer r12 | |
1600 | std r10,_LINK(r1) | |
1601 | std r11,_CTR(r1) | |
1602 | std r12,_XER(r1) | |
1603 | SAVE_GPR(0,r1) | |
1604 | SAVE_GPR(2,r1) | |
1605 | ld r10,EX_R3(r3) | |
1606 | std r10,GPR3(r1) | |
1607 | SAVE_GPR(4,r1) | |
1608 | SAVE_4GPRS(5,r1) | |
1609 | ld r9,EX_R9(r3) | |
1610 | ld r10,EX_R10(r3) | |
1611 | SAVE_2GPRS(9,r1) | |
1612 | ld r9,EX_R11(r3) | |
1613 | ld r10,EX_R12(r3) | |
1614 | ld r11,EX_R13(r3) | |
1615 | std r9,GPR11(r1) | |
1616 | std r10,GPR12(r1) | |
1617 | std r11,GPR13(r1) | |
1618 | BEGIN_FTR_SECTION | |
1619 | ld r10,EX_CFAR(r3) | |
1620 | std r10,ORIG_GPR3(r1) | |
1621 | END_FTR_SECTION_IFSET(CPU_FTR_CFAR) | |
1622 | SAVE_8GPRS(14,r1) | |
1623 | SAVE_10GPRS(22,r1) | |
1624 | lhz r12,PACA_TRAP_SAVE(r13) | |
1625 | std r12,_TRAP(r1) | |
1626 | addi r11,r1,INT_FRAME_SIZE | |
1627 | std r11,0(r1) | |
1628 | li r12,0 | |
1629 | std r12,0(r11) | |
1630 | ld r2,PACATOC(r13) | |
1631 | ld r11,exception_marker@toc(r2) | |
1632 | std r12,RESULT(r1) | |
1633 | std r11,STACK_FRAME_OVERHEAD-16(r1) | |
1634 | 1: addi r3,r1,STACK_FRAME_OVERHEAD | |
1635 | bl kernel_bad_stack | |
1636 | b 1b |