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296af7c9
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* Needed early for CONFIG_BSD etc. */
26#include "config-host.h"
27
83c9089e 28#include "monitor/monitor.h"
9c17d615 29#include "sysemu/sysemu.h"
022c62cb 30#include "exec/gdbstub.h"
9c17d615
PB
31#include "sysemu/dma.h"
32#include "sysemu/kvm.h"
de0b36b6 33#include "qmp-commands.h"
296af7c9 34
1de7afc9 35#include "qemu/thread.h"
9c17d615
PB
36#include "sysemu/cpus.h"
37#include "sysemu/qtest.h"
1de7afc9
PB
38#include "qemu/main-loop.h"
39#include "qemu/bitmap.h"
0ff0fc19
JK
40
41#ifndef _WIN32
1de7afc9 42#include "qemu/compatfd.h"
0ff0fc19 43#endif
296af7c9 44
6d9cb73c
JK
45#ifdef CONFIG_LINUX
46
47#include <sys/prctl.h>
48
c0532a76
MT
49#ifndef PR_MCE_KILL
50#define PR_MCE_KILL 33
51#endif
52
6d9cb73c
JK
53#ifndef PR_MCE_KILL_SET
54#define PR_MCE_KILL_SET 1
55#endif
56
57#ifndef PR_MCE_KILL_EARLY
58#define PR_MCE_KILL_EARLY 1
59#endif
60
61#endif /* CONFIG_LINUX */
62
9349b4f9 63static CPUArchState *next_cpu;
296af7c9 64
ac873f1e
PM
65static bool cpu_thread_is_idle(CPUArchState *env)
66{
4fdeee7c
AF
67 CPUState *cpu = ENV_GET_CPU(env);
68
c64ca814 69 if (cpu->stop || cpu->queued_work_first) {
ac873f1e
PM
70 return false;
71 }
f324e766 72 if (cpu->stopped || !runstate_is_running()) {
ac873f1e
PM
73 return true;
74 }
3993c6bd 75 if (!env->halted || qemu_cpu_has_work(cpu) ||
7ae26bd4 76 kvm_async_interrupts_enabled()) {
ac873f1e
PM
77 return false;
78 }
79 return true;
80}
81
82static bool all_cpu_threads_idle(void)
83{
84 CPUArchState *env;
85
86 for (env = first_cpu; env != NULL; env = env->next_cpu) {
87 if (!cpu_thread_is_idle(env)) {
88 return false;
89 }
90 }
91 return true;
92}
93
946fb27c
PB
94/***********************************************************/
95/* guest cycle counter */
96
97/* Conversion factor from emulated instructions to virtual clock ticks. */
98static int icount_time_shift;
99/* Arbitrarily pick 1MIPS as the minimum allowable speed. */
100#define MAX_ICOUNT_SHIFT 10
101/* Compensate for varying guest execution speed. */
102static int64_t qemu_icount_bias;
103static QEMUTimer *icount_rt_timer;
104static QEMUTimer *icount_vm_timer;
105static QEMUTimer *icount_warp_timer;
106static int64_t vm_clock_warp_start;
107static int64_t qemu_icount;
108
109typedef struct TimersState {
110 int64_t cpu_ticks_prev;
111 int64_t cpu_ticks_offset;
112 int64_t cpu_clock_offset;
113 int32_t cpu_ticks_enabled;
114 int64_t dummy;
115} TimersState;
116
117TimersState timers_state;
118
119/* Return the virtual CPU time, based on the instruction counter. */
120int64_t cpu_get_icount(void)
121{
122 int64_t icount;
9349b4f9 123 CPUArchState *env = cpu_single_env;
946fb27c
PB
124
125 icount = qemu_icount;
126 if (env) {
127 if (!can_do_io(env)) {
128 fprintf(stderr, "Bad clock read\n");
129 }
130 icount -= (env->icount_decr.u16.low + env->icount_extra);
131 }
132 return qemu_icount_bias + (icount << icount_time_shift);
133}
134
135/* return the host CPU cycle counter and handle stop/restart */
136int64_t cpu_get_ticks(void)
137{
138 if (use_icount) {
139 return cpu_get_icount();
140 }
141 if (!timers_state.cpu_ticks_enabled) {
142 return timers_state.cpu_ticks_offset;
143 } else {
144 int64_t ticks;
145 ticks = cpu_get_real_ticks();
146 if (timers_state.cpu_ticks_prev > ticks) {
147 /* Note: non increasing ticks may happen if the host uses
148 software suspend */
149 timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks;
150 }
151 timers_state.cpu_ticks_prev = ticks;
152 return ticks + timers_state.cpu_ticks_offset;
153 }
154}
155
156/* return the host CPU monotonic timer and handle stop/restart */
157int64_t cpu_get_clock(void)
158{
159 int64_t ti;
160 if (!timers_state.cpu_ticks_enabled) {
161 return timers_state.cpu_clock_offset;
162 } else {
163 ti = get_clock();
164 return ti + timers_state.cpu_clock_offset;
165 }
166}
167
168/* enable cpu_get_ticks() */
169void cpu_enable_ticks(void)
170{
171 if (!timers_state.cpu_ticks_enabled) {
172 timers_state.cpu_ticks_offset -= cpu_get_real_ticks();
173 timers_state.cpu_clock_offset -= get_clock();
174 timers_state.cpu_ticks_enabled = 1;
175 }
176}
177
178/* disable cpu_get_ticks() : the clock is stopped. You must not call
179 cpu_get_ticks() after that. */
180void cpu_disable_ticks(void)
181{
182 if (timers_state.cpu_ticks_enabled) {
183 timers_state.cpu_ticks_offset = cpu_get_ticks();
184 timers_state.cpu_clock_offset = cpu_get_clock();
185 timers_state.cpu_ticks_enabled = 0;
186 }
187}
188
189/* Correlation between real and virtual time is always going to be
190 fairly approximate, so ignore small variation.
191 When the guest is idle real and virtual time will be aligned in
192 the IO wait loop. */
193#define ICOUNT_WOBBLE (get_ticks_per_sec() / 10)
194
195static void icount_adjust(void)
196{
197 int64_t cur_time;
198 int64_t cur_icount;
199 int64_t delta;
200 static int64_t last_delta;
201 /* If the VM is not running, then do nothing. */
202 if (!runstate_is_running()) {
203 return;
204 }
205 cur_time = cpu_get_clock();
206 cur_icount = qemu_get_clock_ns(vm_clock);
207 delta = cur_icount - cur_time;
208 /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */
209 if (delta > 0
210 && last_delta + ICOUNT_WOBBLE < delta * 2
211 && icount_time_shift > 0) {
212 /* The guest is getting too far ahead. Slow time down. */
213 icount_time_shift--;
214 }
215 if (delta < 0
216 && last_delta - ICOUNT_WOBBLE > delta * 2
217 && icount_time_shift < MAX_ICOUNT_SHIFT) {
218 /* The guest is getting too far behind. Speed time up. */
219 icount_time_shift++;
220 }
221 last_delta = delta;
222 qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift);
223}
224
225static void icount_adjust_rt(void *opaque)
226{
227 qemu_mod_timer(icount_rt_timer,
228 qemu_get_clock_ms(rt_clock) + 1000);
229 icount_adjust();
230}
231
232static void icount_adjust_vm(void *opaque)
233{
234 qemu_mod_timer(icount_vm_timer,
235 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
236 icount_adjust();
237}
238
239static int64_t qemu_icount_round(int64_t count)
240{
241 return (count + (1 << icount_time_shift) - 1) >> icount_time_shift;
242}
243
244static void icount_warp_rt(void *opaque)
245{
246 if (vm_clock_warp_start == -1) {
247 return;
248 }
249
250 if (runstate_is_running()) {
251 int64_t clock = qemu_get_clock_ns(rt_clock);
252 int64_t warp_delta = clock - vm_clock_warp_start;
253 if (use_icount == 1) {
254 qemu_icount_bias += warp_delta;
255 } else {
256 /*
257 * In adaptive mode, do not let the vm_clock run too
258 * far ahead of real time.
259 */
260 int64_t cur_time = cpu_get_clock();
261 int64_t cur_icount = qemu_get_clock_ns(vm_clock);
262 int64_t delta = cur_time - cur_icount;
263 qemu_icount_bias += MIN(warp_delta, delta);
264 }
265 if (qemu_clock_expired(vm_clock)) {
266 qemu_notify_event();
267 }
268 }
269 vm_clock_warp_start = -1;
270}
271
8156be56
PB
272void qtest_clock_warp(int64_t dest)
273{
274 int64_t clock = qemu_get_clock_ns(vm_clock);
275 assert(qtest_enabled());
276 while (clock < dest) {
277 int64_t deadline = qemu_clock_deadline(vm_clock);
278 int64_t warp = MIN(dest - clock, deadline);
279 qemu_icount_bias += warp;
280 qemu_run_timers(vm_clock);
281 clock = qemu_get_clock_ns(vm_clock);
282 }
283 qemu_notify_event();
284}
285
946fb27c
PB
286void qemu_clock_warp(QEMUClock *clock)
287{
288 int64_t deadline;
289
290 /*
291 * There are too many global variables to make the "warp" behavior
292 * applicable to other clocks. But a clock argument removes the
293 * need for if statements all over the place.
294 */
295 if (clock != vm_clock || !use_icount) {
296 return;
297 }
298
299 /*
300 * If the CPUs have been sleeping, advance the vm_clock timer now. This
301 * ensures that the deadline for the timer is computed correctly below.
302 * This also makes sure that the insn counter is synchronized before the
303 * CPU starts running, in case the CPU is woken by an event other than
304 * the earliest vm_clock timer.
305 */
306 icount_warp_rt(NULL);
307 if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) {
308 qemu_del_timer(icount_warp_timer);
309 return;
310 }
311
8156be56
PB
312 if (qtest_enabled()) {
313 /* When testing, qtest commands advance icount. */
314 return;
315 }
316
946fb27c
PB
317 vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
318 deadline = qemu_clock_deadline(vm_clock);
319 if (deadline > 0) {
320 /*
321 * Ensure the vm_clock proceeds even when the virtual CPU goes to
322 * sleep. Otherwise, the CPU might be waiting for a future timer
323 * interrupt to wake it up, but the interrupt never comes because
324 * the vCPU isn't running any insns and thus doesn't advance the
325 * vm_clock.
326 *
327 * An extreme solution for this problem would be to never let VCPUs
328 * sleep in icount mode if there is a pending vm_clock timer; rather
329 * time could just advance to the next vm_clock event. Instead, we
330 * do stop VCPUs and only advance vm_clock after some "real" time,
331 * (related to the time left until the next event) has passed. This
332 * rt_clock timer will do this. This avoids that the warps are too
333 * visible externally---for example, you will not be sending network
07f35073 334 * packets continuously instead of every 100ms.
946fb27c
PB
335 */
336 qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline);
337 } else {
338 qemu_notify_event();
339 }
340}
341
342static const VMStateDescription vmstate_timers = {
343 .name = "timer",
344 .version_id = 2,
345 .minimum_version_id = 1,
346 .minimum_version_id_old = 1,
347 .fields = (VMStateField[]) {
348 VMSTATE_INT64(cpu_ticks_offset, TimersState),
349 VMSTATE_INT64(dummy, TimersState),
350 VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2),
351 VMSTATE_END_OF_LIST()
352 }
353};
354
355void configure_icount(const char *option)
356{
357 vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
358 if (!option) {
359 return;
360 }
361
362 icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL);
363 if (strcmp(option, "auto") != 0) {
364 icount_time_shift = strtol(option, NULL, 0);
365 use_icount = 1;
366 return;
367 }
368
369 use_icount = 2;
370
371 /* 125MIPS seems a reasonable initial guess at the guest speed.
372 It will be corrected fairly quickly anyway. */
373 icount_time_shift = 3;
374
375 /* Have both realtime and virtual time triggers for speed adjustment.
376 The realtime trigger catches emulated time passing too slowly,
377 the virtual time trigger catches emulated time passing too fast.
378 Realtime triggers occur even when idle, so use them less frequently
379 than VM triggers. */
380 icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL);
381 qemu_mod_timer(icount_rt_timer,
382 qemu_get_clock_ms(rt_clock) + 1000);
383 icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL);
384 qemu_mod_timer(icount_vm_timer,
385 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
386}
387
296af7c9
BS
388/***********************************************************/
389void hw_error(const char *fmt, ...)
390{
391 va_list ap;
9349b4f9 392 CPUArchState *env;
55e5c285 393 CPUState *cpu;
296af7c9
BS
394
395 va_start(ap, fmt);
396 fprintf(stderr, "qemu: hardware error: ");
397 vfprintf(stderr, fmt, ap);
398 fprintf(stderr, "\n");
55e5c285
AF
399 for (env = first_cpu; env != NULL; env = env->next_cpu) {
400 cpu = ENV_GET_CPU(env);
401 fprintf(stderr, "CPU #%d:\n", cpu->cpu_index);
6fd2a026 402 cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU);
296af7c9
BS
403 }
404 va_end(ap);
405 abort();
406}
407
408void cpu_synchronize_all_states(void)
409{
9349b4f9 410 CPUArchState *cpu;
296af7c9
BS
411
412 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
413 cpu_synchronize_state(cpu);
414 }
415}
416
417void cpu_synchronize_all_post_reset(void)
418{
9349b4f9 419 CPUArchState *cpu;
296af7c9
BS
420
421 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
422 cpu_synchronize_post_reset(cpu);
423 }
424}
425
426void cpu_synchronize_all_post_init(void)
427{
9349b4f9 428 CPUArchState *cpu;
296af7c9
BS
429
430 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
431 cpu_synchronize_post_init(cpu);
432 }
433}
434
2fa45344 435bool cpu_is_stopped(CPUState *cpu)
3ae9501c 436{
f324e766 437 return !runstate_is_running() || cpu->stopped;
3ae9501c
MT
438}
439
1dfb4dd9 440static void do_vm_stop(RunState state)
296af7c9 441{
1354869c 442 if (runstate_is_running()) {
296af7c9 443 cpu_disable_ticks();
296af7c9 444 pause_all_vcpus();
f5bbfba1 445 runstate_set(state);
1dfb4dd9 446 vm_state_notify(0, state);
922453bc 447 bdrv_drain_all();
55df6f33 448 bdrv_flush_all();
296af7c9
BS
449 monitor_protocol_event(QEVENT_STOP, NULL);
450 }
451}
452
a1fcaa73 453static bool cpu_can_run(CPUState *cpu)
296af7c9 454{
4fdeee7c 455 if (cpu->stop) {
a1fcaa73 456 return false;
0ab07c62 457 }
f324e766 458 if (cpu->stopped || !runstate_is_running()) {
a1fcaa73 459 return false;
0ab07c62 460 }
a1fcaa73 461 return true;
296af7c9
BS
462}
463
9349b4f9 464static void cpu_handle_guest_debug(CPUArchState *env)
83f338f7 465{
f324e766
AF
466 CPUState *cpu = ENV_GET_CPU(env);
467
3c638d06 468 gdb_set_stop_cpu(env);
8cf71710 469 qemu_system_debug_request();
f324e766 470 cpu->stopped = true;
3c638d06
JK
471}
472
714bd040
PB
473static void cpu_signal(int sig)
474{
475 if (cpu_single_env) {
476 cpu_exit(cpu_single_env);
477 }
478 exit_request = 1;
479}
714bd040 480
6d9cb73c
JK
481#ifdef CONFIG_LINUX
482static void sigbus_reraise(void)
483{
484 sigset_t set;
485 struct sigaction action;
486
487 memset(&action, 0, sizeof(action));
488 action.sa_handler = SIG_DFL;
489 if (!sigaction(SIGBUS, &action, NULL)) {
490 raise(SIGBUS);
491 sigemptyset(&set);
492 sigaddset(&set, SIGBUS);
493 sigprocmask(SIG_UNBLOCK, &set, NULL);
494 }
495 perror("Failed to re-raise SIGBUS!\n");
496 abort();
497}
498
499static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo,
500 void *ctx)
501{
502 if (kvm_on_sigbus(siginfo->ssi_code,
503 (void *)(intptr_t)siginfo->ssi_addr)) {
504 sigbus_reraise();
505 }
506}
507
508static void qemu_init_sigbus(void)
509{
510 struct sigaction action;
511
512 memset(&action, 0, sizeof(action));
513 action.sa_flags = SA_SIGINFO;
514 action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler;
515 sigaction(SIGBUS, &action, NULL);
516
517 prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);
518}
519
290adf38 520static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
521{
522 struct timespec ts = { 0, 0 };
523 siginfo_t siginfo;
524 sigset_t waitset;
525 sigset_t chkset;
526 int r;
527
528 sigemptyset(&waitset);
529 sigaddset(&waitset, SIG_IPI);
530 sigaddset(&waitset, SIGBUS);
531
532 do {
533 r = sigtimedwait(&waitset, &siginfo, &ts);
534 if (r == -1 && !(errno == EAGAIN || errno == EINTR)) {
535 perror("sigtimedwait");
536 exit(1);
537 }
538
539 switch (r) {
540 case SIGBUS:
290adf38 541 if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) {
1ab3c6c0
JK
542 sigbus_reraise();
543 }
544 break;
545 default:
546 break;
547 }
548
549 r = sigpending(&chkset);
550 if (r == -1) {
551 perror("sigpending");
552 exit(1);
553 }
554 } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS));
1ab3c6c0
JK
555}
556
6d9cb73c
JK
557#else /* !CONFIG_LINUX */
558
559static void qemu_init_sigbus(void)
560{
561}
1ab3c6c0 562
290adf38 563static void qemu_kvm_eat_signals(CPUState *cpu)
1ab3c6c0
JK
564{
565}
6d9cb73c
JK
566#endif /* !CONFIG_LINUX */
567
296af7c9 568#ifndef _WIN32
55f8d6ac
JK
569static void dummy_signal(int sig)
570{
571}
55f8d6ac 572
9349b4f9 573static void qemu_kvm_init_cpu_signals(CPUArchState *env)
714bd040
PB
574{
575 int r;
576 sigset_t set;
577 struct sigaction sigact;
578
579 memset(&sigact, 0, sizeof(sigact));
580 sigact.sa_handler = dummy_signal;
581 sigaction(SIG_IPI, &sigact, NULL);
582
714bd040
PB
583 pthread_sigmask(SIG_BLOCK, NULL, &set);
584 sigdelset(&set, SIG_IPI);
714bd040
PB
585 sigdelset(&set, SIGBUS);
586 r = kvm_set_signal_mask(env, &set);
587 if (r) {
588 fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r));
589 exit(1);
590 }
591}
592
593static void qemu_tcg_init_cpu_signals(void)
594{
714bd040
PB
595 sigset_t set;
596 struct sigaction sigact;
597
598 memset(&sigact, 0, sizeof(sigact));
599 sigact.sa_handler = cpu_signal;
600 sigaction(SIG_IPI, &sigact, NULL);
601
602 sigemptyset(&set);
603 sigaddset(&set, SIG_IPI);
604 pthread_sigmask(SIG_UNBLOCK, &set, NULL);
714bd040
PB
605}
606
55f8d6ac 607#else /* _WIN32 */
9349b4f9 608static void qemu_kvm_init_cpu_signals(CPUArchState *env)
ff48eb5f 609{
714bd040
PB
610 abort();
611}
ff48eb5f 612
714bd040
PB
613static void qemu_tcg_init_cpu_signals(void)
614{
ff48eb5f 615}
714bd040 616#endif /* _WIN32 */
ff48eb5f 617
b2532d88 618static QemuMutex qemu_global_mutex;
46daff13
PB
619static QemuCond qemu_io_proceeded_cond;
620static bool iothread_requesting_mutex;
296af7c9
BS
621
622static QemuThread io_thread;
623
624static QemuThread *tcg_cpu_thread;
625static QemuCond *tcg_halt_cond;
626
296af7c9
BS
627/* cpu creation */
628static QemuCond qemu_cpu_cond;
629/* system init */
296af7c9 630static QemuCond qemu_pause_cond;
e82bcec2 631static QemuCond qemu_work_cond;
296af7c9 632
d3b12f5d 633void qemu_init_cpu_loop(void)
296af7c9 634{
6d9cb73c 635 qemu_init_sigbus();
ed94592b 636 qemu_cond_init(&qemu_cpu_cond);
ed94592b
AL
637 qemu_cond_init(&qemu_pause_cond);
638 qemu_cond_init(&qemu_work_cond);
46daff13 639 qemu_cond_init(&qemu_io_proceeded_cond);
296af7c9 640 qemu_mutex_init(&qemu_global_mutex);
296af7c9 641
b7680cb6 642 qemu_thread_get_self(&io_thread);
296af7c9
BS
643}
644
f100f0b3 645void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data)
e82bcec2
MT
646{
647 struct qemu_work_item wi;
648
60e82579 649 if (qemu_cpu_is_self(cpu)) {
e82bcec2
MT
650 func(data);
651 return;
652 }
653
654 wi.func = func;
655 wi.data = data;
c64ca814
AF
656 if (cpu->queued_work_first == NULL) {
657 cpu->queued_work_first = &wi;
0ab07c62 658 } else {
c64ca814 659 cpu->queued_work_last->next = &wi;
0ab07c62 660 }
c64ca814 661 cpu->queued_work_last = &wi;
e82bcec2
MT
662 wi.next = NULL;
663 wi.done = false;
664
c08d7424 665 qemu_cpu_kick(cpu);
e82bcec2 666 while (!wi.done) {
9349b4f9 667 CPUArchState *self_env = cpu_single_env;
e82bcec2
MT
668
669 qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex);
670 cpu_single_env = self_env;
671 }
672}
673
6d45b109 674static void flush_queued_work(CPUState *cpu)
e82bcec2
MT
675{
676 struct qemu_work_item *wi;
677
c64ca814 678 if (cpu->queued_work_first == NULL) {
e82bcec2 679 return;
0ab07c62 680 }
e82bcec2 681
c64ca814
AF
682 while ((wi = cpu->queued_work_first)) {
683 cpu->queued_work_first = wi->next;
e82bcec2
MT
684 wi->func(wi->data);
685 wi->done = true;
686 }
c64ca814 687 cpu->queued_work_last = NULL;
e82bcec2
MT
688 qemu_cond_broadcast(&qemu_work_cond);
689}
690
509a0d78 691static void qemu_wait_io_event_common(CPUState *cpu)
296af7c9 692{
4fdeee7c
AF
693 if (cpu->stop) {
694 cpu->stop = false;
f324e766 695 cpu->stopped = true;
296af7c9
BS
696 qemu_cond_signal(&qemu_pause_cond);
697 }
6d45b109 698 flush_queued_work(cpu);
216fc9a4 699 cpu->thread_kicked = false;
296af7c9
BS
700}
701
6cabe1f3 702static void qemu_tcg_wait_io_event(void)
296af7c9 703{
9349b4f9 704 CPUArchState *env;
6cabe1f3 705
16400322 706 while (all_cpu_threads_idle()) {
ab33fcda
PB
707 /* Start accounting real time to the virtual clock if the CPUs
708 are idle. */
709 qemu_clock_warp(vm_clock);
9705fbb5 710 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
16400322 711 }
296af7c9 712
46daff13
PB
713 while (iothread_requesting_mutex) {
714 qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex);
715 }
6cabe1f3
JK
716
717 for (env = first_cpu; env != NULL; env = env->next_cpu) {
509a0d78 718 qemu_wait_io_event_common(ENV_GET_CPU(env));
6cabe1f3 719 }
296af7c9
BS
720}
721
9349b4f9 722static void qemu_kvm_wait_io_event(CPUArchState *env)
296af7c9 723{
f5c121b8
AF
724 CPUState *cpu = ENV_GET_CPU(env);
725
16400322 726 while (cpu_thread_is_idle(env)) {
f5c121b8 727 qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);
16400322 728 }
296af7c9 729
290adf38 730 qemu_kvm_eat_signals(cpu);
509a0d78 731 qemu_wait_io_event_common(cpu);
296af7c9
BS
732}
733
7e97cd88 734static void *qemu_kvm_cpu_thread_fn(void *arg)
296af7c9 735{
9349b4f9 736 CPUArchState *env = arg;
814e612e 737 CPUState *cpu = ENV_GET_CPU(env);
84b4915d 738 int r;
296af7c9 739
6164e6d6 740 qemu_mutex_lock(&qemu_global_mutex);
814e612e 741 qemu_thread_get_self(cpu->thread);
9f09e18a 742 cpu->thread_id = qemu_get_thread_id();
e479c207 743 cpu_single_env = env;
296af7c9 744
504134d2 745 r = kvm_init_vcpu(cpu);
84b4915d
JK
746 if (r < 0) {
747 fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r));
748 exit(1);
749 }
296af7c9 750
55f8d6ac 751 qemu_kvm_init_cpu_signals(env);
296af7c9
BS
752
753 /* signal CPU creation */
61a46217 754 cpu->created = true;
296af7c9
BS
755 qemu_cond_signal(&qemu_cpu_cond);
756
296af7c9 757 while (1) {
a1fcaa73 758 if (cpu_can_run(cpu)) {
6792a57b 759 r = kvm_cpu_exec(env);
83f338f7 760 if (r == EXCP_DEBUG) {
1009d2ed 761 cpu_handle_guest_debug(env);
83f338f7 762 }
0ab07c62 763 }
296af7c9
BS
764 qemu_kvm_wait_io_event(env);
765 }
766
767 return NULL;
768}
769
c7f0f3b1
AL
770static void *qemu_dummy_cpu_thread_fn(void *arg)
771{
772#ifdef _WIN32
773 fprintf(stderr, "qtest is not supported under Windows\n");
774 exit(1);
775#else
776 CPUArchState *env = arg;
814e612e 777 CPUState *cpu = ENV_GET_CPU(env);
c7f0f3b1
AL
778 sigset_t waitset;
779 int r;
780
781 qemu_mutex_lock_iothread();
814e612e 782 qemu_thread_get_self(cpu->thread);
9f09e18a 783 cpu->thread_id = qemu_get_thread_id();
c7f0f3b1
AL
784
785 sigemptyset(&waitset);
786 sigaddset(&waitset, SIG_IPI);
787
788 /* signal CPU creation */
61a46217 789 cpu->created = true;
c7f0f3b1
AL
790 qemu_cond_signal(&qemu_cpu_cond);
791
792 cpu_single_env = env;
793 while (1) {
794 cpu_single_env = NULL;
795 qemu_mutex_unlock_iothread();
796 do {
797 int sig;
798 r = sigwait(&waitset, &sig);
799 } while (r == -1 && (errno == EAGAIN || errno == EINTR));
800 if (r == -1) {
801 perror("sigwait");
802 exit(1);
803 }
804 qemu_mutex_lock_iothread();
805 cpu_single_env = env;
509a0d78 806 qemu_wait_io_event_common(cpu);
c7f0f3b1
AL
807 }
808
809 return NULL;
810#endif
811}
812
bdb7ca67
JK
813static void tcg_exec_all(void);
814
7e97cd88 815static void *qemu_tcg_cpu_thread_fn(void *arg)
296af7c9 816{
c3586ba7
AF
817 CPUState *cpu = arg;
818 CPUArchState *env;
296af7c9 819
55f8d6ac 820 qemu_tcg_init_cpu_signals();
814e612e 821 qemu_thread_get_self(cpu->thread);
296af7c9
BS
822
823 /* signal CPU creation */
824 qemu_mutex_lock(&qemu_global_mutex);
0ab07c62 825 for (env = first_cpu; env != NULL; env = env->next_cpu) {
61a46217 826 cpu = ENV_GET_CPU(env);
9f09e18a 827 cpu->thread_id = qemu_get_thread_id();
61a46217 828 cpu->created = true;
0ab07c62 829 }
296af7c9
BS
830 qemu_cond_signal(&qemu_cpu_cond);
831
fa7d1867 832 /* wait for initial kick-off after machine start */
f324e766 833 while (ENV_GET_CPU(first_cpu)->stopped) {
fa7d1867 834 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
8e564b4e
JK
835
836 /* process any pending work */
837 for (env = first_cpu; env != NULL; env = env->next_cpu) {
509a0d78 838 qemu_wait_io_event_common(ENV_GET_CPU(env));
8e564b4e 839 }
0ab07c62 840 }
296af7c9
BS
841
842 while (1) {
bdb7ca67 843 tcg_exec_all();
946fb27c 844 if (use_icount && qemu_clock_deadline(vm_clock) <= 0) {
3b2319a3
PB
845 qemu_notify_event();
846 }
6cabe1f3 847 qemu_tcg_wait_io_event();
296af7c9
BS
848 }
849
850 return NULL;
851}
852
2ff09a40 853static void qemu_cpu_kick_thread(CPUState *cpu)
cc015e9a
PB
854{
855#ifndef _WIN32
856 int err;
857
814e612e 858 err = pthread_kill(cpu->thread->thread, SIG_IPI);
cc015e9a
PB
859 if (err) {
860 fprintf(stderr, "qemu:%s: %s", __func__, strerror(err));
861 exit(1);
862 }
863#else /* _WIN32 */
60e82579 864 if (!qemu_cpu_is_self(cpu)) {
bcba2a72 865 SuspendThread(cpu->hThread);
cc015e9a 866 cpu_signal(0);
bcba2a72 867 ResumeThread(cpu->hThread);
cc015e9a
PB
868 }
869#endif
870}
871
c08d7424 872void qemu_cpu_kick(CPUState *cpu)
296af7c9 873{
f5c121b8 874 qemu_cond_broadcast(cpu->halt_cond);
216fc9a4 875 if (!tcg_enabled() && !cpu->thread_kicked) {
2ff09a40 876 qemu_cpu_kick_thread(cpu);
216fc9a4 877 cpu->thread_kicked = true;
aa2c364b 878 }
296af7c9
BS
879}
880
46d62fac 881void qemu_cpu_kick_self(void)
296af7c9 882{
b55c22c6 883#ifndef _WIN32
46d62fac 884 assert(cpu_single_env);
216fc9a4 885 CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
296af7c9 886
216fc9a4 887 if (!cpu_single_cpu->thread_kicked) {
2ff09a40 888 qemu_cpu_kick_thread(cpu_single_cpu);
216fc9a4 889 cpu_single_cpu->thread_kicked = true;
296af7c9 890 }
b55c22c6
PB
891#else
892 abort();
893#endif
296af7c9
BS
894}
895
60e82579 896bool qemu_cpu_is_self(CPUState *cpu)
296af7c9 897{
814e612e 898 return qemu_thread_is_self(cpu->thread);
296af7c9
BS
899}
900
aa723c23
JQ
901static bool qemu_in_vcpu_thread(void)
902{
60e82579 903 return cpu_single_env && qemu_cpu_is_self(ENV_GET_CPU(cpu_single_env));
aa723c23
JQ
904}
905
296af7c9
BS
906void qemu_mutex_lock_iothread(void)
907{
c7f0f3b1 908 if (!tcg_enabled()) {
296af7c9 909 qemu_mutex_lock(&qemu_global_mutex);
1a28cac3 910 } else {
46daff13 911 iothread_requesting_mutex = true;
1a28cac3 912 if (qemu_mutex_trylock(&qemu_global_mutex)) {
2ff09a40 913 qemu_cpu_kick_thread(ENV_GET_CPU(first_cpu));
1a28cac3
MT
914 qemu_mutex_lock(&qemu_global_mutex);
915 }
46daff13
PB
916 iothread_requesting_mutex = false;
917 qemu_cond_broadcast(&qemu_io_proceeded_cond);
1a28cac3 918 }
296af7c9
BS
919}
920
921void qemu_mutex_unlock_iothread(void)
922{
923 qemu_mutex_unlock(&qemu_global_mutex);
924}
925
926static int all_vcpus_paused(void)
927{
9349b4f9 928 CPUArchState *penv = first_cpu;
296af7c9
BS
929
930 while (penv) {
f324e766
AF
931 CPUState *pcpu = ENV_GET_CPU(penv);
932 if (!pcpu->stopped) {
296af7c9 933 return 0;
0ab07c62 934 }
5207a5e0 935 penv = penv->next_cpu;
296af7c9
BS
936 }
937
938 return 1;
939}
940
941void pause_all_vcpus(void)
942{
9349b4f9 943 CPUArchState *penv = first_cpu;
296af7c9 944
a5c57d64 945 qemu_clock_enable(vm_clock, false);
296af7c9 946 while (penv) {
4fdeee7c
AF
947 CPUState *pcpu = ENV_GET_CPU(penv);
948 pcpu->stop = true;
c08d7424 949 qemu_cpu_kick(pcpu);
5207a5e0 950 penv = penv->next_cpu;
296af7c9
BS
951 }
952
aa723c23 953 if (qemu_in_vcpu_thread()) {
d798e974
JK
954 cpu_stop_current();
955 if (!kvm_enabled()) {
956 while (penv) {
4fdeee7c
AF
957 CPUState *pcpu = ENV_GET_CPU(penv);
958 pcpu->stop = 0;
f324e766 959 pcpu->stopped = true;
d798e974
JK
960 penv = penv->next_cpu;
961 }
962 return;
963 }
964 }
965
296af7c9 966 while (!all_vcpus_paused()) {
be7d6c57 967 qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
296af7c9
BS
968 penv = first_cpu;
969 while (penv) {
c08d7424 970 qemu_cpu_kick(ENV_GET_CPU(penv));
5207a5e0 971 penv = penv->next_cpu;
296af7c9
BS
972 }
973 }
974}
975
976void resume_all_vcpus(void)
977{
9349b4f9 978 CPUArchState *penv = first_cpu;
296af7c9 979
47113ab6 980 qemu_clock_enable(vm_clock, true);
296af7c9 981 while (penv) {
4fdeee7c
AF
982 CPUState *pcpu = ENV_GET_CPU(penv);
983 pcpu->stop = false;
f324e766 984 pcpu->stopped = false;
c08d7424 985 qemu_cpu_kick(pcpu);
5207a5e0 986 penv = penv->next_cpu;
296af7c9
BS
987 }
988}
989
e5ab30a2 990static void qemu_tcg_init_vcpu(CPUState *cpu)
296af7c9 991{
296af7c9
BS
992 /* share a single thread for all cpus with TCG */
993 if (!tcg_cpu_thread) {
814e612e 994 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
995 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
996 qemu_cond_init(cpu->halt_cond);
997 tcg_halt_cond = cpu->halt_cond;
c3586ba7 998 qemu_thread_create(cpu->thread, qemu_tcg_cpu_thread_fn, cpu,
1ecf47bf
PB
999 QEMU_THREAD_JOINABLE);
1000#ifdef _WIN32
814e612e 1001 cpu->hThread = qemu_thread_get_handle(cpu->thread);
1ecf47bf 1002#endif
61a46217 1003 while (!cpu->created) {
18a85728 1004 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1005 }
814e612e 1006 tcg_cpu_thread = cpu->thread;
296af7c9 1007 } else {
814e612e 1008 cpu->thread = tcg_cpu_thread;
f5c121b8 1009 cpu->halt_cond = tcg_halt_cond;
296af7c9
BS
1010 }
1011}
1012
9349b4f9 1013static void qemu_kvm_start_vcpu(CPUArchState *env)
296af7c9 1014{
814e612e
AF
1015 CPUState *cpu = ENV_GET_CPU(env);
1016
1017 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1018 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1019 qemu_cond_init(cpu->halt_cond);
814e612e 1020 qemu_thread_create(cpu->thread, qemu_kvm_cpu_thread_fn, env,
1ecf47bf 1021 QEMU_THREAD_JOINABLE);
61a46217 1022 while (!cpu->created) {
18a85728 1023 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1024 }
296af7c9
BS
1025}
1026
c7f0f3b1
AL
1027static void qemu_dummy_start_vcpu(CPUArchState *env)
1028{
814e612e
AF
1029 CPUState *cpu = ENV_GET_CPU(env);
1030
1031 cpu->thread = g_malloc0(sizeof(QemuThread));
f5c121b8
AF
1032 cpu->halt_cond = g_malloc0(sizeof(QemuCond));
1033 qemu_cond_init(cpu->halt_cond);
814e612e 1034 qemu_thread_create(cpu->thread, qemu_dummy_cpu_thread_fn, env,
c7f0f3b1 1035 QEMU_THREAD_JOINABLE);
61a46217 1036 while (!cpu->created) {
c7f0f3b1
AL
1037 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
1038 }
1039}
1040
296af7c9
BS
1041void qemu_init_vcpu(void *_env)
1042{
9349b4f9 1043 CPUArchState *env = _env;
f324e766 1044 CPUState *cpu = ENV_GET_CPU(env);
296af7c9 1045
ce3960eb
AF
1046 cpu->nr_cores = smp_cores;
1047 cpu->nr_threads = smp_threads;
f324e766 1048 cpu->stopped = true;
0ab07c62 1049 if (kvm_enabled()) {
7e97cd88 1050 qemu_kvm_start_vcpu(env);
c7f0f3b1 1051 } else if (tcg_enabled()) {
e5ab30a2 1052 qemu_tcg_init_vcpu(cpu);
c7f0f3b1
AL
1053 } else {
1054 qemu_dummy_start_vcpu(env);
0ab07c62 1055 }
296af7c9
BS
1056}
1057
b4a3d965 1058void cpu_stop_current(void)
296af7c9 1059{
b4a3d965 1060 if (cpu_single_env) {
4fdeee7c
AF
1061 CPUState *cpu_single_cpu = ENV_GET_CPU(cpu_single_env);
1062 cpu_single_cpu->stop = false;
f324e766 1063 cpu_single_cpu->stopped = true;
b4a3d965 1064 cpu_exit(cpu_single_env);
67bb172f 1065 qemu_cond_signal(&qemu_pause_cond);
b4a3d965 1066 }
296af7c9
BS
1067}
1068
1dfb4dd9 1069void vm_stop(RunState state)
296af7c9 1070{
aa723c23 1071 if (qemu_in_vcpu_thread()) {
1dfb4dd9 1072 qemu_system_vmstop_request(state);
296af7c9
BS
1073 /*
1074 * FIXME: should not return to device code in case
1075 * vm_stop() has been requested.
1076 */
b4a3d965 1077 cpu_stop_current();
296af7c9
BS
1078 return;
1079 }
1dfb4dd9 1080 do_vm_stop(state);
296af7c9
BS
1081}
1082
8a9236f1
LC
1083/* does a state transition even if the VM is already stopped,
1084 current state is forgotten forever */
1085void vm_stop_force_state(RunState state)
1086{
1087 if (runstate_is_running()) {
1088 vm_stop(state);
1089 } else {
1090 runstate_set(state);
1091 }
1092}
1093
9349b4f9 1094static int tcg_cpu_exec(CPUArchState *env)
296af7c9
BS
1095{
1096 int ret;
1097#ifdef CONFIG_PROFILER
1098 int64_t ti;
1099#endif
1100
1101#ifdef CONFIG_PROFILER
1102 ti = profile_getclock();
1103#endif
1104 if (use_icount) {
1105 int64_t count;
1106 int decr;
1107 qemu_icount -= (env->icount_decr.u16.low + env->icount_extra);
1108 env->icount_decr.u16.low = 0;
1109 env->icount_extra = 0;
946fb27c 1110 count = qemu_icount_round(qemu_clock_deadline(vm_clock));
296af7c9
BS
1111 qemu_icount += count;
1112 decr = (count > 0xffff) ? 0xffff : count;
1113 count -= decr;
1114 env->icount_decr.u16.low = decr;
1115 env->icount_extra = count;
1116 }
1117 ret = cpu_exec(env);
1118#ifdef CONFIG_PROFILER
1119 qemu_time += profile_getclock() - ti;
1120#endif
1121 if (use_icount) {
1122 /* Fold pending instructions back into the
1123 instruction counter, and clear the interrupt flag. */
1124 qemu_icount -= (env->icount_decr.u16.low
1125 + env->icount_extra);
1126 env->icount_decr.u32 = 0;
1127 env->icount_extra = 0;
1128 }
1129 return ret;
1130}
1131
bdb7ca67 1132static void tcg_exec_all(void)
296af7c9 1133{
9a36085b
JK
1134 int r;
1135
ab33fcda
PB
1136 /* Account partial waits to the vm_clock. */
1137 qemu_clock_warp(vm_clock);
1138
0ab07c62 1139 if (next_cpu == NULL) {
296af7c9 1140 next_cpu = first_cpu;
0ab07c62 1141 }
c629a4bc 1142 for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
9349b4f9 1143 CPUArchState *env = next_cpu;
4fdeee7c 1144 CPUState *cpu = ENV_GET_CPU(env);
296af7c9
BS
1145
1146 qemu_clock_enable(vm_clock,
345f4426 1147 (env->singlestep_enabled & SSTEP_NOTIMER) == 0);
296af7c9 1148
a1fcaa73 1149 if (cpu_can_run(cpu)) {
bdb7ca67 1150 r = tcg_cpu_exec(env);
9a36085b 1151 if (r == EXCP_DEBUG) {
1009d2ed 1152 cpu_handle_guest_debug(env);
3c638d06
JK
1153 break;
1154 }
f324e766 1155 } else if (cpu->stop || cpu->stopped) {
296af7c9
BS
1156 break;
1157 }
1158 }
c629a4bc 1159 exit_request = 0;
296af7c9
BS
1160}
1161
1162void set_numa_modes(void)
1163{
9349b4f9 1164 CPUArchState *env;
1b1ed8dc 1165 CPUState *cpu;
296af7c9
BS
1166 int i;
1167
1168 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1b1ed8dc 1169 cpu = ENV_GET_CPU(env);
296af7c9 1170 for (i = 0; i < nb_numa_nodes; i++) {
55e5c285 1171 if (test_bit(cpu->cpu_index, node_cpumask[i])) {
1b1ed8dc 1172 cpu->numa_node = i;
296af7c9
BS
1173 }
1174 }
1175 }
1176}
1177
9a78eead 1178void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
262353cb
BS
1179{
1180 /* XXX: implement xxx_cpu_list for targets that still miss it */
e916cbf8
PM
1181#if defined(cpu_list)
1182 cpu_list(f, cpu_fprintf);
262353cb
BS
1183#endif
1184}
de0b36b6
LC
1185
1186CpuInfoList *qmp_query_cpus(Error **errp)
1187{
1188 CpuInfoList *head = NULL, *cur_item = NULL;
9349b4f9 1189 CPUArchState *env;
de0b36b6 1190
9f09e18a
AF
1191 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1192 CPUState *cpu = ENV_GET_CPU(env);
de0b36b6
LC
1193 CpuInfoList *info;
1194
1195 cpu_synchronize_state(env);
1196
1197 info = g_malloc0(sizeof(*info));
1198 info->value = g_malloc0(sizeof(*info->value));
55e5c285 1199 info->value->CPU = cpu->cpu_index;
de0b36b6
LC
1200 info->value->current = (env == first_cpu);
1201 info->value->halted = env->halted;
9f09e18a 1202 info->value->thread_id = cpu->thread_id;
de0b36b6
LC
1203#if defined(TARGET_I386)
1204 info->value->has_pc = true;
1205 info->value->pc = env->eip + env->segs[R_CS].base;
1206#elif defined(TARGET_PPC)
1207 info->value->has_nip = true;
1208 info->value->nip = env->nip;
1209#elif defined(TARGET_SPARC)
1210 info->value->has_pc = true;
1211 info->value->pc = env->pc;
1212 info->value->has_npc = true;
1213 info->value->npc = env->npc;
1214#elif defined(TARGET_MIPS)
1215 info->value->has_PC = true;
1216 info->value->PC = env->active_tc.PC;
1217#endif
1218
1219 /* XXX: waiting for the qapi to support GSList */
1220 if (!cur_item) {
1221 head = cur_item = info;
1222 } else {
1223 cur_item->next = info;
1224 cur_item = info;
1225 }
1226 }
1227
1228 return head;
1229}
0cfd6a9a
LC
1230
1231void qmp_memsave(int64_t addr, int64_t size, const char *filename,
1232 bool has_cpu, int64_t cpu_index, Error **errp)
1233{
1234 FILE *f;
1235 uint32_t l;
9349b4f9 1236 CPUArchState *env;
55e5c285 1237 CPUState *cpu;
0cfd6a9a
LC
1238 uint8_t buf[1024];
1239
1240 if (!has_cpu) {
1241 cpu_index = 0;
1242 }
1243
1244 for (env = first_cpu; env; env = env->next_cpu) {
55e5c285
AF
1245 cpu = ENV_GET_CPU(env);
1246 if (cpu_index == cpu->cpu_index) {
0cfd6a9a
LC
1247 break;
1248 }
1249 }
1250
1251 if (env == NULL) {
1252 error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index",
1253 "a CPU number");
1254 return;
1255 }
1256
1257 f = fopen(filename, "wb");
1258 if (!f) {
1259 error_set(errp, QERR_OPEN_FILE_FAILED, filename);
1260 return;
1261 }
1262
1263 while (size != 0) {
1264 l = sizeof(buf);
1265 if (l > size)
1266 l = size;
1267 cpu_memory_rw_debug(env, addr, buf, l, 0);
1268 if (fwrite(buf, 1, l, f) != l) {
1269 error_set(errp, QERR_IO_ERROR);
1270 goto exit;
1271 }
1272 addr += l;
1273 size -= l;
1274 }
1275
1276exit:
1277 fclose(f);
1278}
6d3962bf
LC
1279
1280void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
1281 Error **errp)
1282{
1283 FILE *f;
1284 uint32_t l;
1285 uint8_t buf[1024];
1286
1287 f = fopen(filename, "wb");
1288 if (!f) {
1289 error_set(errp, QERR_OPEN_FILE_FAILED, filename);
1290 return;
1291 }
1292
1293 while (size != 0) {
1294 l = sizeof(buf);
1295 if (l > size)
1296 l = size;
1297 cpu_physical_memory_rw(addr, buf, l, 0);
1298 if (fwrite(buf, 1, l, f) != l) {
1299 error_set(errp, QERR_IO_ERROR);
1300 goto exit;
1301 }
1302 addr += l;
1303 size -= l;
1304 }
1305
1306exit:
1307 fclose(f);
1308}
ab49ab5c
LC
1309
1310void qmp_inject_nmi(Error **errp)
1311{
1312#if defined(TARGET_I386)
9349b4f9 1313 CPUArchState *env;
ab49ab5c
LC
1314
1315 for (env = first_cpu; env != NULL; env = env->next_cpu) {
02c09195
JK
1316 if (!env->apic_state) {
1317 cpu_interrupt(env, CPU_INTERRUPT_NMI);
1318 } else {
1319 apic_deliver_nmi(env->apic_state);
1320 }
ab49ab5c
LC
1321 }
1322#else
1323 error_set(errp, QERR_UNSUPPORTED);
1324#endif
1325}