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1965aae3 PA |
1 | #ifndef _ASM_X86_PGTABLE_H |
2 | #define _ASM_X86_PGTABLE_H | |
6c386655 | 3 | |
c47c1b1f | 4 | #include <asm/page.h> |
1adcaafe | 5 | #include <asm/e820.h> |
c47c1b1f | 6 | |
8d19c99f | 7 | #include <asm/pgtable_types.h> |
b2bc2731 | 8 | |
8a7b12f7 | 9 | /* |
10 | * Macro to mark a page protection value as UC- | |
11 | */ | |
d85f3334 JG |
12 | #define pgprot_noncached(prot) \ |
13 | ((boot_cpu_data.x86 > 3) \ | |
14 | ? (__pgprot(pgprot_val(prot) | \ | |
15 | cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \ | |
8a7b12f7 | 16 | : (prot)) |
17 | ||
4614139c | 18 | #ifndef __ASSEMBLY__ |
55a6ca25 PA |
19 | #include <asm/x86_init.h> |
20 | ||
ef6bea6d | 21 | void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd); |
e1a58320 SS |
22 | void ptdump_walk_pgd_level_checkwx(void); |
23 | ||
24 | #ifdef CONFIG_DEBUG_WX | |
25 | #define debug_checkwx() ptdump_walk_pgd_level_checkwx() | |
26 | #else | |
27 | #define debug_checkwx() do { } while (0) | |
28 | #endif | |
ef6bea6d | 29 | |
8405b122 JF |
30 | /* |
31 | * ZERO_PAGE is a global shared page that is always zero: used | |
32 | * for zero-mapped memory areas etc.. | |
33 | */ | |
277d5b40 AK |
34 | extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] |
35 | __visible; | |
8405b122 JF |
36 | #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) |
37 | ||
e3ed910d JF |
38 | extern spinlock_t pgd_lock; |
39 | extern struct list_head pgd_list; | |
8405b122 | 40 | |
617d34d9 JF |
41 | extern struct mm_struct *pgd_page_get_mm(struct page *page); |
42 | ||
54321d94 JF |
43 | #ifdef CONFIG_PARAVIRT |
44 | #include <asm/paravirt.h> | |
45 | #else /* !CONFIG_PARAVIRT */ | |
46 | #define set_pte(ptep, pte) native_set_pte(ptep, pte) | |
47 | #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte) | |
2609ae6d | 48 | #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd) |
a00cc7d9 | 49 | #define set_pud_at(mm, addr, pudp, pud) native_set_pud_at(mm, addr, pudp, pud) |
54321d94 | 50 | |
54321d94 JF |
51 | #define set_pte_atomic(ptep, pte) \ |
52 | native_set_pte_atomic(ptep, pte) | |
53 | ||
54 | #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd) | |
55 | ||
56 | #ifndef __PAGETABLE_PUD_FOLDED | |
57 | #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd) | |
58 | #define pgd_clear(pgd) native_pgd_clear(pgd) | |
59 | #endif | |
60 | ||
61 | #ifndef set_pud | |
62 | # define set_pud(pudp, pud) native_set_pud(pudp, pud) | |
63 | #endif | |
64 | ||
65 | #ifndef __PAGETABLE_PMD_FOLDED | |
66 | #define pud_clear(pud) native_pud_clear(pud) | |
67 | #endif | |
68 | ||
69 | #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep) | |
70 | #define pmd_clear(pmd) native_pmd_clear(pmd) | |
71 | ||
72 | #define pte_update(mm, addr, ptep) do { } while (0) | |
54321d94 | 73 | |
54321d94 JF |
74 | #define pgd_val(x) native_pgd_val(x) |
75 | #define __pgd(x) native_make_pgd(x) | |
76 | ||
77 | #ifndef __PAGETABLE_PUD_FOLDED | |
78 | #define pud_val(x) native_pud_val(x) | |
79 | #define __pud(x) native_make_pud(x) | |
80 | #endif | |
81 | ||
82 | #ifndef __PAGETABLE_PMD_FOLDED | |
83 | #define pmd_val(x) native_pmd_val(x) | |
84 | #define __pmd(x) native_make_pmd(x) | |
85 | #endif | |
86 | ||
87 | #define pte_val(x) native_pte_val(x) | |
88 | #define __pte(x) native_make_pte(x) | |
89 | ||
224101ed JF |
90 | #define arch_end_context_switch(prev) do {} while(0) |
91 | ||
54321d94 JF |
92 | #endif /* CONFIG_PARAVIRT */ |
93 | ||
4614139c JF |
94 | /* |
95 | * The following only work if pte_present() is true. | |
96 | * Undefined behaviour if not.. | |
97 | */ | |
3cbaeafe JP |
98 | static inline int pte_dirty(pte_t pte) |
99 | { | |
a15af1c9 | 100 | return pte_flags(pte) & _PAGE_DIRTY; |
3cbaeafe JP |
101 | } |
102 | ||
a927cb83 DH |
103 | |
104 | static inline u32 read_pkru(void) | |
105 | { | |
106 | if (boot_cpu_has(X86_FEATURE_OSPKE)) | |
107 | return __read_pkru(); | |
108 | return 0; | |
109 | } | |
110 | ||
9e90199c XG |
111 | static inline void write_pkru(u32 pkru) |
112 | { | |
113 | if (boot_cpu_has(X86_FEATURE_OSPKE)) | |
114 | __write_pkru(pkru); | |
115 | } | |
116 | ||
3cbaeafe JP |
117 | static inline int pte_young(pte_t pte) |
118 | { | |
a15af1c9 | 119 | return pte_flags(pte) & _PAGE_ACCESSED; |
3cbaeafe JP |
120 | } |
121 | ||
c164e038 KS |
122 | static inline int pmd_dirty(pmd_t pmd) |
123 | { | |
124 | return pmd_flags(pmd) & _PAGE_DIRTY; | |
125 | } | |
3cbaeafe | 126 | |
f2d6bfe9 JW |
127 | static inline int pmd_young(pmd_t pmd) |
128 | { | |
129 | return pmd_flags(pmd) & _PAGE_ACCESSED; | |
130 | } | |
131 | ||
a00cc7d9 MW |
132 | static inline int pud_dirty(pud_t pud) |
133 | { | |
134 | return pud_flags(pud) & _PAGE_DIRTY; | |
135 | } | |
136 | ||
137 | static inline int pud_young(pud_t pud) | |
138 | { | |
139 | return pud_flags(pud) & _PAGE_ACCESSED; | |
140 | } | |
141 | ||
3cbaeafe JP |
142 | static inline int pte_write(pte_t pte) |
143 | { | |
a15af1c9 | 144 | return pte_flags(pte) & _PAGE_RW; |
3cbaeafe JP |
145 | } |
146 | ||
3cbaeafe JP |
147 | static inline int pte_huge(pte_t pte) |
148 | { | |
a15af1c9 | 149 | return pte_flags(pte) & _PAGE_PSE; |
4614139c JF |
150 | } |
151 | ||
3cbaeafe JP |
152 | static inline int pte_global(pte_t pte) |
153 | { | |
a15af1c9 | 154 | return pte_flags(pte) & _PAGE_GLOBAL; |
3cbaeafe JP |
155 | } |
156 | ||
157 | static inline int pte_exec(pte_t pte) | |
158 | { | |
a15af1c9 | 159 | return !(pte_flags(pte) & _PAGE_NX); |
3cbaeafe JP |
160 | } |
161 | ||
7e675137 NP |
162 | static inline int pte_special(pte_t pte) |
163 | { | |
c819f37e | 164 | return pte_flags(pte) & _PAGE_SPECIAL; |
7e675137 NP |
165 | } |
166 | ||
91030ca1 HD |
167 | static inline unsigned long pte_pfn(pte_t pte) |
168 | { | |
169 | return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT; | |
170 | } | |
171 | ||
087975b0 AM |
172 | static inline unsigned long pmd_pfn(pmd_t pmd) |
173 | { | |
f70abb0f | 174 | return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT; |
087975b0 AM |
175 | } |
176 | ||
0ee364eb MG |
177 | static inline unsigned long pud_pfn(pud_t pud) |
178 | { | |
f70abb0f | 179 | return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT; |
0ee364eb MG |
180 | } |
181 | ||
fe1e8c3e KS |
182 | static inline unsigned long p4d_pfn(p4d_t p4d) |
183 | { | |
184 | return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT; | |
185 | } | |
186 | ||
187 | static inline int p4d_large(p4d_t p4d) | |
188 | { | |
189 | /* No 512 GiB pages yet */ | |
190 | return 0; | |
191 | } | |
192 | ||
91030ca1 HD |
193 | #define pte_page(pte) pfn_to_page(pte_pfn(pte)) |
194 | ||
3cbaeafe JP |
195 | static inline int pmd_large(pmd_t pte) |
196 | { | |
027ef6c8 | 197 | return pmd_flags(pte) & _PAGE_PSE; |
3cbaeafe JP |
198 | } |
199 | ||
f2d6bfe9 | 200 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
f2d6bfe9 JW |
201 | static inline int pmd_trans_huge(pmd_t pmd) |
202 | { | |
5c7fb56e | 203 | return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; |
f2d6bfe9 | 204 | } |
4b7167b9 | 205 | |
a00cc7d9 MW |
206 | #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD |
207 | static inline int pud_trans_huge(pud_t pud) | |
208 | { | |
209 | return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE; | |
210 | } | |
211 | #endif | |
212 | ||
fd8cfd30 | 213 | #define has_transparent_hugepage has_transparent_hugepage |
4b7167b9 AA |
214 | static inline int has_transparent_hugepage(void) |
215 | { | |
16bf9226 | 216 | return boot_cpu_has(X86_FEATURE_PSE); |
4b7167b9 | 217 | } |
5c7fb56e DW |
218 | |
219 | #ifdef __HAVE_ARCH_PTE_DEVMAP | |
220 | static inline int pmd_devmap(pmd_t pmd) | |
221 | { | |
222 | return !!(pmd_val(pmd) & _PAGE_DEVMAP); | |
223 | } | |
a00cc7d9 MW |
224 | |
225 | #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD | |
226 | static inline int pud_devmap(pud_t pud) | |
227 | { | |
228 | return !!(pud_val(pud) & _PAGE_DEVMAP); | |
229 | } | |
230 | #else | |
231 | static inline int pud_devmap(pud_t pud) | |
232 | { | |
233 | return 0; | |
234 | } | |
235 | #endif | |
5c7fb56e | 236 | #endif |
f2d6bfe9 JW |
237 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
238 | ||
6522869c JF |
239 | static inline pte_t pte_set_flags(pte_t pte, pteval_t set) |
240 | { | |
241 | pteval_t v = native_pte_val(pte); | |
242 | ||
243 | return native_make_pte(v | set); | |
244 | } | |
245 | ||
246 | static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear) | |
247 | { | |
248 | pteval_t v = native_pte_val(pte); | |
249 | ||
250 | return native_make_pte(v & ~clear); | |
251 | } | |
252 | ||
3cbaeafe JP |
253 | static inline pte_t pte_mkclean(pte_t pte) |
254 | { | |
6522869c | 255 | return pte_clear_flags(pte, _PAGE_DIRTY); |
3cbaeafe JP |
256 | } |
257 | ||
258 | static inline pte_t pte_mkold(pte_t pte) | |
259 | { | |
6522869c | 260 | return pte_clear_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
261 | } |
262 | ||
263 | static inline pte_t pte_wrprotect(pte_t pte) | |
264 | { | |
6522869c | 265 | return pte_clear_flags(pte, _PAGE_RW); |
3cbaeafe JP |
266 | } |
267 | ||
268 | static inline pte_t pte_mkexec(pte_t pte) | |
269 | { | |
6522869c | 270 | return pte_clear_flags(pte, _PAGE_NX); |
3cbaeafe JP |
271 | } |
272 | ||
273 | static inline pte_t pte_mkdirty(pte_t pte) | |
274 | { | |
0f8975ec | 275 | return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
3cbaeafe JP |
276 | } |
277 | ||
278 | static inline pte_t pte_mkyoung(pte_t pte) | |
279 | { | |
6522869c | 280 | return pte_set_flags(pte, _PAGE_ACCESSED); |
3cbaeafe JP |
281 | } |
282 | ||
283 | static inline pte_t pte_mkwrite(pte_t pte) | |
284 | { | |
6522869c | 285 | return pte_set_flags(pte, _PAGE_RW); |
3cbaeafe JP |
286 | } |
287 | ||
288 | static inline pte_t pte_mkhuge(pte_t pte) | |
289 | { | |
6522869c | 290 | return pte_set_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
291 | } |
292 | ||
293 | static inline pte_t pte_clrhuge(pte_t pte) | |
294 | { | |
6522869c | 295 | return pte_clear_flags(pte, _PAGE_PSE); |
3cbaeafe JP |
296 | } |
297 | ||
298 | static inline pte_t pte_mkglobal(pte_t pte) | |
299 | { | |
6522869c | 300 | return pte_set_flags(pte, _PAGE_GLOBAL); |
3cbaeafe JP |
301 | } |
302 | ||
303 | static inline pte_t pte_clrglobal(pte_t pte) | |
304 | { | |
6522869c | 305 | return pte_clear_flags(pte, _PAGE_GLOBAL); |
3cbaeafe | 306 | } |
4614139c | 307 | |
7e675137 NP |
308 | static inline pte_t pte_mkspecial(pte_t pte) |
309 | { | |
6522869c | 310 | return pte_set_flags(pte, _PAGE_SPECIAL); |
7e675137 NP |
311 | } |
312 | ||
01c8f1c4 DW |
313 | static inline pte_t pte_mkdevmap(pte_t pte) |
314 | { | |
315 | return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP); | |
316 | } | |
317 | ||
f2d6bfe9 JW |
318 | static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set) |
319 | { | |
320 | pmdval_t v = native_pmd_val(pmd); | |
321 | ||
322 | return __pmd(v | set); | |
323 | } | |
324 | ||
325 | static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear) | |
326 | { | |
327 | pmdval_t v = native_pmd_val(pmd); | |
328 | ||
329 | return __pmd(v & ~clear); | |
330 | } | |
331 | ||
332 | static inline pmd_t pmd_mkold(pmd_t pmd) | |
333 | { | |
334 | return pmd_clear_flags(pmd, _PAGE_ACCESSED); | |
335 | } | |
336 | ||
590a471c MK |
337 | static inline pmd_t pmd_mkclean(pmd_t pmd) |
338 | { | |
339 | return pmd_clear_flags(pmd, _PAGE_DIRTY); | |
340 | } | |
341 | ||
f2d6bfe9 JW |
342 | static inline pmd_t pmd_wrprotect(pmd_t pmd) |
343 | { | |
344 | return pmd_clear_flags(pmd, _PAGE_RW); | |
345 | } | |
346 | ||
347 | static inline pmd_t pmd_mkdirty(pmd_t pmd) | |
348 | { | |
0f8975ec | 349 | return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); |
f2d6bfe9 JW |
350 | } |
351 | ||
f25748e3 DW |
352 | static inline pmd_t pmd_mkdevmap(pmd_t pmd) |
353 | { | |
354 | return pmd_set_flags(pmd, _PAGE_DEVMAP); | |
355 | } | |
356 | ||
f2d6bfe9 JW |
357 | static inline pmd_t pmd_mkhuge(pmd_t pmd) |
358 | { | |
359 | return pmd_set_flags(pmd, _PAGE_PSE); | |
360 | } | |
361 | ||
362 | static inline pmd_t pmd_mkyoung(pmd_t pmd) | |
363 | { | |
364 | return pmd_set_flags(pmd, _PAGE_ACCESSED); | |
365 | } | |
366 | ||
367 | static inline pmd_t pmd_mkwrite(pmd_t pmd) | |
368 | { | |
369 | return pmd_set_flags(pmd, _PAGE_RW); | |
370 | } | |
371 | ||
372 | static inline pmd_t pmd_mknotpresent(pmd_t pmd) | |
373 | { | |
21d9ee3e | 374 | return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE); |
f2d6bfe9 JW |
375 | } |
376 | ||
a00cc7d9 MW |
377 | static inline pud_t pud_set_flags(pud_t pud, pudval_t set) |
378 | { | |
379 | pudval_t v = native_pud_val(pud); | |
380 | ||
381 | return __pud(v | set); | |
382 | } | |
383 | ||
384 | static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear) | |
385 | { | |
386 | pudval_t v = native_pud_val(pud); | |
387 | ||
388 | return __pud(v & ~clear); | |
389 | } | |
390 | ||
391 | static inline pud_t pud_mkold(pud_t pud) | |
392 | { | |
393 | return pud_clear_flags(pud, _PAGE_ACCESSED); | |
394 | } | |
395 | ||
396 | static inline pud_t pud_mkclean(pud_t pud) | |
397 | { | |
398 | return pud_clear_flags(pud, _PAGE_DIRTY); | |
399 | } | |
400 | ||
401 | static inline pud_t pud_wrprotect(pud_t pud) | |
402 | { | |
403 | return pud_clear_flags(pud, _PAGE_RW); | |
404 | } | |
405 | ||
406 | static inline pud_t pud_mkdirty(pud_t pud) | |
407 | { | |
408 | return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY); | |
409 | } | |
410 | ||
411 | static inline pud_t pud_mkdevmap(pud_t pud) | |
412 | { | |
413 | return pud_set_flags(pud, _PAGE_DEVMAP); | |
414 | } | |
415 | ||
416 | static inline pud_t pud_mkhuge(pud_t pud) | |
417 | { | |
418 | return pud_set_flags(pud, _PAGE_PSE); | |
419 | } | |
420 | ||
421 | static inline pud_t pud_mkyoung(pud_t pud) | |
422 | { | |
423 | return pud_set_flags(pud, _PAGE_ACCESSED); | |
424 | } | |
425 | ||
426 | static inline pud_t pud_mkwrite(pud_t pud) | |
427 | { | |
428 | return pud_set_flags(pud, _PAGE_RW); | |
429 | } | |
430 | ||
431 | static inline pud_t pud_mknotpresent(pud_t pud) | |
432 | { | |
433 | return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE); | |
434 | } | |
435 | ||
2bf01f9f | 436 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
0f8975ec PE |
437 | static inline int pte_soft_dirty(pte_t pte) |
438 | { | |
439 | return pte_flags(pte) & _PAGE_SOFT_DIRTY; | |
440 | } | |
441 | ||
442 | static inline int pmd_soft_dirty(pmd_t pmd) | |
443 | { | |
444 | return pmd_flags(pmd) & _PAGE_SOFT_DIRTY; | |
445 | } | |
446 | ||
a00cc7d9 MW |
447 | static inline int pud_soft_dirty(pud_t pud) |
448 | { | |
449 | return pud_flags(pud) & _PAGE_SOFT_DIRTY; | |
450 | } | |
451 | ||
0f8975ec PE |
452 | static inline pte_t pte_mksoft_dirty(pte_t pte) |
453 | { | |
454 | return pte_set_flags(pte, _PAGE_SOFT_DIRTY); | |
455 | } | |
456 | ||
457 | static inline pmd_t pmd_mksoft_dirty(pmd_t pmd) | |
458 | { | |
459 | return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY); | |
460 | } | |
461 | ||
a00cc7d9 MW |
462 | static inline pud_t pud_mksoft_dirty(pud_t pud) |
463 | { | |
464 | return pud_set_flags(pud, _PAGE_SOFT_DIRTY); | |
465 | } | |
466 | ||
a7b76174 MS |
467 | static inline pte_t pte_clear_soft_dirty(pte_t pte) |
468 | { | |
469 | return pte_clear_flags(pte, _PAGE_SOFT_DIRTY); | |
470 | } | |
471 | ||
472 | static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd) | |
473 | { | |
474 | return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY); | |
475 | } | |
476 | ||
a00cc7d9 MW |
477 | static inline pud_t pud_clear_soft_dirty(pud_t pud) |
478 | { | |
479 | return pud_clear_flags(pud, _PAGE_SOFT_DIRTY); | |
480 | } | |
481 | ||
2bf01f9f CG |
482 | #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */ |
483 | ||
b534816b JF |
484 | /* |
485 | * Mask out unsupported bits in a present pgprot. Non-present pgprots | |
486 | * can use those bits for other purposes, so leave them be. | |
487 | */ | |
488 | static inline pgprotval_t massage_pgprot(pgprot_t pgprot) | |
489 | { | |
490 | pgprotval_t protval = pgprot_val(pgprot); | |
491 | ||
492 | if (protval & _PAGE_PRESENT) | |
493 | protval &= __supported_pte_mask; | |
494 | ||
495 | return protval; | |
496 | } | |
497 | ||
6fdc05d4 JF |
498 | static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot) |
499 | { | |
b534816b JF |
500 | return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) | |
501 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
502 | } |
503 | ||
504 | static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot) | |
505 | { | |
b534816b JF |
506 | return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) | |
507 | massage_pgprot(pgprot)); | |
6fdc05d4 JF |
508 | } |
509 | ||
a00cc7d9 MW |
510 | static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot) |
511 | { | |
512 | return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) | | |
513 | massage_pgprot(pgprot)); | |
514 | } | |
515 | ||
38472311 IM |
516 | static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) |
517 | { | |
518 | pteval_t val = pte_val(pte); | |
519 | ||
520 | /* | |
521 | * Chop off the NX bit (if present), and add the NX portion of | |
522 | * the newprot (if present): | |
523 | */ | |
1c12c4cf | 524 | val &= _PAGE_CHG_MASK; |
b534816b | 525 | val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK; |
38472311 IM |
526 | |
527 | return __pte(val); | |
528 | } | |
529 | ||
c489f125 JW |
530 | static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot) |
531 | { | |
532 | pmdval_t val = pmd_val(pmd); | |
533 | ||
534 | val &= _HPAGE_CHG_MASK; | |
535 | val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK; | |
536 | ||
537 | return __pmd(val); | |
538 | } | |
539 | ||
1c12c4cf VP |
540 | /* mprotect needs to preserve PAT bits when updating vm_page_prot */ |
541 | #define pgprot_modify pgprot_modify | |
542 | static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) | |
543 | { | |
544 | pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; | |
545 | pgprotval_t addbits = pgprot_val(newprot); | |
546 | return __pgprot(preservebits | addbits); | |
547 | } | |
548 | ||
bbac8c6d TK |
549 | #define pte_pgprot(x) __pgprot(pte_flags(x)) |
550 | #define pmd_pgprot(x) __pgprot(pmd_flags(x)) | |
551 | #define pud_pgprot(x) __pgprot(pud_flags(x)) | |
c6ca18eb | 552 | |
b534816b | 553 | #define canon_pgprot(p) __pgprot(massage_pgprot(p)) |
1e8e23bc | 554 | |
1adcaafe | 555 | static inline int is_new_memtype_allowed(u64 paddr, unsigned long size, |
d85f3334 JG |
556 | enum page_cache_mode pcm, |
557 | enum page_cache_mode new_pcm) | |
afc7d20c | 558 | { |
1adcaafe | 559 | /* |
55a6ca25 | 560 | * PAT type is always WB for untracked ranges, so no need to check. |
1adcaafe | 561 | */ |
8a271389 | 562 | if (x86_platform.is_untracked_pat_range(paddr, paddr + size)) |
1adcaafe SS |
563 | return 1; |
564 | ||
afc7d20c | 565 | /* |
566 | * Certain new memtypes are not allowed with certain | |
567 | * requested memtype: | |
568 | * - request is uncached, return cannot be write-back | |
569 | * - request is write-combine, return cannot be write-back | |
ecb2feba TK |
570 | * - request is write-through, return cannot be write-back |
571 | * - request is write-through, return cannot be write-combine | |
afc7d20c | 572 | */ |
d85f3334 JG |
573 | if ((pcm == _PAGE_CACHE_MODE_UC_MINUS && |
574 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
575 | (pcm == _PAGE_CACHE_MODE_WC && | |
ecb2feba TK |
576 | new_pcm == _PAGE_CACHE_MODE_WB) || |
577 | (pcm == _PAGE_CACHE_MODE_WT && | |
578 | new_pcm == _PAGE_CACHE_MODE_WB) || | |
579 | (pcm == _PAGE_CACHE_MODE_WT && | |
580 | new_pcm == _PAGE_CACHE_MODE_WC)) { | |
afc7d20c | 581 | return 0; |
582 | } | |
583 | ||
584 | return 1; | |
585 | } | |
586 | ||
458a3e64 TH |
587 | pmd_t *populate_extra_pmd(unsigned long vaddr); |
588 | pte_t *populate_extra_pte(unsigned long vaddr); | |
4614139c JF |
589 | #endif /* __ASSEMBLY__ */ |
590 | ||
96a388de | 591 | #ifdef CONFIG_X86_32 |
a1ce3928 | 592 | # include <asm/pgtable_32.h> |
96a388de | 593 | #else |
a1ce3928 | 594 | # include <asm/pgtable_64.h> |
96a388de | 595 | #endif |
6c386655 | 596 | |
aca159db | 597 | #ifndef __ASSEMBLY__ |
f476961c | 598 | #include <linux/mm_types.h> |
fa0f281c | 599 | #include <linux/mmdebug.h> |
4cbeb51b | 600 | #include <linux/log2.h> |
aca159db | 601 | |
a034a010 JF |
602 | static inline int pte_none(pte_t pte) |
603 | { | |
97e3c602 | 604 | return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK)); |
a034a010 JF |
605 | } |
606 | ||
8de01da3 JF |
607 | #define __HAVE_ARCH_PTE_SAME |
608 | static inline int pte_same(pte_t a, pte_t b) | |
609 | { | |
610 | return a.pte == b.pte; | |
611 | } | |
612 | ||
7c683851 | 613 | static inline int pte_present(pte_t a) |
c46a7c81 MG |
614 | { |
615 | return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE); | |
616 | } | |
617 | ||
3565fce3 DW |
618 | #ifdef __HAVE_ARCH_PTE_DEVMAP |
619 | static inline int pte_devmap(pte_t a) | |
620 | { | |
621 | return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP; | |
622 | } | |
623 | #endif | |
624 | ||
2c3cf556 | 625 | #define pte_accessible pte_accessible |
20841405 | 626 | static inline bool pte_accessible(struct mm_struct *mm, pte_t a) |
2c3cf556 | 627 | { |
20841405 RR |
628 | if (pte_flags(a) & _PAGE_PRESENT) |
629 | return true; | |
630 | ||
21d9ee3e | 631 | if ((pte_flags(a) & _PAGE_PROTNONE) && |
20841405 RR |
632 | mm_tlb_flush_pending(mm)) |
633 | return true; | |
634 | ||
635 | return false; | |
2c3cf556 RR |
636 | } |
637 | ||
eb63657e | 638 | static inline int pte_hidden(pte_t pte) |
dfec072e | 639 | { |
eb63657e | 640 | return pte_flags(pte) & _PAGE_HIDDEN; |
dfec072e VN |
641 | } |
642 | ||
649e8ef6 JF |
643 | static inline int pmd_present(pmd_t pmd) |
644 | { | |
027ef6c8 AA |
645 | /* |
646 | * Checking for _PAGE_PSE is needed too because | |
647 | * split_huge_page will temporarily clear the present bit (but | |
648 | * the _PAGE_PSE flag will remain set at all times while the | |
649 | * _PAGE_PRESENT bit is clear). | |
650 | */ | |
21d9ee3e | 651 | return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE); |
649e8ef6 JF |
652 | } |
653 | ||
e7bb4b6d MG |
654 | #ifdef CONFIG_NUMA_BALANCING |
655 | /* | |
656 | * These work without NUMA balancing but the kernel does not care. See the | |
657 | * comment in include/asm-generic/pgtable.h | |
658 | */ | |
659 | static inline int pte_protnone(pte_t pte) | |
660 | { | |
e3a1f6ca DV |
661 | return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
662 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
663 | } |
664 | ||
665 | static inline int pmd_protnone(pmd_t pmd) | |
666 | { | |
e3a1f6ca DV |
667 | return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT)) |
668 | == _PAGE_PROTNONE; | |
e7bb4b6d MG |
669 | } |
670 | #endif /* CONFIG_NUMA_BALANCING */ | |
671 | ||
4fea801a JF |
672 | static inline int pmd_none(pmd_t pmd) |
673 | { | |
674 | /* Only check low word on 32-bit platforms, since it might be | |
675 | out of sync with upper half. */ | |
97e3c602 DH |
676 | unsigned long val = native_pmd_val(pmd); |
677 | return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0; | |
4fea801a JF |
678 | } |
679 | ||
3ffb3564 JF |
680 | static inline unsigned long pmd_page_vaddr(pmd_t pmd) |
681 | { | |
f70abb0f | 682 | return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd)); |
3ffb3564 JF |
683 | } |
684 | ||
e5f7f202 IM |
685 | /* |
686 | * Currently stuck as a macro due to indirect forward reference to | |
687 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
688 | */ | |
f70abb0f TK |
689 | #define pmd_page(pmd) \ |
690 | pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT) | |
20063ca4 | 691 | |
e24d7eee JF |
692 | /* |
693 | * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD] | |
694 | * | |
695 | * this macro returns the index of the entry in the pmd page which would | |
696 | * control the given virtual address | |
697 | */ | |
ce0c0f9e | 698 | static inline unsigned long pmd_index(unsigned long address) |
e24d7eee JF |
699 | { |
700 | return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1); | |
701 | } | |
702 | ||
97e2817d JF |
703 | /* |
704 | * Conversion functions: convert a page and protection to a page entry, | |
705 | * and a page entry and page directory to the page they refer to. | |
706 | * | |
707 | * (Currently stuck as a macro because of indirect forward reference | |
708 | * to linux/mm.h:page_to_nid()) | |
709 | */ | |
710 | #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) | |
711 | ||
346309cf JF |
712 | /* |
713 | * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE] | |
714 | * | |
715 | * this function returns the index of the entry in the pte page which would | |
716 | * control the given virtual address | |
717 | */ | |
ce0c0f9e | 718 | static inline unsigned long pte_index(unsigned long address) |
346309cf JF |
719 | { |
720 | return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1); | |
721 | } | |
722 | ||
3fbc2444 JF |
723 | static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address) |
724 | { | |
725 | return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address); | |
726 | } | |
727 | ||
99510238 JF |
728 | static inline int pmd_bad(pmd_t pmd) |
729 | { | |
18a7a199 | 730 | return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE; |
99510238 JF |
731 | } |
732 | ||
cc290ca3 JF |
733 | static inline unsigned long pages_to_mb(unsigned long npg) |
734 | { | |
735 | return npg >> (20 - PAGE_SHIFT); | |
736 | } | |
737 | ||
98233368 | 738 | #if CONFIG_PGTABLE_LEVELS > 2 |
deb79cfb JF |
739 | static inline int pud_none(pud_t pud) |
740 | { | |
97e3c602 | 741 | return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0; |
deb79cfb JF |
742 | } |
743 | ||
5ba7c913 JF |
744 | static inline int pud_present(pud_t pud) |
745 | { | |
18a7a199 | 746 | return pud_flags(pud) & _PAGE_PRESENT; |
5ba7c913 | 747 | } |
6fff47e3 JF |
748 | |
749 | static inline unsigned long pud_page_vaddr(pud_t pud) | |
750 | { | |
f70abb0f | 751 | return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud)); |
6fff47e3 | 752 | } |
f476961c | 753 | |
e5f7f202 IM |
754 | /* |
755 | * Currently stuck as a macro due to indirect forward reference to | |
756 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
757 | */ | |
f70abb0f TK |
758 | #define pud_page(pud) \ |
759 | pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT) | |
01ade20d JF |
760 | |
761 | /* Find an entry in the second-level page table.. */ | |
762 | static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) | |
763 | { | |
764 | return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address); | |
765 | } | |
3180fba0 | 766 | |
3f6cbef1 JF |
767 | static inline int pud_large(pud_t pud) |
768 | { | |
e2f5bda9 | 769 | return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) == |
3f6cbef1 JF |
770 | (_PAGE_PSE | _PAGE_PRESENT); |
771 | } | |
a61bb29a JF |
772 | |
773 | static inline int pud_bad(pud_t pud) | |
774 | { | |
18a7a199 | 775 | return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0; |
a61bb29a | 776 | } |
e2f5bda9 JF |
777 | #else |
778 | static inline int pud_large(pud_t pud) | |
779 | { | |
780 | return 0; | |
781 | } | |
98233368 | 782 | #endif /* CONFIG_PGTABLE_LEVELS > 2 */ |
5ba7c913 | 783 | |
fe1e8c3e KS |
784 | static inline unsigned long pud_index(unsigned long address) |
785 | { | |
786 | return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1); | |
787 | } | |
788 | ||
789 | static inline unsigned long p4d_index(unsigned long address) | |
790 | { | |
791 | return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1); | |
792 | } | |
793 | ||
98233368 | 794 | #if CONFIG_PGTABLE_LEVELS > 3 |
9f38d7e8 JF |
795 | static inline int pgd_present(pgd_t pgd) |
796 | { | |
18a7a199 | 797 | return pgd_flags(pgd) & _PAGE_PRESENT; |
9f38d7e8 | 798 | } |
c5f040b1 JF |
799 | |
800 | static inline unsigned long pgd_page_vaddr(pgd_t pgd) | |
801 | { | |
802 | return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK); | |
803 | } | |
777cba16 | 804 | |
e5f7f202 IM |
805 | /* |
806 | * Currently stuck as a macro due to indirect forward reference to | |
807 | * linux/mmzone.h's __section_mem_map_addr() definition: | |
808 | */ | |
809 | #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT) | |
7cfb8102 JF |
810 | |
811 | /* to find an entry in a page-table-directory. */ | |
3d081b18 JF |
812 | static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) |
813 | { | |
814 | return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address); | |
815 | } | |
30f10316 JF |
816 | |
817 | static inline int pgd_bad(pgd_t pgd) | |
818 | { | |
18a7a199 | 819 | return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE; |
30f10316 | 820 | } |
7325cc2e JF |
821 | |
822 | static inline int pgd_none(pgd_t pgd) | |
823 | { | |
97e3c602 DH |
824 | /* |
825 | * There is no need to do a workaround for the KNL stray | |
826 | * A/D bit erratum here. PGDs only point to page tables | |
827 | * except on 32-bit non-PAE which is not supported on | |
828 | * KNL. | |
829 | */ | |
26c8e317 | 830 | return !native_pgd_val(pgd); |
7325cc2e | 831 | } |
98233368 | 832 | #endif /* CONFIG_PGTABLE_LEVELS > 3 */ |
9f38d7e8 | 833 | |
4614139c JF |
834 | #endif /* __ASSEMBLY__ */ |
835 | ||
fb15a9b3 JF |
836 | /* |
837 | * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD] | |
838 | * | |
839 | * this macro returns the index of the entry in the pgd page which would | |
840 | * control the given virtual address | |
841 | */ | |
842 | #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) | |
843 | ||
844 | /* | |
845 | * pgd_offset() returns a (pgd_t *) | |
846 | * pgd_index() is used get the offset into the pgd page's array of pgd_t's; | |
847 | */ | |
848 | #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address))) | |
849 | /* | |
850 | * a shortcut which implies the use of the kernel's pgd, instead | |
851 | * of a process's | |
852 | */ | |
853 | #define pgd_offset_k(address) pgd_offset(&init_mm, (address)) | |
854 | ||
855 | ||
68db065c JF |
856 | #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET) |
857 | #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY) | |
858 | ||
195466dc JF |
859 | #ifndef __ASSEMBLY__ |
860 | ||
2c1b284e | 861 | extern int direct_gbpages; |
22ddfcaa | 862 | void init_mem_mapping(void); |
8d57470d | 863 | void early_alloc_pgt_buf(void); |
2c1b284e | 864 | |
b234e8a0 TG |
865 | #ifdef CONFIG_X86_64 |
866 | /* Realmode trampoline initialization. */ | |
867 | extern pgd_t trampoline_pgd_entry; | |
0483e1fa | 868 | static inline void __meminit init_trampoline_default(void) |
b234e8a0 TG |
869 | { |
870 | /* Default trampoline pgd value */ | |
871 | trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)]; | |
872 | } | |
0483e1fa TG |
873 | # ifdef CONFIG_RANDOMIZE_MEMORY |
874 | void __meminit init_trampoline(void); | |
875 | # else | |
876 | # define init_trampoline init_trampoline_default | |
877 | # endif | |
b234e8a0 TG |
878 | #else |
879 | static inline void init_trampoline(void) { } | |
880 | #endif | |
881 | ||
4891645e JF |
882 | /* local pte updates need not use xchg for locking */ |
883 | static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep) | |
884 | { | |
885 | pte_t res = *ptep; | |
886 | ||
887 | /* Pure native function needs no input for mm, addr */ | |
888 | native_pte_clear(NULL, 0, ptep); | |
889 | return res; | |
890 | } | |
891 | ||
f2d6bfe9 JW |
892 | static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp) |
893 | { | |
894 | pmd_t res = *pmdp; | |
895 | ||
896 | native_pmd_clear(pmdp); | |
897 | return res; | |
898 | } | |
899 | ||
a00cc7d9 MW |
900 | static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp) |
901 | { | |
902 | pud_t res = *pudp; | |
903 | ||
904 | native_pud_clear(pudp); | |
905 | return res; | |
906 | } | |
907 | ||
4891645e JF |
908 | static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr, |
909 | pte_t *ptep , pte_t pte) | |
910 | { | |
911 | native_set_pte(ptep, pte); | |
912 | } | |
913 | ||
0a47de52 AA |
914 | static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr, |
915 | pmd_t *pmdp , pmd_t pmd) | |
916 | { | |
917 | native_set_pmd(pmdp, pmd); | |
918 | } | |
919 | ||
a00cc7d9 MW |
920 | static inline void native_set_pud_at(struct mm_struct *mm, unsigned long addr, |
921 | pud_t *pudp, pud_t pud) | |
922 | { | |
923 | native_set_pud(pudp, pud); | |
924 | } | |
925 | ||
195466dc JF |
926 | #ifndef CONFIG_PARAVIRT |
927 | /* | |
928 | * Rules for using pte_update - it must be called after any PTE update which | |
929 | * has not been done using the set_pte / clear_pte interfaces. It is used by | |
930 | * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE | |
931 | * updates should either be sets, clears, or set_pte_atomic for P->P | |
932 | * transitions, which means this hook should only be called for user PTEs. | |
933 | * This hook implies a P->P protection or access change has taken place, which | |
d6ccc3ec | 934 | * requires a subsequent TLB flush. |
195466dc JF |
935 | */ |
936 | #define pte_update(mm, addr, ptep) do { } while (0) | |
195466dc JF |
937 | #endif |
938 | ||
195466dc JF |
939 | /* |
940 | * We only update the dirty/accessed state if we set | |
941 | * the dirty bit by hand in the kernel, since the hardware | |
942 | * will do the accessed bit for us, and we don't want to | |
943 | * race with other CPU's that might be updating the dirty | |
944 | * bit at the same time. | |
945 | */ | |
bea41808 JF |
946 | struct vm_area_struct; |
947 | ||
195466dc | 948 | #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
ee5aa8d3 JF |
949 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
950 | unsigned long address, pte_t *ptep, | |
951 | pte_t entry, int dirty); | |
195466dc JF |
952 | |
953 | #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
f9fbf1a3 JF |
954 | extern int ptep_test_and_clear_young(struct vm_area_struct *vma, |
955 | unsigned long addr, pte_t *ptep); | |
195466dc JF |
956 | |
957 | #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
c20311e1 JF |
958 | extern int ptep_clear_flush_young(struct vm_area_struct *vma, |
959 | unsigned long address, pte_t *ptep); | |
195466dc JF |
960 | |
961 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR | |
3cbaeafe JP |
962 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, |
963 | pte_t *ptep) | |
195466dc JF |
964 | { |
965 | pte_t pte = native_ptep_get_and_clear(ptep); | |
966 | pte_update(mm, addr, ptep); | |
967 | return pte; | |
968 | } | |
969 | ||
970 | #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL | |
3cbaeafe JP |
971 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
972 | unsigned long addr, pte_t *ptep, | |
973 | int full) | |
195466dc JF |
974 | { |
975 | pte_t pte; | |
976 | if (full) { | |
977 | /* | |
978 | * Full address destruction in progress; paravirt does not | |
979 | * care about updates and native needs no locking | |
980 | */ | |
981 | pte = native_local_ptep_get_and_clear(ptep); | |
982 | } else { | |
983 | pte = ptep_get_and_clear(mm, addr, ptep); | |
984 | } | |
985 | return pte; | |
986 | } | |
987 | ||
988 | #define __HAVE_ARCH_PTEP_SET_WRPROTECT | |
3cbaeafe JP |
989 | static inline void ptep_set_wrprotect(struct mm_struct *mm, |
990 | unsigned long addr, pte_t *ptep) | |
195466dc | 991 | { |
d8d89827 | 992 | clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte); |
195466dc JF |
993 | pte_update(mm, addr, ptep); |
994 | } | |
995 | ||
2ac13462 | 996 | #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0) |
61c77326 | 997 | |
f2d6bfe9 JW |
998 | #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot)) |
999 | ||
1000 | #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
1001 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
1002 | unsigned long address, pmd_t *pmdp, | |
1003 | pmd_t entry, int dirty); | |
a00cc7d9 MW |
1004 | extern int pudp_set_access_flags(struct vm_area_struct *vma, |
1005 | unsigned long address, pud_t *pudp, | |
1006 | pud_t entry, int dirty); | |
f2d6bfe9 JW |
1007 | |
1008 | #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
1009 | extern int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
1010 | unsigned long addr, pmd_t *pmdp); | |
a00cc7d9 MW |
1011 | extern int pudp_test_and_clear_young(struct vm_area_struct *vma, |
1012 | unsigned long addr, pud_t *pudp); | |
f2d6bfe9 JW |
1013 | |
1014 | #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
1015 | extern int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
1016 | unsigned long address, pmd_t *pmdp); | |
1017 | ||
1018 | ||
f2d6bfe9 JW |
1019 | #define __HAVE_ARCH_PMD_WRITE |
1020 | static inline int pmd_write(pmd_t pmd) | |
1021 | { | |
1022 | return pmd_flags(pmd) & _PAGE_RW; | |
1023 | } | |
1024 | ||
8809aa2d AK |
1025 | #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR |
1026 | static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr, | |
f2d6bfe9 JW |
1027 | pmd_t *pmdp) |
1028 | { | |
d6ccc3ec | 1029 | return native_pmdp_get_and_clear(pmdp); |
f2d6bfe9 JW |
1030 | } |
1031 | ||
a00cc7d9 MW |
1032 | #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR |
1033 | static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm, | |
1034 | unsigned long addr, pud_t *pudp) | |
1035 | { | |
1036 | return native_pudp_get_and_clear(pudp); | |
1037 | } | |
1038 | ||
f2d6bfe9 JW |
1039 | #define __HAVE_ARCH_PMDP_SET_WRPROTECT |
1040 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
1041 | unsigned long addr, pmd_t *pmdp) | |
1042 | { | |
1043 | clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp); | |
f2d6bfe9 JW |
1044 | } |
1045 | ||
85958b46 JF |
1046 | /* |
1047 | * clone_pgd_range(pgd_t *dst, pgd_t *src, int count); | |
1048 | * | |
1049 | * dst - pointer to pgd range anwhere on a pgd page | |
1050 | * src - "" | |
1051 | * count - the number of pgds to copy. | |
1052 | * | |
1053 | * dst and src can be on the same page, but the range must not overlap, | |
1054 | * and must not cross a page boundary. | |
1055 | */ | |
1056 | static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count) | |
1057 | { | |
1058 | memcpy(dst, src, count * sizeof(pgd_t)); | |
1059 | } | |
1060 | ||
4cbeb51b DH |
1061 | #define PTE_SHIFT ilog2(PTRS_PER_PTE) |
1062 | static inline int page_level_shift(enum pg_level level) | |
1063 | { | |
1064 | return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT; | |
1065 | } | |
1066 | static inline unsigned long page_level_size(enum pg_level level) | |
1067 | { | |
1068 | return 1UL << page_level_shift(level); | |
1069 | } | |
1070 | static inline unsigned long page_level_mask(enum pg_level level) | |
1071 | { | |
1072 | return ~(page_level_size(level) - 1); | |
1073 | } | |
85958b46 | 1074 | |
602e0186 KS |
1075 | /* |
1076 | * The x86 doesn't have any external MMU info: the kernel page | |
1077 | * tables contain all the necessary information. | |
1078 | */ | |
1079 | static inline void update_mmu_cache(struct vm_area_struct *vma, | |
1080 | unsigned long addr, pte_t *ptep) | |
1081 | { | |
1082 | } | |
1083 | static inline void update_mmu_cache_pmd(struct vm_area_struct *vma, | |
1084 | unsigned long addr, pmd_t *pmd) | |
1085 | { | |
1086 | } | |
a00cc7d9 MW |
1087 | static inline void update_mmu_cache_pud(struct vm_area_struct *vma, |
1088 | unsigned long addr, pud_t *pud) | |
1089 | { | |
1090 | } | |
85958b46 | 1091 | |
2bf01f9f | 1092 | #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY |
fa0f281c CG |
1093 | static inline pte_t pte_swp_mksoft_dirty(pte_t pte) |
1094 | { | |
fa0f281c CG |
1095 | return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
1096 | } | |
1097 | ||
1098 | static inline int pte_swp_soft_dirty(pte_t pte) | |
1099 | { | |
fa0f281c CG |
1100 | return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY; |
1101 | } | |
1102 | ||
1103 | static inline pte_t pte_swp_clear_soft_dirty(pte_t pte) | |
1104 | { | |
fa0f281c CG |
1105 | return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY); |
1106 | } | |
2bf01f9f | 1107 | #endif |
fa0f281c | 1108 | |
33a709b2 DH |
1109 | #define PKRU_AD_BIT 0x1 |
1110 | #define PKRU_WD_BIT 0x2 | |
84594296 | 1111 | #define PKRU_BITS_PER_PKEY 2 |
33a709b2 DH |
1112 | |
1113 | static inline bool __pkru_allows_read(u32 pkru, u16 pkey) | |
1114 | { | |
84594296 | 1115 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
1116 | return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits)); |
1117 | } | |
1118 | ||
1119 | static inline bool __pkru_allows_write(u32 pkru, u16 pkey) | |
1120 | { | |
84594296 | 1121 | int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY; |
33a709b2 DH |
1122 | /* |
1123 | * Access-disable disables writes too so we need to check | |
1124 | * both bits here. | |
1125 | */ | |
1126 | return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits)); | |
1127 | } | |
1128 | ||
1129 | static inline u16 pte_flags_pkey(unsigned long pte_flags) | |
1130 | { | |
1131 | #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS | |
1132 | /* ifdef to avoid doing 59-bit shift on 32-bit values */ | |
1133 | return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0; | |
1134 | #else | |
1135 | return 0; | |
1136 | #endif | |
1137 | } | |
1138 | ||
195466dc JF |
1139 | #include <asm-generic/pgtable.h> |
1140 | #endif /* __ASSEMBLY__ */ | |
1141 | ||
1965aae3 | 1142 | #endif /* _ASM_X86_PGTABLE_H */ |