]>
Commit | Line | Data |
---|---|---|
80cabfad FB |
1 | /* |
2 | * QEMU PC System Emulator | |
5fafdf24 | 3 | * |
80cabfad | 4 | * Copyright (c) 2003-2004 Fabrice Bellard |
5fafdf24 | 5 | * |
80cabfad FB |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
e688df6b | 24 | |
b6a0aa05 | 25 | #include "qemu/osdep.h" |
d471bf3e | 26 | #include "qemu/units.h" |
549e984e | 27 | #include "hw/i386/x86.h" |
0d09e41a PB |
28 | #include "hw/i386/pc.h" |
29 | #include "hw/char/serial.h" | |
bb3d5ea8 | 30 | #include "hw/char/parallel.h" |
0d09e41a | 31 | #include "hw/i386/apic.h" |
54a40293 | 32 | #include "hw/i386/topology.h" |
87abaa5d | 33 | #include "hw/i386/fw_cfg.h" |
d8f23d61 | 34 | #include "hw/i386/vmport.h" |
54a40293 | 35 | #include "sysemu/cpus.h" |
0d09e41a | 36 | #include "hw/block/fdc.h" |
83c9f4ca PB |
37 | #include "hw/ide.h" |
38 | #include "hw/pci/pci.h" | |
2118196b | 39 | #include "hw/pci/pci_bus.h" |
0d09e41a PB |
40 | #include "hw/nvram/fw_cfg.h" |
41 | #include "hw/timer/hpet.h" | |
a2eb5c0c | 42 | #include "hw/firmware/smbios.h" |
83c9f4ca | 43 | #include "hw/loader.h" |
ca20cf32 | 44 | #include "elf.h" |
d6454270 | 45 | #include "migration/vmstate.h" |
47b43a1f | 46 | #include "multiboot.h" |
bcdb9064 | 47 | #include "hw/rtc/mc146818rtc.h" |
852c27e2 | 48 | #include "hw/intc/i8259.h" |
55f613ac | 49 | #include "hw/dma/i8257.h" |
0d09e41a | 50 | #include "hw/timer/i8254.h" |
47973a2d | 51 | #include "hw/input/i8042.h" |
64552b6b | 52 | #include "hw/irq.h" |
0d09e41a | 53 | #include "hw/audio/pcspk.h" |
83c9f4ca PB |
54 | #include "hw/pci/msi.h" |
55 | #include "hw/sysbus.h" | |
9c17d615 | 56 | #include "sysemu/sysemu.h" |
14a48c1d | 57 | #include "sysemu/tcg.h" |
e35704ba | 58 | #include "sysemu/numa.h" |
9c17d615 | 59 | #include "sysemu/kvm.h" |
da278d58 | 60 | #include "sysemu/xen.h" |
b1c12027 | 61 | #include "sysemu/qtest.h" |
71e8a915 | 62 | #include "sysemu/reset.h" |
54d31236 | 63 | #include "sysemu/runstate.h" |
1d31f66b | 64 | #include "kvm_i386.h" |
0d09e41a | 65 | #include "hw/xen/xen.h" |
ab969087 | 66 | #include "hw/xen/start_info.h" |
a19cbfb3 | 67 | #include "ui/qemu-spice.h" |
022c62cb PB |
68 | #include "exec/memory.h" |
69 | #include "exec/address-spaces.h" | |
9c17d615 | 70 | #include "sysemu/arch_init.h" |
1de7afc9 | 71 | #include "qemu/bitmap.h" |
0c764a9d | 72 | #include "qemu/config-file.h" |
d49b6836 | 73 | #include "qemu/error-report.h" |
922a01a0 | 74 | #include "qemu/option.h" |
133ef074 | 75 | #include "qemu/cutils.h" |
0445259b | 76 | #include "hw/acpi/acpi.h" |
5ff020b7 | 77 | #include "hw/acpi/cpu_hotplug.h" |
c649983b | 78 | #include "hw/boards.h" |
72c194f7 | 79 | #include "acpi-build.h" |
95bee274 | 80 | #include "hw/mem/pc-dimm.h" |
4b997690 | 81 | #include "hw/mem/nvdimm.h" |
e688df6b | 82 | #include "qapi/error.h" |
9af23989 | 83 | #include "qapi/qapi-visit-common.h" |
bf1e8939 | 84 | #include "qapi/visitor.h" |
2e5b09fd | 85 | #include "hw/core/cpu.h" |
a310e653 | 86 | #include "hw/usb.h" |
60c5e104 | 87 | #include "hw/i386/intel_iommu.h" |
489983d6 | 88 | #include "hw/net/ne2000-isa.h" |
06e0259a | 89 | #include "standard-headers/asm-x86/bootparam.h" |
a0a49813 | 90 | #include "hw/virtio/virtio-pmem-pci.h" |
0ed48fd3 | 91 | #include "hw/virtio/virtio-mem-pci.h" |
a0a49813 | 92 | #include "hw/mem/memory-device.h" |
6f479566 LX |
93 | #include "sysemu/replay.h" |
94 | #include "qapi/qmp/qerror.h" | |
97fd1ea8 | 95 | #include "config-devices.h" |
d6d059ca | 96 | #include "e820_memory_layout.h" |
149c50ca | 97 | #include "fw_cfg.h" |
4ca8dabd | 98 | #include "trace.h" |
471fd342 | 99 | |
541aaa1d CH |
100 | GlobalProperty pc_compat_5_0[] = {}; |
101 | const size_t pc_compat_5_0_len = G_N_ELEMENTS(pc_compat_5_0); | |
102 | ||
f404220e IM |
103 | GlobalProperty pc_compat_4_2[] = { |
104 | { "mch", "smbase-smram", "off" }, | |
105 | }; | |
3eb74d20 CH |
106 | const size_t pc_compat_4_2_len = G_N_ELEMENTS(pc_compat_4_2); |
107 | ||
9aec2e52 CH |
108 | GlobalProperty pc_compat_4_1[] = {}; |
109 | const size_t pc_compat_4_1_len = G_N_ELEMENTS(pc_compat_4_1); | |
110 | ||
9bf2650b CH |
111 | GlobalProperty pc_compat_4_0[] = {}; |
112 | const size_t pc_compat_4_0_len = G_N_ELEMENTS(pc_compat_4_0); | |
113 | ||
abd93cc7 | 114 | GlobalProperty pc_compat_3_1[] = { |
6c36bddf | 115 | { "intel-iommu", "dma-drain", "off" }, |
483c6ad4 BP |
116 | { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" }, |
117 | { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "off" }, | |
9fe8b7be VK |
118 | { "Opteron_G4" "-" TYPE_X86_CPU, "npt", "off" }, |
119 | { "Opteron_G4" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
483c6ad4 | 120 | { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "off" }, |
9fe8b7be VK |
121 | { "Opteron_G5" "-" TYPE_X86_CPU, "npt", "off" }, |
122 | { "Opteron_G5" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
123 | { "EPYC" "-" TYPE_X86_CPU, "npt", "off" }, | |
124 | { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
125 | { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" }, | |
126 | { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
ecb85fe4 PB |
127 | { "Skylake-Client" "-" TYPE_X86_CPU, "mpx", "on" }, |
128 | { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" }, | |
129 | { "Skylake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, | |
130 | { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "mpx", "on" }, | |
131 | { "Cascadelake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, | |
132 | { "Icelake-Client" "-" TYPE_X86_CPU, "mpx", "on" }, | |
133 | { "Icelake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, | |
b0a19803 | 134 | { "Cascadelake-Server" "-" TYPE_X86_CPU, "stepping", "5" }, |
f24c3a79 | 135 | { TYPE_X86_CPU, "x-intel-pt-auto-level", "off" }, |
abd93cc7 MAL |
136 | }; |
137 | const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1); | |
138 | ||
ddb3235d | 139 | GlobalProperty pc_compat_3_0[] = { |
6c36bddf EH |
140 | { TYPE_X86_CPU, "x-hv-synic-kvm-only", "on" }, |
141 | { "Skylake-Server" "-" TYPE_X86_CPU, "pku", "off" }, | |
142 | { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "pku", "off" }, | |
ddb3235d MAL |
143 | }; |
144 | const size_t pc_compat_3_0_len = G_N_ELEMENTS(pc_compat_3_0); | |
145 | ||
0d47310b | 146 | GlobalProperty pc_compat_2_12[] = { |
6c36bddf EH |
147 | { TYPE_X86_CPU, "legacy-cache", "on" }, |
148 | { TYPE_X86_CPU, "topoext", "off" }, | |
149 | { "EPYC-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, | |
150 | { "EPYC-IBPB-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, | |
0d47310b MAL |
151 | }; |
152 | const size_t pc_compat_2_12_len = G_N_ELEMENTS(pc_compat_2_12); | |
153 | ||
43df70a9 | 154 | GlobalProperty pc_compat_2_11[] = { |
6c36bddf EH |
155 | { TYPE_X86_CPU, "x-migrate-smi-count", "off" }, |
156 | { "Skylake-Server" "-" TYPE_X86_CPU, "clflushopt", "off" }, | |
43df70a9 MAL |
157 | }; |
158 | const size_t pc_compat_2_11_len = G_N_ELEMENTS(pc_compat_2_11); | |
159 | ||
503224f4 | 160 | GlobalProperty pc_compat_2_10[] = { |
6c36bddf EH |
161 | { TYPE_X86_CPU, "x-hv-max-vps", "0x40" }, |
162 | { "i440FX-pcihost", "x-pci-hole64-fix", "off" }, | |
163 | { "q35-pcihost", "x-pci-hole64-fix", "off" }, | |
503224f4 MAL |
164 | }; |
165 | const size_t pc_compat_2_10_len = G_N_ELEMENTS(pc_compat_2_10); | |
166 | ||
3e803152 | 167 | GlobalProperty pc_compat_2_9[] = { |
6c36bddf | 168 | { "mch", "extended-tseg-mbytes", "0" }, |
3e803152 MAL |
169 | }; |
170 | const size_t pc_compat_2_9_len = G_N_ELEMENTS(pc_compat_2_9); | |
171 | ||
edc24ccd | 172 | GlobalProperty pc_compat_2_8[] = { |
6c36bddf EH |
173 | { TYPE_X86_CPU, "tcg-cpuid", "off" }, |
174 | { "kvmclock", "x-mach-use-reliable-get-clock", "off" }, | |
175 | { "ICH9-LPC", "x-smi-broadcast", "off" }, | |
176 | { TYPE_X86_CPU, "vmware-cpuid-freq", "off" }, | |
177 | { "Haswell-" TYPE_X86_CPU, "stepping", "1" }, | |
edc24ccd MAL |
178 | }; |
179 | const size_t pc_compat_2_8_len = G_N_ELEMENTS(pc_compat_2_8); | |
180 | ||
5a995064 | 181 | GlobalProperty pc_compat_2_7[] = { |
6c36bddf EH |
182 | { TYPE_X86_CPU, "l3-cache", "off" }, |
183 | { TYPE_X86_CPU, "full-cpuid-auto-level", "off" }, | |
184 | { "Opteron_G3" "-" TYPE_X86_CPU, "family", "15" }, | |
185 | { "Opteron_G3" "-" TYPE_X86_CPU, "model", "6" }, | |
186 | { "Opteron_G3" "-" TYPE_X86_CPU, "stepping", "1" }, | |
187 | { "isa-pcspk", "migrate", "off" }, | |
5a995064 MAL |
188 | }; |
189 | const size_t pc_compat_2_7_len = G_N_ELEMENTS(pc_compat_2_7); | |
190 | ||
ff8f261f | 191 | GlobalProperty pc_compat_2_6[] = { |
6c36bddf EH |
192 | { TYPE_X86_CPU, "cpuid-0xb", "off" }, |
193 | { "vmxnet3", "romfile", "" }, | |
194 | { TYPE_X86_CPU, "fill-mtrr-mask", "off" }, | |
195 | { "apic-common", "legacy-instance-id", "on", } | |
ff8f261f MAL |
196 | }; |
197 | const size_t pc_compat_2_6_len = G_N_ELEMENTS(pc_compat_2_6); | |
198 | ||
fe759610 MAL |
199 | GlobalProperty pc_compat_2_5[] = {}; |
200 | const size_t pc_compat_2_5_len = G_N_ELEMENTS(pc_compat_2_5); | |
201 | ||
2f99b9c2 MAL |
202 | GlobalProperty pc_compat_2_4[] = { |
203 | PC_CPU_MODEL_IDS("2.4.0") | |
6c36bddf EH |
204 | { "Haswell-" TYPE_X86_CPU, "abm", "off" }, |
205 | { "Haswell-noTSX-" TYPE_X86_CPU, "abm", "off" }, | |
206 | { "Broadwell-" TYPE_X86_CPU, "abm", "off" }, | |
207 | { "Broadwell-noTSX-" TYPE_X86_CPU, "abm", "off" }, | |
208 | { "host" "-" TYPE_X86_CPU, "host-cache-info", "on" }, | |
209 | { TYPE_X86_CPU, "check", "off" }, | |
210 | { "qemu64" "-" TYPE_X86_CPU, "sse4a", "on" }, | |
211 | { "qemu64" "-" TYPE_X86_CPU, "abm", "on" }, | |
212 | { "qemu64" "-" TYPE_X86_CPU, "popcnt", "on" }, | |
213 | { "qemu32" "-" TYPE_X86_CPU, "popcnt", "on" }, | |
214 | { "Opteron_G2" "-" TYPE_X86_CPU, "rdtscp", "on" }, | |
215 | { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "on" }, | |
216 | { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "on" }, | |
217 | { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "on", } | |
2f99b9c2 MAL |
218 | }; |
219 | const size_t pc_compat_2_4_len = G_N_ELEMENTS(pc_compat_2_4); | |
220 | ||
8995dd90 MAL |
221 | GlobalProperty pc_compat_2_3[] = { |
222 | PC_CPU_MODEL_IDS("2.3.0") | |
6c36bddf EH |
223 | { TYPE_X86_CPU, "arat", "off" }, |
224 | { "qemu64" "-" TYPE_X86_CPU, "min-level", "4" }, | |
225 | { "kvm64" "-" TYPE_X86_CPU, "min-level", "5" }, | |
226 | { "pentium3" "-" TYPE_X86_CPU, "min-level", "2" }, | |
227 | { "n270" "-" TYPE_X86_CPU, "min-level", "5" }, | |
228 | { "Conroe" "-" TYPE_X86_CPU, "min-level", "4" }, | |
229 | { "Penryn" "-" TYPE_X86_CPU, "min-level", "4" }, | |
230 | { "Nehalem" "-" TYPE_X86_CPU, "min-level", "4" }, | |
231 | { "n270" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
232 | { "Penryn" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
233 | { "Conroe" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
234 | { "Nehalem" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
235 | { "Westmere" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
236 | { "SandyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
237 | { "IvyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
238 | { "Haswell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
239 | { "Haswell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
240 | { "Broadwell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
241 | { "Broadwell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
242 | { TYPE_X86_CPU, "kvm-no-smi-migration", "on" }, | |
8995dd90 MAL |
243 | }; |
244 | const size_t pc_compat_2_3_len = G_N_ELEMENTS(pc_compat_2_3); | |
245 | ||
1c30044e MAL |
246 | GlobalProperty pc_compat_2_2[] = { |
247 | PC_CPU_MODEL_IDS("2.2.0") | |
6c36bddf EH |
248 | { "kvm64" "-" TYPE_X86_CPU, "vme", "off" }, |
249 | { "kvm32" "-" TYPE_X86_CPU, "vme", "off" }, | |
250 | { "Conroe" "-" TYPE_X86_CPU, "vme", "off" }, | |
251 | { "Penryn" "-" TYPE_X86_CPU, "vme", "off" }, | |
252 | { "Nehalem" "-" TYPE_X86_CPU, "vme", "off" }, | |
253 | { "Westmere" "-" TYPE_X86_CPU, "vme", "off" }, | |
254 | { "SandyBridge" "-" TYPE_X86_CPU, "vme", "off" }, | |
255 | { "Haswell" "-" TYPE_X86_CPU, "vme", "off" }, | |
256 | { "Broadwell" "-" TYPE_X86_CPU, "vme", "off" }, | |
257 | { "Opteron_G1" "-" TYPE_X86_CPU, "vme", "off" }, | |
258 | { "Opteron_G2" "-" TYPE_X86_CPU, "vme", "off" }, | |
259 | { "Opteron_G3" "-" TYPE_X86_CPU, "vme", "off" }, | |
260 | { "Opteron_G4" "-" TYPE_X86_CPU, "vme", "off" }, | |
261 | { "Opteron_G5" "-" TYPE_X86_CPU, "vme", "off" }, | |
262 | { "Haswell" "-" TYPE_X86_CPU, "f16c", "off" }, | |
263 | { "Haswell" "-" TYPE_X86_CPU, "rdrand", "off" }, | |
264 | { "Broadwell" "-" TYPE_X86_CPU, "f16c", "off" }, | |
265 | { "Broadwell" "-" TYPE_X86_CPU, "rdrand", "off" }, | |
1c30044e MAL |
266 | }; |
267 | const size_t pc_compat_2_2_len = G_N_ELEMENTS(pc_compat_2_2); | |
268 | ||
c4fc5695 MAL |
269 | GlobalProperty pc_compat_2_1[] = { |
270 | PC_CPU_MODEL_IDS("2.1.0") | |
6c36bddf EH |
271 | { "coreduo" "-" TYPE_X86_CPU, "vmx", "on" }, |
272 | { "core2duo" "-" TYPE_X86_CPU, "vmx", "on" }, | |
c4fc5695 MAL |
273 | }; |
274 | const size_t pc_compat_2_1_len = G_N_ELEMENTS(pc_compat_2_1); | |
275 | ||
a310e653 MAL |
276 | GlobalProperty pc_compat_2_0[] = { |
277 | PC_CPU_MODEL_IDS("2.0.0") | |
6c36bddf EH |
278 | { "virtio-scsi-pci", "any_layout", "off" }, |
279 | { "PIIX4_PM", "memory-hotplug-support", "off" }, | |
280 | { "apic", "version", "0x11" }, | |
281 | { "nec-usb-xhci", "superspeed-ports-first", "off" }, | |
282 | { "nec-usb-xhci", "force-pcie-endcap", "on" }, | |
283 | { "pci-serial", "prog_if", "0" }, | |
284 | { "pci-serial-2x", "prog_if", "0" }, | |
285 | { "pci-serial-4x", "prog_if", "0" }, | |
286 | { "virtio-net-pci", "guest_announce", "off" }, | |
287 | { "ICH9-LPC", "memory-hotplug-support", "off" }, | |
288 | { "xio3130-downstream", COMPAT_PROP_PCP, "off" }, | |
289 | { "ioh3420", COMPAT_PROP_PCP, "off" }, | |
a310e653 MAL |
290 | }; |
291 | const size_t pc_compat_2_0_len = G_N_ELEMENTS(pc_compat_2_0); | |
292 | ||
293 | GlobalProperty pc_compat_1_7[] = { | |
294 | PC_CPU_MODEL_IDS("1.7.0") | |
6c36bddf EH |
295 | { TYPE_USB_DEVICE, "msos-desc", "no" }, |
296 | { "PIIX4_PM", "acpi-pci-hotplug-with-bridge-support", "off" }, | |
297 | { "hpet", HPET_INTCAP, "4" }, | |
a310e653 MAL |
298 | }; |
299 | const size_t pc_compat_1_7_len = G_N_ELEMENTS(pc_compat_1_7); | |
300 | ||
301 | GlobalProperty pc_compat_1_6[] = { | |
302 | PC_CPU_MODEL_IDS("1.6.0") | |
6c36bddf EH |
303 | { "e1000", "mitigation", "off" }, |
304 | { "qemu64-" TYPE_X86_CPU, "model", "2" }, | |
305 | { "qemu32-" TYPE_X86_CPU, "model", "3" }, | |
306 | { "i440FX-pcihost", "short_root_bus", "1" }, | |
307 | { "q35-pcihost", "short_root_bus", "1" }, | |
a310e653 MAL |
308 | }; |
309 | const size_t pc_compat_1_6_len = G_N_ELEMENTS(pc_compat_1_6); | |
310 | ||
311 | GlobalProperty pc_compat_1_5[] = { | |
312 | PC_CPU_MODEL_IDS("1.5.0") | |
6c36bddf EH |
313 | { "Conroe-" TYPE_X86_CPU, "model", "2" }, |
314 | { "Conroe-" TYPE_X86_CPU, "min-level", "2" }, | |
315 | { "Penryn-" TYPE_X86_CPU, "model", "2" }, | |
316 | { "Penryn-" TYPE_X86_CPU, "min-level", "2" }, | |
317 | { "Nehalem-" TYPE_X86_CPU, "model", "2" }, | |
318 | { "Nehalem-" TYPE_X86_CPU, "min-level", "2" }, | |
319 | { "virtio-net-pci", "any_layout", "off" }, | |
320 | { TYPE_X86_CPU, "pmu", "on" }, | |
321 | { "i440FX-pcihost", "short_root_bus", "0" }, | |
322 | { "q35-pcihost", "short_root_bus", "0" }, | |
a310e653 MAL |
323 | }; |
324 | const size_t pc_compat_1_5_len = G_N_ELEMENTS(pc_compat_1_5); | |
325 | ||
326 | GlobalProperty pc_compat_1_4[] = { | |
327 | PC_CPU_MODEL_IDS("1.4.0") | |
6c36bddf EH |
328 | { "scsi-hd", "discard_granularity", "0" }, |
329 | { "scsi-cd", "discard_granularity", "0" }, | |
330 | { "scsi-disk", "discard_granularity", "0" }, | |
331 | { "ide-hd", "discard_granularity", "0" }, | |
332 | { "ide-cd", "discard_granularity", "0" }, | |
333 | { "ide-drive", "discard_granularity", "0" }, | |
334 | { "virtio-blk-pci", "discard_granularity", "0" }, | |
335 | /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string: */ | |
336 | { "virtio-serial-pci", "vectors", "0xFFFFFFFF" }, | |
337 | { "virtio-net-pci", "ctrl_guest_offloads", "off" }, | |
338 | { "e1000", "romfile", "pxe-e1000.rom" }, | |
339 | { "ne2k_pci", "romfile", "pxe-ne2k_pci.rom" }, | |
340 | { "pcnet", "romfile", "pxe-pcnet.rom" }, | |
341 | { "rtl8139", "romfile", "pxe-rtl8139.rom" }, | |
342 | { "virtio-net-pci", "romfile", "pxe-virtio.rom" }, | |
343 | { "486-" TYPE_X86_CPU, "model", "0" }, | |
344 | { "n270" "-" TYPE_X86_CPU, "movbe", "off" }, | |
345 | { "Westmere" "-" TYPE_X86_CPU, "pclmulqdq", "off" }, | |
a310e653 MAL |
346 | }; |
347 | const size_t pc_compat_1_4_len = G_N_ELEMENTS(pc_compat_1_4); | |
348 | ||
417258f1 PMD |
349 | GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) |
350 | { | |
351 | GSIState *s; | |
352 | ||
353 | s = g_new0(GSIState, 1); | |
354 | if (kvm_ioapic_in_kernel()) { | |
355 | kvm_pc_setup_irq_routing(pci_enabled); | |
417258f1 | 356 | } |
64c033ba | 357 | *irqs = qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS); |
417258f1 PMD |
358 | |
359 | return s; | |
360 | } | |
361 | ||
258711c6 JG |
362 | static void ioport80_write(void *opaque, hwaddr addr, uint64_t data, |
363 | unsigned size) | |
80cabfad FB |
364 | { |
365 | } | |
366 | ||
c02e1eac JG |
367 | static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size) |
368 | { | |
a6fc23e5 | 369 | return 0xffffffffffffffffULL; |
c02e1eac JG |
370 | } |
371 | ||
f929aad6 | 372 | /* MSDOS compatibility mode FPU exception support */ |
258711c6 JG |
373 | static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data, |
374 | unsigned size) | |
f929aad6 | 375 | { |
6f529b75 | 376 | if (tcg_enabled()) { |
bf13bfab | 377 | cpu_set_ignne(); |
6f529b75 | 378 | } |
f929aad6 FB |
379 | } |
380 | ||
c02e1eac JG |
381 | static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size) |
382 | { | |
a6fc23e5 | 383 | return 0xffffffffffffffffULL; |
c02e1eac JG |
384 | } |
385 | ||
b0a21b53 FB |
386 | /* PC cmos mappings */ |
387 | ||
80cabfad FB |
388 | #define REG_EQUIPMENT_BYTE 0x14 |
389 | ||
9139046c MA |
390 | static void cmos_init_hd(ISADevice *s, int type_ofs, int info_ofs, |
391 | int16_t cylinders, int8_t heads, int8_t sectors) | |
ba6c2377 | 392 | { |
ba6c2377 FB |
393 | rtc_set_memory(s, type_ofs, 47); |
394 | rtc_set_memory(s, info_ofs, cylinders); | |
395 | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); | |
396 | rtc_set_memory(s, info_ofs + 2, heads); | |
397 | rtc_set_memory(s, info_ofs + 3, 0xff); | |
398 | rtc_set_memory(s, info_ofs + 4, 0xff); | |
399 | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); | |
400 | rtc_set_memory(s, info_ofs + 6, cylinders); | |
401 | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); | |
402 | rtc_set_memory(s, info_ofs + 8, sectors); | |
403 | } | |
404 | ||
6ac0e82d AZ |
405 | /* convert boot_device letter to something recognizable by the bios */ |
406 | static int boot_device2nibble(char boot_device) | |
407 | { | |
408 | switch(boot_device) { | |
409 | case 'a': | |
410 | case 'b': | |
411 | return 0x01; /* floppy boot */ | |
412 | case 'c': | |
413 | return 0x02; /* hard drive boot */ | |
414 | case 'd': | |
415 | return 0x03; /* CD-ROM boot */ | |
416 | case 'n': | |
417 | return 0x04; /* Network boot */ | |
418 | } | |
419 | return 0; | |
420 | } | |
421 | ||
ddcd5531 | 422 | static void set_boot_dev(ISADevice *s, const char *boot_device, Error **errp) |
0ecdffbb AJ |
423 | { |
424 | #define PC_MAX_BOOT_DEVICES 3 | |
0ecdffbb AJ |
425 | int nbds, bds[3] = { 0, }; |
426 | int i; | |
427 | ||
428 | nbds = strlen(boot_device); | |
429 | if (nbds > PC_MAX_BOOT_DEVICES) { | |
ddcd5531 GA |
430 | error_setg(errp, "Too many boot devices for PC"); |
431 | return; | |
0ecdffbb AJ |
432 | } |
433 | for (i = 0; i < nbds; i++) { | |
434 | bds[i] = boot_device2nibble(boot_device[i]); | |
435 | if (bds[i] == 0) { | |
ddcd5531 GA |
436 | error_setg(errp, "Invalid boot device for PC: '%c'", |
437 | boot_device[i]); | |
438 | return; | |
0ecdffbb AJ |
439 | } |
440 | } | |
441 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); | |
d9346e81 | 442 | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
0ecdffbb AJ |
443 | } |
444 | ||
ddcd5531 | 445 | static void pc_boot_set(void *opaque, const char *boot_device, Error **errp) |
d9346e81 | 446 | { |
ddcd5531 | 447 | set_boot_dev(opaque, boot_device, errp); |
d9346e81 MA |
448 | } |
449 | ||
7444ca4e LE |
450 | static void pc_cmos_init_floppy(ISADevice *rtc_state, ISADevice *floppy) |
451 | { | |
452 | int val, nb, i; | |
2da44dd0 JS |
453 | FloppyDriveType fd_type[2] = { FLOPPY_DRIVE_TYPE_NONE, |
454 | FLOPPY_DRIVE_TYPE_NONE }; | |
7444ca4e LE |
455 | |
456 | /* floppy type */ | |
457 | if (floppy) { | |
458 | for (i = 0; i < 2; i++) { | |
459 | fd_type[i] = isa_fdc_get_drive_type(floppy, i); | |
460 | } | |
461 | } | |
462 | val = (cmos_get_fd_drive_type(fd_type[0]) << 4) | | |
463 | cmos_get_fd_drive_type(fd_type[1]); | |
464 | rtc_set_memory(rtc_state, 0x10, val); | |
465 | ||
466 | val = rtc_get_memory(rtc_state, REG_EQUIPMENT_BYTE); | |
467 | nb = 0; | |
2da44dd0 | 468 | if (fd_type[0] != FLOPPY_DRIVE_TYPE_NONE) { |
7444ca4e LE |
469 | nb++; |
470 | } | |
2da44dd0 | 471 | if (fd_type[1] != FLOPPY_DRIVE_TYPE_NONE) { |
7444ca4e LE |
472 | nb++; |
473 | } | |
474 | switch (nb) { | |
475 | case 0: | |
476 | break; | |
477 | case 1: | |
478 | val |= 0x01; /* 1 drive, ready for boot */ | |
479 | break; | |
480 | case 2: | |
481 | val |= 0x41; /* 2 drives, ready for boot */ | |
482 | break; | |
483 | } | |
484 | rtc_set_memory(rtc_state, REG_EQUIPMENT_BYTE, val); | |
485 | } | |
486 | ||
c0897e0c MA |
487 | typedef struct pc_cmos_init_late_arg { |
488 | ISADevice *rtc_state; | |
9139046c | 489 | BusState *idebus[2]; |
c0897e0c MA |
490 | } pc_cmos_init_late_arg; |
491 | ||
b86f4613 LE |
492 | typedef struct check_fdc_state { |
493 | ISADevice *floppy; | |
494 | bool multiple; | |
495 | } CheckFdcState; | |
496 | ||
497 | static int check_fdc(Object *obj, void *opaque) | |
498 | { | |
499 | CheckFdcState *state = opaque; | |
500 | Object *fdc; | |
501 | uint32_t iobase; | |
502 | Error *local_err = NULL; | |
503 | ||
504 | fdc = object_dynamic_cast(obj, TYPE_ISA_FDC); | |
505 | if (!fdc) { | |
506 | return 0; | |
507 | } | |
508 | ||
1ea1572a | 509 | iobase = object_property_get_uint(obj, "iobase", &local_err); |
b86f4613 LE |
510 | if (local_err || iobase != 0x3f0) { |
511 | error_free(local_err); | |
512 | return 0; | |
513 | } | |
514 | ||
515 | if (state->floppy) { | |
516 | state->multiple = true; | |
517 | } else { | |
518 | state->floppy = ISA_DEVICE(obj); | |
519 | } | |
520 | return 0; | |
521 | } | |
522 | ||
523 | static const char * const fdc_container_path[] = { | |
524 | "/unattached", "/peripheral", "/peripheral-anon" | |
525 | }; | |
526 | ||
424e4a87 RK |
527 | /* |
528 | * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers | |
529 | * and ACPI objects. | |
530 | */ | |
531 | ISADevice *pc_find_fdc0(void) | |
532 | { | |
533 | int i; | |
534 | Object *container; | |
535 | CheckFdcState state = { 0 }; | |
536 | ||
537 | for (i = 0; i < ARRAY_SIZE(fdc_container_path); i++) { | |
538 | container = container_get(qdev_get_machine(), fdc_container_path[i]); | |
539 | object_child_foreach(container, check_fdc, &state); | |
540 | } | |
541 | ||
542 | if (state.multiple) { | |
3dc6f869 AF |
543 | warn_report("multiple floppy disk controllers with " |
544 | "iobase=0x3f0 have been found"); | |
433672b0 | 545 | error_printf("the one being picked for CMOS setup might not reflect " |
9e5d2c52 | 546 | "your intent"); |
424e4a87 RK |
547 | } |
548 | ||
549 | return state.floppy; | |
550 | } | |
551 | ||
c0897e0c MA |
552 | static void pc_cmos_init_late(void *opaque) |
553 | { | |
554 | pc_cmos_init_late_arg *arg = opaque; | |
555 | ISADevice *s = arg->rtc_state; | |
9139046c MA |
556 | int16_t cylinders; |
557 | int8_t heads, sectors; | |
c0897e0c | 558 | int val; |
2adc99b2 | 559 | int i, trans; |
c0897e0c | 560 | |
9139046c | 561 | val = 0; |
272f0428 CP |
562 | if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0, |
563 | &cylinders, &heads, §ors) >= 0) { | |
9139046c MA |
564 | cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors); |
565 | val |= 0xf0; | |
566 | } | |
272f0428 CP |
567 | if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1, |
568 | &cylinders, &heads, §ors) >= 0) { | |
9139046c MA |
569 | cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors); |
570 | val |= 0x0f; | |
571 | } | |
572 | rtc_set_memory(s, 0x12, val); | |
c0897e0c MA |
573 | |
574 | val = 0; | |
575 | for (i = 0; i < 4; i++) { | |
9139046c MA |
576 | /* NOTE: ide_get_geometry() returns the physical |
577 | geometry. It is always such that: 1 <= sects <= 63, 1 | |
578 | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS | |
579 | geometry can be different if a translation is done. */ | |
272f0428 CP |
580 | if (arg->idebus[i / 2] && |
581 | ide_get_geometry(arg->idebus[i / 2], i % 2, | |
9139046c | 582 | &cylinders, &heads, §ors) >= 0) { |
2adc99b2 MA |
583 | trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1; |
584 | assert((trans & ~3) == 0); | |
585 | val |= trans << (i * 2); | |
c0897e0c MA |
586 | } |
587 | } | |
588 | rtc_set_memory(s, 0x39, val); | |
589 | ||
424e4a87 | 590 | pc_cmos_init_floppy(s, pc_find_fdc0()); |
b86f4613 | 591 | |
c0897e0c MA |
592 | qemu_unregister_reset(pc_cmos_init_late, opaque); |
593 | } | |
594 | ||
23d30407 | 595 | void pc_cmos_init(PCMachineState *pcms, |
220a8846 | 596 | BusState *idebus0, BusState *idebus1, |
63ffb564 | 597 | ISADevice *s) |
80cabfad | 598 | { |
7444ca4e | 599 | int val; |
c0897e0c | 600 | static pc_cmos_init_late_arg arg; |
f0bb276b | 601 | X86MachineState *x86ms = X86_MACHINE(pcms); |
b0a21b53 | 602 | |
b0a21b53 | 603 | /* various important CMOS locations needed by PC/Bochs bios */ |
80cabfad FB |
604 | |
605 | /* memory size */ | |
e89001f7 | 606 | /* base memory (first MiB) */ |
f0bb276b | 607 | val = MIN(x86ms->below_4g_mem_size / KiB, 640); |
333190eb FB |
608 | rtc_set_memory(s, 0x15, val); |
609 | rtc_set_memory(s, 0x16, val >> 8); | |
e89001f7 | 610 | /* extended memory (next 64MiB) */ |
f0bb276b PB |
611 | if (x86ms->below_4g_mem_size > 1 * MiB) { |
612 | val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; | |
e89001f7 MA |
613 | } else { |
614 | val = 0; | |
615 | } | |
80cabfad FB |
616 | if (val > 65535) |
617 | val = 65535; | |
b0a21b53 FB |
618 | rtc_set_memory(s, 0x17, val); |
619 | rtc_set_memory(s, 0x18, val >> 8); | |
620 | rtc_set_memory(s, 0x30, val); | |
621 | rtc_set_memory(s, 0x31, val >> 8); | |
e89001f7 | 622 | /* memory between 16MiB and 4GiB */ |
f0bb276b PB |
623 | if (x86ms->below_4g_mem_size > 16 * MiB) { |
624 | val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); | |
e89001f7 | 625 | } else { |
9da98861 | 626 | val = 0; |
e89001f7 | 627 | } |
80cabfad FB |
628 | if (val > 65535) |
629 | val = 65535; | |
b0a21b53 FB |
630 | rtc_set_memory(s, 0x34, val); |
631 | rtc_set_memory(s, 0x35, val >> 8); | |
e89001f7 | 632 | /* memory above 4GiB */ |
f0bb276b | 633 | val = x86ms->above_4g_mem_size / 65536; |
e89001f7 MA |
634 | rtc_set_memory(s, 0x5b, val); |
635 | rtc_set_memory(s, 0x5c, val >> 8); | |
636 | rtc_set_memory(s, 0x5d, val >> 16); | |
3b46e624 | 637 | |
23d30407 | 638 | object_property_add_link(OBJECT(pcms), "rtc_state", |
2d996150 | 639 | TYPE_ISA_DEVICE, |
f0bb276b | 640 | (Object **)&x86ms->rtc, |
2d996150 | 641 | object_property_allow_set_link, |
d2623129 | 642 | OBJ_PROP_LINK_STRONG); |
5325cc34 MA |
643 | object_property_set_link(OBJECT(pcms), "rtc_state", OBJECT(s), |
644 | &error_abort); | |
298e01b6 | 645 | |
007b0657 | 646 | set_boot_dev(s, MACHINE(pcms)->boot_order, &error_fatal); |
80cabfad | 647 | |
b0a21b53 | 648 | val = 0; |
b0a21b53 FB |
649 | val |= 0x02; /* FPU is there */ |
650 | val |= 0x04; /* PS/2 mouse installed */ | |
651 | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); | |
652 | ||
b86f4613 | 653 | /* hard drives and FDC */ |
c0897e0c | 654 | arg.rtc_state = s; |
9139046c MA |
655 | arg.idebus[0] = idebus0; |
656 | arg.idebus[1] = idebus1; | |
c0897e0c | 657 | qemu_register_reset(pc_cmos_init_late, &arg); |
80cabfad FB |
658 | } |
659 | ||
956a3e6b | 660 | static void handle_a20_line_change(void *opaque, int irq, int level) |
59b8ad81 | 661 | { |
cc36a7a2 | 662 | X86CPU *cpu = opaque; |
e1a23744 | 663 | |
956a3e6b | 664 | /* XXX: send to all CPUs ? */ |
4b78a802 | 665 | /* XXX: add logic to handle multiple A20 line sources */ |
cc36a7a2 | 666 | x86_cpu_set_a20(cpu, level); |
e1a23744 FB |
667 | } |
668 | ||
b41a2cd1 FB |
669 | #define NE2000_NB_MAX 6 |
670 | ||
675d6f82 BS |
671 | static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, |
672 | 0x280, 0x380 }; | |
673 | static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; | |
b41a2cd1 | 674 | |
48a18b3c | 675 | void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd) |
a41b2ff2 PB |
676 | { |
677 | static int nb_ne2k = 0; | |
678 | ||
679 | if (nb_ne2k == NE2000_NB_MAX) | |
680 | return; | |
48a18b3c | 681 | isa_ne2000_init(bus, ne2000_io[nb_ne2k], |
9453c5bc | 682 | ne2000_irq[nb_ne2k], nd); |
a41b2ff2 PB |
683 | nb_ne2k++; |
684 | } | |
685 | ||
845773ab | 686 | void pc_acpi_smi_interrupt(void *opaque, int irq, int level) |
53b67b30 | 687 | { |
c3affe56 | 688 | X86CPU *cpu = opaque; |
53b67b30 BS |
689 | |
690 | if (level) { | |
c3affe56 | 691 | cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); |
53b67b30 BS |
692 | } |
693 | } | |
694 | ||
6f479566 LX |
695 | /* |
696 | * This function is very similar to smp_parse() | |
697 | * in hw/core/machine.c but includes CPU die support. | |
698 | */ | |
699 | void pc_smp_parse(MachineState *ms, QemuOpts *opts) | |
700 | { | |
f0bb276b | 701 | X86MachineState *x86ms = X86_MACHINE(ms); |
1b458422 | 702 | |
6f479566 LX |
703 | if (opts) { |
704 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
705 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
1b458422 | 706 | unsigned dies = qemu_opt_get_number(opts, "dies", 1); |
6f479566 LX |
707 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); |
708 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
709 | ||
710 | /* compute missing values, prefer sockets over cores over threads */ | |
711 | if (cpus == 0 || sockets == 0) { | |
712 | cores = cores > 0 ? cores : 1; | |
713 | threads = threads > 0 ? threads : 1; | |
714 | if (cpus == 0) { | |
715 | sockets = sockets > 0 ? sockets : 1; | |
1b458422 | 716 | cpus = cores * threads * dies * sockets; |
6f479566 LX |
717 | } else { |
718 | ms->smp.max_cpus = | |
719 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
1b458422 | 720 | sockets = ms->smp.max_cpus / (cores * threads * dies); |
6f479566 LX |
721 | } |
722 | } else if (cores == 0) { | |
723 | threads = threads > 0 ? threads : 1; | |
1b458422 | 724 | cores = cpus / (sockets * dies * threads); |
6f479566 LX |
725 | cores = cores > 0 ? cores : 1; |
726 | } else if (threads == 0) { | |
1b458422 | 727 | threads = cpus / (cores * dies * sockets); |
6f479566 | 728 | threads = threads > 0 ? threads : 1; |
1b458422 | 729 | } else if (sockets * dies * cores * threads < cpus) { |
6f479566 | 730 | error_report("cpu topology: " |
1b458422 | 731 | "sockets (%u) * dies (%u) * cores (%u) * threads (%u) < " |
6f479566 | 732 | "smp_cpus (%u)", |
1b458422 | 733 | sockets, dies, cores, threads, cpus); |
6f479566 LX |
734 | exit(1); |
735 | } | |
736 | ||
737 | ms->smp.max_cpus = | |
738 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
739 | ||
740 | if (ms->smp.max_cpus < cpus) { | |
741 | error_report("maxcpus must be equal to or greater than smp"); | |
742 | exit(1); | |
743 | } | |
744 | ||
1b458422 | 745 | if (sockets * dies * cores * threads > ms->smp.max_cpus) { |
6f479566 | 746 | error_report("cpu topology: " |
1b458422 | 747 | "sockets (%u) * dies (%u) * cores (%u) * threads (%u) > " |
6f479566 | 748 | "maxcpus (%u)", |
1b458422 | 749 | sockets, dies, cores, threads, |
6f479566 LX |
750 | ms->smp.max_cpus); |
751 | exit(1); | |
752 | } | |
753 | ||
1b458422 | 754 | if (sockets * dies * cores * threads != ms->smp.max_cpus) { |
6f479566 | 755 | warn_report("Invalid CPU topology deprecated: " |
1b458422 | 756 | "sockets (%u) * dies (%u) * cores (%u) * threads (%u) " |
6f479566 | 757 | "!= maxcpus (%u)", |
1b458422 | 758 | sockets, dies, cores, threads, |
6f479566 LX |
759 | ms->smp.max_cpus); |
760 | } | |
761 | ||
762 | ms->smp.cpus = cpus; | |
763 | ms->smp.cores = cores; | |
764 | ms->smp.threads = threads; | |
8cb30e3a | 765 | ms->smp.sockets = sockets; |
f0bb276b | 766 | x86ms->smp_dies = dies; |
6f479566 LX |
767 | } |
768 | ||
769 | if (ms->smp.cpus > 1) { | |
770 | Error *blocker = NULL; | |
771 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
772 | replay_add_blocker(blocker); | |
773 | } | |
774 | } | |
775 | ||
a0628599 | 776 | void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp) |
c649983b | 777 | { |
703a548a SL |
778 | X86MachineState *x86ms = X86_MACHINE(ms); |
779 | int64_t apic_id = x86_cpu_apic_id_from_index(x86ms, id); | |
0e3bd562 | 780 | Error *local_err = NULL; |
c649983b | 781 | |
8de433cb IM |
782 | if (id < 0) { |
783 | error_setg(errp, "Invalid CPU id: %" PRIi64, id); | |
784 | return; | |
785 | } | |
786 | ||
5ff020b7 EH |
787 | if (apic_id >= ACPI_CPU_HOTPLUG_ID_LIMIT) { |
788 | error_setg(errp, "Unable to add CPU: %" PRIi64 | |
789 | ", resulting APIC ID (%" PRIi64 ") is too large", | |
790 | id, apic_id); | |
791 | return; | |
792 | } | |
793 | ||
703a548a SL |
794 | |
795 | x86_cpu_new(X86_MACHINE(ms), apic_id, &local_err); | |
0e3bd562 AF |
796 | if (local_err) { |
797 | error_propagate(errp, local_err); | |
798 | return; | |
799 | } | |
c649983b IM |
800 | } |
801 | ||
e3cadac0 IM |
802 | static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) |
803 | { | |
804 | if (cpus_count > 0xff) { | |
805 | /* If the number of CPUs can't be represented in 8 bits, the | |
806 | * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just | |
807 | * to make old BIOSes fail more predictably. | |
808 | */ | |
809 | rtc_set_memory(rtc, 0x5f, 0); | |
810 | } else { | |
811 | rtc_set_memory(rtc, 0x5f, cpus_count - 1); | |
812 | } | |
813 | } | |
814 | ||
3459a625 | 815 | static |
9ebeed0c | 816 | void pc_machine_done(Notifier *notifier, void *data) |
3459a625 | 817 | { |
9ebeed0c EH |
818 | PCMachineState *pcms = container_of(notifier, |
819 | PCMachineState, machine_done); | |
f0bb276b | 820 | X86MachineState *x86ms = X86_MACHINE(pcms); |
9ebeed0c | 821 | PCIBus *bus = pcms->bus; |
2118196b | 822 | |
ba157b69 | 823 | /* set the number of CPUs */ |
f0bb276b | 824 | rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); |
ba157b69 | 825 | |
2118196b MA |
826 | if (bus) { |
827 | int extra_hosts = 0; | |
828 | ||
829 | QLIST_FOREACH(bus, &bus->child, sibling) { | |
830 | /* look for expander root buses */ | |
831 | if (pci_bus_is_root(bus)) { | |
832 | extra_hosts++; | |
833 | } | |
834 | } | |
f0bb276b | 835 | if (extra_hosts && x86ms->fw_cfg) { |
2118196b MA |
836 | uint64_t *val = g_malloc(sizeof(*val)); |
837 | *val = cpu_to_le64(extra_hosts); | |
f0bb276b | 838 | fw_cfg_add_file(x86ms->fw_cfg, |
2118196b MA |
839 | "etc/extra-pci-roots", val, sizeof(*val)); |
840 | } | |
841 | } | |
842 | ||
bb292f5a | 843 | acpi_setup(); |
f0bb276b PB |
844 | if (x86ms->fw_cfg) { |
845 | fw_cfg_build_smbios(MACHINE(pcms), x86ms->fw_cfg); | |
846 | fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg); | |
e3cadac0 | 847 | /* update FW_CFG_NB_CPUS to account for -device added CPUs */ |
f0bb276b | 848 | fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); |
6d42eefa | 849 | } |
60c5e104 | 850 | |
f0bb276b | 851 | if (x86ms->apic_id_limit > 255 && !xen_enabled()) { |
60c5e104 IM |
852 | IntelIOMMUState *iommu = INTEL_IOMMU_DEVICE(x86_iommu_get_default()); |
853 | ||
a924b3d8 | 854 | if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) || |
60c5e104 IM |
855 | iommu->intr_eim != ON_OFF_AUTO_ON) { |
856 | error_report("current -smp configuration requires " | |
857 | "Extended Interrupt Mode enabled. " | |
858 | "You can add an IOMMU using: " | |
859 | "-device intel-iommu,intremap=on,eim=on"); | |
860 | exit(EXIT_FAILURE); | |
861 | } | |
862 | } | |
3459a625 MT |
863 | } |
864 | ||
e4e8ba04 | 865 | void pc_guest_info_init(PCMachineState *pcms) |
3459a625 | 866 | { |
1f3aba37 | 867 | int i; |
aa570207 | 868 | MachineState *ms = MACHINE(pcms); |
f0bb276b | 869 | X86MachineState *x86ms = X86_MACHINE(pcms); |
b20c9bd5 | 870 | |
f0bb276b | 871 | x86ms->apic_xrupt_override = kvm_allows_irq0_override(); |
aa570207 | 872 | pcms->numa_nodes = ms->numa_state->num_nodes; |
dd4c2f01 EH |
873 | pcms->node_mem = g_malloc0(pcms->numa_nodes * |
874 | sizeof *pcms->node_mem); | |
aa570207 | 875 | for (i = 0; i < ms->numa_state->num_nodes; i++) { |
7e721e7b | 876 | pcms->node_mem[i] = ms->numa_state->nodes[i].node_mem; |
8c85901e WG |
877 | } |
878 | ||
9ebeed0c EH |
879 | pcms->machine_done.notify = pc_machine_done; |
880 | qemu_add_machine_init_done_notifier(&pcms->machine_done); | |
3459a625 MT |
881 | } |
882 | ||
83d08f26 MT |
883 | /* setup pci memory address space mapping into system address space */ |
884 | void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, | |
885 | MemoryRegion *pci_address_space) | |
39848901 | 886 | { |
83d08f26 MT |
887 | /* Set to lower priority than RAM */ |
888 | memory_region_add_subregion_overlap(system_memory, 0x0, | |
889 | pci_address_space, -1); | |
39848901 IM |
890 | } |
891 | ||
7bc35e0f | 892 | void xen_load_linux(PCMachineState *pcms) |
b33a5bbf CL |
893 | { |
894 | int i; | |
895 | FWCfgState *fw_cfg; | |
703a548a | 896 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
f0bb276b | 897 | X86MachineState *x86ms = X86_MACHINE(pcms); |
b33a5bbf | 898 | |
df1f79fd | 899 | assert(MACHINE(pcms)->kernel_filename != NULL); |
b33a5bbf | 900 | |
305ae888 | 901 | fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE); |
f0bb276b | 902 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); |
b33a5bbf CL |
903 | rom_set_fw(fw_cfg); |
904 | ||
703a548a SL |
905 | x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, |
906 | pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled); | |
b33a5bbf CL |
907 | for (i = 0; i < nb_option_roms; i++) { |
908 | assert(!strcmp(option_rom[i].name, "linuxboot.bin") || | |
b2a575a1 | 909 | !strcmp(option_rom[i].name, "linuxboot_dma.bin") || |
1fb0d709 | 910 | !strcmp(option_rom[i].name, "pvh.bin") || |
b33a5bbf CL |
911 | !strcmp(option_rom[i].name, "multiboot.bin")); |
912 | rom_add_option(option_rom[i].name, option_rom[i].bootindex); | |
913 | } | |
f0bb276b | 914 | x86ms->fw_cfg = fw_cfg; |
b33a5bbf CL |
915 | } |
916 | ||
5934e216 EH |
917 | void pc_memory_init(PCMachineState *pcms, |
918 | MemoryRegion *system_memory, | |
919 | MemoryRegion *rom_memory, | |
920 | MemoryRegion **ram_memory) | |
80cabfad | 921 | { |
cbc5b5f3 | 922 | int linux_boot, i; |
bd457782 | 923 | MemoryRegion *option_rom_mr; |
00cb2a99 | 924 | MemoryRegion *ram_below_4g, *ram_above_4g; |
a88b362c | 925 | FWCfgState *fw_cfg; |
62b160c0 | 926 | MachineState *machine = MACHINE(pcms); |
264b4857 | 927 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
16a9e8a5 | 928 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
f0bb276b | 929 | X86MachineState *x86ms = X86_MACHINE(pcms); |
d592d303 | 930 | |
f0bb276b PB |
931 | assert(machine->ram_size == x86ms->below_4g_mem_size + |
932 | x86ms->above_4g_mem_size); | |
9521d42b PB |
933 | |
934 | linux_boot = (machine->kernel_filename != NULL); | |
80cabfad | 935 | |
bd457782 IM |
936 | /* |
937 | * Split single memory region and use aliases to address portions of it, | |
938 | * done for backwards compatibility with older qemus. | |
00cb2a99 | 939 | */ |
bd457782 | 940 | *ram_memory = machine->ram; |
7267c094 | 941 | ram_below_4g = g_malloc(sizeof(*ram_below_4g)); |
bd457782 | 942 | memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, |
f0bb276b | 943 | 0, x86ms->below_4g_mem_size); |
00cb2a99 | 944 | memory_region_add_subregion(system_memory, 0, ram_below_4g); |
f0bb276b PB |
945 | e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); |
946 | if (x86ms->above_4g_mem_size > 0) { | |
7267c094 | 947 | ram_above_4g = g_malloc(sizeof(*ram_above_4g)); |
bd457782 IM |
948 | memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", |
949 | machine->ram, | |
f0bb276b PB |
950 | x86ms->below_4g_mem_size, |
951 | x86ms->above_4g_mem_size); | |
00cb2a99 AK |
952 | memory_region_add_subregion(system_memory, 0x100000000ULL, |
953 | ram_above_4g); | |
f0bb276b | 954 | e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); |
bbe80adf | 955 | } |
82b36dc3 | 956 | |
bb292f5a | 957 | if (!pcmc->has_reserved_memory && |
ca8336f3 | 958 | (machine->ram_slots || |
9521d42b | 959 | (machine->maxram_size > machine->ram_size))) { |
ca8336f3 IM |
960 | |
961 | error_report("\"-memory 'slots|maxmem'\" is not supported by: %s", | |
962 | mc->name); | |
963 | exit(EXIT_FAILURE); | |
964 | } | |
965 | ||
b0c14ec4 DH |
966 | /* always allocate the device memory information */ |
967 | machine->device_memory = g_malloc0(sizeof(*machine->device_memory)); | |
968 | ||
f2ffbe2b | 969 | /* initialize device memory address space */ |
bb292f5a | 970 | if (pcmc->has_reserved_memory && |
9521d42b | 971 | (machine->ram_size < machine->maxram_size)) { |
f2ffbe2b | 972 | ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; |
619d11e4 | 973 | |
a0cc8856 IM |
974 | if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { |
975 | error_report("unsupported amount of memory slots: %"PRIu64, | |
976 | machine->ram_slots); | |
977 | exit(EXIT_FAILURE); | |
978 | } | |
979 | ||
f2c38522 PK |
980 | if (QEMU_ALIGN_UP(machine->maxram_size, |
981 | TARGET_PAGE_SIZE) != machine->maxram_size) { | |
982 | error_report("maximum memory size must by aligned to multiple of " | |
983 | "%d bytes", TARGET_PAGE_SIZE); | |
984 | exit(EXIT_FAILURE); | |
985 | } | |
986 | ||
b0c14ec4 | 987 | machine->device_memory->base = |
f0bb276b | 988 | ROUND_UP(0x100000000ULL + x86ms->above_4g_mem_size, 1 * GiB); |
619d11e4 | 989 | |
16a9e8a5 | 990 | if (pcmc->enforce_aligned_dimm) { |
f2ffbe2b | 991 | /* size device region assuming 1G page max alignment per slot */ |
d471bf3e | 992 | device_mem_size += (1 * GiB) * machine->ram_slots; |
085f8e88 IM |
993 | } |
994 | ||
f2ffbe2b DH |
995 | if ((machine->device_memory->base + device_mem_size) < |
996 | device_mem_size) { | |
619d11e4 IM |
997 | error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT, |
998 | machine->maxram_size); | |
999 | exit(EXIT_FAILURE); | |
1000 | } | |
1001 | ||
b0c14ec4 | 1002 | memory_region_init(&machine->device_memory->mr, OBJECT(pcms), |
f2ffbe2b | 1003 | "device-memory", device_mem_size); |
b0c14ec4 DH |
1004 | memory_region_add_subregion(system_memory, machine->device_memory->base, |
1005 | &machine->device_memory->mr); | |
619d11e4 | 1006 | } |
cbc5b5f3 JJ |
1007 | |
1008 | /* Initialize PC system firmware */ | |
5e640a9e | 1009 | pc_system_firmware_init(pcms, rom_memory); |
00cb2a99 | 1010 | |
7267c094 | 1011 | option_rom_mr = g_malloc(sizeof(*option_rom_mr)); |
98a99ce0 | 1012 | memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, |
f8ed85ac | 1013 | &error_fatal); |
208fa0e4 IM |
1014 | if (pcmc->pci_enabled) { |
1015 | memory_region_set_readonly(option_rom_mr, true); | |
1016 | } | |
4463aee6 | 1017 | memory_region_add_subregion_overlap(rom_memory, |
00cb2a99 AK |
1018 | PC_ROM_MIN_VGA, |
1019 | option_rom_mr, | |
1020 | 1); | |
f753ff16 | 1021 | |
bd802bd9 | 1022 | fw_cfg = fw_cfg_arch_create(machine, |
f0bb276b | 1023 | x86ms->boot_cpus, x86ms->apic_id_limit); |
c886fc4c | 1024 | |
8832cb80 | 1025 | rom_set_fw(fw_cfg); |
1d108d97 | 1026 | |
b0c14ec4 | 1027 | if (pcmc->has_reserved_memory && machine->device_memory->base) { |
de268e13 | 1028 | uint64_t *val = g_malloc(sizeof(*val)); |
2f8b5008 | 1029 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
b0c14ec4 | 1030 | uint64_t res_mem_end = machine->device_memory->base; |
2f8b5008 IM |
1031 | |
1032 | if (!pcmc->broken_reserved_end) { | |
b0c14ec4 | 1033 | res_mem_end += memory_region_size(&machine->device_memory->mr); |
2f8b5008 | 1034 | } |
d471bf3e | 1035 | *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB)); |
de268e13 IM |
1036 | fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val)); |
1037 | } | |
1038 | ||
f753ff16 | 1039 | if (linux_boot) { |
703a548a SL |
1040 | x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, |
1041 | pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled); | |
f753ff16 PB |
1042 | } |
1043 | ||
1044 | for (i = 0; i < nb_option_roms; i++) { | |
2e55e842 | 1045 | rom_add_option(option_rom[i].name, option_rom[i].bootindex); |
406c8df3 | 1046 | } |
f0bb276b | 1047 | x86ms->fw_cfg = fw_cfg; |
cb135f59 PX |
1048 | |
1049 | /* Init default IOAPIC address space */ | |
f0bb276b | 1050 | x86ms->ioapic_as = &address_space_memory; |
091c466e SK |
1051 | |
1052 | /* Init ACPI memory hotplug IO base address */ | |
1053 | pcms->memhp_io_base = ACPI_MEMORY_HOTPLUG_BASE; | |
3d53f5c3 IY |
1054 | } |
1055 | ||
9fa99d25 MA |
1056 | /* |
1057 | * The 64bit pci hole starts after "above 4G RAM" and | |
1058 | * potentially the space reserved for memory hotplug. | |
1059 | */ | |
1060 | uint64_t pc_pci_hole64_start(void) | |
1061 | { | |
1062 | PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); | |
1063 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); | |
b0c14ec4 | 1064 | MachineState *ms = MACHINE(pcms); |
f0bb276b | 1065 | X86MachineState *x86ms = X86_MACHINE(pcms); |
9fa99d25 MA |
1066 | uint64_t hole64_start = 0; |
1067 | ||
b0c14ec4 DH |
1068 | if (pcmc->has_reserved_memory && ms->device_memory->base) { |
1069 | hole64_start = ms->device_memory->base; | |
9fa99d25 | 1070 | if (!pcmc->broken_reserved_end) { |
b0c14ec4 | 1071 | hole64_start += memory_region_size(&ms->device_memory->mr); |
9fa99d25 MA |
1072 | } |
1073 | } else { | |
f0bb276b | 1074 | hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size; |
9fa99d25 MA |
1075 | } |
1076 | ||
d471bf3e | 1077 | return ROUND_UP(hole64_start, 1 * GiB); |
9fa99d25 MA |
1078 | } |
1079 | ||
48a18b3c | 1080 | DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus) |
765d7908 | 1081 | { |
ad6d45fa AL |
1082 | DeviceState *dev = NULL; |
1083 | ||
bab47d9a | 1084 | rom_set_order_override(FW_CFG_ORDER_OVERRIDE_VGA); |
16094b75 AJ |
1085 | if (pci_bus) { |
1086 | PCIDevice *pcidev = pci_vga_init(pci_bus); | |
1087 | dev = pcidev ? &pcidev->qdev : NULL; | |
1088 | } else if (isa_bus) { | |
1089 | ISADevice *isadev = isa_vga_init(isa_bus); | |
4a17cc4f | 1090 | dev = isadev ? DEVICE(isadev) : NULL; |
765d7908 | 1091 | } |
bab47d9a | 1092 | rom_reset_order_override(); |
ad6d45fa | 1093 | return dev; |
765d7908 IY |
1094 | } |
1095 | ||
258711c6 JG |
1096 | static const MemoryRegionOps ioport80_io_ops = { |
1097 | .write = ioport80_write, | |
c02e1eac | 1098 | .read = ioport80_read, |
258711c6 JG |
1099 | .endianness = DEVICE_NATIVE_ENDIAN, |
1100 | .impl = { | |
1101 | .min_access_size = 1, | |
1102 | .max_access_size = 1, | |
1103 | }, | |
1104 | }; | |
1105 | ||
1106 | static const MemoryRegionOps ioportF0_io_ops = { | |
1107 | .write = ioportF0_write, | |
c02e1eac | 1108 | .read = ioportF0_read, |
258711c6 JG |
1109 | .endianness = DEVICE_NATIVE_ENDIAN, |
1110 | .impl = { | |
1111 | .min_access_size = 1, | |
1112 | .max_access_size = 1, | |
1113 | }, | |
1114 | }; | |
1115 | ||
ac64273c PMD |
1116 | static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport) |
1117 | { | |
1118 | int i; | |
1119 | DriveInfo *fd[MAX_FD]; | |
1120 | qemu_irq *a20_line; | |
fed2c173 | 1121 | ISADevice *fdc, *i8042, *port92, *vmmouse; |
ac64273c | 1122 | |
def337ff | 1123 | serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS); |
ac64273c PMD |
1124 | parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS); |
1125 | ||
1126 | for (i = 0; i < MAX_FD; i++) { | |
1127 | fd[i] = drive_get(IF_FLOPPY, 0, i); | |
1128 | create_fdctrl |= !!fd[i]; | |
1129 | } | |
1130 | if (create_fdctrl) { | |
fed2c173 MA |
1131 | fdc = isa_new(TYPE_ISA_FDC); |
1132 | if (fdc) { | |
1133 | isa_realize_and_unref(fdc, isa_bus, &error_fatal); | |
1134 | isa_fdc_init_drives(fdc, fd); | |
1135 | } | |
ac64273c PMD |
1136 | } |
1137 | ||
1138 | i8042 = isa_create_simple(isa_bus, "i8042"); | |
1139 | if (!no_vmport) { | |
b4fa79ea | 1140 | isa_create_simple(isa_bus, TYPE_VMPORT); |
c23e0561 | 1141 | vmmouse = isa_try_new("vmmouse"); |
ac64273c PMD |
1142 | } else { |
1143 | vmmouse = NULL; | |
1144 | } | |
1145 | if (vmmouse) { | |
5325cc34 MA |
1146 | object_property_set_link(OBJECT(vmmouse), "i8042", OBJECT(i8042), |
1147 | &error_abort); | |
c23e0561 | 1148 | isa_realize_and_unref(vmmouse, isa_bus, &error_fatal); |
ac64273c | 1149 | } |
9e5213c8 | 1150 | port92 = isa_create_simple(isa_bus, TYPE_PORT92); |
ac64273c PMD |
1151 | |
1152 | a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); | |
1153 | i8042_setup_a20_line(i8042, a20_line[0]); | |
1820b70e PMD |
1154 | qdev_connect_gpio_out_named(DEVICE(port92), |
1155 | PORT92_A20_LINE, 0, a20_line[1]); | |
ac64273c PMD |
1156 | g_free(a20_line); |
1157 | } | |
1158 | ||
10e2483b GH |
1159 | void pc_basic_device_init(struct PCMachineState *pcms, |
1160 | ISABus *isa_bus, qemu_irq *gsi, | |
1611977c | 1161 | ISADevice **rtc_state, |
fd53c87c | 1162 | bool create_fdctrl, |
3a87d009 | 1163 | uint32_t hpet_irqs) |
ffe513da IY |
1164 | { |
1165 | int i; | |
ce967e2f JK |
1166 | DeviceState *hpet = NULL; |
1167 | int pit_isa_irq = 0; | |
1168 | qemu_irq pit_alt_irq = NULL; | |
7d932dfd | 1169 | qemu_irq rtc_irq = NULL; |
ac64273c | 1170 | ISADevice *pit = NULL; |
258711c6 JG |
1171 | MemoryRegion *ioport80_io = g_new(MemoryRegion, 1); |
1172 | MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1); | |
ffe513da | 1173 | |
2c9b15ca | 1174 | memory_region_init_io(ioport80_io, NULL, &ioport80_io_ops, NULL, "ioport80", 1); |
258711c6 | 1175 | memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io); |
ffe513da | 1176 | |
2c9b15ca | 1177 | memory_region_init_io(ioportF0_io, NULL, &ioportF0_io_ops, NULL, "ioportF0", 1); |
258711c6 | 1178 | memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io); |
ffe513da | 1179 | |
5d17c0d2 JK |
1180 | /* |
1181 | * Check if an HPET shall be created. | |
1182 | * | |
1183 | * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT | |
1184 | * when the HPET wants to take over. Thus we have to disable the latter. | |
1185 | */ | |
1186 | if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { | |
df707969 | 1187 | hpet = qdev_try_new(TYPE_HPET); |
dd703b99 | 1188 | if (hpet) { |
7a10ef51 LPF |
1189 | /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7 |
1190 | * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23, | |
1191 | * IRQ8 and IRQ2. | |
1192 | */ | |
5d7fb0f2 | 1193 | uint8_t compat = object_property_get_uint(OBJECT(hpet), |
7a10ef51 LPF |
1194 | HPET_INTCAP, NULL); |
1195 | if (!compat) { | |
1196 | qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs); | |
1197 | } | |
3c6ef471 | 1198 | sysbus_realize_and_unref(SYS_BUS_DEVICE(hpet), &error_fatal); |
7a10ef51 LPF |
1199 | sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE); |
1200 | ||
b881fbe9 | 1201 | for (i = 0; i < GSI_NUM_PINS; i++) { |
1356b98d | 1202 | sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]); |
dd703b99 | 1203 | } |
ce967e2f JK |
1204 | pit_isa_irq = -1; |
1205 | pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT); | |
1206 | rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT); | |
822557eb | 1207 | } |
ffe513da | 1208 | } |
6c646a11 | 1209 | *rtc_state = mc146818_rtc_init(isa_bus, 2000, rtc_irq); |
7d932dfd JK |
1210 | |
1211 | qemu_register_boot_set(pc_boot_set, *rtc_state); | |
1212 | ||
c52e7bbb | 1213 | if (!xen_enabled() && pcms->pit_enabled) { |
15eafc2e | 1214 | if (kvm_pit_in_kernel()) { |
c2d8d311 SS |
1215 | pit = kvm_pit_init(isa_bus, 0x40); |
1216 | } else { | |
acf695ec | 1217 | pit = i8254_pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq); |
c2d8d311 SS |
1218 | } |
1219 | if (hpet) { | |
1220 | /* connect PIT to output control line of the HPET */ | |
4a17cc4f | 1221 | qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0)); |
c2d8d311 | 1222 | } |
6b8d1416 | 1223 | pcspk_init(pcms->pcspk, isa_bus, pit); |
ce967e2f | 1224 | } |
ffe513da | 1225 | |
55f613ac | 1226 | i8257_dma_init(isa_bus, 0); |
ffe513da | 1227 | |
ac64273c | 1228 | /* Super I/O */ |
8859f072 | 1229 | pc_superio_init(isa_bus, create_fdctrl, pcms->vmport != ON_OFF_AUTO_ON); |
ffe513da IY |
1230 | } |
1231 | ||
4b9c264b | 1232 | void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus) |
9011a1a7 IY |
1233 | { |
1234 | int i; | |
1235 | ||
bab47d9a | 1236 | rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC); |
9011a1a7 IY |
1237 | for (i = 0; i < nb_nics; i++) { |
1238 | NICInfo *nd = &nd_table[i]; | |
4b9c264b | 1239 | const char *model = nd->model ? nd->model : pcmc->default_nic_model; |
9011a1a7 | 1240 | |
4b9c264b | 1241 | if (g_str_equal(model, "ne2k_isa")) { |
9011a1a7 IY |
1242 | pc_init_ne2k_isa(isa_bus, nd); |
1243 | } else { | |
4b9c264b | 1244 | pci_nic_init_nofail(nd, pci_bus, model, NULL); |
9011a1a7 IY |
1245 | } |
1246 | } | |
bab47d9a | 1247 | rom_reset_order_override(); |
9011a1a7 IY |
1248 | } |
1249 | ||
4501d317 PMD |
1250 | void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs) |
1251 | { | |
1252 | qemu_irq *i8259; | |
1253 | ||
1254 | if (kvm_pic_in_kernel()) { | |
1255 | i8259 = kvm_i8259_init(isa_bus); | |
1256 | } else if (xen_enabled()) { | |
1257 | i8259 = xen_interrupt_controller_init(); | |
1258 | } else { | |
89a289c7 | 1259 | i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq()); |
4501d317 PMD |
1260 | } |
1261 | ||
1262 | for (size_t i = 0; i < ISA_NUM_IRQS; i++) { | |
1263 | i8259_irqs[i] = i8259[i]; | |
1264 | } | |
1265 | ||
1266 | g_free(i8259); | |
1267 | } | |
1268 | ||
d468115b DH |
1269 | static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, |
1270 | Error **errp) | |
1271 | { | |
1272 | const PCMachineState *pcms = PC_MACHINE(hotplug_dev); | |
b0e62443 | 1273 | const PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
f6a0d06b | 1274 | const MachineState *ms = MACHINE(hotplug_dev); |
d468115b | 1275 | const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); |
b0e62443 | 1276 | const uint64_t legacy_align = TARGET_PAGE_SIZE; |
ae909496 | 1277 | Error *local_err = NULL; |
d468115b DH |
1278 | |
1279 | /* | |
1280 | * When -no-acpi is used with Q35 machine type, no ACPI is built, | |
1281 | * but pcms->acpi_dev is still created. Check !acpi_enabled in | |
1282 | * addition to cover this case. | |
1283 | */ | |
17e89077 | 1284 | if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { |
d468115b DH |
1285 | error_setg(errp, |
1286 | "memory hotplug is not enabled: missing acpi device or acpi disabled"); | |
1287 | return; | |
1288 | } | |
1289 | ||
f6a0d06b | 1290 | if (is_nvdimm && !ms->nvdimms_state->is_enabled) { |
d468115b DH |
1291 | error_setg(errp, "nvdimm is not enabled: missing 'nvdimm' in '-M'"); |
1292 | return; | |
1293 | } | |
8f1ffe5b | 1294 | |
ae909496 TH |
1295 | hotplug_handler_pre_plug(pcms->acpi_dev, dev, &local_err); |
1296 | if (local_err) { | |
1297 | error_propagate(errp, local_err); | |
1298 | return; | |
1299 | } | |
1300 | ||
fd3416f5 | 1301 | pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), |
b0e62443 | 1302 | pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp); |
d468115b DH |
1303 | } |
1304 | ||
bb6e2f7a DH |
1305 | static void pc_memory_plug(HotplugHandler *hotplug_dev, |
1306 | DeviceState *dev, Error **errp) | |
95bee274 IM |
1307 | { |
1308 | Error *local_err = NULL; | |
1309 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); | |
f6a0d06b | 1310 | MachineState *ms = MACHINE(hotplug_dev); |
7f3cf2d6 | 1311 | bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); |
95bee274 | 1312 | |
fd3416f5 | 1313 | pc_dimm_plug(PC_DIMM(dev), MACHINE(pcms), &local_err); |
43bbb49e | 1314 | if (local_err) { |
b8865591 IM |
1315 | goto out; |
1316 | } | |
1317 | ||
7f3cf2d6 | 1318 | if (is_nvdimm) { |
f6a0d06b | 1319 | nvdimm_plug(ms->nvdimms_state); |
c7f8d0f3 XG |
1320 | } |
1321 | ||
473ac567 | 1322 | hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &error_abort); |
95bee274 IM |
1323 | out: |
1324 | error_propagate(errp, local_err); | |
1325 | } | |
1326 | ||
bb6e2f7a DH |
1327 | static void pc_memory_unplug_request(HotplugHandler *hotplug_dev, |
1328 | DeviceState *dev, Error **errp) | |
64fec58e | 1329 | { |
64fec58e TC |
1330 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
1331 | ||
8cd91ace HZ |
1332 | /* |
1333 | * When -no-acpi is used with Q35 machine type, no ACPI is built, | |
1334 | * but pcms->acpi_dev is still created. Check !acpi_enabled in | |
1335 | * addition to cover this case. | |
1336 | */ | |
17e89077 | 1337 | if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { |
dcfe4805 | 1338 | error_setg(errp, |
8cd91ace | 1339 | "memory hotplug is not enabled: missing acpi device or acpi disabled"); |
dcfe4805 | 1340 | return; |
64fec58e TC |
1341 | } |
1342 | ||
b097cc52 | 1343 | if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { |
dcfe4805 MA |
1344 | error_setg(errp, "nvdimm device hot unplug is not supported yet."); |
1345 | return; | |
b097cc52 XG |
1346 | } |
1347 | ||
473ac567 | 1348 | hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, |
dcfe4805 | 1349 | errp); |
64fec58e TC |
1350 | } |
1351 | ||
bb6e2f7a DH |
1352 | static void pc_memory_unplug(HotplugHandler *hotplug_dev, |
1353 | DeviceState *dev, Error **errp) | |
f7d3e29d TC |
1354 | { |
1355 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); | |
f7d3e29d TC |
1356 | Error *local_err = NULL; |
1357 | ||
473ac567 | 1358 | hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); |
f7d3e29d TC |
1359 | if (local_err) { |
1360 | goto out; | |
1361 | } | |
1362 | ||
fd3416f5 | 1363 | pc_dimm_unplug(PC_DIMM(dev), MACHINE(pcms)); |
981c3dcd | 1364 | qdev_unrealize(dev); |
f7d3e29d TC |
1365 | out: |
1366 | error_propagate(errp, local_err); | |
1367 | } | |
1368 | ||
3811ef14 IM |
1369 | static int pc_apic_cmp(const void *a, const void *b) |
1370 | { | |
1371 | CPUArchId *apic_a = (CPUArchId *)a; | |
1372 | CPUArchId *apic_b = (CPUArchId *)b; | |
1373 | ||
1374 | return apic_a->arch_id - apic_b->arch_id; | |
1375 | } | |
1376 | ||
7baef5cf | 1377 | /* returns pointer to CPUArchId descriptor that matches CPU's apic_id |
38690a1c | 1378 | * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no |
b12227af | 1379 | * entry corresponding to CPU's apic_id returns NULL. |
7baef5cf | 1380 | */ |
1ea69c0e | 1381 | static CPUArchId *pc_find_cpu_slot(MachineState *ms, uint32_t id, int *idx) |
7baef5cf | 1382 | { |
7baef5cf IM |
1383 | CPUArchId apic_id, *found_cpu; |
1384 | ||
1ea69c0e | 1385 | apic_id.arch_id = id; |
38690a1c IM |
1386 | found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, |
1387 | ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), | |
7baef5cf IM |
1388 | pc_apic_cmp); |
1389 | if (found_cpu && idx) { | |
38690a1c | 1390 | *idx = found_cpu - ms->possible_cpus->cpus; |
7baef5cf IM |
1391 | } |
1392 | return found_cpu; | |
1393 | } | |
1394 | ||
5279569e GZ |
1395 | static void pc_cpu_plug(HotplugHandler *hotplug_dev, |
1396 | DeviceState *dev, Error **errp) | |
1397 | { | |
7baef5cf | 1398 | CPUArchId *found_cpu; |
5279569e | 1399 | Error *local_err = NULL; |
1ea69c0e | 1400 | X86CPU *cpu = X86_CPU(dev); |
5279569e | 1401 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
f0bb276b | 1402 | X86MachineState *x86ms = X86_MACHINE(pcms); |
5279569e | 1403 | |
a44a49db | 1404 | if (pcms->acpi_dev) { |
473ac567 | 1405 | hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); |
a44a49db IM |
1406 | if (local_err) { |
1407 | goto out; | |
1408 | } | |
5279569e GZ |
1409 | } |
1410 | ||
e3cadac0 | 1411 | /* increment the number of CPUs */ |
f0bb276b PB |
1412 | x86ms->boot_cpus++; |
1413 | if (x86ms->rtc) { | |
1414 | rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); | |
26ef65be | 1415 | } |
f0bb276b PB |
1416 | if (x86ms->fw_cfg) { |
1417 | fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); | |
2d996150 GZ |
1418 | } |
1419 | ||
1ea69c0e | 1420 | found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); |
8aba3842 | 1421 | found_cpu->cpu = OBJECT(dev); |
5279569e GZ |
1422 | out: |
1423 | error_propagate(errp, local_err); | |
1424 | } | |
8872c25a IM |
1425 | static void pc_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, |
1426 | DeviceState *dev, Error **errp) | |
1427 | { | |
73360e27 | 1428 | int idx = -1; |
1ea69c0e | 1429 | X86CPU *cpu = X86_CPU(dev); |
8872c25a IM |
1430 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
1431 | ||
75ba2ddb | 1432 | if (!pcms->acpi_dev) { |
dcfe4805 MA |
1433 | error_setg(errp, "CPU hot unplug not supported without ACPI"); |
1434 | return; | |
75ba2ddb IM |
1435 | } |
1436 | ||
1ea69c0e | 1437 | pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); |
73360e27 IM |
1438 | assert(idx != -1); |
1439 | if (idx == 0) { | |
dcfe4805 MA |
1440 | error_setg(errp, "Boot CPU is unpluggable"); |
1441 | return; | |
73360e27 IM |
1442 | } |
1443 | ||
473ac567 | 1444 | hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, |
dcfe4805 | 1445 | errp); |
8872c25a IM |
1446 | } |
1447 | ||
1448 | static void pc_cpu_unplug_cb(HotplugHandler *hotplug_dev, | |
1449 | DeviceState *dev, Error **errp) | |
1450 | { | |
8fe6374e | 1451 | CPUArchId *found_cpu; |
8872c25a | 1452 | Error *local_err = NULL; |
1ea69c0e | 1453 | X86CPU *cpu = X86_CPU(dev); |
8872c25a | 1454 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
f0bb276b | 1455 | X86MachineState *x86ms = X86_MACHINE(pcms); |
8872c25a | 1456 | |
473ac567 | 1457 | hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); |
8872c25a IM |
1458 | if (local_err) { |
1459 | goto out; | |
1460 | } | |
1461 | ||
1ea69c0e | 1462 | found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); |
8fe6374e | 1463 | found_cpu->cpu = NULL; |
981c3dcd | 1464 | qdev_unrealize(dev); |
8872c25a | 1465 | |
e3cadac0 | 1466 | /* decrement the number of CPUs */ |
f0bb276b | 1467 | x86ms->boot_cpus--; |
e3cadac0 | 1468 | /* Update the number of CPUs in CMOS */ |
f0bb276b PB |
1469 | rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); |
1470 | fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); | |
8872c25a IM |
1471 | out: |
1472 | error_propagate(errp, local_err); | |
1473 | } | |
5279569e | 1474 | |
4ec60c76 IM |
1475 | static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, |
1476 | DeviceState *dev, Error **errp) | |
1477 | { | |
1478 | int idx; | |
a15d2728 | 1479 | CPUState *cs; |
e8f7b83e | 1480 | CPUArchId *cpu_slot; |
dcf08bc6 | 1481 | X86CPUTopoIDs topo_ids; |
4ec60c76 | 1482 | X86CPU *cpu = X86_CPU(dev); |
cabea7dc | 1483 | CPUX86State *env = &cpu->env; |
6970c5ff | 1484 | MachineState *ms = MACHINE(hotplug_dev); |
4ec60c76 | 1485 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
f0bb276b | 1486 | X86MachineState *x86ms = X86_MACHINE(pcms); |
0e11fc69 LX |
1487 | unsigned int smp_cores = ms->smp.cores; |
1488 | unsigned int smp_threads = ms->smp.threads; | |
53a5e7bd | 1489 | X86CPUTopoInfo topo_info; |
4ec60c76 | 1490 | |
6970c5ff IM |
1491 | if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { |
1492 | error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", | |
1493 | ms->cpu_type); | |
1494 | return; | |
1495 | } | |
1496 | ||
53a5e7bd BM |
1497 | init_topo_info(&topo_info, x86ms); |
1498 | ||
f0bb276b | 1499 | env->nr_dies = x86ms->smp_dies; |
c24a41bb | 1500 | env->nr_nodes = topo_info.nodes_per_pkg; |
7b225762 | 1501 | env->pkg_offset = x86ms->apicid_pkg_offset(&topo_info); |
cabea7dc | 1502 | |
c26ae610 LX |
1503 | /* |
1504 | * If APIC ID is not set, | |
1505 | * set it based on socket/die/core/thread properties. | |
1506 | */ | |
e8f7b83e | 1507 | if (cpu->apic_id == UNASSIGNED_APIC_ID) { |
c26ae610 | 1508 | int max_socket = (ms->smp.max_cpus - 1) / |
f0bb276b | 1509 | smp_threads / smp_cores / x86ms->smp_dies; |
e8f7b83e | 1510 | |
fea374e7 EH |
1511 | /* |
1512 | * die-id was optional in QEMU 4.0 and older, so keep it optional | |
1513 | * if there's only one die per socket. | |
1514 | */ | |
f0bb276b | 1515 | if (cpu->die_id < 0 && x86ms->smp_dies == 1) { |
fea374e7 EH |
1516 | cpu->die_id = 0; |
1517 | } | |
1518 | ||
e8f7b83e IM |
1519 | if (cpu->socket_id < 0) { |
1520 | error_setg(errp, "CPU socket-id is not set"); | |
1521 | return; | |
1522 | } else if (cpu->socket_id > max_socket) { | |
1523 | error_setg(errp, "Invalid CPU socket-id: %u must be in range 0:%u", | |
1524 | cpu->socket_id, max_socket); | |
1525 | return; | |
23d9cff4 EH |
1526 | } |
1527 | if (cpu->die_id < 0) { | |
1528 | error_setg(errp, "CPU die-id is not set"); | |
1529 | return; | |
f0bb276b | 1530 | } else if (cpu->die_id > x86ms->smp_dies - 1) { |
176d2cda | 1531 | error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u", |
f0bb276b | 1532 | cpu->die_id, x86ms->smp_dies - 1); |
176d2cda | 1533 | return; |
e8f7b83e IM |
1534 | } |
1535 | if (cpu->core_id < 0) { | |
1536 | error_setg(errp, "CPU core-id is not set"); | |
1537 | return; | |
1538 | } else if (cpu->core_id > (smp_cores - 1)) { | |
1539 | error_setg(errp, "Invalid CPU core-id: %u must be in range 0:%u", | |
1540 | cpu->core_id, smp_cores - 1); | |
1541 | return; | |
1542 | } | |
1543 | if (cpu->thread_id < 0) { | |
1544 | error_setg(errp, "CPU thread-id is not set"); | |
1545 | return; | |
1546 | } else if (cpu->thread_id > (smp_threads - 1)) { | |
1547 | error_setg(errp, "Invalid CPU thread-id: %u must be in range 0:%u", | |
1548 | cpu->thread_id, smp_threads - 1); | |
1549 | return; | |
1550 | } | |
1551 | ||
dcf08bc6 BM |
1552 | topo_ids.pkg_id = cpu->socket_id; |
1553 | topo_ids.die_id = cpu->die_id; | |
1554 | topo_ids.core_id = cpu->core_id; | |
1555 | topo_ids.smt_id = cpu->thread_id; | |
2e26f4ab | 1556 | cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids); |
e8f7b83e IM |
1557 | } |
1558 | ||
1ea69c0e | 1559 | cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); |
4ec60c76 | 1560 | if (!cpu_slot) { |
38690a1c IM |
1561 | MachineState *ms = MACHINE(pcms); |
1562 | ||
2e26f4ab | 1563 | x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); |
d65af288 LX |
1564 | error_setg(errp, |
1565 | "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" | |
1566 | " APIC ID %" PRIu32 ", valid index range 0:%d", | |
dcf08bc6 | 1567 | topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.smt_id, |
d65af288 | 1568 | cpu->apic_id, ms->possible_cpus->len - 1); |
4ec60c76 IM |
1569 | return; |
1570 | } | |
1571 | ||
1572 | if (cpu_slot->cpu) { | |
1573 | error_setg(errp, "CPU[%d] with APIC ID %" PRIu32 " exists", | |
1574 | idx, cpu->apic_id); | |
1575 | return; | |
1576 | } | |
d89c2b8b IM |
1577 | |
1578 | /* if 'address' properties socket-id/core-id/thread-id are not set, set them | |
c5514d0e | 1579 | * so that machine_query_hotpluggable_cpus would show correct values |
d89c2b8b IM |
1580 | */ |
1581 | /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() | |
1582 | * once -smp refactoring is complete and there will be CPU private | |
1583 | * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ | |
2e26f4ab | 1584 | x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); |
dcf08bc6 | 1585 | if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { |
d89c2b8b | 1586 | error_setg(errp, "property socket-id: %u doesn't match set apic-id:" |
dcf08bc6 BM |
1587 | " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, |
1588 | topo_ids.pkg_id); | |
d89c2b8b IM |
1589 | return; |
1590 | } | |
dcf08bc6 | 1591 | cpu->socket_id = topo_ids.pkg_id; |
d89c2b8b | 1592 | |
dcf08bc6 | 1593 | if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) { |
176d2cda | 1594 | error_setg(errp, "property die-id: %u doesn't match set apic-id:" |
dcf08bc6 | 1595 | " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id); |
176d2cda LX |
1596 | return; |
1597 | } | |
dcf08bc6 | 1598 | cpu->die_id = topo_ids.die_id; |
176d2cda | 1599 | |
dcf08bc6 | 1600 | if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) { |
d89c2b8b | 1601 | error_setg(errp, "property core-id: %u doesn't match set apic-id:" |
dcf08bc6 BM |
1602 | " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, |
1603 | topo_ids.core_id); | |
d89c2b8b IM |
1604 | return; |
1605 | } | |
dcf08bc6 | 1606 | cpu->core_id = topo_ids.core_id; |
d89c2b8b | 1607 | |
dcf08bc6 | 1608 | if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) { |
d89c2b8b | 1609 | error_setg(errp, "property thread-id: %u doesn't match set apic-id:" |
dcf08bc6 BM |
1610 | " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, |
1611 | topo_ids.smt_id); | |
d89c2b8b IM |
1612 | return; |
1613 | } | |
dcf08bc6 | 1614 | cpu->thread_id = topo_ids.smt_id; |
a15d2728 | 1615 | |
2d384d7c VK |
1616 | if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) && |
1617 | !kvm_hv_vpindex_settable()) { | |
e9688fab RK |
1618 | error_setg(errp, "kernel doesn't allow setting HyperV VP_INDEX"); |
1619 | return; | |
1620 | } | |
1621 | ||
a15d2728 IM |
1622 | cs = CPU(cpu); |
1623 | cs->cpu_index = idx; | |
93b2a8cb | 1624 | |
a0ceb640 | 1625 | numa_cpu_pre_plug(cpu_slot, dev, errp); |
4ec60c76 IM |
1626 | } |
1627 | ||
0ed48fd3 DH |
1628 | static void pc_virtio_md_pci_pre_plug(HotplugHandler *hotplug_dev, |
1629 | DeviceState *dev, Error **errp) | |
a0a49813 DH |
1630 | { |
1631 | HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev); | |
1632 | Error *local_err = NULL; | |
1633 | ||
af1d039f | 1634 | if (!hotplug_dev2 && dev->hotplugged) { |
a0a49813 DH |
1635 | /* |
1636 | * Without a bus hotplug handler, we cannot control the plug/unplug | |
af1d039f DH |
1637 | * order. We should never reach this point when hotplugging on x86, |
1638 | * however, better add a safety net. | |
a0a49813 | 1639 | */ |
0ed48fd3 DH |
1640 | error_setg(errp, "hotplug of virtio based memory devices not supported" |
1641 | " on this bus."); | |
a0a49813 DH |
1642 | return; |
1643 | } | |
1644 | /* | |
1645 | * First, see if we can plug this memory device at all. If that | |
1646 | * succeeds, branch of to the actual hotplug handler. | |
1647 | */ | |
1648 | memory_device_pre_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev), NULL, | |
1649 | &local_err); | |
af1d039f | 1650 | if (!local_err && hotplug_dev2) { |
a0a49813 DH |
1651 | hotplug_handler_pre_plug(hotplug_dev2, dev, &local_err); |
1652 | } | |
1653 | error_propagate(errp, local_err); | |
1654 | } | |
1655 | ||
0ed48fd3 DH |
1656 | static void pc_virtio_md_pci_plug(HotplugHandler *hotplug_dev, |
1657 | DeviceState *dev, Error **errp) | |
a0a49813 DH |
1658 | { |
1659 | HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev); | |
1660 | Error *local_err = NULL; | |
1661 | ||
1662 | /* | |
1663 | * Plug the memory device first and then branch off to the actual | |
1664 | * hotplug handler. If that one fails, we can easily undo the memory | |
1665 | * device bits. | |
1666 | */ | |
1667 | memory_device_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev)); | |
af1d039f DH |
1668 | if (hotplug_dev2) { |
1669 | hotplug_handler_plug(hotplug_dev2, dev, &local_err); | |
1670 | if (local_err) { | |
1671 | memory_device_unplug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev)); | |
1672 | } | |
a0a49813 DH |
1673 | } |
1674 | error_propagate(errp, local_err); | |
1675 | } | |
1676 | ||
0ed48fd3 DH |
1677 | static void pc_virtio_md_pci_unplug_request(HotplugHandler *hotplug_dev, |
1678 | DeviceState *dev, Error **errp) | |
a0a49813 | 1679 | { |
0ed48fd3 DH |
1680 | /* We don't support hot unplug of virtio based memory devices */ |
1681 | error_setg(errp, "virtio based memory devices cannot be unplugged."); | |
a0a49813 DH |
1682 | } |
1683 | ||
0ed48fd3 DH |
1684 | static void pc_virtio_md_pci_unplug(HotplugHandler *hotplug_dev, |
1685 | DeviceState *dev, Error **errp) | |
a0a49813 | 1686 | { |
0ed48fd3 | 1687 | /* We don't support hot unplug of virtio based memory devices */ |
a0a49813 DH |
1688 | } |
1689 | ||
4ec60c76 IM |
1690 | static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, |
1691 | DeviceState *dev, Error **errp) | |
1692 | { | |
d468115b DH |
1693 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
1694 | pc_memory_pre_plug(hotplug_dev, dev, errp); | |
1695 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { | |
4ec60c76 | 1696 | pc_cpu_pre_plug(hotplug_dev, dev, errp); |
0ed48fd3 DH |
1697 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1698 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1699 | pc_virtio_md_pci_pre_plug(hotplug_dev, dev, errp); | |
4ec60c76 IM |
1700 | } |
1701 | } | |
1702 | ||
95bee274 IM |
1703 | static void pc_machine_device_plug_cb(HotplugHandler *hotplug_dev, |
1704 | DeviceState *dev, Error **errp) | |
1705 | { | |
1706 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { | |
bb6e2f7a | 1707 | pc_memory_plug(hotplug_dev, dev, errp); |
5279569e GZ |
1708 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
1709 | pc_cpu_plug(hotplug_dev, dev, errp); | |
0ed48fd3 DH |
1710 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1711 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1712 | pc_virtio_md_pci_plug(hotplug_dev, dev, errp); | |
95bee274 IM |
1713 | } |
1714 | } | |
1715 | ||
d9c5c5b8 TC |
1716 | static void pc_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev, |
1717 | DeviceState *dev, Error **errp) | |
1718 | { | |
64fec58e | 1719 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
bb6e2f7a | 1720 | pc_memory_unplug_request(hotplug_dev, dev, errp); |
8872c25a IM |
1721 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
1722 | pc_cpu_unplug_request_cb(hotplug_dev, dev, errp); | |
0ed48fd3 DH |
1723 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1724 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1725 | pc_virtio_md_pci_unplug_request(hotplug_dev, dev, errp); | |
64fec58e TC |
1726 | } else { |
1727 | error_setg(errp, "acpi: device unplug request for not supported device" | |
1728 | " type: %s", object_get_typename(OBJECT(dev))); | |
1729 | } | |
d9c5c5b8 TC |
1730 | } |
1731 | ||
232391c1 TC |
1732 | static void pc_machine_device_unplug_cb(HotplugHandler *hotplug_dev, |
1733 | DeviceState *dev, Error **errp) | |
1734 | { | |
f7d3e29d | 1735 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
bb6e2f7a | 1736 | pc_memory_unplug(hotplug_dev, dev, errp); |
8872c25a IM |
1737 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
1738 | pc_cpu_unplug_cb(hotplug_dev, dev, errp); | |
0ed48fd3 DH |
1739 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1740 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1741 | pc_virtio_md_pci_unplug(hotplug_dev, dev, errp); | |
f7d3e29d TC |
1742 | } else { |
1743 | error_setg(errp, "acpi: device unplug for not supported device" | |
1744 | " type: %s", object_get_typename(OBJECT(dev))); | |
1745 | } | |
232391c1 TC |
1746 | } |
1747 | ||
285816d7 | 1748 | static HotplugHandler *pc_get_hotplug_handler(MachineState *machine, |
95bee274 IM |
1749 | DeviceState *dev) |
1750 | { | |
5279569e | 1751 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || |
a0a49813 | 1752 | object_dynamic_cast(OBJECT(dev), TYPE_CPU) || |
0ed48fd3 DH |
1753 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1754 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
95bee274 IM |
1755 | return HOTPLUG_HANDLER(machine); |
1756 | } | |
1757 | ||
38aefb57 | 1758 | return NULL; |
95bee274 IM |
1759 | } |
1760 | ||
bf1e8939 | 1761 | static void |
f2ffbe2b DH |
1762 | pc_machine_get_device_memory_region_size(Object *obj, Visitor *v, |
1763 | const char *name, void *opaque, | |
1764 | Error **errp) | |
bf1e8939 | 1765 | { |
b0c14ec4 | 1766 | MachineState *ms = MACHINE(obj); |
fc3b77e2 IM |
1767 | int64_t value = 0; |
1768 | ||
1769 | if (ms->device_memory) { | |
1770 | value = memory_region_size(&ms->device_memory->mr); | |
1771 | } | |
bf1e8939 | 1772 | |
51e72bc1 | 1773 | visit_type_int(v, name, &value, errp); |
bf1e8939 IM |
1774 | } |
1775 | ||
d7bce999 EB |
1776 | static void pc_machine_get_vmport(Object *obj, Visitor *v, const char *name, |
1777 | void *opaque, Error **errp) | |
9b23cfb7 DDAG |
1778 | { |
1779 | PCMachineState *pcms = PC_MACHINE(obj); | |
d1048bef | 1780 | OnOffAuto vmport = pcms->vmport; |
9b23cfb7 | 1781 | |
51e72bc1 | 1782 | visit_type_OnOffAuto(v, name, &vmport, errp); |
9b23cfb7 DDAG |
1783 | } |
1784 | ||
d7bce999 EB |
1785 | static void pc_machine_set_vmport(Object *obj, Visitor *v, const char *name, |
1786 | void *opaque, Error **errp) | |
9b23cfb7 DDAG |
1787 | { |
1788 | PCMachineState *pcms = PC_MACHINE(obj); | |
1789 | ||
51e72bc1 | 1790 | visit_type_OnOffAuto(v, name, &pcms->vmport, errp); |
9b23cfb7 DDAG |
1791 | } |
1792 | ||
be232eb0 CP |
1793 | static bool pc_machine_get_smbus(Object *obj, Error **errp) |
1794 | { | |
1795 | PCMachineState *pcms = PC_MACHINE(obj); | |
1796 | ||
f5878b03 | 1797 | return pcms->smbus_enabled; |
be232eb0 CP |
1798 | } |
1799 | ||
1800 | static void pc_machine_set_smbus(Object *obj, bool value, Error **errp) | |
1801 | { | |
1802 | PCMachineState *pcms = PC_MACHINE(obj); | |
1803 | ||
f5878b03 | 1804 | pcms->smbus_enabled = value; |
be232eb0 CP |
1805 | } |
1806 | ||
272f0428 CP |
1807 | static bool pc_machine_get_sata(Object *obj, Error **errp) |
1808 | { | |
1809 | PCMachineState *pcms = PC_MACHINE(obj); | |
1810 | ||
f5878b03 | 1811 | return pcms->sata_enabled; |
272f0428 CP |
1812 | } |
1813 | ||
1814 | static void pc_machine_set_sata(Object *obj, bool value, Error **errp) | |
1815 | { | |
1816 | PCMachineState *pcms = PC_MACHINE(obj); | |
1817 | ||
f5878b03 | 1818 | pcms->sata_enabled = value; |
272f0428 CP |
1819 | } |
1820 | ||
feddd2fd CP |
1821 | static bool pc_machine_get_pit(Object *obj, Error **errp) |
1822 | { | |
1823 | PCMachineState *pcms = PC_MACHINE(obj); | |
1824 | ||
f5878b03 | 1825 | return pcms->pit_enabled; |
feddd2fd CP |
1826 | } |
1827 | ||
1828 | static void pc_machine_set_pit(Object *obj, bool value, Error **errp) | |
1829 | { | |
1830 | PCMachineState *pcms = PC_MACHINE(obj); | |
1831 | ||
f5878b03 | 1832 | pcms->pit_enabled = value; |
feddd2fd CP |
1833 | } |
1834 | ||
9a45729d GH |
1835 | static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v, |
1836 | const char *name, void *opaque, | |
1837 | Error **errp) | |
1838 | { | |
1839 | PCMachineState *pcms = PC_MACHINE(obj); | |
1840 | uint64_t value = pcms->max_ram_below_4g; | |
1841 | ||
1842 | visit_type_size(v, name, &value, errp); | |
1843 | } | |
1844 | ||
1845 | static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v, | |
1846 | const char *name, void *opaque, | |
1847 | Error **errp) | |
1848 | { | |
1849 | PCMachineState *pcms = PC_MACHINE(obj); | |
9a45729d GH |
1850 | uint64_t value; |
1851 | ||
668f62ec | 1852 | if (!visit_type_size(v, name, &value, errp)) { |
9a45729d GH |
1853 | return; |
1854 | } | |
1855 | if (value > 4 * GiB) { | |
dcfe4805 | 1856 | error_setg(errp, |
9a45729d GH |
1857 | "Machine option 'max-ram-below-4g=%"PRIu64 |
1858 | "' expects size less than or equal to 4G", value); | |
9a45729d GH |
1859 | return; |
1860 | } | |
1861 | ||
1862 | if (value < 1 * MiB) { | |
1863 | warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary," | |
1864 | "BIOS may not work with less than 1MiB", value); | |
1865 | } | |
1866 | ||
1867 | pcms->max_ram_below_4g = value; | |
1868 | } | |
1869 | ||
bf1e8939 IM |
1870 | static void pc_machine_initfn(Object *obj) |
1871 | { | |
c87b1520 DS |
1872 | PCMachineState *pcms = PC_MACHINE(obj); |
1873 | ||
97fd1ea8 | 1874 | #ifdef CONFIG_VMPORT |
d1048bef | 1875 | pcms->vmport = ON_OFF_AUTO_AUTO; |
97fd1ea8 JM |
1876 | #else |
1877 | pcms->vmport = ON_OFF_AUTO_OFF; | |
1878 | #endif /* CONFIG_VMPORT */ | |
9a45729d | 1879 | pcms->max_ram_below_4g = 0; /* use default */ |
021746c1 WL |
1880 | /* acpi build is enabled by default if machine supports it */ |
1881 | pcms->acpi_build_enabled = PC_MACHINE_GET_CLASS(pcms)->has_acpi_build; | |
f5878b03 CM |
1882 | pcms->smbus_enabled = true; |
1883 | pcms->sata_enabled = true; | |
1884 | pcms->pit_enabled = true; | |
ebc29e1b MA |
1885 | |
1886 | pc_system_flash_create(pcms); | |
6b8d1416 | 1887 | pcms->pcspk = isa_new(TYPE_PC_SPEAKER); |
2e16ec05 GH |
1888 | object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", |
1889 | OBJECT(pcms->pcspk), "audiodev"); | |
bf1e8939 IM |
1890 | } |
1891 | ||
a0628599 | 1892 | static void pc_machine_reset(MachineState *machine) |
ae50c55a ZG |
1893 | { |
1894 | CPUState *cs; | |
1895 | X86CPU *cpu; | |
1896 | ||
1897 | qemu_devices_reset(); | |
1898 | ||
1899 | /* Reset APIC after devices have been reset to cancel | |
1900 | * any changes that qemu_devices_reset() might have done. | |
1901 | */ | |
1902 | CPU_FOREACH(cs) { | |
1903 | cpu = X86_CPU(cs); | |
1904 | ||
1905 | if (cpu->apic_state) { | |
f703a04c | 1906 | device_legacy_reset(cpu->apic_state); |
ae50c55a ZG |
1907 | } |
1908 | } | |
1909 | } | |
1910 | ||
c508bd12 NP |
1911 | static void pc_machine_wakeup(MachineState *machine) |
1912 | { | |
1913 | cpu_synchronize_all_states(); | |
1914 | pc_machine_reset(machine); | |
1915 | cpu_synchronize_all_post_reset(); | |
1916 | } | |
1917 | ||
c6cbc29d PX |
1918 | static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp) |
1919 | { | |
1920 | X86IOMMUState *iommu = x86_iommu_get_default(); | |
1921 | IntelIOMMUState *intel_iommu; | |
1922 | ||
1923 | if (iommu && | |
1924 | object_dynamic_cast((Object *)iommu, TYPE_INTEL_IOMMU_DEVICE) && | |
1925 | object_dynamic_cast((Object *)dev, "vfio-pci")) { | |
1926 | intel_iommu = INTEL_IOMMU_DEVICE(iommu); | |
1927 | if (!intel_iommu->caching_mode) { | |
1928 | error_setg(errp, "Device assignment is not allowed without " | |
1929 | "enabling caching-mode=on for Intel IOMMU."); | |
1930 | return false; | |
1931 | } | |
1932 | } | |
1933 | ||
1934 | return true; | |
1935 | } | |
1936 | ||
95bee274 IM |
1937 | static void pc_machine_class_init(ObjectClass *oc, void *data) |
1938 | { | |
1939 | MachineClass *mc = MACHINE_CLASS(oc); | |
1940 | PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); | |
1941 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); | |
1942 | ||
7102fa70 EH |
1943 | pcmc->pci_enabled = true; |
1944 | pcmc->has_acpi_build = true; | |
1945 | pcmc->rsdp_in_ram = true; | |
1946 | pcmc->smbios_defaults = true; | |
1947 | pcmc->smbios_uuid_encoded = true; | |
1948 | pcmc->gigabyte_align = true; | |
1949 | pcmc->has_reserved_memory = true; | |
1950 | pcmc->kvmclock_enabled = true; | |
16a9e8a5 | 1951 | pcmc->enforce_aligned_dimm = true; |
cd4040ec EH |
1952 | /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported |
1953 | * to be used at the moment, 32K should be enough for a while. */ | |
1954 | pcmc->acpi_data_size = 0x20000 + 0x8000; | |
98e753a6 | 1955 | pcmc->linuxboot_dma_enabled = true; |
fda672b5 | 1956 | pcmc->pvh_enabled = true; |
debbdc00 | 1957 | assert(!mc->get_hotplug_handler); |
285816d7 | 1958 | mc->get_hotplug_handler = pc_get_hotplug_handler; |
c6cbc29d | 1959 | mc->hotplug_allowed = pc_hotplug_allowed; |
81ef68e4 SL |
1960 | mc->cpu_index_to_instance_props = x86_cpu_index_to_props; |
1961 | mc->get_default_cpu_node_id = x86_get_default_cpu_node_id; | |
1962 | mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids; | |
7b8be49d | 1963 | mc->auto_enable_numa_with_memhp = true; |
195784a0 | 1964 | mc->auto_enable_numa_with_memdev = true; |
c5514d0e | 1965 | mc->has_hotpluggable_cpus = true; |
41742767 | 1966 | mc->default_boot_order = "cad"; |
4458fb3a | 1967 | mc->hot_add_cpu = pc_hot_add_cpu; |
6f479566 | 1968 | mc->smp_parse = pc_smp_parse; |
2059839b | 1969 | mc->block_default_type = IF_IDE; |
4458fb3a | 1970 | mc->max_cpus = 255; |
ae50c55a | 1971 | mc->reset = pc_machine_reset; |
c508bd12 | 1972 | mc->wakeup = pc_machine_wakeup; |
4ec60c76 | 1973 | hc->pre_plug = pc_machine_device_pre_plug_cb; |
95bee274 | 1974 | hc->plug = pc_machine_device_plug_cb; |
d9c5c5b8 | 1975 | hc->unplug_request = pc_machine_device_unplug_request_cb; |
232391c1 | 1976 | hc->unplug = pc_machine_device_unplug_cb; |
311ca98d | 1977 | mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; |
f6a0d06b | 1978 | mc->nvdimm_supported = true; |
bd457782 | 1979 | mc->default_ram_id = "pc.ram"; |
0efc257d | 1980 | |
9a45729d GH |
1981 | object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size", |
1982 | pc_machine_get_max_ram_below_4g, pc_machine_set_max_ram_below_4g, | |
1983 | NULL, NULL); | |
1984 | object_class_property_set_description(oc, PC_MACHINE_MAX_RAM_BELOW_4G, | |
1985 | "Maximum ram below the 4G boundary (32bit boundary)"); | |
1986 | ||
f2ffbe2b DH |
1987 | object_class_property_add(oc, PC_MACHINE_DEVMEM_REGION_SIZE, "int", |
1988 | pc_machine_get_device_memory_region_size, NULL, | |
d2623129 | 1989 | NULL, NULL); |
0efc257d | 1990 | |
0efc257d EH |
1991 | object_class_property_add(oc, PC_MACHINE_VMPORT, "OnOffAuto", |
1992 | pc_machine_get_vmport, pc_machine_set_vmport, | |
d2623129 | 1993 | NULL, NULL); |
0efc257d | 1994 | object_class_property_set_description(oc, PC_MACHINE_VMPORT, |
7eecec7d | 1995 | "Enable vmport (pc & q35)"); |
0efc257d | 1996 | |
be232eb0 | 1997 | object_class_property_add_bool(oc, PC_MACHINE_SMBUS, |
d2623129 | 1998 | pc_machine_get_smbus, pc_machine_set_smbus); |
272f0428 CP |
1999 | |
2000 | object_class_property_add_bool(oc, PC_MACHINE_SATA, | |
d2623129 | 2001 | pc_machine_get_sata, pc_machine_set_sata); |
feddd2fd CP |
2002 | |
2003 | object_class_property_add_bool(oc, PC_MACHINE_PIT, | |
d2623129 | 2004 | pc_machine_get_pit, pc_machine_set_pit); |
95bee274 IM |
2005 | } |
2006 | ||
d5747cac IM |
2007 | static const TypeInfo pc_machine_info = { |
2008 | .name = TYPE_PC_MACHINE, | |
f0bb276b | 2009 | .parent = TYPE_X86_MACHINE, |
d5747cac IM |
2010 | .abstract = true, |
2011 | .instance_size = sizeof(PCMachineState), | |
bf1e8939 | 2012 | .instance_init = pc_machine_initfn, |
d5747cac | 2013 | .class_size = sizeof(PCMachineClass), |
95bee274 IM |
2014 | .class_init = pc_machine_class_init, |
2015 | .interfaces = (InterfaceInfo[]) { | |
2016 | { TYPE_HOTPLUG_HANDLER }, | |
2017 | { } | |
2018 | }, | |
d5747cac IM |
2019 | }; |
2020 | ||
2021 | static void pc_machine_register_types(void) | |
2022 | { | |
2023 | type_register_static(&pc_machine_info); | |
2024 | } | |
2025 | ||
2026 | type_init(pc_machine_register_types) |