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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
d38ea87a | 16 | #include "qemu/osdep.h" |
21786c7e | 17 | #include "qemu/log.h" |
da34e65c | 18 | #include "qapi/error.h" |
33c11879 | 19 | #include "cpu.h" |
022c62cb PB |
20 | #include "exec/memory.h" |
21 | #include "exec/address-spaces.h" | |
409ddd01 | 22 | #include "qapi/visitor.h" |
1de7afc9 | 23 | #include "qemu/bitops.h" |
8c56c1a5 | 24 | #include "qemu/error-report.h" |
db725815 | 25 | #include "qemu/main-loop.h" |
b6b71cb5 | 26 | #include "qemu/qemu-print.h" |
2c9b15ca | 27 | #include "qom/object.h" |
8b7a5507 | 28 | #include "trace.h" |
093bc2cd | 29 | |
022c62cb | 30 | #include "exec/memory-internal.h" |
220c3ebd | 31 | #include "exec/ram_addr.h" |
8c56c1a5 | 32 | #include "sysemu/kvm.h" |
54d31236 | 33 | #include "sysemu/runstate.h" |
14a48c1d | 34 | #include "sysemu/tcg.h" |
8072aae3 | 35 | #include "sysemu/accel.h" |
8072aae3 | 36 | #include "hw/boards.h" |
b08199c6 | 37 | #include "migration/vmstate.h" |
67d95c15 | 38 | |
d197063f PB |
39 | //#define DEBUG_UNASSIGNED |
40 | ||
22bde714 JK |
41 | static unsigned memory_region_transaction_depth; |
42 | static bool memory_region_update_pending; | |
4dc56152 | 43 | static bool ioeventfd_update_pending; |
ae7a2bca | 44 | bool global_dirty_log; |
7664e80c | 45 | |
eae3eb3e | 46 | static QTAILQ_HEAD(, MemoryListener) memory_listeners |
72e22d2f | 47 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); |
4ef4db86 | 48 | |
0d673e36 AK |
49 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
50 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
51 | ||
967dc9b1 AK |
52 | static GHashTable *flat_views; |
53 | ||
093bc2cd AK |
54 | typedef struct AddrRange AddrRange; |
55 | ||
8417cebf | 56 | /* |
c9cdaa3a | 57 | * Note that signed integers are needed for negative offsetting in aliases |
8417cebf AK |
58 | * (large MemoryRegion::alias_offset). |
59 | */ | |
093bc2cd | 60 | struct AddrRange { |
08dafab4 AK |
61 | Int128 start; |
62 | Int128 size; | |
093bc2cd AK |
63 | }; |
64 | ||
08dafab4 | 65 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
66 | { |
67 | return (AddrRange) { start, size }; | |
68 | } | |
69 | ||
70 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
71 | { | |
08dafab4 | 72 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
73 | } |
74 | ||
08dafab4 | 75 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 76 | { |
08dafab4 | 77 | return int128_add(r.start, r.size); |
093bc2cd AK |
78 | } |
79 | ||
08dafab4 | 80 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 81 | { |
08dafab4 | 82 | int128_addto(&range.start, delta); |
093bc2cd AK |
83 | return range; |
84 | } | |
85 | ||
08dafab4 AK |
86 | static bool addrrange_contains(AddrRange range, Int128 addr) |
87 | { | |
88 | return int128_ge(addr, range.start) | |
89 | && int128_lt(addr, addrrange_end(range)); | |
90 | } | |
91 | ||
093bc2cd AK |
92 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
93 | { | |
08dafab4 AK |
94 | return addrrange_contains(r1, r2.start) |
95 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
96 | } |
97 | ||
98 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
99 | { | |
08dafab4 AK |
100 | Int128 start = int128_max(r1.start, r2.start); |
101 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
102 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
103 | } |
104 | ||
0e0d36b4 AK |
105 | enum ListenerDirection { Forward, Reverse }; |
106 | ||
7376e582 | 107 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ |
0e0d36b4 AK |
108 | do { \ |
109 | MemoryListener *_listener; \ | |
110 | \ | |
111 | switch (_direction) { \ | |
112 | case Forward: \ | |
113 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
114 | if (_listener->_callback) { \ |
115 | _listener->_callback(_listener, ##_args); \ | |
116 | } \ | |
0e0d36b4 AK |
117 | } \ |
118 | break; \ | |
119 | case Reverse: \ | |
eae3eb3e | 120 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \ |
975aefe0 AK |
121 | if (_listener->_callback) { \ |
122 | _listener->_callback(_listener, ##_args); \ | |
123 | } \ | |
0e0d36b4 AK |
124 | } \ |
125 | break; \ | |
126 | default: \ | |
127 | abort(); \ | |
128 | } \ | |
129 | } while (0) | |
130 | ||
9a54635d | 131 | #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \ |
7376e582 AK |
132 | do { \ |
133 | MemoryListener *_listener; \ | |
134 | \ | |
135 | switch (_direction) { \ | |
136 | case Forward: \ | |
eae3eb3e | 137 | QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \ |
9a54635d | 138 | if (_listener->_callback) { \ |
7376e582 AK |
139 | _listener->_callback(_listener, _section, ##_args); \ |
140 | } \ | |
141 | } \ | |
142 | break; \ | |
143 | case Reverse: \ | |
eae3eb3e | 144 | QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \ |
9a54635d | 145 | if (_listener->_callback) { \ |
7376e582 AK |
146 | _listener->_callback(_listener, _section, ##_args); \ |
147 | } \ | |
148 | } \ | |
149 | break; \ | |
150 | default: \ | |
151 | abort(); \ | |
152 | } \ | |
153 | } while (0) | |
154 | ||
dfde4e6e | 155 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
b2dfd71c | 156 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ |
9c1f8f44 | 157 | do { \ |
16620684 AK |
158 | MemoryRegionSection mrs = section_from_flat_range(fr, \ |
159 | address_space_to_flatview(as)); \ | |
9a54635d | 160 | MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \ |
9c1f8f44 | 161 | } while(0) |
0e0d36b4 | 162 | |
093bc2cd AK |
163 | struct CoalescedMemoryRange { |
164 | AddrRange addr; | |
165 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
166 | }; | |
167 | ||
3e9d69e7 AK |
168 | struct MemoryRegionIoeventfd { |
169 | AddrRange addr; | |
170 | bool match_data; | |
171 | uint64_t data; | |
753d5e14 | 172 | EventNotifier *e; |
3e9d69e7 AK |
173 | }; |
174 | ||
73bb753d TB |
175 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a, |
176 | MemoryRegionIoeventfd *b) | |
3e9d69e7 | 177 | { |
73bb753d | 178 | if (int128_lt(a->addr.start, b->addr.start)) { |
3e9d69e7 | 179 | return true; |
73bb753d | 180 | } else if (int128_gt(a->addr.start, b->addr.start)) { |
3e9d69e7 | 181 | return false; |
73bb753d | 182 | } else if (int128_lt(a->addr.size, b->addr.size)) { |
3e9d69e7 | 183 | return true; |
73bb753d | 184 | } else if (int128_gt(a->addr.size, b->addr.size)) { |
3e9d69e7 | 185 | return false; |
73bb753d | 186 | } else if (a->match_data < b->match_data) { |
3e9d69e7 | 187 | return true; |
73bb753d | 188 | } else if (a->match_data > b->match_data) { |
3e9d69e7 | 189 | return false; |
73bb753d TB |
190 | } else if (a->match_data) { |
191 | if (a->data < b->data) { | |
3e9d69e7 | 192 | return true; |
73bb753d | 193 | } else if (a->data > b->data) { |
3e9d69e7 AK |
194 | return false; |
195 | } | |
196 | } | |
73bb753d | 197 | if (a->e < b->e) { |
3e9d69e7 | 198 | return true; |
73bb753d | 199 | } else if (a->e > b->e) { |
3e9d69e7 AK |
200 | return false; |
201 | } | |
202 | return false; | |
203 | } | |
204 | ||
73bb753d TB |
205 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a, |
206 | MemoryRegionIoeventfd *b) | |
3e9d69e7 | 207 | { |
e6ffd757 EA |
208 | if (int128_eq(a->addr.start, b->addr.start) && |
209 | (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) || | |
210 | (int128_eq(a->addr.size, b->addr.size) && | |
211 | (a->match_data == b->match_data) && | |
212 | ((a->match_data && (a->data == b->data)) || !a->match_data) && | |
213 | (a->e == b->e)))) | |
214 | return true; | |
215 | ||
216 | return false; | |
3e9d69e7 AK |
217 | } |
218 | ||
093bc2cd AK |
219 | /* Range of memory in the global map. Addresses are absolute. */ |
220 | struct FlatRange { | |
221 | MemoryRegion *mr; | |
a8170e5e | 222 | hwaddr offset_in_region; |
093bc2cd | 223 | AddrRange addr; |
5a583347 | 224 | uint8_t dirty_log_mask; |
b138e654 | 225 | bool romd_mode; |
fb1cd6f9 | 226 | bool readonly; |
c26763f8 | 227 | bool nonvolatile; |
093bc2cd AK |
228 | }; |
229 | ||
093bc2cd AK |
230 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
231 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
232 | ||
9c1f8f44 | 233 | static inline MemoryRegionSection |
16620684 | 234 | section_from_flat_range(FlatRange *fr, FlatView *fv) |
9c1f8f44 PB |
235 | { |
236 | return (MemoryRegionSection) { | |
237 | .mr = fr->mr, | |
16620684 | 238 | .fv = fv, |
9c1f8f44 PB |
239 | .offset_within_region = fr->offset_in_region, |
240 | .size = fr->addr.size, | |
241 | .offset_within_address_space = int128_get64(fr->addr.start), | |
242 | .readonly = fr->readonly, | |
c26763f8 | 243 | .nonvolatile = fr->nonvolatile, |
9c1f8f44 PB |
244 | }; |
245 | } | |
246 | ||
093bc2cd AK |
247 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
248 | { | |
249 | return a->mr == b->mr | |
250 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 251 | && a->offset_in_region == b->offset_in_region |
b138e654 | 252 | && a->romd_mode == b->romd_mode |
c26763f8 MAL |
253 | && a->readonly == b->readonly |
254 | && a->nonvolatile == b->nonvolatile; | |
093bc2cd AK |
255 | } |
256 | ||
89c177bb | 257 | static FlatView *flatview_new(MemoryRegion *mr_root) |
093bc2cd | 258 | { |
cc94cd6d AK |
259 | FlatView *view; |
260 | ||
261 | view = g_new0(FlatView, 1); | |
856d7245 | 262 | view->ref = 1; |
89c177bb AK |
263 | view->root = mr_root; |
264 | memory_region_ref(mr_root); | |
02d9651d | 265 | trace_flatview_new(view, mr_root); |
cc94cd6d AK |
266 | |
267 | return view; | |
093bc2cd AK |
268 | } |
269 | ||
270 | /* Insert a range into a given position. Caller is responsible for maintaining | |
271 | * sorting order. | |
272 | */ | |
273 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
274 | { | |
275 | if (view->nr == view->nr_allocated) { | |
276 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 277 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
278 | view->nr_allocated * sizeof(*view->ranges)); |
279 | } | |
280 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
281 | (view->nr - pos) * sizeof(FlatRange)); | |
282 | view->ranges[pos] = *range; | |
dfde4e6e | 283 | memory_region_ref(range->mr); |
093bc2cd AK |
284 | ++view->nr; |
285 | } | |
286 | ||
287 | static void flatview_destroy(FlatView *view) | |
288 | { | |
dfde4e6e PB |
289 | int i; |
290 | ||
02d9651d | 291 | trace_flatview_destroy(view, view->root); |
66a6df1d AK |
292 | if (view->dispatch) { |
293 | address_space_dispatch_free(view->dispatch); | |
294 | } | |
dfde4e6e PB |
295 | for (i = 0; i < view->nr; i++) { |
296 | memory_region_unref(view->ranges[i].mr); | |
297 | } | |
7267c094 | 298 | g_free(view->ranges); |
89c177bb | 299 | memory_region_unref(view->root); |
a9a0c06d | 300 | g_free(view); |
093bc2cd AK |
301 | } |
302 | ||
447b0d0b | 303 | static bool flatview_ref(FlatView *view) |
856d7245 | 304 | { |
d73415a3 | 305 | return qatomic_fetch_inc_nonzero(&view->ref) > 0; |
856d7245 PB |
306 | } |
307 | ||
48564041 | 308 | void flatview_unref(FlatView *view) |
856d7245 | 309 | { |
d73415a3 | 310 | if (qatomic_fetch_dec(&view->ref) == 1) { |
02d9651d | 311 | trace_flatview_destroy_rcu(view, view->root); |
092aa2fc | 312 | assert(view->root); |
66a6df1d | 313 | call_rcu(view, flatview_destroy, rcu); |
856d7245 PB |
314 | } |
315 | } | |
316 | ||
3d8e6bf9 AK |
317 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
318 | { | |
08dafab4 | 319 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 320 | && r1->mr == r2->mr |
08dafab4 AK |
321 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
322 | r1->addr.size), | |
323 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 324 | && r1->dirty_log_mask == r2->dirty_log_mask |
b138e654 | 325 | && r1->romd_mode == r2->romd_mode |
c26763f8 MAL |
326 | && r1->readonly == r2->readonly |
327 | && r1->nonvolatile == r2->nonvolatile; | |
3d8e6bf9 AK |
328 | } |
329 | ||
8508e024 | 330 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
331 | static void flatview_simplify(FlatView *view) |
332 | { | |
838ec117 | 333 | unsigned i, j, k; |
3d8e6bf9 AK |
334 | |
335 | i = 0; | |
336 | while (i < view->nr) { | |
337 | j = i + 1; | |
338 | while (j < view->nr | |
339 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 340 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
341 | ++j; |
342 | } | |
343 | ++i; | |
838ec117 KW |
344 | for (k = i; k < j; k++) { |
345 | memory_region_unref(view->ranges[k].mr); | |
346 | } | |
3d8e6bf9 AK |
347 | memmove(&view->ranges[i], &view->ranges[j], |
348 | (view->nr - j) * sizeof(view->ranges[j])); | |
349 | view->nr -= j - i; | |
350 | } | |
351 | } | |
352 | ||
e7342aa3 PB |
353 | static bool memory_region_big_endian(MemoryRegion *mr) |
354 | { | |
355 | #ifdef TARGET_WORDS_BIGENDIAN | |
356 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
357 | #else | |
358 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
359 | #endif | |
360 | } | |
361 | ||
9bf825bf | 362 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op) |
e11ef3d1 | 363 | { |
9bf825bf TN |
364 | if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) { |
365 | switch (op & MO_SIZE) { | |
366 | case MO_8: | |
e11ef3d1 | 367 | break; |
9bf825bf | 368 | case MO_16: |
e11ef3d1 PB |
369 | *data = bswap16(*data); |
370 | break; | |
9bf825bf | 371 | case MO_32: |
e11ef3d1 PB |
372 | *data = bswap32(*data); |
373 | break; | |
9bf825bf | 374 | case MO_64: |
e11ef3d1 PB |
375 | *data = bswap64(*data); |
376 | break; | |
377 | default: | |
9bf825bf | 378 | g_assert_not_reached(); |
e11ef3d1 PB |
379 | } |
380 | } | |
381 | } | |
382 | ||
3c754a93 | 383 | static inline void memory_region_shift_read_access(uint64_t *value, |
98f52cdb | 384 | signed shift, |
3c754a93 PMD |
385 | uint64_t mask, |
386 | uint64_t tmp) | |
387 | { | |
98f52cdb PMD |
388 | if (shift >= 0) { |
389 | *value |= (tmp & mask) << shift; | |
390 | } else { | |
391 | *value |= (tmp & mask) >> -shift; | |
392 | } | |
3c754a93 PMD |
393 | } |
394 | ||
395 | static inline uint64_t memory_region_shift_write_access(uint64_t *value, | |
98f52cdb | 396 | signed shift, |
3c754a93 PMD |
397 | uint64_t mask) |
398 | { | |
98f52cdb PMD |
399 | uint64_t tmp; |
400 | ||
401 | if (shift >= 0) { | |
402 | tmp = (*value >> shift) & mask; | |
403 | } else { | |
404 | tmp = (*value << -shift) & mask; | |
405 | } | |
406 | ||
407 | return tmp; | |
3c754a93 PMD |
408 | } |
409 | ||
4779dc1d HB |
410 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) |
411 | { | |
412 | MemoryRegion *root; | |
413 | hwaddr abs_addr = offset; | |
414 | ||
415 | abs_addr += mr->addr; | |
416 | for (root = mr; root->container; ) { | |
417 | root = root->container; | |
418 | abs_addr += root->addr; | |
419 | } | |
420 | ||
421 | return abs_addr; | |
422 | } | |
423 | ||
5a68be94 HB |
424 | static int get_cpu_index(void) |
425 | { | |
426 | if (current_cpu) { | |
427 | return current_cpu->cpu_index; | |
428 | } | |
429 | return -1; | |
430 | } | |
431 | ||
cc05c43a | 432 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, |
ce5d2f33 PB |
433 | hwaddr addr, |
434 | uint64_t *value, | |
435 | unsigned size, | |
98f52cdb | 436 | signed shift, |
cc05c43a PM |
437 | uint64_t mask, |
438 | MemTxAttrs attrs) | |
ce5d2f33 | 439 | { |
ce5d2f33 PB |
440 | uint64_t tmp; |
441 | ||
cc05c43a | 442 | tmp = mr->ops->read(mr->opaque, addr, size); |
23d92d68 | 443 | if (mr->subpage) { |
5a68be94 | 444 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 445 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) { |
4779dc1d | 446 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 447 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 448 | } |
3c754a93 | 449 | memory_region_shift_read_access(value, shift, mask, tmp); |
cc05c43a | 450 | return MEMTX_OK; |
ce5d2f33 PB |
451 | } |
452 | ||
cc05c43a PM |
453 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, |
454 | hwaddr addr, | |
455 | uint64_t *value, | |
456 | unsigned size, | |
98f52cdb | 457 | signed shift, |
cc05c43a PM |
458 | uint64_t mask, |
459 | MemTxAttrs attrs) | |
164a4dcd | 460 | { |
cc05c43a PM |
461 | uint64_t tmp = 0; |
462 | MemTxResult r; | |
164a4dcd | 463 | |
cc05c43a | 464 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); |
23d92d68 | 465 | if (mr->subpage) { |
5a68be94 | 466 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 467 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) { |
4779dc1d | 468 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 469 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 470 | } |
3c754a93 | 471 | memory_region_shift_read_access(value, shift, mask, tmp); |
cc05c43a | 472 | return r; |
164a4dcd AK |
473 | } |
474 | ||
cc05c43a PM |
475 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, |
476 | hwaddr addr, | |
477 | uint64_t *value, | |
478 | unsigned size, | |
98f52cdb | 479 | signed shift, |
cc05c43a PM |
480 | uint64_t mask, |
481 | MemTxAttrs attrs) | |
164a4dcd | 482 | { |
3c754a93 | 483 | uint64_t tmp = memory_region_shift_write_access(value, shift, mask); |
164a4dcd | 484 | |
23d92d68 | 485 | if (mr->subpage) { |
5a68be94 | 486 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 487 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) { |
4779dc1d | 488 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 489 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 490 | } |
164a4dcd | 491 | mr->ops->write(mr->opaque, addr, tmp, size); |
cc05c43a | 492 | return MEMTX_OK; |
164a4dcd AK |
493 | } |
494 | ||
cc05c43a PM |
495 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, |
496 | hwaddr addr, | |
497 | uint64_t *value, | |
498 | unsigned size, | |
98f52cdb | 499 | signed shift, |
cc05c43a PM |
500 | uint64_t mask, |
501 | MemTxAttrs attrs) | |
502 | { | |
3c754a93 | 503 | uint64_t tmp = memory_region_shift_write_access(value, shift, mask); |
cc05c43a | 504 | |
23d92d68 | 505 | if (mr->subpage) { |
5a68be94 | 506 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 507 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) { |
4779dc1d | 508 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 509 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 510 | } |
cc05c43a PM |
511 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); |
512 | } | |
513 | ||
514 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
164a4dcd AK |
515 | uint64_t *value, |
516 | unsigned size, | |
517 | unsigned access_size_min, | |
518 | unsigned access_size_max, | |
05e015f7 KF |
519 | MemTxResult (*access_fn) |
520 | (MemoryRegion *mr, | |
521 | hwaddr addr, | |
522 | uint64_t *value, | |
523 | unsigned size, | |
98f52cdb | 524 | signed shift, |
05e015f7 KF |
525 | uint64_t mask, |
526 | MemTxAttrs attrs), | |
cc05c43a PM |
527 | MemoryRegion *mr, |
528 | MemTxAttrs attrs) | |
164a4dcd AK |
529 | { |
530 | uint64_t access_mask; | |
531 | unsigned access_size; | |
532 | unsigned i; | |
cc05c43a | 533 | MemTxResult r = MEMTX_OK; |
164a4dcd AK |
534 | |
535 | if (!access_size_min) { | |
536 | access_size_min = 1; | |
537 | } | |
538 | if (!access_size_max) { | |
539 | access_size_max = 4; | |
540 | } | |
ce5d2f33 PB |
541 | |
542 | /* FIXME: support unaligned access? */ | |
164a4dcd | 543 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
36960b4d | 544 | access_mask = MAKE_64BIT_MASK(0, access_size * 8); |
e7342aa3 PB |
545 | if (memory_region_big_endian(mr)) { |
546 | for (i = 0; i < size; i += access_size) { | |
05e015f7 | 547 | r |= access_fn(mr, addr + i, value, access_size, |
cc05c43a | 548 | (size - access_size - i) * 8, access_mask, attrs); |
e7342aa3 PB |
549 | } |
550 | } else { | |
551 | for (i = 0; i < size; i += access_size) { | |
05e015f7 | 552 | r |= access_fn(mr, addr + i, value, access_size, i * 8, |
cc05c43a | 553 | access_mask, attrs); |
e7342aa3 | 554 | } |
164a4dcd | 555 | } |
cc05c43a | 556 | return r; |
164a4dcd AK |
557 | } |
558 | ||
e2177955 AK |
559 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
560 | { | |
0d673e36 AK |
561 | AddressSpace *as; |
562 | ||
feca4ac1 PB |
563 | while (mr->container) { |
564 | mr = mr->container; | |
e2177955 | 565 | } |
0d673e36 AK |
566 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
567 | if (mr == as->root) { | |
568 | return as; | |
569 | } | |
e2177955 | 570 | } |
eed2bacf | 571 | return NULL; |
e2177955 AK |
572 | } |
573 | ||
093bc2cd AK |
574 | /* Render a memory region into the global view. Ranges in @view obscure |
575 | * ranges in @mr. | |
576 | */ | |
577 | static void render_memory_region(FlatView *view, | |
578 | MemoryRegion *mr, | |
08dafab4 | 579 | Int128 base, |
fb1cd6f9 | 580 | AddrRange clip, |
c26763f8 MAL |
581 | bool readonly, |
582 | bool nonvolatile) | |
093bc2cd AK |
583 | { |
584 | MemoryRegion *subregion; | |
585 | unsigned i; | |
a8170e5e | 586 | hwaddr offset_in_region; |
08dafab4 AK |
587 | Int128 remain; |
588 | Int128 now; | |
093bc2cd AK |
589 | FlatRange fr; |
590 | AddrRange tmp; | |
591 | ||
6bba19ba AK |
592 | if (!mr->enabled) { |
593 | return; | |
594 | } | |
595 | ||
08dafab4 | 596 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 597 | readonly |= mr->readonly; |
c26763f8 | 598 | nonvolatile |= mr->nonvolatile; |
093bc2cd AK |
599 | |
600 | tmp = addrrange_make(base, mr->size); | |
601 | ||
602 | if (!addrrange_intersects(tmp, clip)) { | |
603 | return; | |
604 | } | |
605 | ||
606 | clip = addrrange_intersection(tmp, clip); | |
607 | ||
608 | if (mr->alias) { | |
08dafab4 AK |
609 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
610 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
c26763f8 MAL |
611 | render_memory_region(view, mr->alias, base, clip, |
612 | readonly, nonvolatile); | |
093bc2cd AK |
613 | return; |
614 | } | |
615 | ||
616 | /* Render subregions in priority order. */ | |
617 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
c26763f8 MAL |
618 | render_memory_region(view, subregion, base, clip, |
619 | readonly, nonvolatile); | |
093bc2cd AK |
620 | } |
621 | ||
14a3c10a | 622 | if (!mr->terminates) { |
093bc2cd AK |
623 | return; |
624 | } | |
625 | ||
08dafab4 | 626 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
627 | base = clip.start; |
628 | remain = clip.size; | |
629 | ||
2eb74e1a | 630 | fr.mr = mr; |
6f6a5ef3 | 631 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
b138e654 | 632 | fr.romd_mode = mr->romd_mode; |
2eb74e1a | 633 | fr.readonly = readonly; |
c26763f8 | 634 | fr.nonvolatile = nonvolatile; |
2eb74e1a | 635 | |
093bc2cd | 636 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
637 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
638 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
639 | continue; |
640 | } | |
08dafab4 AK |
641 | if (int128_lt(base, view->ranges[i].addr.start)) { |
642 | now = int128_min(remain, | |
643 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
644 | fr.offset_in_region = offset_in_region; |
645 | fr.addr = addrrange_make(base, now); | |
646 | flatview_insert(view, i, &fr); | |
647 | ++i; | |
08dafab4 AK |
648 | int128_addto(&base, now); |
649 | offset_in_region += int128_get64(now); | |
650 | int128_subfrom(&remain, now); | |
093bc2cd | 651 | } |
d26a8cae AK |
652 | now = int128_sub(int128_min(int128_add(base, remain), |
653 | addrrange_end(view->ranges[i].addr)), | |
654 | base); | |
655 | int128_addto(&base, now); | |
656 | offset_in_region += int128_get64(now); | |
657 | int128_subfrom(&remain, now); | |
093bc2cd | 658 | } |
08dafab4 | 659 | if (int128_nz(remain)) { |
093bc2cd AK |
660 | fr.offset_in_region = offset_in_region; |
661 | fr.addr = addrrange_make(base, remain); | |
662 | flatview_insert(view, i, &fr); | |
663 | } | |
664 | } | |
665 | ||
fb5ef4ee AB |
666 | void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque) |
667 | { | |
668 | FlatRange *fr; | |
669 | ||
670 | assert(fv); | |
671 | assert(cb); | |
672 | ||
673 | FOR_EACH_FLAT_RANGE(fr, fv) { | |
674 | if (cb(fr->addr.start, fr->addr.size, fr->mr, opaque)) | |
675 | break; | |
676 | } | |
677 | } | |
678 | ||
89c177bb AK |
679 | static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr) |
680 | { | |
e673ba9a PB |
681 | while (mr->enabled) { |
682 | if (mr->alias) { | |
683 | if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) { | |
684 | /* The alias is included in its entirety. Use it as | |
685 | * the "real" root, so that we can share more FlatViews. | |
686 | */ | |
687 | mr = mr->alias; | |
688 | continue; | |
689 | } | |
690 | } else if (!mr->terminates) { | |
691 | unsigned int found = 0; | |
692 | MemoryRegion *child, *next = NULL; | |
693 | QTAILQ_FOREACH(child, &mr->subregions, subregions_link) { | |
694 | if (child->enabled) { | |
695 | if (++found > 1) { | |
696 | next = NULL; | |
697 | break; | |
698 | } | |
699 | if (!child->addr && int128_ge(mr->size, child->size)) { | |
700 | /* A child is included in its entirety. If it's the only | |
701 | * enabled one, use it in the hope of finding an alias down the | |
702 | * way. This will also let us share FlatViews. | |
703 | */ | |
704 | next = child; | |
705 | } | |
706 | } | |
707 | } | |
092aa2fc AK |
708 | if (found == 0) { |
709 | return NULL; | |
710 | } | |
e673ba9a PB |
711 | if (next) { |
712 | mr = next; | |
713 | continue; | |
714 | } | |
715 | } | |
716 | ||
092aa2fc | 717 | return mr; |
89c177bb AK |
718 | } |
719 | ||
092aa2fc | 720 | return NULL; |
89c177bb AK |
721 | } |
722 | ||
093bc2cd | 723 | /* Render a memory topology into a list of disjoint absolute ranges. */ |
a9a0c06d | 724 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 725 | { |
9bf561e3 | 726 | int i; |
a9a0c06d | 727 | FlatView *view; |
093bc2cd | 728 | |
89c177bb | 729 | view = flatview_new(mr); |
093bc2cd | 730 | |
83f3c251 | 731 | if (mr) { |
a9a0c06d | 732 | render_memory_region(view, mr, int128_zero(), |
c26763f8 MAL |
733 | addrrange_make(int128_zero(), int128_2_64()), |
734 | false, false); | |
83f3c251 | 735 | } |
a9a0c06d | 736 | flatview_simplify(view); |
093bc2cd | 737 | |
9bf561e3 AK |
738 | view->dispatch = address_space_dispatch_new(view); |
739 | for (i = 0; i < view->nr; i++) { | |
740 | MemoryRegionSection mrs = | |
741 | section_from_flat_range(&view->ranges[i], view); | |
742 | flatview_add_to_dispatch(view, &mrs); | |
743 | } | |
744 | address_space_dispatch_compact(view->dispatch); | |
967dc9b1 | 745 | g_hash_table_replace(flat_views, mr, view); |
9bf561e3 | 746 | |
093bc2cd AK |
747 | return view; |
748 | } | |
749 | ||
3e9d69e7 AK |
750 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
751 | MemoryRegionIoeventfd *fds_new, | |
752 | unsigned fds_new_nb, | |
753 | MemoryRegionIoeventfd *fds_old, | |
754 | unsigned fds_old_nb) | |
755 | { | |
756 | unsigned iold, inew; | |
80a1ea37 AK |
757 | MemoryRegionIoeventfd *fd; |
758 | MemoryRegionSection section; | |
3e9d69e7 AK |
759 | |
760 | /* Generate a symmetric difference of the old and new fd sets, adding | |
761 | * and deleting as necessary. | |
762 | */ | |
763 | ||
764 | iold = inew = 0; | |
765 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
766 | if (iold < fds_old_nb | |
767 | && (inew == fds_new_nb | |
73bb753d TB |
768 | || memory_region_ioeventfd_before(&fds_old[iold], |
769 | &fds_new[inew]))) { | |
80a1ea37 AK |
770 | fd = &fds_old[iold]; |
771 | section = (MemoryRegionSection) { | |
16620684 | 772 | .fv = address_space_to_flatview(as), |
80a1ea37 | 773 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 774 | .size = fd->addr.size, |
80a1ea37 | 775 | }; |
9a54635d | 776 | MEMORY_LISTENER_CALL(as, eventfd_del, Forward, §ion, |
753d5e14 | 777 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
778 | ++iold; |
779 | } else if (inew < fds_new_nb | |
780 | && (iold == fds_old_nb | |
73bb753d TB |
781 | || memory_region_ioeventfd_before(&fds_new[inew], |
782 | &fds_old[iold]))) { | |
80a1ea37 AK |
783 | fd = &fds_new[inew]; |
784 | section = (MemoryRegionSection) { | |
16620684 | 785 | .fv = address_space_to_flatview(as), |
80a1ea37 | 786 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 787 | .size = fd->addr.size, |
80a1ea37 | 788 | }; |
9a54635d | 789 | MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, §ion, |
753d5e14 | 790 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
791 | ++inew; |
792 | } else { | |
793 | ++iold; | |
794 | ++inew; | |
795 | } | |
796 | } | |
797 | } | |
798 | ||
48564041 | 799 | FlatView *address_space_get_flatview(AddressSpace *as) |
856d7245 PB |
800 | { |
801 | FlatView *view; | |
802 | ||
694ea274 | 803 | RCU_READ_LOCK_GUARD(); |
447b0d0b | 804 | do { |
16620684 | 805 | view = address_space_to_flatview(as); |
447b0d0b PB |
806 | /* If somebody has replaced as->current_map concurrently, |
807 | * flatview_ref returns false. | |
808 | */ | |
809 | } while (!flatview_ref(view)); | |
856d7245 PB |
810 | return view; |
811 | } | |
812 | ||
3e9d69e7 AK |
813 | static void address_space_update_ioeventfds(AddressSpace *as) |
814 | { | |
99e86347 | 815 | FlatView *view; |
3e9d69e7 AK |
816 | FlatRange *fr; |
817 | unsigned ioeventfd_nb = 0; | |
920d557e SH |
818 | unsigned ioeventfd_max; |
819 | MemoryRegionIoeventfd *ioeventfds; | |
3e9d69e7 AK |
820 | AddrRange tmp; |
821 | unsigned i; | |
822 | ||
920d557e SH |
823 | /* |
824 | * It is likely that the number of ioeventfds hasn't changed much, so use | |
825 | * the previous size as the starting value, with some headroom to avoid | |
826 | * gratuitous reallocations. | |
827 | */ | |
828 | ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4); | |
829 | ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max); | |
830 | ||
856d7245 | 831 | view = address_space_get_flatview(as); |
99e86347 | 832 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
833 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
834 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
835 | int128_sub(fr->addr.start, |
836 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
837 | if (addrrange_intersects(fr->addr, tmp)) { |
838 | ++ioeventfd_nb; | |
920d557e SH |
839 | if (ioeventfd_nb > ioeventfd_max) { |
840 | ioeventfd_max = MAX(ioeventfd_max * 2, 4); | |
841 | ioeventfds = g_realloc(ioeventfds, | |
842 | ioeventfd_max * sizeof(*ioeventfds)); | |
843 | } | |
3e9d69e7 AK |
844 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; |
845 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
846 | } | |
847 | } | |
848 | } | |
849 | ||
850 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
851 | as->ioeventfds, as->ioeventfd_nb); | |
852 | ||
7267c094 | 853 | g_free(as->ioeventfds); |
3e9d69e7 AK |
854 | as->ioeventfds = ioeventfds; |
855 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 856 | flatview_unref(view); |
3e9d69e7 AK |
857 | } |
858 | ||
23f1174a PX |
859 | /* |
860 | * Notify the memory listeners about the coalesced IO change events of | |
861 | * range `cmr'. Only the part that has intersection of the specified | |
862 | * FlatRange will be sent. | |
863 | */ | |
864 | static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as, | |
865 | CoalescedMemoryRange *cmr, bool add) | |
866 | { | |
867 | AddrRange tmp; | |
868 | ||
869 | tmp = addrrange_shift(cmr->addr, | |
870 | int128_sub(fr->addr.start, | |
871 | int128_make64(fr->offset_in_region))); | |
872 | if (!addrrange_intersects(tmp, fr->addr)) { | |
873 | return; | |
874 | } | |
875 | tmp = addrrange_intersection(tmp, fr->addr); | |
876 | ||
877 | if (add) { | |
878 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add, | |
879 | int128_get64(tmp.start), | |
880 | int128_get64(tmp.size)); | |
881 | } else { | |
882 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del, | |
883 | int128_get64(tmp.start), | |
884 | int128_get64(tmp.size)); | |
885 | } | |
886 | } | |
887 | ||
909bf763 PB |
888 | static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as) |
889 | { | |
23f1174a PX |
890 | CoalescedMemoryRange *cmr; |
891 | ||
23f1174a PX |
892 | QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) { |
893 | flat_range_coalesced_io_notify(fr, as, cmr, false); | |
894 | } | |
909bf763 PB |
895 | } |
896 | ||
897 | static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as) | |
898 | { | |
899 | MemoryRegion *mr = fr->mr; | |
900 | CoalescedMemoryRange *cmr; | |
909bf763 | 901 | |
1f7af804 PB |
902 | if (QTAILQ_EMPTY(&mr->coalesced)) { |
903 | return; | |
904 | } | |
905 | ||
909bf763 | 906 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
23f1174a | 907 | flat_range_coalesced_io_notify(fr, as, cmr, true); |
909bf763 PB |
908 | } |
909 | } | |
910 | ||
b8af1afb | 911 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
912 | const FlatView *old_view, |
913 | const FlatView *new_view, | |
b8af1afb | 914 | bool adding) |
093bc2cd | 915 | { |
093bc2cd AK |
916 | unsigned iold, inew; |
917 | FlatRange *frold, *frnew; | |
093bc2cd AK |
918 | |
919 | /* Generate a symmetric difference of the old and new memory maps. | |
920 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
921 | */ | |
922 | iold = inew = 0; | |
a9a0c06d PB |
923 | while (iold < old_view->nr || inew < new_view->nr) { |
924 | if (iold < old_view->nr) { | |
925 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
926 | } else { |
927 | frold = NULL; | |
928 | } | |
a9a0c06d PB |
929 | if (inew < new_view->nr) { |
930 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
931 | } else { |
932 | frnew = NULL; | |
933 | } | |
934 | ||
935 | if (frold | |
936 | && (!frnew | |
08dafab4 AK |
937 | || int128_lt(frold->addr.start, frnew->addr.start) |
938 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 939 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 940 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 941 | |
b8af1afb | 942 | if (!adding) { |
3ac7d43a | 943 | flat_range_coalesced_io_del(frold, as); |
72e22d2f | 944 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
945 | } |
946 | ||
093bc2cd AK |
947 | ++iold; |
948 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 949 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 950 | |
4f826024 | 951 | if (adding) { |
50c1e149 | 952 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b2dfd71c PB |
953 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { |
954 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
955 | frold->dirty_log_mask, | |
956 | frnew->dirty_log_mask); | |
957 | } | |
958 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
959 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
960 | frold->dirty_log_mask, | |
961 | frnew->dirty_log_mask); | |
b8af1afb | 962 | } |
5a583347 AK |
963 | } |
964 | ||
093bc2cd AK |
965 | ++iold; |
966 | ++inew; | |
093bc2cd AK |
967 | } else { |
968 | /* In new */ | |
969 | ||
b8af1afb | 970 | if (adding) { |
72e22d2f | 971 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
3ac7d43a | 972 | flat_range_coalesced_io_add(frnew, as); |
b8af1afb AK |
973 | } |
974 | ||
093bc2cd AK |
975 | ++inew; |
976 | } | |
977 | } | |
b8af1afb AK |
978 | } |
979 | ||
967dc9b1 AK |
980 | static void flatviews_init(void) |
981 | { | |
092aa2fc AK |
982 | static FlatView *empty_view; |
983 | ||
967dc9b1 AK |
984 | if (flat_views) { |
985 | return; | |
986 | } | |
987 | ||
988 | flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL, | |
989 | (GDestroyNotify) flatview_unref); | |
092aa2fc AK |
990 | if (!empty_view) { |
991 | empty_view = generate_memory_topology(NULL); | |
992 | /* We keep it alive forever in the global variable. */ | |
993 | flatview_ref(empty_view); | |
994 | } else { | |
995 | g_hash_table_replace(flat_views, NULL, empty_view); | |
996 | flatview_ref(empty_view); | |
997 | } | |
967dc9b1 AK |
998 | } |
999 | ||
1000 | static void flatviews_reset(void) | |
1001 | { | |
1002 | AddressSpace *as; | |
1003 | ||
1004 | if (flat_views) { | |
1005 | g_hash_table_unref(flat_views); | |
1006 | flat_views = NULL; | |
1007 | } | |
1008 | flatviews_init(); | |
1009 | ||
1010 | /* Render unique FVs */ | |
1011 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1012 | MemoryRegion *physmr = memory_region_get_flatview_root(as->root); | |
1013 | ||
1014 | if (g_hash_table_lookup(flat_views, physmr)) { | |
1015 | continue; | |
1016 | } | |
1017 | ||
1018 | generate_memory_topology(physmr); | |
1019 | } | |
1020 | } | |
1021 | ||
1022 | static void address_space_set_flatview(AddressSpace *as) | |
b8af1afb | 1023 | { |
67ace39b | 1024 | FlatView *old_view = address_space_to_flatview(as); |
967dc9b1 AK |
1025 | MemoryRegion *physmr = memory_region_get_flatview_root(as->root); |
1026 | FlatView *new_view = g_hash_table_lookup(flat_views, physmr); | |
1027 | ||
1028 | assert(new_view); | |
1029 | ||
67ace39b AK |
1030 | if (old_view == new_view) { |
1031 | return; | |
1032 | } | |
1033 | ||
1034 | if (old_view) { | |
1035 | flatview_ref(old_view); | |
1036 | } | |
1037 | ||
967dc9b1 | 1038 | flatview_ref(new_view); |
9a62e24f AK |
1039 | |
1040 | if (!QTAILQ_EMPTY(&as->listeners)) { | |
67ace39b AK |
1041 | FlatView tmpview = { .nr = 0 }, *old_view2 = old_view; |
1042 | ||
1043 | if (!old_view2) { | |
1044 | old_view2 = &tmpview; | |
1045 | } | |
1046 | address_space_update_topology_pass(as, old_view2, new_view, false); | |
1047 | address_space_update_topology_pass(as, old_view2, new_view, true); | |
9a62e24f | 1048 | } |
b8af1afb | 1049 | |
374f2981 | 1050 | /* Writes are protected by the BQL. */ |
d73415a3 | 1051 | qatomic_rcu_set(&as->current_map, new_view); |
67ace39b AK |
1052 | if (old_view) { |
1053 | flatview_unref(old_view); | |
1054 | } | |
856d7245 PB |
1055 | |
1056 | /* Note that all the old MemoryRegions are still alive up to this | |
1057 | * point. This relieves most MemoryListeners from the need to | |
1058 | * ref/unref the MemoryRegions they get---unless they use them | |
1059 | * outside the iothread mutex, in which case precise reference | |
1060 | * counting is necessary. | |
1061 | */ | |
67ace39b AK |
1062 | if (old_view) { |
1063 | flatview_unref(old_view); | |
1064 | } | |
093bc2cd AK |
1065 | } |
1066 | ||
202fc01b AK |
1067 | static void address_space_update_topology(AddressSpace *as) |
1068 | { | |
1069 | MemoryRegion *physmr = memory_region_get_flatview_root(as->root); | |
1070 | ||
1071 | flatviews_init(); | |
1072 | if (!g_hash_table_lookup(flat_views, physmr)) { | |
1073 | generate_memory_topology(physmr); | |
1074 | } | |
1075 | address_space_set_flatview(as); | |
1076 | } | |
1077 | ||
4ef4db86 AK |
1078 | void memory_region_transaction_begin(void) |
1079 | { | |
bb880ded | 1080 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
1081 | ++memory_region_transaction_depth; |
1082 | } | |
1083 | ||
1084 | void memory_region_transaction_commit(void) | |
1085 | { | |
0d673e36 AK |
1086 | AddressSpace *as; |
1087 | ||
4ef4db86 | 1088 | assert(memory_region_transaction_depth); |
8d04fb55 JK |
1089 | assert(qemu_mutex_iothread_locked()); |
1090 | ||
4ef4db86 | 1091 | --memory_region_transaction_depth; |
4dc56152 GA |
1092 | if (!memory_region_transaction_depth) { |
1093 | if (memory_region_update_pending) { | |
967dc9b1 AK |
1094 | flatviews_reset(); |
1095 | ||
4dc56152 | 1096 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); |
02e2b95f | 1097 | |
4dc56152 | 1098 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
967dc9b1 | 1099 | address_space_set_flatview(as); |
02218487 | 1100 | address_space_update_ioeventfds(as); |
4dc56152 | 1101 | } |
ade9c1aa | 1102 | memory_region_update_pending = false; |
0b152095 | 1103 | ioeventfd_update_pending = false; |
4dc56152 GA |
1104 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
1105 | } else if (ioeventfd_update_pending) { | |
1106 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1107 | address_space_update_ioeventfds(as); | |
1108 | } | |
ade9c1aa | 1109 | ioeventfd_update_pending = false; |
4dc56152 | 1110 | } |
4dc56152 | 1111 | } |
4ef4db86 AK |
1112 | } |
1113 | ||
545e92e0 AK |
1114 | static void memory_region_destructor_none(MemoryRegion *mr) |
1115 | { | |
1116 | } | |
1117 | ||
1118 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
1119 | { | |
f1060c55 | 1120 | qemu_ram_free(mr->ram_block); |
545e92e0 AK |
1121 | } |
1122 | ||
b4fefef9 PC |
1123 | static bool memory_region_need_escape(char c) |
1124 | { | |
1125 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
1126 | } | |
1127 | ||
1128 | static char *memory_region_escape_name(const char *name) | |
1129 | { | |
1130 | const char *p; | |
1131 | char *escaped, *q; | |
1132 | uint8_t c; | |
1133 | size_t bytes = 0; | |
1134 | ||
1135 | for (p = name; *p; p++) { | |
1136 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
1137 | } | |
1138 | if (bytes == p - name) { | |
1139 | return g_memdup(name, bytes + 1); | |
1140 | } | |
1141 | ||
1142 | escaped = g_malloc(bytes + 1); | |
1143 | for (p = name, q = escaped; *p; p++) { | |
1144 | c = *p; | |
1145 | if (unlikely(memory_region_need_escape(c))) { | |
1146 | *q++ = '\\'; | |
1147 | *q++ = 'x'; | |
1148 | *q++ = "0123456789abcdef"[c >> 4]; | |
1149 | c = "0123456789abcdef"[c & 15]; | |
1150 | } | |
1151 | *q++ = c; | |
1152 | } | |
1153 | *q = 0; | |
1154 | return escaped; | |
1155 | } | |
1156 | ||
3df9d748 AK |
1157 | static void memory_region_do_init(MemoryRegion *mr, |
1158 | Object *owner, | |
1159 | const char *name, | |
1160 | uint64_t size) | |
093bc2cd | 1161 | { |
08dafab4 AK |
1162 | mr->size = int128_make64(size); |
1163 | if (size == UINT64_MAX) { | |
1164 | mr->size = int128_2_64(); | |
1165 | } | |
302fa283 | 1166 | mr->name = g_strdup(name); |
612263cf | 1167 | mr->owner = owner; |
58eaa217 | 1168 | mr->ram_block = NULL; |
b4fefef9 PC |
1169 | |
1170 | if (name) { | |
843ef73a PC |
1171 | char *escaped_name = memory_region_escape_name(name); |
1172 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
612263cf PB |
1173 | |
1174 | if (!owner) { | |
1175 | owner = container_get(qdev_get_machine(), "/unattached"); | |
1176 | } | |
1177 | ||
d2623129 | 1178 | object_property_add_child(owner, name_array, OBJECT(mr)); |
b4fefef9 | 1179 | object_unref(OBJECT(mr)); |
843ef73a PC |
1180 | g_free(name_array); |
1181 | g_free(escaped_name); | |
b4fefef9 PC |
1182 | } |
1183 | } | |
1184 | ||
3df9d748 AK |
1185 | void memory_region_init(MemoryRegion *mr, |
1186 | Object *owner, | |
1187 | const char *name, | |
1188 | uint64_t size) | |
1189 | { | |
1190 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); | |
1191 | memory_region_do_init(mr, owner, name, size); | |
1192 | } | |
1193 | ||
d7bce999 EB |
1194 | static void memory_region_get_container(Object *obj, Visitor *v, |
1195 | const char *name, void *opaque, | |
1196 | Error **errp) | |
409ddd01 PC |
1197 | { |
1198 | MemoryRegion *mr = MEMORY_REGION(obj); | |
ddfb0baa | 1199 | char *path = (char *)""; |
409ddd01 PC |
1200 | |
1201 | if (mr->container) { | |
1202 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1203 | } | |
51e72bc1 | 1204 | visit_type_str(v, name, &path, errp); |
409ddd01 PC |
1205 | if (mr->container) { |
1206 | g_free(path); | |
1207 | } | |
1208 | } | |
1209 | ||
1210 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1211 | const char *part) | |
1212 | { | |
1213 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1214 | ||
1215 | return OBJECT(mr->container); | |
1216 | } | |
1217 | ||
d7bce999 EB |
1218 | static void memory_region_get_priority(Object *obj, Visitor *v, |
1219 | const char *name, void *opaque, | |
1220 | Error **errp) | |
d33382da PC |
1221 | { |
1222 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1223 | int32_t value = mr->priority; | |
1224 | ||
51e72bc1 | 1225 | visit_type_int32(v, name, &value, errp); |
d33382da PC |
1226 | } |
1227 | ||
d7bce999 EB |
1228 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, |
1229 | void *opaque, Error **errp) | |
52aef7bb PC |
1230 | { |
1231 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1232 | uint64_t value = memory_region_size(mr); | |
1233 | ||
51e72bc1 | 1234 | visit_type_uint64(v, name, &value, errp); |
52aef7bb PC |
1235 | } |
1236 | ||
b4fefef9 PC |
1237 | static void memory_region_initfn(Object *obj) |
1238 | { | |
1239 | MemoryRegion *mr = MEMORY_REGION(obj); | |
409ddd01 | 1240 | ObjectProperty *op; |
b4fefef9 PC |
1241 | |
1242 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 1243 | mr->enabled = true; |
5f9a5ea1 | 1244 | mr->romd_mode = true; |
545e92e0 | 1245 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 1246 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 1247 | QTAILQ_INIT(&mr->coalesced); |
409ddd01 PC |
1248 | |
1249 | op = object_property_add(OBJECT(mr), "container", | |
1250 | "link<" TYPE_MEMORY_REGION ">", | |
1251 | memory_region_get_container, | |
1252 | NULL, /* memory_region_set_container */ | |
d2623129 | 1253 | NULL, NULL); |
409ddd01 PC |
1254 | op->resolve = memory_region_resolve_container; |
1255 | ||
64a7b8de | 1256 | object_property_add_uint64_ptr(OBJECT(mr), "addr", |
d2623129 | 1257 | &mr->addr, OBJ_PROP_FLAG_READ); |
d33382da PC |
1258 | object_property_add(OBJECT(mr), "priority", "uint32", |
1259 | memory_region_get_priority, | |
1260 | NULL, /* memory_region_set_priority */ | |
d2623129 | 1261 | NULL, NULL); |
52aef7bb PC |
1262 | object_property_add(OBJECT(mr), "size", "uint64", |
1263 | memory_region_get_size, | |
1264 | NULL, /* memory_region_set_size, */ | |
d2623129 | 1265 | NULL, NULL); |
093bc2cd AK |
1266 | } |
1267 | ||
3df9d748 AK |
1268 | static void iommu_memory_region_initfn(Object *obj) |
1269 | { | |
1270 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1271 | ||
1272 | mr->is_iommu = true; | |
1273 | } | |
1274 | ||
b018ddf6 PB |
1275 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
1276 | unsigned size) | |
1277 | { | |
1278 | #ifdef DEBUG_UNASSIGNED | |
1279 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1280 | #endif | |
68a7439a | 1281 | return 0; |
b018ddf6 PB |
1282 | } |
1283 | ||
1284 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1285 | uint64_t val, unsigned size) | |
1286 | { | |
1287 | #ifdef DEBUG_UNASSIGNED | |
1288 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1289 | #endif | |
b018ddf6 PB |
1290 | } |
1291 | ||
d197063f | 1292 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
8372d383 PM |
1293 | unsigned size, bool is_write, |
1294 | MemTxAttrs attrs) | |
d197063f PB |
1295 | { |
1296 | return false; | |
1297 | } | |
1298 | ||
1299 | const MemoryRegionOps unassigned_mem_ops = { | |
1300 | .valid.accepts = unassigned_mem_accepts, | |
1301 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1302 | }; | |
1303 | ||
4a2e242b AW |
1304 | static uint64_t memory_region_ram_device_read(void *opaque, |
1305 | hwaddr addr, unsigned size) | |
1306 | { | |
1307 | MemoryRegion *mr = opaque; | |
1308 | uint64_t data = (uint64_t)~0; | |
1309 | ||
1310 | switch (size) { | |
1311 | case 1: | |
1312 | data = *(uint8_t *)(mr->ram_block->host + addr); | |
1313 | break; | |
1314 | case 2: | |
1315 | data = *(uint16_t *)(mr->ram_block->host + addr); | |
1316 | break; | |
1317 | case 4: | |
1318 | data = *(uint32_t *)(mr->ram_block->host + addr); | |
1319 | break; | |
1320 | case 8: | |
1321 | data = *(uint64_t *)(mr->ram_block->host + addr); | |
1322 | break; | |
1323 | } | |
1324 | ||
1325 | trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size); | |
1326 | ||
1327 | return data; | |
1328 | } | |
1329 | ||
1330 | static void memory_region_ram_device_write(void *opaque, hwaddr addr, | |
1331 | uint64_t data, unsigned size) | |
1332 | { | |
1333 | MemoryRegion *mr = opaque; | |
1334 | ||
1335 | trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size); | |
1336 | ||
1337 | switch (size) { | |
1338 | case 1: | |
1339 | *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data; | |
1340 | break; | |
1341 | case 2: | |
1342 | *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data; | |
1343 | break; | |
1344 | case 4: | |
1345 | *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data; | |
1346 | break; | |
1347 | case 8: | |
1348 | *(uint64_t *)(mr->ram_block->host + addr) = data; | |
1349 | break; | |
1350 | } | |
1351 | } | |
1352 | ||
1353 | static const MemoryRegionOps ram_device_mem_ops = { | |
1354 | .read = memory_region_ram_device_read, | |
1355 | .write = memory_region_ram_device_write, | |
c99a29e7 | 1356 | .endianness = DEVICE_HOST_ENDIAN, |
4a2e242b AW |
1357 | .valid = { |
1358 | .min_access_size = 1, | |
1359 | .max_access_size = 8, | |
1360 | .unaligned = true, | |
1361 | }, | |
1362 | .impl = { | |
1363 | .min_access_size = 1, | |
1364 | .max_access_size = 8, | |
1365 | .unaligned = true, | |
1366 | }, | |
1367 | }; | |
1368 | ||
d2702032 PB |
1369 | bool memory_region_access_valid(MemoryRegion *mr, |
1370 | hwaddr addr, | |
1371 | unsigned size, | |
6d7b9a6c PM |
1372 | bool is_write, |
1373 | MemTxAttrs attrs) | |
093bc2cd | 1374 | { |
5d971f9e MT |
1375 | if (mr->ops->valid.accepts |
1376 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) { | |
21786c7e PMD |
1377 | qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr " |
1378 | "0x%" HWADDR_PRIX ", size %u, " | |
1379 | "region '%s', reason: rejected\n", | |
1380 | addr, size, memory_region_name(mr)); | |
093bc2cd AK |
1381 | return false; |
1382 | } | |
1383 | ||
5d971f9e | 1384 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
21786c7e PMD |
1385 | qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr " |
1386 | "0x%" HWADDR_PRIX ", size %u, " | |
1387 | "region '%s', reason: unaligned\n", | |
1388 | addr, size, memory_region_name(mr)); | |
5d971f9e | 1389 | return false; |
a014ed07 PB |
1390 | } |
1391 | ||
5d971f9e | 1392 | /* Treat zero as compatibility all valid */ |
a014ed07 | 1393 | if (!mr->ops->valid.max_access_size) { |
5d971f9e | 1394 | return true; |
a014ed07 PB |
1395 | } |
1396 | ||
5d971f9e MT |
1397 | if (size > mr->ops->valid.max_access_size |
1398 | || size < mr->ops->valid.min_access_size) { | |
21786c7e PMD |
1399 | qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr " |
1400 | "0x%" HWADDR_PRIX ", size %u, " | |
1401 | "region '%s', reason: invalid size " | |
1402 | "(min:%u max:%u)\n", | |
1403 | addr, size, memory_region_name(mr), | |
1404 | mr->ops->valid.min_access_size, | |
1405 | mr->ops->valid.max_access_size); | |
5d971f9e | 1406 | return false; |
093bc2cd AK |
1407 | } |
1408 | return true; | |
1409 | } | |
1410 | ||
cc05c43a PM |
1411 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, |
1412 | hwaddr addr, | |
1413 | uint64_t *pval, | |
1414 | unsigned size, | |
1415 | MemTxAttrs attrs) | |
093bc2cd | 1416 | { |
cc05c43a | 1417 | *pval = 0; |
093bc2cd | 1418 | |
ce5d2f33 | 1419 | if (mr->ops->read) { |
cc05c43a PM |
1420 | return access_with_adjusted_size(addr, pval, size, |
1421 | mr->ops->impl.min_access_size, | |
1422 | mr->ops->impl.max_access_size, | |
1423 | memory_region_read_accessor, | |
1424 | mr, attrs); | |
62a0db94 | 1425 | } else { |
cc05c43a PM |
1426 | return access_with_adjusted_size(addr, pval, size, |
1427 | mr->ops->impl.min_access_size, | |
1428 | mr->ops->impl.max_access_size, | |
1429 | memory_region_read_with_attrs_accessor, | |
1430 | mr, attrs); | |
74901c3b | 1431 | } |
093bc2cd AK |
1432 | } |
1433 | ||
3b643495 PM |
1434 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, |
1435 | hwaddr addr, | |
1436 | uint64_t *pval, | |
e67c9046 | 1437 | MemOp op, |
3b643495 | 1438 | MemTxAttrs attrs) |
a621f38d | 1439 | { |
e67c9046 | 1440 | unsigned size = memop_size(op); |
cc05c43a PM |
1441 | MemTxResult r; |
1442 | ||
a3c20e91 | 1443 | fuzz_dma_read_cb(addr, size, mr, false); |
6d7b9a6c | 1444 | if (!memory_region_access_valid(mr, addr, size, false, attrs)) { |
791af8c8 | 1445 | *pval = unassigned_mem_read(mr, addr, size); |
cc05c43a | 1446 | return MEMTX_DECODE_ERROR; |
791af8c8 | 1447 | } |
a621f38d | 1448 | |
cc05c43a | 1449 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); |
9bf825bf | 1450 | adjust_endianness(mr, pval, op); |
cc05c43a | 1451 | return r; |
a621f38d | 1452 | } |
093bc2cd | 1453 | |
8c56c1a5 PF |
1454 | /* Return true if an eventfd was signalled */ |
1455 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1456 | hwaddr addr, | |
1457 | uint64_t data, | |
1458 | unsigned size, | |
1459 | MemTxAttrs attrs) | |
1460 | { | |
1461 | MemoryRegionIoeventfd ioeventfd = { | |
1462 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1463 | .data = data, | |
1464 | }; | |
1465 | unsigned i; | |
1466 | ||
1467 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1468 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1469 | ioeventfd.e = mr->ioeventfds[i].e; | |
1470 | ||
73bb753d | 1471 | if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) { |
8c56c1a5 PF |
1472 | event_notifier_set(ioeventfd.e); |
1473 | return true; | |
1474 | } | |
1475 | } | |
1476 | ||
1477 | return false; | |
1478 | } | |
1479 | ||
3b643495 PM |
1480 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, |
1481 | hwaddr addr, | |
1482 | uint64_t data, | |
e67c9046 | 1483 | MemOp op, |
3b643495 | 1484 | MemTxAttrs attrs) |
a621f38d | 1485 | { |
e67c9046 TN |
1486 | unsigned size = memop_size(op); |
1487 | ||
6d7b9a6c | 1488 | if (!memory_region_access_valid(mr, addr, size, true, attrs)) { |
b018ddf6 | 1489 | unassigned_mem_write(mr, addr, data, size); |
cc05c43a | 1490 | return MEMTX_DECODE_ERROR; |
093bc2cd AK |
1491 | } |
1492 | ||
9bf825bf | 1493 | adjust_endianness(mr, &data, op); |
a621f38d | 1494 | |
8c56c1a5 PF |
1495 | if ((!kvm_eventfds_enabled()) && |
1496 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1497 | return MEMTX_OK; | |
1498 | } | |
1499 | ||
ce5d2f33 | 1500 | if (mr->ops->write) { |
cc05c43a PM |
1501 | return access_with_adjusted_size(addr, &data, size, |
1502 | mr->ops->impl.min_access_size, | |
1503 | mr->ops->impl.max_access_size, | |
1504 | memory_region_write_accessor, mr, | |
1505 | attrs); | |
62a0db94 | 1506 | } else { |
cc05c43a PM |
1507 | return |
1508 | access_with_adjusted_size(addr, &data, size, | |
1509 | mr->ops->impl.min_access_size, | |
1510 | mr->ops->impl.max_access_size, | |
1511 | memory_region_write_with_attrs_accessor, | |
1512 | mr, attrs); | |
74901c3b | 1513 | } |
093bc2cd AK |
1514 | } |
1515 | ||
093bc2cd | 1516 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1517 | Object *owner, |
093bc2cd AK |
1518 | const MemoryRegionOps *ops, |
1519 | void *opaque, | |
1520 | const char *name, | |
1521 | uint64_t size) | |
1522 | { | |
2c9b15ca | 1523 | memory_region_init(mr, owner, name, size); |
6d6d2abf | 1524 | mr->ops = ops ? ops : &unassigned_mem_ops; |
093bc2cd | 1525 | mr->opaque = opaque; |
14a3c10a | 1526 | mr->terminates = true; |
093bc2cd AK |
1527 | } |
1528 | ||
1cfe48c1 PM |
1529 | void memory_region_init_ram_nomigrate(MemoryRegion *mr, |
1530 | Object *owner, | |
1531 | const char *name, | |
1532 | uint64_t size, | |
1533 | Error **errp) | |
06329cce MA |
1534 | { |
1535 | memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp); | |
1536 | } | |
1537 | ||
1538 | void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr, | |
1539 | Object *owner, | |
1540 | const char *name, | |
1541 | uint64_t size, | |
1542 | bool share, | |
1543 | Error **errp) | |
093bc2cd | 1544 | { |
1cd3d492 | 1545 | Error *err = NULL; |
2c9b15ca | 1546 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1547 | mr->ram = true; |
14a3c10a | 1548 | mr->terminates = true; |
545e92e0 | 1549 | mr->destructor = memory_region_destructor_ram; |
1cd3d492 | 1550 | mr->ram_block = qemu_ram_alloc(size, share, mr, &err); |
1cd3d492 IM |
1551 | if (err) { |
1552 | mr->size = int128_zero(); | |
1553 | object_unparent(OBJECT(mr)); | |
1554 | error_propagate(errp, err); | |
1555 | } | |
0b183fc8 PB |
1556 | } |
1557 | ||
60786ef3 MT |
1558 | void memory_region_init_resizeable_ram(MemoryRegion *mr, |
1559 | Object *owner, | |
1560 | const char *name, | |
1561 | uint64_t size, | |
1562 | uint64_t max_size, | |
1563 | void (*resized)(const char*, | |
1564 | uint64_t length, | |
1565 | void *host), | |
1566 | Error **errp) | |
1567 | { | |
1cd3d492 | 1568 | Error *err = NULL; |
60786ef3 MT |
1569 | memory_region_init(mr, owner, name, size); |
1570 | mr->ram = true; | |
1571 | mr->terminates = true; | |
1572 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 | 1573 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, |
1cd3d492 | 1574 | mr, &err); |
1cd3d492 IM |
1575 | if (err) { |
1576 | mr->size = int128_zero(); | |
1577 | object_unparent(OBJECT(mr)); | |
1578 | error_propagate(errp, err); | |
1579 | } | |
60786ef3 MT |
1580 | } |
1581 | ||
d5dbde46 | 1582 | #ifdef CONFIG_POSIX |
0b183fc8 PB |
1583 | void memory_region_init_ram_from_file(MemoryRegion *mr, |
1584 | struct Object *owner, | |
1585 | const char *name, | |
1586 | uint64_t size, | |
98376843 | 1587 | uint64_t align, |
cbfc0171 | 1588 | uint32_t ram_flags, |
7f56e740 PB |
1589 | const char *path, |
1590 | Error **errp) | |
0b183fc8 | 1591 | { |
1cd3d492 | 1592 | Error *err = NULL; |
0b183fc8 PB |
1593 | memory_region_init(mr, owner, name, size); |
1594 | mr->ram = true; | |
1595 | mr->terminates = true; | |
1596 | mr->destructor = memory_region_destructor_ram; | |
98376843 | 1597 | mr->align = align; |
1cd3d492 | 1598 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err); |
1cd3d492 IM |
1599 | if (err) { |
1600 | mr->size = int128_zero(); | |
1601 | object_unparent(OBJECT(mr)); | |
1602 | error_propagate(errp, err); | |
1603 | } | |
093bc2cd | 1604 | } |
fea617c5 MAL |
1605 | |
1606 | void memory_region_init_ram_from_fd(MemoryRegion *mr, | |
1607 | struct Object *owner, | |
1608 | const char *name, | |
1609 | uint64_t size, | |
1610 | bool share, | |
1611 | int fd, | |
1612 | Error **errp) | |
1613 | { | |
1cd3d492 | 1614 | Error *err = NULL; |
fea617c5 MAL |
1615 | memory_region_init(mr, owner, name, size); |
1616 | mr->ram = true; | |
1617 | mr->terminates = true; | |
1618 | mr->destructor = memory_region_destructor_ram; | |
cbfc0171 JH |
1619 | mr->ram_block = qemu_ram_alloc_from_fd(size, mr, |
1620 | share ? RAM_SHARED : 0, | |
1cd3d492 | 1621 | fd, &err); |
1cd3d492 IM |
1622 | if (err) { |
1623 | mr->size = int128_zero(); | |
1624 | object_unparent(OBJECT(mr)); | |
1625 | error_propagate(errp, err); | |
1626 | } | |
fea617c5 | 1627 | } |
0b183fc8 | 1628 | #endif |
093bc2cd AK |
1629 | |
1630 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1631 | Object *owner, |
093bc2cd AK |
1632 | const char *name, |
1633 | uint64_t size, | |
1634 | void *ptr) | |
1635 | { | |
2c9b15ca | 1636 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1637 | mr->ram = true; |
14a3c10a | 1638 | mr->terminates = true; |
fc3e7665 | 1639 | mr->destructor = memory_region_destructor_ram; |
ef701d7b HT |
1640 | |
1641 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1642 | assert(ptr != NULL); | |
8e41fb63 | 1643 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); |
093bc2cd AK |
1644 | } |
1645 | ||
21e00fa5 AW |
1646 | void memory_region_init_ram_device_ptr(MemoryRegion *mr, |
1647 | Object *owner, | |
1648 | const char *name, | |
1649 | uint64_t size, | |
1650 | void *ptr) | |
e4dc3f59 | 1651 | { |
2ddb89b0 BS |
1652 | memory_region_init(mr, owner, name, size); |
1653 | mr->ram = true; | |
1654 | mr->terminates = true; | |
21e00fa5 | 1655 | mr->ram_device = true; |
4a2e242b AW |
1656 | mr->ops = &ram_device_mem_ops; |
1657 | mr->opaque = mr; | |
2ddb89b0 | 1658 | mr->destructor = memory_region_destructor_ram; |
0a2949e0 | 1659 | |
2ddb89b0 BS |
1660 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ |
1661 | assert(ptr != NULL); | |
1662 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); | |
e4dc3f59 ND |
1663 | } |
1664 | ||
093bc2cd | 1665 | void memory_region_init_alias(MemoryRegion *mr, |
2c9b15ca | 1666 | Object *owner, |
093bc2cd AK |
1667 | const char *name, |
1668 | MemoryRegion *orig, | |
a8170e5e | 1669 | hwaddr offset, |
093bc2cd AK |
1670 | uint64_t size) |
1671 | { | |
2c9b15ca | 1672 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1673 | mr->alias = orig; |
1674 | mr->alias_offset = offset; | |
1675 | } | |
1676 | ||
b59821a9 PM |
1677 | void memory_region_init_rom_nomigrate(MemoryRegion *mr, |
1678 | struct Object *owner, | |
1679 | const char *name, | |
1680 | uint64_t size, | |
1681 | Error **errp) | |
a1777f7f | 1682 | { |
83696c8f | 1683 | memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp); |
a1777f7f | 1684 | mr->readonly = true; |
a1777f7f PM |
1685 | } |
1686 | ||
b59821a9 PM |
1687 | void memory_region_init_rom_device_nomigrate(MemoryRegion *mr, |
1688 | Object *owner, | |
1689 | const MemoryRegionOps *ops, | |
1690 | void *opaque, | |
1691 | const char *name, | |
1692 | uint64_t size, | |
1693 | Error **errp) | |
d0a9b5bc | 1694 | { |
1cd3d492 | 1695 | Error *err = NULL; |
39e0b03d | 1696 | assert(ops); |
2c9b15ca | 1697 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1698 | mr->ops = ops; |
75f5941c | 1699 | mr->opaque = opaque; |
d0a9b5bc | 1700 | mr->terminates = true; |
75c578dc | 1701 | mr->rom_device = true; |
58268c8d | 1702 | mr->destructor = memory_region_destructor_ram; |
1cd3d492 IM |
1703 | mr->ram_block = qemu_ram_alloc(size, false, mr, &err); |
1704 | if (err) { | |
1705 | mr->size = int128_zero(); | |
1706 | object_unparent(OBJECT(mr)); | |
1707 | error_propagate(errp, err); | |
1708 | } | |
d0a9b5bc AK |
1709 | } |
1710 | ||
1221a474 AK |
1711 | void memory_region_init_iommu(void *_iommu_mr, |
1712 | size_t instance_size, | |
1713 | const char *mrtypename, | |
2c9b15ca | 1714 | Object *owner, |
30951157 AK |
1715 | const char *name, |
1716 | uint64_t size) | |
1717 | { | |
1221a474 | 1718 | struct IOMMUMemoryRegion *iommu_mr; |
3df9d748 AK |
1719 | struct MemoryRegion *mr; |
1720 | ||
1221a474 AK |
1721 | object_initialize(_iommu_mr, instance_size, mrtypename); |
1722 | mr = MEMORY_REGION(_iommu_mr); | |
3df9d748 AK |
1723 | memory_region_do_init(mr, owner, name, size); |
1724 | iommu_mr = IOMMU_MEMORY_REGION(mr); | |
30951157 | 1725 | mr->terminates = true; /* then re-forwards */ |
3df9d748 AK |
1726 | QLIST_INIT(&iommu_mr->iommu_notify); |
1727 | iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE; | |
30951157 AK |
1728 | } |
1729 | ||
b4fefef9 | 1730 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1731 | { |
b4fefef9 PC |
1732 | MemoryRegion *mr = MEMORY_REGION(obj); |
1733 | ||
2e2b8eb7 PB |
1734 | assert(!mr->container); |
1735 | ||
1736 | /* We know the region is not visible in any address space (it | |
1737 | * does not have a container and cannot be a root either because | |
1738 | * it has no references, so we can blindly clear mr->enabled. | |
1739 | * memory_region_set_enabled instead could trigger a transaction | |
1740 | * and cause an infinite loop. | |
1741 | */ | |
1742 | mr->enabled = false; | |
1743 | memory_region_transaction_begin(); | |
1744 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1745 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1746 | memory_region_del_subregion(mr, subregion); | |
1747 | } | |
1748 | memory_region_transaction_commit(); | |
1749 | ||
545e92e0 | 1750 | mr->destructor(mr); |
093bc2cd | 1751 | memory_region_clear_coalescing(mr); |
302fa283 | 1752 | g_free((char *)mr->name); |
7267c094 | 1753 | g_free(mr->ioeventfds); |
093bc2cd AK |
1754 | } |
1755 | ||
803c0816 PB |
1756 | Object *memory_region_owner(MemoryRegion *mr) |
1757 | { | |
22a893e4 PB |
1758 | Object *obj = OBJECT(mr); |
1759 | return obj->parent; | |
803c0816 PB |
1760 | } |
1761 | ||
46637be2 PB |
1762 | void memory_region_ref(MemoryRegion *mr) |
1763 | { | |
22a893e4 PB |
1764 | /* MMIO callbacks most likely will access data that belongs |
1765 | * to the owner, hence the need to ref/unref the owner whenever | |
1766 | * the memory region is in use. | |
1767 | * | |
1768 | * The memory region is a child of its owner. As long as the | |
1769 | * owner doesn't call unparent itself on the memory region, | |
1770 | * ref-ing the owner will also keep the memory region alive. | |
612263cf PB |
1771 | * Memory regions without an owner are supposed to never go away; |
1772 | * we do not ref/unref them because it slows down DMA sensibly. | |
22a893e4 | 1773 | */ |
612263cf PB |
1774 | if (mr && mr->owner) { |
1775 | object_ref(mr->owner); | |
46637be2 PB |
1776 | } |
1777 | } | |
1778 | ||
1779 | void memory_region_unref(MemoryRegion *mr) | |
1780 | { | |
612263cf PB |
1781 | if (mr && mr->owner) { |
1782 | object_unref(mr->owner); | |
46637be2 PB |
1783 | } |
1784 | } | |
1785 | ||
093bc2cd AK |
1786 | uint64_t memory_region_size(MemoryRegion *mr) |
1787 | { | |
08dafab4 AK |
1788 | if (int128_eq(mr->size, int128_2_64())) { |
1789 | return UINT64_MAX; | |
1790 | } | |
1791 | return int128_get64(mr->size); | |
093bc2cd AK |
1792 | } |
1793 | ||
5d546d4b | 1794 | const char *memory_region_name(const MemoryRegion *mr) |
8991c79b | 1795 | { |
d1dd32af PC |
1796 | if (!mr->name) { |
1797 | ((MemoryRegion *)mr)->name = | |
7a309cc9 | 1798 | g_strdup(object_get_canonical_path_component(OBJECT(mr))); |
d1dd32af | 1799 | } |
302fa283 | 1800 | return mr->name; |
8991c79b AK |
1801 | } |
1802 | ||
21e00fa5 | 1803 | bool memory_region_is_ram_device(MemoryRegion *mr) |
e4dc3f59 | 1804 | { |
21e00fa5 | 1805 | return mr->ram_device; |
e4dc3f59 ND |
1806 | } |
1807 | ||
2d1a35be | 1808 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) |
55043ba3 | 1809 | { |
6f6a5ef3 | 1810 | uint8_t mask = mr->dirty_log_mask; |
1370d61a ZY |
1811 | RAMBlock *rb = mr->ram_block; |
1812 | ||
1813 | if (global_dirty_log && ((rb && qemu_ram_is_migratable(rb)) || | |
1814 | memory_region_is_iommu(mr))) { | |
6f6a5ef3 PB |
1815 | mask |= (1 << DIRTY_MEMORY_MIGRATION); |
1816 | } | |
0a2949e0 PB |
1817 | |
1818 | if (tcg_enabled() && rb) { | |
1819 | /* TCG only cares about dirty memory logging for RAM, not IOMMU. */ | |
1820 | mask |= (1 << DIRTY_MEMORY_CODE); | |
1821 | } | |
6f6a5ef3 | 1822 | return mask; |
55043ba3 AK |
1823 | } |
1824 | ||
2d1a35be PB |
1825 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) |
1826 | { | |
1827 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1828 | } | |
1829 | ||
549d4005 EA |
1830 | static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr, |
1831 | Error **errp) | |
5bf3d319 PX |
1832 | { |
1833 | IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE; | |
1834 | IOMMUNotifier *iommu_notifier; | |
1221a474 | 1835 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
549d4005 | 1836 | int ret = 0; |
5bf3d319 | 1837 | |
3df9d748 | 1838 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { |
5bf3d319 PX |
1839 | flags |= iommu_notifier->notifier_flags; |
1840 | } | |
1841 | ||
1221a474 | 1842 | if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) { |
549d4005 EA |
1843 | ret = imrc->notify_flag_changed(iommu_mr, |
1844 | iommu_mr->iommu_notify_flags, | |
1845 | flags, errp); | |
5bf3d319 PX |
1846 | } |
1847 | ||
549d4005 EA |
1848 | if (!ret) { |
1849 | iommu_mr->iommu_notify_flags = flags; | |
1850 | } | |
1851 | return ret; | |
5bf3d319 PX |
1852 | } |
1853 | ||
457f8cbb BB |
1854 | int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr, |
1855 | uint64_t page_size_mask, | |
1856 | Error **errp) | |
1857 | { | |
1858 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
1859 | int ret = 0; | |
1860 | ||
1861 | if (imrc->iommu_set_page_size_mask) { | |
1862 | ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp); | |
1863 | } | |
1864 | return ret; | |
1865 | } | |
1866 | ||
549d4005 EA |
1867 | int memory_region_register_iommu_notifier(MemoryRegion *mr, |
1868 | IOMMUNotifier *n, Error **errp) | |
06866575 | 1869 | { |
3df9d748 | 1870 | IOMMUMemoryRegion *iommu_mr; |
549d4005 | 1871 | int ret; |
3df9d748 | 1872 | |
efcd38c5 | 1873 | if (mr->alias) { |
549d4005 | 1874 | return memory_region_register_iommu_notifier(mr->alias, n, errp); |
efcd38c5 JW |
1875 | } |
1876 | ||
cdb30812 | 1877 | /* We need to register for at least one bitfield */ |
3df9d748 | 1878 | iommu_mr = IOMMU_MEMORY_REGION(mr); |
cdb30812 | 1879 | assert(n->notifier_flags != IOMMU_NOTIFIER_NONE); |
698feb5e | 1880 | assert(n->start <= n->end); |
cb1efcf4 PM |
1881 | assert(n->iommu_idx >= 0 && |
1882 | n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr)); | |
1883 | ||
3df9d748 | 1884 | QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node); |
549d4005 EA |
1885 | ret = memory_region_update_iommu_notify_flags(iommu_mr, errp); |
1886 | if (ret) { | |
1887 | QLIST_REMOVE(n, node); | |
1888 | } | |
1889 | return ret; | |
06866575 DG |
1890 | } |
1891 | ||
3df9d748 | 1892 | uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr) |
a788f227 | 1893 | { |
1221a474 AK |
1894 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
1895 | ||
1896 | if (imrc->get_min_page_size) { | |
1897 | return imrc->get_min_page_size(iommu_mr); | |
f682e9c2 AK |
1898 | } |
1899 | return TARGET_PAGE_SIZE; | |
1900 | } | |
1901 | ||
3df9d748 | 1902 | void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n) |
f682e9c2 | 1903 | { |
3df9d748 | 1904 | MemoryRegion *mr = MEMORY_REGION(iommu_mr); |
1221a474 | 1905 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
f682e9c2 | 1906 | hwaddr addr, granularity; |
a788f227 DG |
1907 | IOMMUTLBEntry iotlb; |
1908 | ||
faa362e3 | 1909 | /* If the IOMMU has its own replay callback, override */ |
1221a474 AK |
1910 | if (imrc->replay) { |
1911 | imrc->replay(iommu_mr, n); | |
faa362e3 PX |
1912 | return; |
1913 | } | |
1914 | ||
3df9d748 | 1915 | granularity = memory_region_iommu_get_min_page_size(iommu_mr); |
f682e9c2 | 1916 | |
a788f227 | 1917 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { |
2c91bcf2 | 1918 | iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx); |
a788f227 DG |
1919 | if (iotlb.perm != IOMMU_NONE) { |
1920 | n->notify(n, &iotlb); | |
1921 | } | |
1922 | ||
1923 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1924 | * infinite loop here. This should catch such a wraparound */ | |
1925 | if ((addr + granularity) < addr) { | |
1926 | break; | |
1927 | } | |
1928 | } | |
1929 | } | |
1930 | ||
cdb30812 PX |
1931 | void memory_region_unregister_iommu_notifier(MemoryRegion *mr, |
1932 | IOMMUNotifier *n) | |
06866575 | 1933 | { |
3df9d748 AK |
1934 | IOMMUMemoryRegion *iommu_mr; |
1935 | ||
efcd38c5 JW |
1936 | if (mr->alias) { |
1937 | memory_region_unregister_iommu_notifier(mr->alias, n); | |
1938 | return; | |
1939 | } | |
cdb30812 | 1940 | QLIST_REMOVE(n, node); |
3df9d748 | 1941 | iommu_mr = IOMMU_MEMORY_REGION(mr); |
549d4005 | 1942 | memory_region_update_iommu_notify_flags(iommu_mr, NULL); |
06866575 DG |
1943 | } |
1944 | ||
3b5ebf85 | 1945 | void memory_region_notify_iommu_one(IOMMUNotifier *notifier, |
5039caf3 | 1946 | IOMMUTLBEvent *event) |
06866575 | 1947 | { |
5039caf3 | 1948 | IOMMUTLBEntry *entry = &event->entry; |
03c7140c | 1949 | hwaddr entry_end = entry->iova + entry->addr_mask; |
1804857f | 1950 | IOMMUTLBEntry tmp = *entry; |
cdb30812 | 1951 | |
5039caf3 EP |
1952 | if (event->type == IOMMU_NOTIFIER_UNMAP) { |
1953 | assert(entry->perm == IOMMU_NONE); | |
1954 | } | |
1955 | ||
bd2bfa4c PX |
1956 | /* |
1957 | * Skip the notification if the notification does not overlap | |
1958 | * with registered range. | |
1959 | */ | |
03c7140c | 1960 | if (notifier->start > entry_end || notifier->end < entry->iova) { |
bd2bfa4c PX |
1961 | return; |
1962 | } | |
cdb30812 | 1963 | |
1804857f EP |
1964 | if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) { |
1965 | /* Crop (iova, addr_mask) to range */ | |
1966 | tmp.iova = MAX(tmp.iova, notifier->start); | |
1967 | tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova; | |
1968 | } else { | |
1969 | assert(entry->iova >= notifier->start && entry_end <= notifier->end); | |
1970 | } | |
03c7140c | 1971 | |
5039caf3 | 1972 | if (event->type & notifier->notifier_flags) { |
1804857f | 1973 | notifier->notify(notifier, &tmp); |
bd2bfa4c PX |
1974 | } |
1975 | } | |
1976 | ||
3df9d748 | 1977 | void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, |
cb1efcf4 | 1978 | int iommu_idx, |
5039caf3 | 1979 | IOMMUTLBEvent event) |
bd2bfa4c PX |
1980 | { |
1981 | IOMMUNotifier *iommu_notifier; | |
1982 | ||
3df9d748 | 1983 | assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr))); |
bd2bfa4c | 1984 | |
3df9d748 | 1985 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { |
cb1efcf4 | 1986 | if (iommu_notifier->iommu_idx == iommu_idx) { |
5039caf3 | 1987 | memory_region_notify_iommu_one(iommu_notifier, &event); |
cb1efcf4 | 1988 | } |
cdb30812 | 1989 | } |
06866575 DG |
1990 | } |
1991 | ||
f1334de6 AK |
1992 | int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr, |
1993 | enum IOMMUMemoryRegionAttr attr, | |
1994 | void *data) | |
1995 | { | |
1996 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
1997 | ||
1998 | if (!imrc->get_attr) { | |
1999 | return -EINVAL; | |
2000 | } | |
2001 | ||
2002 | return imrc->get_attr(iommu_mr, attr, data); | |
2003 | } | |
2004 | ||
21f40209 PM |
2005 | int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr, |
2006 | MemTxAttrs attrs) | |
2007 | { | |
2008 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
2009 | ||
2010 | if (!imrc->attrs_to_index) { | |
2011 | return 0; | |
2012 | } | |
2013 | ||
2014 | return imrc->attrs_to_index(iommu_mr, attrs); | |
2015 | } | |
2016 | ||
2017 | int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr) | |
2018 | { | |
2019 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
2020 | ||
2021 | if (!imrc->num_indexes) { | |
2022 | return 1; | |
2023 | } | |
2024 | ||
2025 | return imrc->num_indexes(iommu_mr); | |
2026 | } | |
2027 | ||
093bc2cd AK |
2028 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
2029 | { | |
5a583347 | 2030 | uint8_t mask = 1 << client; |
deb809ed | 2031 | uint8_t old_logging; |
5a583347 | 2032 | |
dbddac6d | 2033 | assert(client == DIRTY_MEMORY_VGA); |
deb809ed PB |
2034 | old_logging = mr->vga_logging_count; |
2035 | mr->vga_logging_count += log ? 1 : -1; | |
2036 | if (!!old_logging == !!mr->vga_logging_count) { | |
2037 | return; | |
2038 | } | |
2039 | ||
59023ef4 | 2040 | memory_region_transaction_begin(); |
5a583347 | 2041 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 2042 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2043 | memory_region_transaction_commit(); |
093bc2cd AK |
2044 | } |
2045 | ||
a8170e5e AK |
2046 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
2047 | hwaddr size) | |
093bc2cd | 2048 | { |
8e41fb63 FZ |
2049 | assert(mr->ram_block); |
2050 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
2051 | size, | |
58d2707e | 2052 | memory_region_get_dirty_log_mask(mr)); |
093bc2cd AK |
2053 | } |
2054 | ||
0fe1eca7 | 2055 | static void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
093bc2cd | 2056 | { |
0a752eee | 2057 | MemoryListener *listener; |
0d673e36 | 2058 | AddressSpace *as; |
0a752eee | 2059 | FlatView *view; |
5a583347 AK |
2060 | FlatRange *fr; |
2061 | ||
0a752eee PB |
2062 | /* If the same address space has multiple log_sync listeners, we |
2063 | * visit that address space's FlatView multiple times. But because | |
2064 | * log_sync listeners are rare, it's still cheaper than walking each | |
2065 | * address space once. | |
2066 | */ | |
2067 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2068 | if (!listener->log_sync) { | |
2069 | continue; | |
2070 | } | |
2071 | as = listener->address_space; | |
2072 | view = address_space_get_flatview(as); | |
99e86347 | 2073 | FOR_EACH_FLAT_RANGE(fr, view) { |
3ebb1817 | 2074 | if (fr->dirty_log_mask && (!mr || fr->mr == mr)) { |
16620684 | 2075 | MemoryRegionSection mrs = section_from_flat_range(fr, view); |
0a752eee | 2076 | listener->log_sync(listener, &mrs); |
0d673e36 | 2077 | } |
5a583347 | 2078 | } |
856d7245 | 2079 | flatview_unref(view); |
5a583347 | 2080 | } |
093bc2cd AK |
2081 | } |
2082 | ||
077874e0 PX |
2083 | void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start, |
2084 | hwaddr len) | |
2085 | { | |
2086 | MemoryRegionSection mrs; | |
2087 | MemoryListener *listener; | |
2088 | AddressSpace *as; | |
2089 | FlatView *view; | |
2090 | FlatRange *fr; | |
2091 | hwaddr sec_start, sec_end, sec_size; | |
2092 | ||
2093 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2094 | if (!listener->log_clear) { | |
2095 | continue; | |
2096 | } | |
2097 | as = listener->address_space; | |
2098 | view = address_space_get_flatview(as); | |
2099 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2100 | if (!fr->dirty_log_mask || fr->mr != mr) { | |
2101 | /* | |
2102 | * Clear dirty bitmap operation only applies to those | |
2103 | * regions whose dirty logging is at least enabled | |
2104 | */ | |
2105 | continue; | |
2106 | } | |
2107 | ||
2108 | mrs = section_from_flat_range(fr, view); | |
2109 | ||
2110 | sec_start = MAX(mrs.offset_within_region, start); | |
2111 | sec_end = mrs.offset_within_region + int128_get64(mrs.size); | |
2112 | sec_end = MIN(sec_end, start + len); | |
2113 | ||
2114 | if (sec_start >= sec_end) { | |
2115 | /* | |
2116 | * If this memory region section has no intersection | |
2117 | * with the requested range, skip. | |
2118 | */ | |
2119 | continue; | |
2120 | } | |
2121 | ||
2122 | /* Valid case; shrink the section if needed */ | |
2123 | mrs.offset_within_address_space += | |
2124 | sec_start - mrs.offset_within_region; | |
2125 | mrs.offset_within_region = sec_start; | |
2126 | sec_size = sec_end - sec_start; | |
2127 | mrs.size = int128_make64(sec_size); | |
2128 | listener->log_clear(listener, &mrs); | |
2129 | } | |
2130 | flatview_unref(view); | |
2131 | } | |
2132 | } | |
2133 | ||
0fe1eca7 PB |
2134 | DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr, |
2135 | hwaddr addr, | |
2136 | hwaddr size, | |
2137 | unsigned client) | |
2138 | { | |
9458a9a1 | 2139 | DirtyBitmapSnapshot *snapshot; |
0fe1eca7 PB |
2140 | assert(mr->ram_block); |
2141 | memory_region_sync_dirty_bitmap(mr); | |
9458a9a1 PB |
2142 | snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client); |
2143 | memory_global_after_dirty_log_sync(); | |
2144 | return snapshot; | |
0fe1eca7 PB |
2145 | } |
2146 | ||
2147 | bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap, | |
2148 | hwaddr addr, hwaddr size) | |
2149 | { | |
2150 | assert(mr->ram_block); | |
2151 | return cpu_physical_memory_snapshot_get_dirty(snap, | |
2152 | memory_region_get_ram_addr(mr) + addr, size); | |
2153 | } | |
2154 | ||
093bc2cd AK |
2155 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) |
2156 | { | |
fb1cd6f9 | 2157 | if (mr->readonly != readonly) { |
59023ef4 | 2158 | memory_region_transaction_begin(); |
fb1cd6f9 | 2159 | mr->readonly = readonly; |
22bde714 | 2160 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2161 | memory_region_transaction_commit(); |
fb1cd6f9 | 2162 | } |
093bc2cd AK |
2163 | } |
2164 | ||
c26763f8 MAL |
2165 | void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile) |
2166 | { | |
2167 | if (mr->nonvolatile != nonvolatile) { | |
2168 | memory_region_transaction_begin(); | |
2169 | mr->nonvolatile = nonvolatile; | |
2170 | memory_region_update_pending |= mr->enabled; | |
2171 | memory_region_transaction_commit(); | |
2172 | } | |
2173 | } | |
2174 | ||
5f9a5ea1 | 2175 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 2176 | { |
5f9a5ea1 | 2177 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 2178 | memory_region_transaction_begin(); |
5f9a5ea1 | 2179 | mr->romd_mode = romd_mode; |
22bde714 | 2180 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2181 | memory_region_transaction_commit(); |
d0a9b5bc AK |
2182 | } |
2183 | } | |
2184 | ||
a8170e5e AK |
2185 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
2186 | hwaddr size, unsigned client) | |
093bc2cd | 2187 | { |
8e41fb63 FZ |
2188 | assert(mr->ram_block); |
2189 | cpu_physical_memory_test_and_clear_dirty( | |
2190 | memory_region_get_ram_addr(mr) + addr, size, client); | |
093bc2cd AK |
2191 | } |
2192 | ||
a35ba7be PB |
2193 | int memory_region_get_fd(MemoryRegion *mr) |
2194 | { | |
4ff87573 PB |
2195 | int fd; |
2196 | ||
694ea274 | 2197 | RCU_READ_LOCK_GUARD(); |
4ff87573 PB |
2198 | while (mr->alias) { |
2199 | mr = mr->alias; | |
a35ba7be | 2200 | } |
4ff87573 | 2201 | fd = mr->ram_block->fd; |
a35ba7be | 2202 | |
4ff87573 PB |
2203 | return fd; |
2204 | } | |
a35ba7be | 2205 | |
093bc2cd AK |
2206 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
2207 | { | |
49b24afc PB |
2208 | void *ptr; |
2209 | uint64_t offset = 0; | |
093bc2cd | 2210 | |
694ea274 | 2211 | RCU_READ_LOCK_GUARD(); |
49b24afc PB |
2212 | while (mr->alias) { |
2213 | offset += mr->alias_offset; | |
2214 | mr = mr->alias; | |
2215 | } | |
8e41fb63 | 2216 | assert(mr->ram_block); |
0878d0e1 | 2217 | ptr = qemu_map_ram_ptr(mr->ram_block, offset); |
093bc2cd | 2218 | |
0878d0e1 | 2219 | return ptr; |
093bc2cd AK |
2220 | } |
2221 | ||
07bdaa41 PB |
2222 | MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset) |
2223 | { | |
2224 | RAMBlock *block; | |
2225 | ||
2226 | block = qemu_ram_block_from_host(ptr, false, offset); | |
2227 | if (!block) { | |
2228 | return NULL; | |
2229 | } | |
2230 | ||
2231 | return block->mr; | |
2232 | } | |
2233 | ||
7ebb2745 FZ |
2234 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
2235 | { | |
2236 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
2237 | } | |
2238 | ||
37d7c084 PB |
2239 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) |
2240 | { | |
8e41fb63 | 2241 | assert(mr->ram_block); |
37d7c084 | 2242 | |
fa53a0e5 | 2243 | qemu_ram_resize(mr->ram_block, newsize, errp); |
37d7c084 PB |
2244 | } |
2245 | ||
9ecc996a PMD |
2246 | void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size) |
2247 | { | |
2248 | if (mr->ram_block) { | |
ab7e41e6 | 2249 | qemu_ram_msync(mr->ram_block, addr, size); |
9ecc996a PMD |
2250 | } |
2251 | } | |
61c490e2 | 2252 | |
4dfe59d1 | 2253 | void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size) |
61c490e2 BM |
2254 | { |
2255 | /* | |
2256 | * Might be extended case needed to cover | |
2257 | * different types of memory regions | |
2258 | */ | |
9ecc996a PMD |
2259 | if (mr->dirty_log_mask) { |
2260 | memory_region_msync(mr, addr, size); | |
61c490e2 BM |
2261 | } |
2262 | } | |
2263 | ||
b960fc17 PX |
2264 | /* |
2265 | * Call proper memory listeners about the change on the newly | |
2266 | * added/removed CoalescedMemoryRange. | |
2267 | */ | |
2268 | static void memory_region_update_coalesced_range(MemoryRegion *mr, | |
2269 | CoalescedMemoryRange *cmr, | |
2270 | bool add) | |
093bc2cd | 2271 | { |
b960fc17 | 2272 | AddressSpace *as; |
99e86347 | 2273 | FlatView *view; |
093bc2cd | 2274 | FlatRange *fr; |
093bc2cd | 2275 | |
0d673e36 | 2276 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
b960fc17 PX |
2277 | view = address_space_get_flatview(as); |
2278 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2279 | if (fr->mr == mr) { | |
2280 | flat_range_coalesced_io_notify(fr, as, cmr, add); | |
2281 | } | |
2282 | } | |
2283 | flatview_unref(view); | |
0d673e36 AK |
2284 | } |
2285 | } | |
2286 | ||
093bc2cd AK |
2287 | void memory_region_set_coalescing(MemoryRegion *mr) |
2288 | { | |
2289 | memory_region_clear_coalescing(mr); | |
08dafab4 | 2290 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
2291 | } |
2292 | ||
2293 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 2294 | hwaddr offset, |
093bc2cd AK |
2295 | uint64_t size) |
2296 | { | |
7267c094 | 2297 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 2298 | |
08dafab4 | 2299 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd | 2300 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
b960fc17 | 2301 | memory_region_update_coalesced_range(mr, cmr, true); |
d410515e | 2302 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
2303 | } |
2304 | ||
2305 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
2306 | { | |
2307 | CoalescedMemoryRange *cmr; | |
9c1aa1c2 PX |
2308 | |
2309 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
2310 | return; | |
2311 | } | |
093bc2cd | 2312 | |
d410515e JK |
2313 | qemu_flush_coalesced_mmio_buffer(); |
2314 | mr->flush_coalesced_mmio = false; | |
2315 | ||
093bc2cd AK |
2316 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
2317 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
2318 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
b960fc17 | 2319 | memory_region_update_coalesced_range(mr, cmr, false); |
7267c094 | 2320 | g_free(cmr); |
ab5b3db5 | 2321 | } |
093bc2cd AK |
2322 | } |
2323 | ||
d410515e JK |
2324 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
2325 | { | |
2326 | mr->flush_coalesced_mmio = true; | |
2327 | } | |
2328 | ||
2329 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
2330 | { | |
2331 | qemu_flush_coalesced_mmio_buffer(); | |
2332 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
2333 | mr->flush_coalesced_mmio = false; | |
2334 | } | |
2335 | } | |
2336 | ||
8c56c1a5 PF |
2337 | static bool userspace_eventfd_warning; |
2338 | ||
3e9d69e7 | 2339 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 2340 | hwaddr addr, |
3e9d69e7 AK |
2341 | unsigned size, |
2342 | bool match_data, | |
2343 | uint64_t data, | |
753d5e14 | 2344 | EventNotifier *e) |
3e9d69e7 AK |
2345 | { |
2346 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2347 | .addr.start = int128_make64(addr), |
2348 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2349 | .match_data = match_data, |
2350 | .data = data, | |
753d5e14 | 2351 | .e = e, |
3e9d69e7 AK |
2352 | }; |
2353 | unsigned i; | |
2354 | ||
8c56c1a5 PF |
2355 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || |
2356 | userspace_eventfd_warning))) { | |
2357 | userspace_eventfd_warning = true; | |
2358 | error_report("Using eventfd without MMIO binding in KVM. " | |
2359 | "Suboptimal performance expected"); | |
2360 | } | |
2361 | ||
b8aecea2 | 2362 | if (size) { |
9bf825bf | 2363 | adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE); |
b8aecea2 | 2364 | } |
59023ef4 | 2365 | memory_region_transaction_begin(); |
3e9d69e7 | 2366 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
73bb753d | 2367 | if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) { |
3e9d69e7 AK |
2368 | break; |
2369 | } | |
2370 | } | |
2371 | ++mr->ioeventfd_nb; | |
7267c094 | 2372 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
2373 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
2374 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
2375 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
2376 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 2377 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2378 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2379 | } |
2380 | ||
2381 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 2382 | hwaddr addr, |
3e9d69e7 AK |
2383 | unsigned size, |
2384 | bool match_data, | |
2385 | uint64_t data, | |
753d5e14 | 2386 | EventNotifier *e) |
3e9d69e7 AK |
2387 | { |
2388 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2389 | .addr.start = int128_make64(addr), |
2390 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2391 | .match_data = match_data, |
2392 | .data = data, | |
753d5e14 | 2393 | .e = e, |
3e9d69e7 AK |
2394 | }; |
2395 | unsigned i; | |
2396 | ||
b8aecea2 | 2397 | if (size) { |
9bf825bf | 2398 | adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE); |
b8aecea2 | 2399 | } |
59023ef4 | 2400 | memory_region_transaction_begin(); |
3e9d69e7 | 2401 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
73bb753d | 2402 | if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) { |
3e9d69e7 AK |
2403 | break; |
2404 | } | |
2405 | } | |
2406 | assert(i != mr->ioeventfd_nb); | |
2407 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
2408 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
2409 | --mr->ioeventfd_nb; | |
7267c094 | 2410 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 2411 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 2412 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2413 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2414 | } |
2415 | ||
feca4ac1 | 2416 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 2417 | { |
feca4ac1 | 2418 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
2419 | MemoryRegion *other; |
2420 | ||
59023ef4 JK |
2421 | memory_region_transaction_begin(); |
2422 | ||
dfde4e6e | 2423 | memory_region_ref(subregion); |
093bc2cd AK |
2424 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
2425 | if (subregion->priority >= other->priority) { | |
2426 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
2427 | goto done; | |
2428 | } | |
2429 | } | |
2430 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
2431 | done: | |
22bde714 | 2432 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2433 | memory_region_transaction_commit(); |
093bc2cd AK |
2434 | } |
2435 | ||
0598701a PC |
2436 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
2437 | hwaddr offset, | |
2438 | MemoryRegion *subregion) | |
2439 | { | |
feca4ac1 PB |
2440 | assert(!subregion->container); |
2441 | subregion->container = mr; | |
0598701a | 2442 | subregion->addr = offset; |
feca4ac1 | 2443 | memory_region_update_container_subregions(subregion); |
0598701a | 2444 | } |
093bc2cd AK |
2445 | |
2446 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 2447 | hwaddr offset, |
093bc2cd AK |
2448 | MemoryRegion *subregion) |
2449 | { | |
093bc2cd AK |
2450 | subregion->priority = 0; |
2451 | memory_region_add_subregion_common(mr, offset, subregion); | |
2452 | } | |
2453 | ||
2454 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 2455 | hwaddr offset, |
093bc2cd | 2456 | MemoryRegion *subregion, |
a1ff8ae0 | 2457 | int priority) |
093bc2cd | 2458 | { |
093bc2cd AK |
2459 | subregion->priority = priority; |
2460 | memory_region_add_subregion_common(mr, offset, subregion); | |
2461 | } | |
2462 | ||
2463 | void memory_region_del_subregion(MemoryRegion *mr, | |
2464 | MemoryRegion *subregion) | |
2465 | { | |
59023ef4 | 2466 | memory_region_transaction_begin(); |
feca4ac1 PB |
2467 | assert(subregion->container == mr); |
2468 | subregion->container = NULL; | |
093bc2cd | 2469 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 2470 | memory_region_unref(subregion); |
22bde714 | 2471 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2472 | memory_region_transaction_commit(); |
6bba19ba AK |
2473 | } |
2474 | ||
2475 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
2476 | { | |
2477 | if (enabled == mr->enabled) { | |
2478 | return; | |
2479 | } | |
59023ef4 | 2480 | memory_region_transaction_begin(); |
6bba19ba | 2481 | mr->enabled = enabled; |
22bde714 | 2482 | memory_region_update_pending = true; |
59023ef4 | 2483 | memory_region_transaction_commit(); |
093bc2cd | 2484 | } |
1c0ffa58 | 2485 | |
e7af4c67 MT |
2486 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) |
2487 | { | |
2488 | Int128 s = int128_make64(size); | |
2489 | ||
2490 | if (size == UINT64_MAX) { | |
2491 | s = int128_2_64(); | |
2492 | } | |
2493 | if (int128_eq(s, mr->size)) { | |
2494 | return; | |
2495 | } | |
2496 | memory_region_transaction_begin(); | |
2497 | mr->size = s; | |
2498 | memory_region_update_pending = true; | |
2499 | memory_region_transaction_commit(); | |
2500 | } | |
2501 | ||
67891b8a | 2502 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 2503 | { |
feca4ac1 | 2504 | MemoryRegion *container = mr->container; |
2282e1af | 2505 | |
feca4ac1 | 2506 | if (container) { |
67891b8a PC |
2507 | memory_region_transaction_begin(); |
2508 | memory_region_ref(mr); | |
feca4ac1 PB |
2509 | memory_region_del_subregion(container, mr); |
2510 | mr->container = container; | |
2511 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
2512 | memory_region_unref(mr); |
2513 | memory_region_transaction_commit(); | |
2282e1af | 2514 | } |
67891b8a | 2515 | } |
2282e1af | 2516 | |
67891b8a PC |
2517 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2518 | { | |
2519 | if (addr != mr->addr) { | |
2520 | mr->addr = addr; | |
2521 | memory_region_readd_subregion(mr); | |
2522 | } | |
2282e1af AK |
2523 | } |
2524 | ||
a8170e5e | 2525 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 2526 | { |
4703359e | 2527 | assert(mr->alias); |
4703359e | 2528 | |
59023ef4 | 2529 | if (offset == mr->alias_offset) { |
4703359e AK |
2530 | return; |
2531 | } | |
2532 | ||
59023ef4 JK |
2533 | memory_region_transaction_begin(); |
2534 | mr->alias_offset = offset; | |
22bde714 | 2535 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2536 | memory_region_transaction_commit(); |
4703359e AK |
2537 | } |
2538 | ||
a2b257d6 IM |
2539 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) |
2540 | { | |
2541 | return mr->align; | |
2542 | } | |
2543 | ||
e2177955 AK |
2544 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
2545 | { | |
2546 | const AddrRange *addr = addr_; | |
2547 | const FlatRange *fr = fr_; | |
2548 | ||
2549 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
2550 | return -1; | |
2551 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
2552 | return 1; | |
2553 | } | |
2554 | return 0; | |
2555 | } | |
2556 | ||
99e86347 | 2557 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 2558 | { |
99e86347 | 2559 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
2560 | sizeof(FlatRange), cmp_flatrange_addr); |
2561 | } | |
2562 | ||
eed2bacf IM |
2563 | bool memory_region_is_mapped(MemoryRegion *mr) |
2564 | { | |
2565 | return mr->container ? true : false; | |
2566 | } | |
2567 | ||
c6742b14 PB |
2568 | /* Same as memory_region_find, but it does not add a reference to the |
2569 | * returned region. It must be called from an RCU critical section. | |
2570 | */ | |
2571 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2572 | hwaddr addr, uint64_t size) | |
e2177955 | 2573 | { |
052e87b0 | 2574 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
2575 | MemoryRegion *root; |
2576 | AddressSpace *as; | |
2577 | AddrRange range; | |
99e86347 | 2578 | FlatView *view; |
73034e9e PB |
2579 | FlatRange *fr; |
2580 | ||
2581 | addr += mr->addr; | |
feca4ac1 PB |
2582 | for (root = mr; root->container; ) { |
2583 | root = root->container; | |
73034e9e PB |
2584 | addr += root->addr; |
2585 | } | |
e2177955 | 2586 | |
73034e9e | 2587 | as = memory_region_to_address_space(root); |
eed2bacf IM |
2588 | if (!as) { |
2589 | return ret; | |
2590 | } | |
73034e9e | 2591 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 2592 | |
16620684 | 2593 | view = address_space_to_flatview(as); |
99e86347 | 2594 | fr = flatview_lookup(view, range); |
e2177955 | 2595 | if (!fr) { |
c6742b14 | 2596 | return ret; |
e2177955 AK |
2597 | } |
2598 | ||
99e86347 | 2599 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
2600 | --fr; |
2601 | } | |
2602 | ||
2603 | ret.mr = fr->mr; | |
16620684 | 2604 | ret.fv = view; |
e2177955 AK |
2605 | range = addrrange_intersection(range, fr->addr); |
2606 | ret.offset_within_region = fr->offset_in_region; | |
2607 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2608 | fr->addr.start)); | |
052e87b0 | 2609 | ret.size = range.size; |
e2177955 | 2610 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 2611 | ret.readonly = fr->readonly; |
c26763f8 | 2612 | ret.nonvolatile = fr->nonvolatile; |
c6742b14 PB |
2613 | return ret; |
2614 | } | |
2615 | ||
2616 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2617 | hwaddr addr, uint64_t size) | |
2618 | { | |
2619 | MemoryRegionSection ret; | |
694ea274 | 2620 | RCU_READ_LOCK_GUARD(); |
c6742b14 PB |
2621 | ret = memory_region_find_rcu(mr, addr, size); |
2622 | if (ret.mr) { | |
2623 | memory_region_ref(ret.mr); | |
2624 | } | |
e2177955 AK |
2625 | return ret; |
2626 | } | |
2627 | ||
c6742b14 PB |
2628 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
2629 | { | |
2630 | MemoryRegion *mr; | |
2631 | ||
694ea274 | 2632 | RCU_READ_LOCK_GUARD(); |
c6742b14 | 2633 | mr = memory_region_find_rcu(container, addr, 1).mr; |
c6742b14 PB |
2634 | return mr && mr != container; |
2635 | } | |
2636 | ||
9c1f8f44 | 2637 | void memory_global_dirty_log_sync(void) |
86e775c6 | 2638 | { |
3ebb1817 | 2639 | memory_region_sync_dirty_bitmap(NULL); |
7664e80c AK |
2640 | } |
2641 | ||
9458a9a1 PB |
2642 | void memory_global_after_dirty_log_sync(void) |
2643 | { | |
2644 | MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward); | |
2645 | } | |
2646 | ||
19310760 JZ |
2647 | static VMChangeStateEntry *vmstate_change; |
2648 | ||
7664e80c AK |
2649 | void memory_global_dirty_log_start(void) |
2650 | { | |
19310760 JZ |
2651 | if (vmstate_change) { |
2652 | qemu_del_vm_change_state_handler(vmstate_change); | |
2653 | vmstate_change = NULL; | |
2654 | } | |
2655 | ||
7664e80c | 2656 | global_dirty_log = true; |
6f6a5ef3 | 2657 | |
7376e582 | 2658 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
6f6a5ef3 | 2659 | |
39adb536 | 2660 | /* Refresh DIRTY_MEMORY_MIGRATION bit. */ |
6f6a5ef3 PB |
2661 | memory_region_transaction_begin(); |
2662 | memory_region_update_pending = true; | |
2663 | memory_region_transaction_commit(); | |
7664e80c AK |
2664 | } |
2665 | ||
19310760 | 2666 | static void memory_global_dirty_log_do_stop(void) |
7664e80c | 2667 | { |
7664e80c | 2668 | global_dirty_log = false; |
6f6a5ef3 | 2669 | |
39adb536 | 2670 | /* Refresh DIRTY_MEMORY_MIGRATION bit. */ |
6f6a5ef3 PB |
2671 | memory_region_transaction_begin(); |
2672 | memory_region_update_pending = true; | |
2673 | memory_region_transaction_commit(); | |
2674 | ||
7376e582 | 2675 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
2676 | } |
2677 | ||
19310760 JZ |
2678 | static void memory_vm_change_state_handler(void *opaque, int running, |
2679 | RunState state) | |
2680 | { | |
2681 | if (running) { | |
2682 | memory_global_dirty_log_do_stop(); | |
2683 | ||
2684 | if (vmstate_change) { | |
2685 | qemu_del_vm_change_state_handler(vmstate_change); | |
2686 | vmstate_change = NULL; | |
2687 | } | |
2688 | } | |
2689 | } | |
2690 | ||
2691 | void memory_global_dirty_log_stop(void) | |
2692 | { | |
2693 | if (!runstate_is_running()) { | |
2694 | if (vmstate_change) { | |
2695 | return; | |
2696 | } | |
2697 | vmstate_change = qemu_add_vm_change_state_handler( | |
2698 | memory_vm_change_state_handler, NULL); | |
2699 | return; | |
2700 | } | |
2701 | ||
2702 | memory_global_dirty_log_do_stop(); | |
2703 | } | |
2704 | ||
7664e80c AK |
2705 | static void listener_add_address_space(MemoryListener *listener, |
2706 | AddressSpace *as) | |
2707 | { | |
99e86347 | 2708 | FlatView *view; |
7664e80c AK |
2709 | FlatRange *fr; |
2710 | ||
680a4783 PB |
2711 | if (listener->begin) { |
2712 | listener->begin(listener); | |
2713 | } | |
7664e80c | 2714 | if (global_dirty_log) { |
975aefe0 AK |
2715 | if (listener->log_global_start) { |
2716 | listener->log_global_start(listener); | |
2717 | } | |
7664e80c | 2718 | } |
975aefe0 | 2719 | |
856d7245 | 2720 | view = address_space_get_flatview(as); |
99e86347 | 2721 | FOR_EACH_FLAT_RANGE(fr, view) { |
279836f8 DH |
2722 | MemoryRegionSection section = section_from_flat_range(fr, view); |
2723 | ||
975aefe0 AK |
2724 | if (listener->region_add) { |
2725 | listener->region_add(listener, §ion); | |
2726 | } | |
ae990e6c DH |
2727 | if (fr->dirty_log_mask && listener->log_start) { |
2728 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2729 | } | |
7664e80c | 2730 | } |
680a4783 PB |
2731 | if (listener->commit) { |
2732 | listener->commit(listener); | |
2733 | } | |
856d7245 | 2734 | flatview_unref(view); |
7664e80c AK |
2735 | } |
2736 | ||
d25836ca PX |
2737 | static void listener_del_address_space(MemoryListener *listener, |
2738 | AddressSpace *as) | |
2739 | { | |
2740 | FlatView *view; | |
2741 | FlatRange *fr; | |
2742 | ||
2743 | if (listener->begin) { | |
2744 | listener->begin(listener); | |
2745 | } | |
2746 | view = address_space_get_flatview(as); | |
2747 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2748 | MemoryRegionSection section = section_from_flat_range(fr, view); | |
2749 | ||
2750 | if (fr->dirty_log_mask && listener->log_stop) { | |
2751 | listener->log_stop(listener, §ion, fr->dirty_log_mask, 0); | |
2752 | } | |
2753 | if (listener->region_del) { | |
2754 | listener->region_del(listener, §ion); | |
2755 | } | |
2756 | } | |
2757 | if (listener->commit) { | |
2758 | listener->commit(listener); | |
2759 | } | |
2760 | flatview_unref(view); | |
2761 | } | |
2762 | ||
d45fa784 | 2763 | void memory_listener_register(MemoryListener *listener, AddressSpace *as) |
7664e80c | 2764 | { |
72e22d2f AK |
2765 | MemoryListener *other = NULL; |
2766 | ||
d45fa784 | 2767 | listener->address_space = as; |
72e22d2f | 2768 | if (QTAILQ_EMPTY(&memory_listeners) |
eae3eb3e | 2769 | || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) { |
72e22d2f AK |
2770 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); |
2771 | } else { | |
2772 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2773 | if (listener->priority < other->priority) { | |
2774 | break; | |
2775 | } | |
2776 | } | |
2777 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2778 | } | |
0d673e36 | 2779 | |
9a54635d | 2780 | if (QTAILQ_EMPTY(&as->listeners) |
eae3eb3e | 2781 | || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) { |
9a54635d PB |
2782 | QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as); |
2783 | } else { | |
2784 | QTAILQ_FOREACH(other, &as->listeners, link_as) { | |
2785 | if (listener->priority < other->priority) { | |
2786 | break; | |
2787 | } | |
2788 | } | |
2789 | QTAILQ_INSERT_BEFORE(other, listener, link_as); | |
2790 | } | |
2791 | ||
d45fa784 | 2792 | listener_add_address_space(listener, as); |
7664e80c AK |
2793 | } |
2794 | ||
2795 | void memory_listener_unregister(MemoryListener *listener) | |
2796 | { | |
1d8280c1 PB |
2797 | if (!listener->address_space) { |
2798 | return; | |
2799 | } | |
2800 | ||
d25836ca | 2801 | listener_del_address_space(listener, listener->address_space); |
72e22d2f | 2802 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
9a54635d | 2803 | QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as); |
1d8280c1 | 2804 | listener->address_space = NULL; |
86e775c6 | 2805 | } |
e2177955 | 2806 | |
a2166410 GK |
2807 | void address_space_remove_listeners(AddressSpace *as) |
2808 | { | |
2809 | while (!QTAILQ_EMPTY(&as->listeners)) { | |
2810 | memory_listener_unregister(QTAILQ_FIRST(&as->listeners)); | |
2811 | } | |
2812 | } | |
2813 | ||
7dca8043 | 2814 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 2815 | { |
ac95190e | 2816 | memory_region_ref(root); |
8786db7c | 2817 | as->root = root; |
67ace39b | 2818 | as->current_map = NULL; |
4c19eb72 AK |
2819 | as->ioeventfd_nb = 0; |
2820 | as->ioeventfds = NULL; | |
9a54635d | 2821 | QTAILQ_INIT(&as->listeners); |
0d673e36 | 2822 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 2823 | as->name = g_strdup(name ? name : "anonymous"); |
202fc01b AK |
2824 | address_space_update_topology(as); |
2825 | address_space_update_ioeventfds(as); | |
1c0ffa58 | 2826 | } |
658b2224 | 2827 | |
374f2981 | 2828 | static void do_address_space_destroy(AddressSpace *as) |
83f3c251 | 2829 | { |
9a54635d | 2830 | assert(QTAILQ_EMPTY(&as->listeners)); |
078c44f4 | 2831 | |
856d7245 | 2832 | flatview_unref(as->current_map); |
7dca8043 | 2833 | g_free(as->name); |
4c19eb72 | 2834 | g_free(as->ioeventfds); |
ac95190e | 2835 | memory_region_unref(as->root); |
83f3c251 AK |
2836 | } |
2837 | ||
374f2981 PB |
2838 | void address_space_destroy(AddressSpace *as) |
2839 | { | |
ac95190e PB |
2840 | MemoryRegion *root = as->root; |
2841 | ||
374f2981 PB |
2842 | /* Flush out anything from MemoryListeners listening in on this */ |
2843 | memory_region_transaction_begin(); | |
2844 | as->root = NULL; | |
2845 | memory_region_transaction_commit(); | |
2846 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
2847 | ||
2848 | /* At this point, as->dispatch and as->current_map are dummy | |
2849 | * entries that the guest should never use. Wait for the old | |
2850 | * values to expire before freeing the data. | |
2851 | */ | |
ac95190e | 2852 | as->root = root; |
374f2981 PB |
2853 | call_rcu(as, do_address_space_destroy, rcu); |
2854 | } | |
2855 | ||
4e831901 PX |
2856 | static const char *memory_region_type(MemoryRegion *mr) |
2857 | { | |
39fa93c4 PMD |
2858 | if (mr->alias) { |
2859 | return memory_region_type(mr->alias); | |
2860 | } | |
4e831901 PX |
2861 | if (memory_region_is_ram_device(mr)) { |
2862 | return "ramd"; | |
2863 | } else if (memory_region_is_romd(mr)) { | |
2864 | return "romd"; | |
2865 | } else if (memory_region_is_rom(mr)) { | |
2866 | return "rom"; | |
2867 | } else if (memory_region_is_ram(mr)) { | |
2868 | return "ram"; | |
2869 | } else { | |
2870 | return "i/o"; | |
2871 | } | |
2872 | } | |
2873 | ||
314e2987 BS |
2874 | typedef struct MemoryRegionList MemoryRegionList; |
2875 | ||
2876 | struct MemoryRegionList { | |
2877 | const MemoryRegion *mr; | |
a16878d2 | 2878 | QTAILQ_ENTRY(MemoryRegionList) mrqueue; |
314e2987 BS |
2879 | }; |
2880 | ||
b58deb34 | 2881 | typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead; |
314e2987 | 2882 | |
4e831901 PX |
2883 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ |
2884 | int128_sub((size), int128_one())) : 0) | |
2885 | #define MTREE_INDENT " " | |
2886 | ||
b6b71cb5 | 2887 | static void mtree_expand_owner(const char *label, Object *obj) |
fc051ae6 AK |
2888 | { |
2889 | DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE); | |
2890 | ||
b6b71cb5 | 2891 | qemu_printf(" %s:{%s", label, dev ? "dev" : "obj"); |
fc051ae6 | 2892 | if (dev && dev->id) { |
b6b71cb5 | 2893 | qemu_printf(" id=%s", dev->id); |
fc051ae6 | 2894 | } else { |
ddfb0baa | 2895 | char *canonical_path = object_get_canonical_path(obj); |
fc051ae6 | 2896 | if (canonical_path) { |
b6b71cb5 | 2897 | qemu_printf(" path=%s", canonical_path); |
fc051ae6 AK |
2898 | g_free(canonical_path); |
2899 | } else { | |
b6b71cb5 | 2900 | qemu_printf(" type=%s", object_get_typename(obj)); |
fc051ae6 AK |
2901 | } |
2902 | } | |
b6b71cb5 | 2903 | qemu_printf("}"); |
fc051ae6 AK |
2904 | } |
2905 | ||
b6b71cb5 | 2906 | static void mtree_print_mr_owner(const MemoryRegion *mr) |
fc051ae6 AK |
2907 | { |
2908 | Object *owner = mr->owner; | |
2909 | Object *parent = memory_region_owner((MemoryRegion *)mr); | |
2910 | ||
2911 | if (!owner && !parent) { | |
b6b71cb5 | 2912 | qemu_printf(" orphan"); |
fc051ae6 AK |
2913 | return; |
2914 | } | |
2915 | if (owner) { | |
b6b71cb5 | 2916 | mtree_expand_owner("owner", owner); |
fc051ae6 AK |
2917 | } |
2918 | if (parent && parent != owner) { | |
b6b71cb5 | 2919 | mtree_expand_owner("parent", parent); |
fc051ae6 AK |
2920 | } |
2921 | } | |
2922 | ||
b6b71cb5 | 2923 | static void mtree_print_mr(const MemoryRegion *mr, unsigned int level, |
a8170e5e | 2924 | hwaddr base, |
fc051ae6 | 2925 | MemoryRegionListHead *alias_print_queue, |
2261d393 | 2926 | bool owner, bool display_disabled) |
314e2987 | 2927 | { |
9479c57a JK |
2928 | MemoryRegionList *new_ml, *ml, *next_ml; |
2929 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
2930 | const MemoryRegion *submr; |
2931 | unsigned int i; | |
b31f8412 | 2932 | hwaddr cur_start, cur_end; |
314e2987 | 2933 | |
f8a9f720 | 2934 | if (!mr) { |
314e2987 BS |
2935 | return; |
2936 | } | |
2937 | ||
b31f8412 PX |
2938 | cur_start = base + mr->addr; |
2939 | cur_end = cur_start + MR_SIZE(mr->size); | |
2940 | ||
2941 | /* | |
2942 | * Try to detect overflow of memory region. This should never | |
2943 | * happen normally. When it happens, we dump something to warn the | |
2944 | * user who is observing this. | |
2945 | */ | |
2946 | if (cur_start < base || cur_end < cur_start) { | |
b6b71cb5 | 2947 | qemu_printf("[DETECTED OVERFLOW!] "); |
b31f8412 PX |
2948 | } |
2949 | ||
314e2987 BS |
2950 | if (mr->alias) { |
2951 | MemoryRegionList *ml; | |
2952 | bool found = false; | |
2953 | ||
2954 | /* check if the alias is already in the queue */ | |
a16878d2 | 2955 | QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) { |
f54bb15f | 2956 | if (ml->mr == mr->alias) { |
314e2987 BS |
2957 | found = true; |
2958 | } | |
2959 | } | |
2960 | ||
2961 | if (!found) { | |
2962 | ml = g_new(MemoryRegionList, 1); | |
2963 | ml->mr = mr->alias; | |
a16878d2 | 2964 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue); |
314e2987 | 2965 | } |
2261d393 PMD |
2966 | if (mr->enabled || display_disabled) { |
2967 | for (i = 0; i < level; i++) { | |
2968 | qemu_printf(MTREE_INDENT); | |
2969 | } | |
2970 | qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx | |
2971 | " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx | |
2972 | "-" TARGET_FMT_plx "%s", | |
2973 | cur_start, cur_end, | |
2974 | mr->priority, | |
2975 | mr->nonvolatile ? "nv-" : "", | |
2976 | memory_region_type((MemoryRegion *)mr), | |
2977 | memory_region_name(mr), | |
2978 | memory_region_name(mr->alias), | |
2979 | mr->alias_offset, | |
2980 | mr->alias_offset + MR_SIZE(mr->size), | |
2981 | mr->enabled ? "" : " [disabled]"); | |
2982 | if (owner) { | |
2983 | mtree_print_mr_owner(mr); | |
2984 | } | |
2985 | qemu_printf("\n"); | |
fc051ae6 | 2986 | } |
314e2987 | 2987 | } else { |
2261d393 PMD |
2988 | if (mr->enabled || display_disabled) { |
2989 | for (i = 0; i < level; i++) { | |
2990 | qemu_printf(MTREE_INDENT); | |
2991 | } | |
2992 | qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx | |
2993 | " (prio %d, %s%s): %s%s", | |
2994 | cur_start, cur_end, | |
2995 | mr->priority, | |
2996 | mr->nonvolatile ? "nv-" : "", | |
2997 | memory_region_type((MemoryRegion *)mr), | |
2998 | memory_region_name(mr), | |
2999 | mr->enabled ? "" : " [disabled]"); | |
3000 | if (owner) { | |
3001 | mtree_print_mr_owner(mr); | |
3002 | } | |
3003 | qemu_printf("\n"); | |
fc051ae6 | 3004 | } |
314e2987 | 3005 | } |
9479c57a JK |
3006 | |
3007 | QTAILQ_INIT(&submr_print_queue); | |
3008 | ||
314e2987 | 3009 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
3010 | new_ml = g_new(MemoryRegionList, 1); |
3011 | new_ml->mr = submr; | |
a16878d2 | 3012 | QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) { |
9479c57a JK |
3013 | if (new_ml->mr->addr < ml->mr->addr || |
3014 | (new_ml->mr->addr == ml->mr->addr && | |
3015 | new_ml->mr->priority > ml->mr->priority)) { | |
a16878d2 | 3016 | QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue); |
9479c57a JK |
3017 | new_ml = NULL; |
3018 | break; | |
3019 | } | |
3020 | } | |
3021 | if (new_ml) { | |
a16878d2 | 3022 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue); |
9479c57a JK |
3023 | } |
3024 | } | |
3025 | ||
a16878d2 | 3026 | QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) { |
b6b71cb5 | 3027 | mtree_print_mr(ml->mr, level + 1, cur_start, |
2261d393 | 3028 | alias_print_queue, owner, display_disabled); |
9479c57a JK |
3029 | } |
3030 | ||
a16878d2 | 3031 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) { |
9479c57a | 3032 | g_free(ml); |
314e2987 BS |
3033 | } |
3034 | } | |
3035 | ||
5e8fd947 | 3036 | struct FlatViewInfo { |
5e8fd947 AK |
3037 | int counter; |
3038 | bool dispatch_tree; | |
fc051ae6 | 3039 | bool owner; |
8072aae3 | 3040 | AccelClass *ac; |
5e8fd947 AK |
3041 | }; |
3042 | ||
3043 | static void mtree_print_flatview(gpointer key, gpointer value, | |
3044 | gpointer user_data) | |
57bb40c9 | 3045 | { |
5e8fd947 AK |
3046 | FlatView *view = key; |
3047 | GArray *fv_address_spaces = value; | |
3048 | struct FlatViewInfo *fvi = user_data; | |
57bb40c9 PX |
3049 | FlatRange *range = &view->ranges[0]; |
3050 | MemoryRegion *mr; | |
3051 | int n = view->nr; | |
5e8fd947 AK |
3052 | int i; |
3053 | AddressSpace *as; | |
3054 | ||
b6b71cb5 | 3055 | qemu_printf("FlatView #%d\n", fvi->counter); |
5e8fd947 AK |
3056 | ++fvi->counter; |
3057 | ||
3058 | for (i = 0; i < fv_address_spaces->len; ++i) { | |
3059 | as = g_array_index(fv_address_spaces, AddressSpace*, i); | |
b6b71cb5 MA |
3060 | qemu_printf(" AS \"%s\", root: %s", |
3061 | as->name, memory_region_name(as->root)); | |
5e8fd947 | 3062 | if (as->root->alias) { |
b6b71cb5 | 3063 | qemu_printf(", alias %s", memory_region_name(as->root->alias)); |
5e8fd947 | 3064 | } |
b6b71cb5 | 3065 | qemu_printf("\n"); |
5e8fd947 AK |
3066 | } |
3067 | ||
b6b71cb5 | 3068 | qemu_printf(" Root memory region: %s\n", |
5e8fd947 | 3069 | view->root ? memory_region_name(view->root) : "(none)"); |
57bb40c9 PX |
3070 | |
3071 | if (n <= 0) { | |
b6b71cb5 | 3072 | qemu_printf(MTREE_INDENT "No rendered FlatView\n\n"); |
57bb40c9 PX |
3073 | return; |
3074 | } | |
3075 | ||
3076 | while (n--) { | |
3077 | mr = range->mr; | |
377a07aa | 3078 | if (range->offset_in_region) { |
b6b71cb5 MA |
3079 | qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx |
3080 | " (prio %d, %s%s): %s @" TARGET_FMT_plx, | |
3081 | int128_get64(range->addr.start), | |
3082 | int128_get64(range->addr.start) | |
3083 | + MR_SIZE(range->addr.size), | |
3084 | mr->priority, | |
3085 | range->nonvolatile ? "nv-" : "", | |
3086 | range->readonly ? "rom" : memory_region_type(mr), | |
3087 | memory_region_name(mr), | |
3088 | range->offset_in_region); | |
377a07aa | 3089 | } else { |
b6b71cb5 MA |
3090 | qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx |
3091 | " (prio %d, %s%s): %s", | |
3092 | int128_get64(range->addr.start), | |
3093 | int128_get64(range->addr.start) | |
3094 | + MR_SIZE(range->addr.size), | |
3095 | mr->priority, | |
3096 | range->nonvolatile ? "nv-" : "", | |
3097 | range->readonly ? "rom" : memory_region_type(mr), | |
3098 | memory_region_name(mr)); | |
377a07aa | 3099 | } |
fc051ae6 | 3100 | if (fvi->owner) { |
b6b71cb5 | 3101 | mtree_print_mr_owner(mr); |
fc051ae6 | 3102 | } |
8072aae3 AK |
3103 | |
3104 | if (fvi->ac) { | |
3105 | for (i = 0; i < fv_address_spaces->len; ++i) { | |
3106 | as = g_array_index(fv_address_spaces, AddressSpace*, i); | |
3107 | if (fvi->ac->has_memory(current_machine, as, | |
3108 | int128_get64(range->addr.start), | |
3109 | MR_SIZE(range->addr.size) + 1)) { | |
53b62bec | 3110 | qemu_printf(" %s", fvi->ac->name); |
8072aae3 AK |
3111 | } |
3112 | } | |
3113 | } | |
b6b71cb5 | 3114 | qemu_printf("\n"); |
57bb40c9 PX |
3115 | range++; |
3116 | } | |
3117 | ||
5e8fd947 AK |
3118 | #if !defined(CONFIG_USER_ONLY) |
3119 | if (fvi->dispatch_tree && view->root) { | |
b6b71cb5 | 3120 | mtree_print_dispatch(view->dispatch, view->root); |
5e8fd947 AK |
3121 | } |
3122 | #endif | |
3123 | ||
b6b71cb5 | 3124 | qemu_printf("\n"); |
5e8fd947 AK |
3125 | } |
3126 | ||
3127 | static gboolean mtree_info_flatview_free(gpointer key, gpointer value, | |
3128 | gpointer user_data) | |
3129 | { | |
3130 | FlatView *view = key; | |
3131 | GArray *fv_address_spaces = value; | |
3132 | ||
3133 | g_array_unref(fv_address_spaces); | |
57bb40c9 | 3134 | flatview_unref(view); |
5e8fd947 AK |
3135 | |
3136 | return true; | |
57bb40c9 PX |
3137 | } |
3138 | ||
2261d393 | 3139 | void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled) |
314e2987 BS |
3140 | { |
3141 | MemoryRegionListHead ml_head; | |
3142 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 3143 | AddressSpace *as; |
314e2987 | 3144 | |
57bb40c9 | 3145 | if (flatview) { |
5e8fd947 AK |
3146 | FlatView *view; |
3147 | struct FlatViewInfo fvi = { | |
5e8fd947 | 3148 | .counter = 0, |
fc051ae6 AK |
3149 | .dispatch_tree = dispatch_tree, |
3150 | .owner = owner, | |
5e8fd947 AK |
3151 | }; |
3152 | GArray *fv_address_spaces; | |
3153 | GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal); | |
4f7f5893 | 3154 | AccelClass *ac = ACCEL_GET_CLASS(current_accel()); |
8072aae3 AK |
3155 | |
3156 | if (ac->has_memory) { | |
3157 | fvi.ac = ac; | |
8072aae3 | 3158 | } |
5e8fd947 AK |
3159 | |
3160 | /* Gather all FVs in one table */ | |
57bb40c9 | 3161 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
5e8fd947 AK |
3162 | view = address_space_get_flatview(as); |
3163 | ||
3164 | fv_address_spaces = g_hash_table_lookup(views, view); | |
3165 | if (!fv_address_spaces) { | |
3166 | fv_address_spaces = g_array_new(false, false, sizeof(as)); | |
3167 | g_hash_table_insert(views, view, fv_address_spaces); | |
3168 | } | |
3169 | ||
3170 | g_array_append_val(fv_address_spaces, as); | |
57bb40c9 | 3171 | } |
5e8fd947 AK |
3172 | |
3173 | /* Print */ | |
3174 | g_hash_table_foreach(views, mtree_print_flatview, &fvi); | |
3175 | ||
3176 | /* Free */ | |
3177 | g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0); | |
3178 | g_hash_table_unref(views); | |
3179 | ||
57bb40c9 PX |
3180 | return; |
3181 | } | |
3182 | ||
314e2987 BS |
3183 | QTAILQ_INIT(&ml_head); |
3184 | ||
0d673e36 | 3185 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
b6b71cb5 | 3186 | qemu_printf("address-space: %s\n", as->name); |
2261d393 | 3187 | mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled); |
b6b71cb5 | 3188 | qemu_printf("\n"); |
b9f9be88 BS |
3189 | } |
3190 | ||
314e2987 | 3191 | /* print aliased regions */ |
a16878d2 | 3192 | QTAILQ_FOREACH(ml, &ml_head, mrqueue) { |
b6b71cb5 | 3193 | qemu_printf("memory-region: %s\n", memory_region_name(ml->mr)); |
2261d393 | 3194 | mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled); |
b6b71cb5 | 3195 | qemu_printf("\n"); |
314e2987 BS |
3196 | } |
3197 | ||
a16878d2 | 3198 | QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) { |
88365e47 | 3199 | g_free(ml); |
314e2987 | 3200 | } |
314e2987 | 3201 | } |
b4fefef9 | 3202 | |
b08199c6 PM |
3203 | void memory_region_init_ram(MemoryRegion *mr, |
3204 | struct Object *owner, | |
3205 | const char *name, | |
3206 | uint64_t size, | |
3207 | Error **errp) | |
3208 | { | |
3209 | DeviceState *owner_dev; | |
3210 | Error *err = NULL; | |
3211 | ||
3212 | memory_region_init_ram_nomigrate(mr, owner, name, size, &err); | |
3213 | if (err) { | |
3214 | error_propagate(errp, err); | |
3215 | return; | |
3216 | } | |
3217 | /* This will assert if owner is neither NULL nor a DeviceState. | |
3218 | * We only want the owner here for the purposes of defining a | |
3219 | * unique name for migration. TODO: Ideally we should implement | |
3220 | * a naming scheme for Objects which are not DeviceStates, in | |
3221 | * which case we can relax this restriction. | |
3222 | */ | |
3223 | owner_dev = DEVICE(owner); | |
3224 | vmstate_register_ram(mr, owner_dev); | |
3225 | } | |
3226 | ||
3227 | void memory_region_init_rom(MemoryRegion *mr, | |
3228 | struct Object *owner, | |
3229 | const char *name, | |
3230 | uint64_t size, | |
3231 | Error **errp) | |
3232 | { | |
3233 | DeviceState *owner_dev; | |
3234 | Error *err = NULL; | |
3235 | ||
3236 | memory_region_init_rom_nomigrate(mr, owner, name, size, &err); | |
3237 | if (err) { | |
3238 | error_propagate(errp, err); | |
3239 | return; | |
3240 | } | |
3241 | /* This will assert if owner is neither NULL nor a DeviceState. | |
3242 | * We only want the owner here for the purposes of defining a | |
3243 | * unique name for migration. TODO: Ideally we should implement | |
3244 | * a naming scheme for Objects which are not DeviceStates, in | |
3245 | * which case we can relax this restriction. | |
3246 | */ | |
3247 | owner_dev = DEVICE(owner); | |
3248 | vmstate_register_ram(mr, owner_dev); | |
3249 | } | |
3250 | ||
3251 | void memory_region_init_rom_device(MemoryRegion *mr, | |
3252 | struct Object *owner, | |
3253 | const MemoryRegionOps *ops, | |
3254 | void *opaque, | |
3255 | const char *name, | |
3256 | uint64_t size, | |
3257 | Error **errp) | |
3258 | { | |
3259 | DeviceState *owner_dev; | |
3260 | Error *err = NULL; | |
3261 | ||
3262 | memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque, | |
3263 | name, size, &err); | |
3264 | if (err) { | |
3265 | error_propagate(errp, err); | |
3266 | return; | |
3267 | } | |
3268 | /* This will assert if owner is neither NULL nor a DeviceState. | |
3269 | * We only want the owner here for the purposes of defining a | |
3270 | * unique name for migration. TODO: Ideally we should implement | |
3271 | * a naming scheme for Objects which are not DeviceStates, in | |
3272 | * which case we can relax this restriction. | |
3273 | */ | |
3274 | owner_dev = DEVICE(owner); | |
3275 | vmstate_register_ram(mr, owner_dev); | |
3276 | } | |
3277 | ||
e7d3222e AB |
3278 | /* |
3279 | * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for | |
3280 | * the fuzz_dma_read_cb callback | |
3281 | */ | |
3282 | #ifdef CONFIG_FUZZ | |
3283 | void __attribute__((weak)) fuzz_dma_read_cb(size_t addr, | |
3284 | size_t len, | |
3285 | MemoryRegion *mr, | |
3286 | bool is_write) | |
3287 | { | |
3288 | } | |
3289 | #endif | |
3290 | ||
b4fefef9 PC |
3291 | static const TypeInfo memory_region_info = { |
3292 | .parent = TYPE_OBJECT, | |
3293 | .name = TYPE_MEMORY_REGION, | |
1b53ecd9 | 3294 | .class_size = sizeof(MemoryRegionClass), |
b4fefef9 PC |
3295 | .instance_size = sizeof(MemoryRegion), |
3296 | .instance_init = memory_region_initfn, | |
3297 | .instance_finalize = memory_region_finalize, | |
3298 | }; | |
3299 | ||
3df9d748 AK |
3300 | static const TypeInfo iommu_memory_region_info = { |
3301 | .parent = TYPE_MEMORY_REGION, | |
3302 | .name = TYPE_IOMMU_MEMORY_REGION, | |
1221a474 | 3303 | .class_size = sizeof(IOMMUMemoryRegionClass), |
3df9d748 AK |
3304 | .instance_size = sizeof(IOMMUMemoryRegion), |
3305 | .instance_init = iommu_memory_region_initfn, | |
1221a474 | 3306 | .abstract = true, |
3df9d748 AK |
3307 | }; |
3308 | ||
b4fefef9 PC |
3309 | static void memory_register_types(void) |
3310 | { | |
3311 | type_register_static(&memory_region_info); | |
3df9d748 | 3312 | type_register_static(&iommu_memory_region_info); |
b4fefef9 PC |
3313 | } |
3314 | ||
3315 | type_init(memory_register_types) |