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memory: Have memory_region_init_rom() handler return a boolean
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CommitLineData
093bc2cd
AK
1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
093bc2cd
AK
14 */
15
d38ea87a 16#include "qemu/osdep.h"
21786c7e 17#include "qemu/log.h"
da34e65c 18#include "qapi/error.h"
022c62cb 19#include "exec/memory.h"
409ddd01 20#include "qapi/visitor.h"
1de7afc9 21#include "qemu/bitops.h"
8c56c1a5 22#include "qemu/error-report.h"
db725815 23#include "qemu/main-loop.h"
b6b71cb5 24#include "qemu/qemu-print.h"
2c9b15ca 25#include "qom/object.h"
8b7a5507 26#include "trace.h"
093bc2cd 27
022c62cb 28#include "exec/memory-internal.h"
220c3ebd 29#include "exec/ram_addr.h"
8c56c1a5 30#include "sysemu/kvm.h"
54d31236 31#include "sysemu/runstate.h"
14a48c1d 32#include "sysemu/tcg.h"
940e43aa 33#include "qemu/accel.h"
8072aae3 34#include "hw/boards.h"
b08199c6 35#include "migration/vmstate.h"
baa44bce 36#include "exec/address-spaces.h"
67d95c15 37
d197063f
PB
38//#define DEBUG_UNASSIGNED
39
22bde714
JK
40static unsigned memory_region_transaction_depth;
41static bool memory_region_update_pending;
4dc56152 42static bool ioeventfd_update_pending;
63b41db4 43unsigned int global_dirty_tracking;
7664e80c 44
eae3eb3e 45static QTAILQ_HEAD(, MemoryListener) memory_listeners
72e22d2f 46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 47
0d673e36
AK
48static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
967dc9b1
AK
51static GHashTable *flat_views;
52
093bc2cd
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53typedef struct AddrRange AddrRange;
54
8417cebf 55/*
c9cdaa3a 56 * Note that signed integers are needed for negative offsetting in aliases
8417cebf
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57 * (large MemoryRegion::alias_offset).
58 */
093bc2cd 59struct AddrRange {
08dafab4
AK
60 Int128 start;
61 Int128 size;
093bc2cd
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62};
63
08dafab4 64static AddrRange addrrange_make(Int128 start, Int128 size)
093bc2cd
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65{
66 return (AddrRange) { start, size };
67}
68
69static bool addrrange_equal(AddrRange r1, AddrRange r2)
70{
08dafab4 71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
093bc2cd
AK
72}
73
08dafab4 74static Int128 addrrange_end(AddrRange r)
093bc2cd 75{
08dafab4 76 return int128_add(r.start, r.size);
093bc2cd
AK
77}
78
08dafab4 79static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 80{
08dafab4 81 int128_addto(&range.start, delta);
093bc2cd
AK
82 return range;
83}
84
08dafab4
AK
85static bool addrrange_contains(AddrRange range, Int128 addr)
86{
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89}
90
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AK
91static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92{
08dafab4
AK
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
093bc2cd
AK
95}
96
97static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98{
08dafab4
AK
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
093bc2cd
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102}
103
0e0d36b4
AK
104enum ListenerDirection { Forward, Reverse };
105
7376e582 106#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
0e0d36b4
AK
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
975aefe0
AK
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
0e0d36b4
AK
116 } \
117 break; \
118 case Reverse: \
eae3eb3e 119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
975aefe0
AK
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
0e0d36b4
AK
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
9a54635d 130#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
7376e582
AK
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
eae3eb3e 136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
9a54635d 137 if (_listener->_callback) { \
7376e582
AK
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
eae3eb3e 143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
9a54635d 144 if (_listener->_callback) { \
7376e582
AK
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
dfde4e6e 154/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 155#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
9c1f8f44 156 do { \
16620684
AK
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
9a54635d 159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
9c1f8f44 160 } while(0)
0e0d36b4 161
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162struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165};
166
3e9d69e7
AK
167struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
753d5e14 171 EventNotifier *e;
3e9d69e7
AK
172};
173
73bb753d
TB
174static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
3e9d69e7 176{
73bb753d 177 if (int128_lt(a->addr.start, b->addr.start)) {
3e9d69e7 178 return true;
73bb753d 179 } else if (int128_gt(a->addr.start, b->addr.start)) {
3e9d69e7 180 return false;
73bb753d 181 } else if (int128_lt(a->addr.size, b->addr.size)) {
3e9d69e7 182 return true;
73bb753d 183 } else if (int128_gt(a->addr.size, b->addr.size)) {
3e9d69e7 184 return false;
73bb753d 185 } else if (a->match_data < b->match_data) {
3e9d69e7 186 return true;
73bb753d 187 } else if (a->match_data > b->match_data) {
3e9d69e7 188 return false;
73bb753d
TB
189 } else if (a->match_data) {
190 if (a->data < b->data) {
3e9d69e7 191 return true;
73bb753d 192 } else if (a->data > b->data) {
3e9d69e7
AK
193 return false;
194 }
195 }
73bb753d 196 if (a->e < b->e) {
3e9d69e7 197 return true;
73bb753d 198 } else if (a->e > b->e) {
3e9d69e7
AK
199 return false;
200 }
201 return false;
202}
203
73bb753d
TB
204static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
3e9d69e7 206{
e6ffd757
EA
207 if (int128_eq(a->addr.start, b->addr.start) &&
208 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
209 (int128_eq(a->addr.size, b->addr.size) &&
210 (a->match_data == b->match_data) &&
211 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
212 (a->e == b->e))))
213 return true;
214
215 return false;
3e9d69e7
AK
216}
217
093bc2cd
AK
218/* Range of memory in the global map. Addresses are absolute. */
219struct FlatRange {
220 MemoryRegion *mr;
a8170e5e 221 hwaddr offset_in_region;
093bc2cd 222 AddrRange addr;
5a583347 223 uint8_t dirty_log_mask;
b138e654 224 bool romd_mode;
fb1cd6f9 225 bool readonly;
c26763f8 226 bool nonvolatile;
533f5d66 227 bool unmergeable;
093bc2cd
AK
228};
229
093bc2cd
AK
230#define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
9c1f8f44 233static inline MemoryRegionSection
16620684 234section_from_flat_range(FlatRange *fr, FlatView *fv)
9c1f8f44
PB
235{
236 return (MemoryRegionSection) {
237 .mr = fr->mr,
16620684 238 .fv = fv,
9c1f8f44
PB
239 .offset_within_region = fr->offset_in_region,
240 .size = fr->addr.size,
241 .offset_within_address_space = int128_get64(fr->addr.start),
242 .readonly = fr->readonly,
c26763f8 243 .nonvolatile = fr->nonvolatile,
533f5d66 244 .unmergeable = fr->unmergeable,
9c1f8f44
PB
245 };
246}
247
093bc2cd
AK
248static bool flatrange_equal(FlatRange *a, FlatRange *b)
249{
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 252 && a->offset_in_region == b->offset_in_region
b138e654 253 && a->romd_mode == b->romd_mode
c26763f8 254 && a->readonly == b->readonly
533f5d66
DH
255 && a->nonvolatile == b->nonvolatile
256 && a->unmergeable == b->unmergeable;
093bc2cd
AK
257}
258
89c177bb 259static FlatView *flatview_new(MemoryRegion *mr_root)
093bc2cd 260{
cc94cd6d
AK
261 FlatView *view;
262
263 view = g_new0(FlatView, 1);
856d7245 264 view->ref = 1;
89c177bb
AK
265 view->root = mr_root;
266 memory_region_ref(mr_root);
02d9651d 267 trace_flatview_new(view, mr_root);
cc94cd6d
AK
268
269 return view;
093bc2cd
AK
270}
271
272/* Insert a range into a given position. Caller is responsible for maintaining
273 * sorting order.
274 */
275static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
276{
277 if (view->nr == view->nr_allocated) {
278 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 279 view->ranges = g_realloc(view->ranges,
093bc2cd
AK
280 view->nr_allocated * sizeof(*view->ranges));
281 }
282 memmove(view->ranges + pos + 1, view->ranges + pos,
283 (view->nr - pos) * sizeof(FlatRange));
284 view->ranges[pos] = *range;
dfde4e6e 285 memory_region_ref(range->mr);
093bc2cd
AK
286 ++view->nr;
287}
288
289static void flatview_destroy(FlatView *view)
290{
dfde4e6e
PB
291 int i;
292
02d9651d 293 trace_flatview_destroy(view, view->root);
66a6df1d
AK
294 if (view->dispatch) {
295 address_space_dispatch_free(view->dispatch);
296 }
dfde4e6e
PB
297 for (i = 0; i < view->nr; i++) {
298 memory_region_unref(view->ranges[i].mr);
299 }
7267c094 300 g_free(view->ranges);
89c177bb 301 memory_region_unref(view->root);
a9a0c06d 302 g_free(view);
093bc2cd
AK
303}
304
447b0d0b 305static bool flatview_ref(FlatView *view)
856d7245 306{
d73415a3 307 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
856d7245
PB
308}
309
48564041 310void flatview_unref(FlatView *view)
856d7245 311{
d73415a3 312 if (qatomic_fetch_dec(&view->ref) == 1) {
02d9651d 313 trace_flatview_destroy_rcu(view, view->root);
092aa2fc 314 assert(view->root);
66a6df1d 315 call_rcu(view, flatview_destroy, rcu);
856d7245
PB
316 }
317}
318
3d8e6bf9
AK
319static bool can_merge(FlatRange *r1, FlatRange *r2)
320{
08dafab4 321 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 322 && r1->mr == r2->mr
08dafab4
AK
323 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
324 r1->addr.size),
325 int128_make64(r2->offset_in_region))
d0a9b5bc 326 && r1->dirty_log_mask == r2->dirty_log_mask
b138e654 327 && r1->romd_mode == r2->romd_mode
c26763f8 328 && r1->readonly == r2->readonly
533f5d66
DH
329 && r1->nonvolatile == r2->nonvolatile
330 && !r1->unmergeable && !r2->unmergeable;
3d8e6bf9
AK
331}
332
8508e024 333/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK
334static void flatview_simplify(FlatView *view)
335{
838ec117 336 unsigned i, j, k;
3d8e6bf9
AK
337
338 i = 0;
339 while (i < view->nr) {
340 j = i + 1;
341 while (j < view->nr
342 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 343 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
AK
344 ++j;
345 }
346 ++i;
838ec117
KW
347 for (k = i; k < j; k++) {
348 memory_region_unref(view->ranges[k].mr);
349 }
3d8e6bf9
AK
350 memmove(&view->ranges[i], &view->ranges[j],
351 (view->nr - j) * sizeof(view->ranges[j]));
352 view->nr -= j - i;
353 }
354}
355
e7342aa3
PB
356static bool memory_region_big_endian(MemoryRegion *mr)
357{
ee3eb3a7 358#if TARGET_BIG_ENDIAN
e7342aa3
PB
359 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
360#else
361 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
362#endif
363}
364
9bf825bf 365static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
e11ef3d1 366{
9bf825bf
TN
367 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
368 switch (op & MO_SIZE) {
369 case MO_8:
e11ef3d1 370 break;
9bf825bf 371 case MO_16:
e11ef3d1
PB
372 *data = bswap16(*data);
373 break;
9bf825bf 374 case MO_32:
e11ef3d1
PB
375 *data = bswap32(*data);
376 break;
9bf825bf 377 case MO_64:
e11ef3d1
PB
378 *data = bswap64(*data);
379 break;
380 default:
9bf825bf 381 g_assert_not_reached();
e11ef3d1
PB
382 }
383 }
384}
385
3c754a93 386static inline void memory_region_shift_read_access(uint64_t *value,
98f52cdb 387 signed shift,
3c754a93
PMD
388 uint64_t mask,
389 uint64_t tmp)
390{
98f52cdb
PMD
391 if (shift >= 0) {
392 *value |= (tmp & mask) << shift;
393 } else {
394 *value |= (tmp & mask) >> -shift;
395 }
3c754a93
PMD
396}
397
398static inline uint64_t memory_region_shift_write_access(uint64_t *value,
98f52cdb 399 signed shift,
3c754a93
PMD
400 uint64_t mask)
401{
98f52cdb
PMD
402 uint64_t tmp;
403
404 if (shift >= 0) {
405 tmp = (*value >> shift) & mask;
406 } else {
407 tmp = (*value << -shift) & mask;
408 }
409
410 return tmp;
3c754a93
PMD
411}
412
4779dc1d
HB
413static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
414{
415 MemoryRegion *root;
416 hwaddr abs_addr = offset;
417
418 abs_addr += mr->addr;
419 for (root = mr; root->container; ) {
420 root = root->container;
421 abs_addr += root->addr;
422 }
423
424 return abs_addr;
425}
426
5a68be94
HB
427static int get_cpu_index(void)
428{
429 if (current_cpu) {
430 return current_cpu->cpu_index;
431 }
432 return -1;
433}
434
cc05c43a 435static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
436 hwaddr addr,
437 uint64_t *value,
438 unsigned size,
98f52cdb 439 signed shift,
cc05c43a
PM
440 uint64_t mask,
441 MemTxAttrs attrs)
ce5d2f33 442{
ce5d2f33
PB
443 uint64_t tmp;
444
cc05c43a 445 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 446 if (mr->subpage) {
5a68be94 447 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
380ea843 448 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
4779dc1d 449 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
450 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
451 memory_region_name(mr));
23d92d68 452 }
3c754a93 453 memory_region_shift_read_access(value, shift, mask, tmp);
cc05c43a 454 return MEMTX_OK;
ce5d2f33
PB
455}
456
cc05c43a
PM
457static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
458 hwaddr addr,
459 uint64_t *value,
460 unsigned size,
98f52cdb 461 signed shift,
cc05c43a
PM
462 uint64_t mask,
463 MemTxAttrs attrs)
164a4dcd 464{
cc05c43a
PM
465 uint64_t tmp = 0;
466 MemTxResult r;
164a4dcd 467
cc05c43a 468 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 469 if (mr->subpage) {
5a68be94 470 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
380ea843 471 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
4779dc1d 472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
474 memory_region_name(mr));
23d92d68 475 }
3c754a93 476 memory_region_shift_read_access(value, shift, mask, tmp);
cc05c43a 477 return r;
164a4dcd
AK
478}
479
cc05c43a
PM
480static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
481 hwaddr addr,
482 uint64_t *value,
483 unsigned size,
98f52cdb 484 signed shift,
cc05c43a
PM
485 uint64_t mask,
486 MemTxAttrs attrs)
164a4dcd 487{
3c754a93 488 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
164a4dcd 489
23d92d68 490 if (mr->subpage) {
5a68be94 491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
380ea843 492 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
4779dc1d 493 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
494 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
495 memory_region_name(mr));
23d92d68 496 }
164a4dcd 497 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 498 return MEMTX_OK;
164a4dcd
AK
499}
500
cc05c43a
PM
501static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
502 hwaddr addr,
503 uint64_t *value,
504 unsigned size,
98f52cdb 505 signed shift,
cc05c43a
PM
506 uint64_t mask,
507 MemTxAttrs attrs)
508{
3c754a93 509 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
cc05c43a 510
23d92d68 511 if (mr->subpage) {
5a68be94 512 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
380ea843 513 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
4779dc1d 514 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
515 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
516 memory_region_name(mr));
23d92d68 517 }
cc05c43a
PM
518 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
519}
520
521static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
522 uint64_t *value,
523 unsigned size,
524 unsigned access_size_min,
525 unsigned access_size_max,
05e015f7
KF
526 MemTxResult (*access_fn)
527 (MemoryRegion *mr,
528 hwaddr addr,
529 uint64_t *value,
530 unsigned size,
98f52cdb 531 signed shift,
05e015f7
KF
532 uint64_t mask,
533 MemTxAttrs attrs),
cc05c43a
PM
534 MemoryRegion *mr,
535 MemTxAttrs attrs)
164a4dcd
AK
536{
537 uint64_t access_mask;
538 unsigned access_size;
539 unsigned i;
cc05c43a 540 MemTxResult r = MEMTX_OK;
3884bf64 541 bool reentrancy_guard_applied = false;
164a4dcd
AK
542
543 if (!access_size_min) {
544 access_size_min = 1;
545 }
546 if (!access_size_max) {
547 access_size_max = 4;
548 }
ce5d2f33 549
a2e1753b
AB
550 /* Do not allow more than one simultaneous access to a device's IO Regions */
551 if (mr->dev && !mr->disable_reentrancy_guard &&
552 !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
553 if (mr->dev->mem_reentrancy_guard.engaged_in_io) {
554 warn_report_once("Blocked re-entrant IO on MemoryRegion: "
555 "%s at addr: 0x%" HWADDR_PRIX,
556 memory_region_name(mr), addr);
557 return MEMTX_ACCESS_ERROR;
558 }
559 mr->dev->mem_reentrancy_guard.engaged_in_io = true;
3884bf64 560 reentrancy_guard_applied = true;
a2e1753b
AB
561 }
562
ce5d2f33 563 /* FIXME: support unaligned access? */
164a4dcd 564 access_size = MAX(MIN(size, access_size_max), access_size_min);
36960b4d 565 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
e7342aa3
PB
566 if (memory_region_big_endian(mr)) {
567 for (i = 0; i < size; i += access_size) {
05e015f7 568 r |= access_fn(mr, addr + i, value, access_size,
cc05c43a 569 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB
570 }
571 } else {
572 for (i = 0; i < size; i += access_size) {
05e015f7 573 r |= access_fn(mr, addr + i, value, access_size, i * 8,
cc05c43a 574 access_mask, attrs);
e7342aa3 575 }
164a4dcd 576 }
3884bf64 577 if (mr->dev && reentrancy_guard_applied) {
a2e1753b
AB
578 mr->dev->mem_reentrancy_guard.engaged_in_io = false;
579 }
cc05c43a 580 return r;
164a4dcd
AK
581}
582
e2177955
AK
583static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
584{
0d673e36
AK
585 AddressSpace *as;
586
feca4ac1
PB
587 while (mr->container) {
588 mr = mr->container;
e2177955 589 }
0d673e36
AK
590 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
591 if (mr == as->root) {
592 return as;
593 }
e2177955 594 }
eed2bacf 595 return NULL;
e2177955
AK
596}
597
093bc2cd
AK
598/* Render a memory region into the global view. Ranges in @view obscure
599 * ranges in @mr.
600 */
601static void render_memory_region(FlatView *view,
602 MemoryRegion *mr,
08dafab4 603 Int128 base,
fb1cd6f9 604 AddrRange clip,
c26763f8 605 bool readonly,
533f5d66
DH
606 bool nonvolatile,
607 bool unmergeable)
093bc2cd
AK
608{
609 MemoryRegion *subregion;
610 unsigned i;
a8170e5e 611 hwaddr offset_in_region;
08dafab4
AK
612 Int128 remain;
613 Int128 now;
093bc2cd
AK
614 FlatRange fr;
615 AddrRange tmp;
616
6bba19ba
AK
617 if (!mr->enabled) {
618 return;
619 }
620
08dafab4 621 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 622 readonly |= mr->readonly;
c26763f8 623 nonvolatile |= mr->nonvolatile;
533f5d66 624 unmergeable |= mr->unmergeable;
093bc2cd
AK
625
626 tmp = addrrange_make(base, mr->size);
627
628 if (!addrrange_intersects(tmp, clip)) {
629 return;
630 }
631
632 clip = addrrange_intersection(tmp, clip);
633
634 if (mr->alias) {
08dafab4
AK
635 int128_subfrom(&base, int128_make64(mr->alias->addr));
636 int128_subfrom(&base, int128_make64(mr->alias_offset));
c26763f8 637 render_memory_region(view, mr->alias, base, clip,
533f5d66 638 readonly, nonvolatile, unmergeable);
093bc2cd
AK
639 return;
640 }
641
642 /* Render subregions in priority order. */
643 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
c26763f8 644 render_memory_region(view, subregion, base, clip,
533f5d66 645 readonly, nonvolatile, unmergeable);
093bc2cd
AK
646 }
647
14a3c10a 648 if (!mr->terminates) {
093bc2cd
AK
649 return;
650 }
651
08dafab4 652 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
653 base = clip.start;
654 remain = clip.size;
655
2eb74e1a 656 fr.mr = mr;
6f6a5ef3 657 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
b138e654 658 fr.romd_mode = mr->romd_mode;
2eb74e1a 659 fr.readonly = readonly;
c26763f8 660 fr.nonvolatile = nonvolatile;
533f5d66 661 fr.unmergeable = unmergeable;
2eb74e1a 662
093bc2cd 663 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
664 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
665 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
666 continue;
667 }
08dafab4
AK
668 if (int128_lt(base, view->ranges[i].addr.start)) {
669 now = int128_min(remain,
670 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK
671 fr.offset_in_region = offset_in_region;
672 fr.addr = addrrange_make(base, now);
673 flatview_insert(view, i, &fr);
674 ++i;
08dafab4
AK
675 int128_addto(&base, now);
676 offset_in_region += int128_get64(now);
677 int128_subfrom(&remain, now);
093bc2cd 678 }
d26a8cae
AK
679 now = int128_sub(int128_min(int128_add(base, remain),
680 addrrange_end(view->ranges[i].addr)),
681 base);
682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
093bc2cd 685 }
08dafab4 686 if (int128_nz(remain)) {
093bc2cd
AK
687 fr.offset_in_region = offset_in_region;
688 fr.addr = addrrange_make(base, remain);
689 flatview_insert(view, i, &fr);
690 }
691}
692
fb5ef4ee
AB
693void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
694{
695 FlatRange *fr;
696
697 assert(fv);
698 assert(cb);
699
700 FOR_EACH_FLAT_RANGE(fr, fv) {
b3566001
PM
701 if (cb(fr->addr.start, fr->addr.size, fr->mr,
702 fr->offset_in_region, opaque)) {
fb5ef4ee 703 break;
b3566001 704 }
fb5ef4ee
AB
705 }
706}
707
89c177bb
AK
708static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
709{
e673ba9a
PB
710 while (mr->enabled) {
711 if (mr->alias) {
712 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
713 /* The alias is included in its entirety. Use it as
714 * the "real" root, so that we can share more FlatViews.
715 */
716 mr = mr->alias;
717 continue;
718 }
719 } else if (!mr->terminates) {
720 unsigned int found = 0;
721 MemoryRegion *child, *next = NULL;
722 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
723 if (child->enabled) {
724 if (++found > 1) {
725 next = NULL;
726 break;
727 }
728 if (!child->addr && int128_ge(mr->size, child->size)) {
729 /* A child is included in its entirety. If it's the only
730 * enabled one, use it in the hope of finding an alias down the
731 * way. This will also let us share FlatViews.
732 */
733 next = child;
734 }
735 }
736 }
092aa2fc
AK
737 if (found == 0) {
738 return NULL;
739 }
e673ba9a
PB
740 if (next) {
741 mr = next;
742 continue;
743 }
744 }
745
092aa2fc 746 return mr;
89c177bb
AK
747 }
748
092aa2fc 749 return NULL;
89c177bb
AK
750}
751
093bc2cd 752/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 753static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 754{
9bf561e3 755 int i;
a9a0c06d 756 FlatView *view;
093bc2cd 757
89c177bb 758 view = flatview_new(mr);
093bc2cd 759
83f3c251 760 if (mr) {
a9a0c06d 761 render_memory_region(view, mr, int128_zero(),
c26763f8 762 addrrange_make(int128_zero(), int128_2_64()),
533f5d66 763 false, false, false);
83f3c251 764 }
a9a0c06d 765 flatview_simplify(view);
093bc2cd 766
9bf561e3
AK
767 view->dispatch = address_space_dispatch_new(view);
768 for (i = 0; i < view->nr; i++) {
769 MemoryRegionSection mrs =
770 section_from_flat_range(&view->ranges[i], view);
771 flatview_add_to_dispatch(view, &mrs);
772 }
773 address_space_dispatch_compact(view->dispatch);
967dc9b1 774 g_hash_table_replace(flat_views, mr, view);
9bf561e3 775
093bc2cd
AK
776 return view;
777}
778
3e9d69e7
AK
779static void address_space_add_del_ioeventfds(AddressSpace *as,
780 MemoryRegionIoeventfd *fds_new,
781 unsigned fds_new_nb,
782 MemoryRegionIoeventfd *fds_old,
783 unsigned fds_old_nb)
784{
785 unsigned iold, inew;
80a1ea37
AK
786 MemoryRegionIoeventfd *fd;
787 MemoryRegionSection section;
3e9d69e7
AK
788
789 /* Generate a symmetric difference of the old and new fd sets, adding
790 * and deleting as necessary.
791 */
792
793 iold = inew = 0;
794 while (iold < fds_old_nb || inew < fds_new_nb) {
795 if (iold < fds_old_nb
796 && (inew == fds_new_nb
73bb753d
TB
797 || memory_region_ioeventfd_before(&fds_old[iold],
798 &fds_new[inew]))) {
80a1ea37
AK
799 fd = &fds_old[iold];
800 section = (MemoryRegionSection) {
16620684 801 .fv = address_space_to_flatview(as),
80a1ea37 802 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 803 .size = fd->addr.size,
80a1ea37 804 };
9a54635d 805 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
753d5e14 806 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
807 ++iold;
808 } else if (inew < fds_new_nb
809 && (iold == fds_old_nb
73bb753d
TB
810 || memory_region_ioeventfd_before(&fds_new[inew],
811 &fds_old[iold]))) {
80a1ea37
AK
812 fd = &fds_new[inew];
813 section = (MemoryRegionSection) {
16620684 814 .fv = address_space_to_flatview(as),
80a1ea37 815 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 816 .size = fd->addr.size,
80a1ea37 817 };
9a54635d 818 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
753d5e14 819 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
820 ++inew;
821 } else {
822 ++iold;
823 ++inew;
824 }
825 }
826}
827
48564041 828FlatView *address_space_get_flatview(AddressSpace *as)
856d7245
PB
829{
830 FlatView *view;
831
694ea274 832 RCU_READ_LOCK_GUARD();
447b0d0b 833 do {
16620684 834 view = address_space_to_flatview(as);
447b0d0b
PB
835 /* If somebody has replaced as->current_map concurrently,
836 * flatview_ref returns false.
837 */
838 } while (!flatview_ref(view));
856d7245
PB
839 return view;
840}
841
3e9d69e7
AK
842static void address_space_update_ioeventfds(AddressSpace *as)
843{
99e86347 844 FlatView *view;
3e9d69e7
AK
845 FlatRange *fr;
846 unsigned ioeventfd_nb = 0;
920d557e
SH
847 unsigned ioeventfd_max;
848 MemoryRegionIoeventfd *ioeventfds;
3e9d69e7
AK
849 AddrRange tmp;
850 unsigned i;
851
544cff46 852 if (!as->ioeventfd_notifiers) {
853 return;
854 }
855
920d557e
SH
856 /*
857 * It is likely that the number of ioeventfds hasn't changed much, so use
858 * the previous size as the starting value, with some headroom to avoid
859 * gratuitous reallocations.
860 */
861 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
862 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
863
856d7245 864 view = address_space_get_flatview(as);
99e86347 865 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
866 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
867 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
868 int128_sub(fr->addr.start,
869 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
870 if (addrrange_intersects(fr->addr, tmp)) {
871 ++ioeventfd_nb;
920d557e
SH
872 if (ioeventfd_nb > ioeventfd_max) {
873 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
874 ioeventfds = g_realloc(ioeventfds,
875 ioeventfd_max * sizeof(*ioeventfds));
876 }
3e9d69e7
AK
877 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
878 ioeventfds[ioeventfd_nb-1].addr = tmp;
879 }
880 }
881 }
882
883 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
884 as->ioeventfds, as->ioeventfd_nb);
885
7267c094 886 g_free(as->ioeventfds);
3e9d69e7
AK
887 as->ioeventfds = ioeventfds;
888 as->ioeventfd_nb = ioeventfd_nb;
856d7245 889 flatview_unref(view);
3e9d69e7
AK
890}
891
23f1174a
PX
892/*
893 * Notify the memory listeners about the coalesced IO change events of
894 * range `cmr'. Only the part that has intersection of the specified
895 * FlatRange will be sent.
896 */
897static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
898 CoalescedMemoryRange *cmr, bool add)
899{
900 AddrRange tmp;
901
902 tmp = addrrange_shift(cmr->addr,
903 int128_sub(fr->addr.start,
904 int128_make64(fr->offset_in_region)));
905 if (!addrrange_intersects(tmp, fr->addr)) {
906 return;
907 }
908 tmp = addrrange_intersection(tmp, fr->addr);
909
910 if (add) {
911 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
912 int128_get64(tmp.start),
913 int128_get64(tmp.size));
914 } else {
915 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
916 int128_get64(tmp.start),
917 int128_get64(tmp.size));
918 }
919}
920
909bf763
PB
921static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
922{
23f1174a
PX
923 CoalescedMemoryRange *cmr;
924
23f1174a
PX
925 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
926 flat_range_coalesced_io_notify(fr, as, cmr, false);
927 }
909bf763
PB
928}
929
930static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
931{
932 MemoryRegion *mr = fr->mr;
933 CoalescedMemoryRange *cmr;
909bf763 934
1f7af804
PB
935 if (QTAILQ_EMPTY(&mr->coalesced)) {
936 return;
937 }
938
909bf763 939 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
23f1174a 940 flat_range_coalesced_io_notify(fr, as, cmr, true);
909bf763
PB
941 }
942}
943
b8af1afb 944static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
945 const FlatView *old_view,
946 const FlatView *new_view,
b8af1afb 947 bool adding)
093bc2cd 948{
093bc2cd
AK
949 unsigned iold, inew;
950 FlatRange *frold, *frnew;
093bc2cd
AK
951
952 /* Generate a symmetric difference of the old and new memory maps.
953 * Kill ranges in the old map, and instantiate ranges in the new map.
954 */
955 iold = inew = 0;
a9a0c06d
PB
956 while (iold < old_view->nr || inew < new_view->nr) {
957 if (iold < old_view->nr) {
958 frold = &old_view->ranges[iold];
093bc2cd
AK
959 } else {
960 frold = NULL;
961 }
a9a0c06d
PB
962 if (inew < new_view->nr) {
963 frnew = &new_view->ranges[inew];
093bc2cd
AK
964 } else {
965 frnew = NULL;
966 }
967
968 if (frold
969 && (!frnew
08dafab4
AK
970 || int128_lt(frold->addr.start, frnew->addr.start)
971 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 972 && !flatrange_equal(frold, frnew)))) {
41a6e477 973 /* In old but not in new, or in both but attributes changed. */
093bc2cd 974
b8af1afb 975 if (!adding) {
3ac7d43a 976 flat_range_coalesced_io_del(frold, as);
72e22d2f 977 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
978 }
979
093bc2cd
AK
980 ++iold;
981 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 982 /* In both and unchanged (except logging may have changed) */
093bc2cd 983
4f826024 984 if (adding) {
50c1e149 985 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB
986 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
987 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
988 frold->dirty_log_mask,
989 frnew->dirty_log_mask);
990 }
991 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
992 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
993 frold->dirty_log_mask,
994 frnew->dirty_log_mask);
b8af1afb 995 }
5a583347
AK
996 }
997
093bc2cd
AK
998 ++iold;
999 ++inew;
093bc2cd
AK
1000 } else {
1001 /* In new */
1002
b8af1afb 1003 if (adding) {
72e22d2f 1004 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
3ac7d43a 1005 flat_range_coalesced_io_add(frnew, as);
b8af1afb
AK
1006 }
1007
093bc2cd
AK
1008 ++inew;
1009 }
1010 }
b8af1afb
AK
1011}
1012
967dc9b1
AK
1013static void flatviews_init(void)
1014{
092aa2fc
AK
1015 static FlatView *empty_view;
1016
967dc9b1
AK
1017 if (flat_views) {
1018 return;
1019 }
1020
1021 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
1022 (GDestroyNotify) flatview_unref);
092aa2fc
AK
1023 if (!empty_view) {
1024 empty_view = generate_memory_topology(NULL);
1025 /* We keep it alive forever in the global variable. */
1026 flatview_ref(empty_view);
1027 } else {
1028 g_hash_table_replace(flat_views, NULL, empty_view);
1029 flatview_ref(empty_view);
1030 }
967dc9b1
AK
1031}
1032
1033static void flatviews_reset(void)
1034{
1035 AddressSpace *as;
1036
1037 if (flat_views) {
1038 g_hash_table_unref(flat_views);
1039 flat_views = NULL;
1040 }
1041 flatviews_init();
1042
1043 /* Render unique FVs */
1044 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1045 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1046
1047 if (g_hash_table_lookup(flat_views, physmr)) {
1048 continue;
1049 }
1050
1051 generate_memory_topology(physmr);
1052 }
1053}
1054
1055static void address_space_set_flatview(AddressSpace *as)
b8af1afb 1056{
67ace39b 1057 FlatView *old_view = address_space_to_flatview(as);
967dc9b1
AK
1058 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1059 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1060
1061 assert(new_view);
1062
67ace39b
AK
1063 if (old_view == new_view) {
1064 return;
1065 }
1066
1067 if (old_view) {
1068 flatview_ref(old_view);
1069 }
1070
967dc9b1 1071 flatview_ref(new_view);
9a62e24f
AK
1072
1073 if (!QTAILQ_EMPTY(&as->listeners)) {
67ace39b
AK
1074 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1075
1076 if (!old_view2) {
1077 old_view2 = &tmpview;
1078 }
1079 address_space_update_topology_pass(as, old_view2, new_view, false);
1080 address_space_update_topology_pass(as, old_view2, new_view, true);
9a62e24f 1081 }
b8af1afb 1082
374f2981 1083 /* Writes are protected by the BQL. */
d73415a3 1084 qatomic_rcu_set(&as->current_map, new_view);
67ace39b
AK
1085 if (old_view) {
1086 flatview_unref(old_view);
1087 }
856d7245
PB
1088
1089 /* Note that all the old MemoryRegions are still alive up to this
1090 * point. This relieves most MemoryListeners from the need to
1091 * ref/unref the MemoryRegions they get---unless they use them
1092 * outside the iothread mutex, in which case precise reference
1093 * counting is necessary.
1094 */
67ace39b
AK
1095 if (old_view) {
1096 flatview_unref(old_view);
1097 }
093bc2cd
AK
1098}
1099
202fc01b
AK
1100static void address_space_update_topology(AddressSpace *as)
1101{
1102 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1103
1104 flatviews_init();
1105 if (!g_hash_table_lookup(flat_views, physmr)) {
1106 generate_memory_topology(physmr);
1107 }
1108 address_space_set_flatview(as);
1109}
1110
4ef4db86
AK
1111void memory_region_transaction_begin(void)
1112{
bb880ded 1113 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
1114 ++memory_region_transaction_depth;
1115}
1116
1117void memory_region_transaction_commit(void)
1118{
0d673e36
AK
1119 AddressSpace *as;
1120
4ef4db86 1121 assert(memory_region_transaction_depth);
8d04fb55
JK
1122 assert(qemu_mutex_iothread_locked());
1123
4ef4db86 1124 --memory_region_transaction_depth;
4dc56152
GA
1125 if (!memory_region_transaction_depth) {
1126 if (memory_region_update_pending) {
967dc9b1
AK
1127 flatviews_reset();
1128
4dc56152 1129 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 1130
4dc56152 1131 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
967dc9b1 1132 address_space_set_flatview(as);
02218487 1133 address_space_update_ioeventfds(as);
4dc56152 1134 }
ade9c1aa 1135 memory_region_update_pending = false;
0b152095 1136 ioeventfd_update_pending = false;
4dc56152
GA
1137 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1138 } else if (ioeventfd_update_pending) {
1139 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1140 address_space_update_ioeventfds(as);
1141 }
ade9c1aa 1142 ioeventfd_update_pending = false;
4dc56152 1143 }
4dc56152 1144 }
4ef4db86
AK
1145}
1146
545e92e0
AK
1147static void memory_region_destructor_none(MemoryRegion *mr)
1148{
1149}
1150
1151static void memory_region_destructor_ram(MemoryRegion *mr)
1152{
f1060c55 1153 qemu_ram_free(mr->ram_block);
545e92e0
AK
1154}
1155
b4fefef9
PC
1156static bool memory_region_need_escape(char c)
1157{
1158 return c == '/' || c == '[' || c == '\\' || c == ']';
1159}
1160
1161static char *memory_region_escape_name(const char *name)
1162{
1163 const char *p;
1164 char *escaped, *q;
1165 uint8_t c;
1166 size_t bytes = 0;
1167
1168 for (p = name; *p; p++) {
1169 bytes += memory_region_need_escape(*p) ? 4 : 1;
1170 }
1171 if (bytes == p - name) {
1172 return g_memdup(name, bytes + 1);
1173 }
1174
1175 escaped = g_malloc(bytes + 1);
1176 for (p = name, q = escaped; *p; p++) {
1177 c = *p;
1178 if (unlikely(memory_region_need_escape(c))) {
1179 *q++ = '\\';
1180 *q++ = 'x';
1181 *q++ = "0123456789abcdef"[c >> 4];
1182 c = "0123456789abcdef"[c & 15];
1183 }
1184 *q++ = c;
1185 }
1186 *q = 0;
1187 return escaped;
1188}
1189
3df9d748
AK
1190static void memory_region_do_init(MemoryRegion *mr,
1191 Object *owner,
1192 const char *name,
1193 uint64_t size)
093bc2cd 1194{
08dafab4
AK
1195 mr->size = int128_make64(size);
1196 if (size == UINT64_MAX) {
1197 mr->size = int128_2_64();
1198 }
302fa283 1199 mr->name = g_strdup(name);
612263cf 1200 mr->owner = owner;
a2e1753b 1201 mr->dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
58eaa217 1202 mr->ram_block = NULL;
b4fefef9
PC
1203
1204 if (name) {
843ef73a
PC
1205 char *escaped_name = memory_region_escape_name(name);
1206 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB
1207
1208 if (!owner) {
1209 owner = container_get(qdev_get_machine(), "/unattached");
1210 }
1211
d2623129 1212 object_property_add_child(owner, name_array, OBJECT(mr));
b4fefef9 1213 object_unref(OBJECT(mr));
843ef73a
PC
1214 g_free(name_array);
1215 g_free(escaped_name);
b4fefef9
PC
1216 }
1217}
1218
3df9d748
AK
1219void memory_region_init(MemoryRegion *mr,
1220 Object *owner,
1221 const char *name,
1222 uint64_t size)
1223{
1224 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1225 memory_region_do_init(mr, owner, name, size);
1226}
1227
d7bce999
EB
1228static void memory_region_get_container(Object *obj, Visitor *v,
1229 const char *name, void *opaque,
1230 Error **errp)
409ddd01
PC
1231{
1232 MemoryRegion *mr = MEMORY_REGION(obj);
ddfb0baa 1233 char *path = (char *)"";
409ddd01
PC
1234
1235 if (mr->container) {
1236 path = object_get_canonical_path(OBJECT(mr->container));
1237 }
51e72bc1 1238 visit_type_str(v, name, &path, errp);
409ddd01
PC
1239 if (mr->container) {
1240 g_free(path);
1241 }
1242}
1243
1244static Object *memory_region_resolve_container(Object *obj, void *opaque,
1245 const char *part)
1246{
1247 MemoryRegion *mr = MEMORY_REGION(obj);
1248
1249 return OBJECT(mr->container);
1250}
1251
d7bce999
EB
1252static void memory_region_get_priority(Object *obj, Visitor *v,
1253 const char *name, void *opaque,
1254 Error **errp)
d33382da
PC
1255{
1256 MemoryRegion *mr = MEMORY_REGION(obj);
1257 int32_t value = mr->priority;
1258
51e72bc1 1259 visit_type_int32(v, name, &value, errp);
d33382da
PC
1260}
1261
d7bce999
EB
1262static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1263 void *opaque, Error **errp)
52aef7bb
PC
1264{
1265 MemoryRegion *mr = MEMORY_REGION(obj);
1266 uint64_t value = memory_region_size(mr);
1267
51e72bc1 1268 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC
1269}
1270
b4fefef9
PC
1271static void memory_region_initfn(Object *obj)
1272{
1273 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1274 ObjectProperty *op;
b4fefef9
PC
1275
1276 mr->ops = &unassigned_mem_ops;
6bba19ba 1277 mr->enabled = true;
5f9a5ea1 1278 mr->romd_mode = true;
545e92e0 1279 mr->destructor = memory_region_destructor_none;
093bc2cd 1280 QTAILQ_INIT(&mr->subregions);
093bc2cd 1281 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
1282
1283 op = object_property_add(OBJECT(mr), "container",
1284 "link<" TYPE_MEMORY_REGION ">",
1285 memory_region_get_container,
1286 NULL, /* memory_region_set_container */
d2623129 1287 NULL, NULL);
409ddd01
PC
1288 op->resolve = memory_region_resolve_container;
1289
64a7b8de 1290 object_property_add_uint64_ptr(OBJECT(mr), "addr",
d2623129 1291 &mr->addr, OBJ_PROP_FLAG_READ);
d33382da
PC
1292 object_property_add(OBJECT(mr), "priority", "uint32",
1293 memory_region_get_priority,
1294 NULL, /* memory_region_set_priority */
d2623129 1295 NULL, NULL);
52aef7bb
PC
1296 object_property_add(OBJECT(mr), "size", "uint64",
1297 memory_region_get_size,
1298 NULL, /* memory_region_set_size, */
d2623129 1299 NULL, NULL);
093bc2cd
AK
1300}
1301
3df9d748
AK
1302static void iommu_memory_region_initfn(Object *obj)
1303{
1304 MemoryRegion *mr = MEMORY_REGION(obj);
1305
1306 mr->is_iommu = true;
1307}
1308
b018ddf6
PB
1309static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1310 unsigned size)
1311{
1312#ifdef DEBUG_UNASSIGNED
883f2c59 1313 printf("Unassigned mem read " HWADDR_FMT_plx "\n", addr);
b018ddf6 1314#endif
68a7439a 1315 return 0;
b018ddf6
PB
1316}
1317
1318static void unassigned_mem_write(void *opaque, hwaddr addr,
1319 uint64_t val, unsigned size)
1320{
1321#ifdef DEBUG_UNASSIGNED
883f2c59 1322 printf("Unassigned mem write " HWADDR_FMT_plx " = 0x%"PRIx64"\n", addr, val);
b018ddf6 1323#endif
b018ddf6
PB
1324}
1325
d197063f 1326static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
8372d383
PM
1327 unsigned size, bool is_write,
1328 MemTxAttrs attrs)
d197063f
PB
1329{
1330 return false;
1331}
1332
1333const MemoryRegionOps unassigned_mem_ops = {
1334 .valid.accepts = unassigned_mem_accepts,
1335 .endianness = DEVICE_NATIVE_ENDIAN,
1336};
1337
4a2e242b
AW
1338static uint64_t memory_region_ram_device_read(void *opaque,
1339 hwaddr addr, unsigned size)
1340{
1341 MemoryRegion *mr = opaque;
2b8fe81b 1342 uint64_t data = ldn_he_p(mr->ram_block->host + addr, size);
4a2e242b
AW
1343
1344 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1345
1346 return data;
1347}
1348
1349static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1350 uint64_t data, unsigned size)
1351{
1352 MemoryRegion *mr = opaque;
1353
1354 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1355
2b8fe81b 1356 stn_he_p(mr->ram_block->host + addr, size, data);
4a2e242b
AW
1357}
1358
1359static const MemoryRegionOps ram_device_mem_ops = {
1360 .read = memory_region_ram_device_read,
1361 .write = memory_region_ram_device_write,
c99a29e7 1362 .endianness = DEVICE_HOST_ENDIAN,
4a2e242b
AW
1363 .valid = {
1364 .min_access_size = 1,
1365 .max_access_size = 8,
1366 .unaligned = true,
1367 },
1368 .impl = {
1369 .min_access_size = 1,
1370 .max_access_size = 8,
1371 .unaligned = true,
1372 },
1373};
1374
d2702032
PB
1375bool memory_region_access_valid(MemoryRegion *mr,
1376 hwaddr addr,
1377 unsigned size,
6d7b9a6c
PM
1378 bool is_write,
1379 MemTxAttrs attrs)
093bc2cd 1380{
5d971f9e
MT
1381 if (mr->ops->valid.accepts
1382 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
7a7142f0
BZ
1383 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1384 ", size %u, region '%s', reason: rejected\n",
1385 is_write ? "write" : "read",
21786c7e 1386 addr, size, memory_region_name(mr));
093bc2cd
AK
1387 return false;
1388 }
1389
5d971f9e 1390 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
7a7142f0
BZ
1391 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1392 ", size %u, region '%s', reason: unaligned\n",
1393 is_write ? "write" : "read",
21786c7e 1394 addr, size, memory_region_name(mr));
5d971f9e 1395 return false;
a014ed07
PB
1396 }
1397
5d971f9e 1398 /* Treat zero as compatibility all valid */
a014ed07 1399 if (!mr->ops->valid.max_access_size) {
5d971f9e 1400 return true;
a014ed07
PB
1401 }
1402
5d971f9e
MT
1403 if (size > mr->ops->valid.max_access_size
1404 || size < mr->ops->valid.min_access_size) {
7a7142f0
BZ
1405 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1406 ", size %u, region '%s', reason: invalid size "
1407 "(min:%u max:%u)\n",
1408 is_write ? "write" : "read",
21786c7e
PMD
1409 addr, size, memory_region_name(mr),
1410 mr->ops->valid.min_access_size,
1411 mr->ops->valid.max_access_size);
5d971f9e 1412 return false;
093bc2cd
AK
1413 }
1414 return true;
1415}
1416
cc05c43a
PM
1417static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1418 hwaddr addr,
1419 uint64_t *pval,
1420 unsigned size,
1421 MemTxAttrs attrs)
093bc2cd 1422{
cc05c43a 1423 *pval = 0;
093bc2cd 1424
ce5d2f33 1425 if (mr->ops->read) {
cc05c43a
PM
1426 return access_with_adjusted_size(addr, pval, size,
1427 mr->ops->impl.min_access_size,
1428 mr->ops->impl.max_access_size,
1429 memory_region_read_accessor,
1430 mr, attrs);
62a0db94 1431 } else {
cc05c43a
PM
1432 return access_with_adjusted_size(addr, pval, size,
1433 mr->ops->impl.min_access_size,
1434 mr->ops->impl.max_access_size,
1435 memory_region_read_with_attrs_accessor,
1436 mr, attrs);
74901c3b 1437 }
093bc2cd
AK
1438}
1439
3b643495
PM
1440MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1441 hwaddr addr,
1442 uint64_t *pval,
e67c9046 1443 MemOp op,
3b643495 1444 MemTxAttrs attrs)
a621f38d 1445{
e67c9046 1446 unsigned size = memop_size(op);
cc05c43a
PM
1447 MemTxResult r;
1448
1a59bdba
PMD
1449 if (mr->alias) {
1450 return memory_region_dispatch_read(mr->alias,
1451 mr->alias_offset + addr,
1452 pval, op, attrs);
1453 }
6d7b9a6c 1454 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
791af8c8 1455 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1456 return MEMTX_DECODE_ERROR;
791af8c8 1457 }
a621f38d 1458
cc05c43a 1459 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
9bf825bf 1460 adjust_endianness(mr, pval, op);
cc05c43a 1461 return r;
a621f38d 1462}
093bc2cd 1463
8c56c1a5
PF
1464/* Return true if an eventfd was signalled */
1465static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1466 hwaddr addr,
1467 uint64_t data,
1468 unsigned size,
1469 MemTxAttrs attrs)
1470{
1471 MemoryRegionIoeventfd ioeventfd = {
1472 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1473 .data = data,
1474 };
1475 unsigned i;
1476
1477 for (i = 0; i < mr->ioeventfd_nb; i++) {
1478 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1479 ioeventfd.e = mr->ioeventfds[i].e;
1480
73bb753d 1481 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
8c56c1a5
PF
1482 event_notifier_set(ioeventfd.e);
1483 return true;
1484 }
1485 }
1486
1487 return false;
1488}
1489
3b643495
PM
1490MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1491 hwaddr addr,
1492 uint64_t data,
e67c9046 1493 MemOp op,
3b643495 1494 MemTxAttrs attrs)
a621f38d 1495{
e67c9046
TN
1496 unsigned size = memop_size(op);
1497
1a59bdba
PMD
1498 if (mr->alias) {
1499 return memory_region_dispatch_write(mr->alias,
1500 mr->alias_offset + addr,
1501 data, op, attrs);
1502 }
6d7b9a6c 1503 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
b018ddf6 1504 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1505 return MEMTX_DECODE_ERROR;
093bc2cd
AK
1506 }
1507
9bf825bf 1508 adjust_endianness(mr, &data, op);
a621f38d 1509
126e7f78
PB
1510 /*
1511 * FIXME: it's not clear why under KVM the write would be processed
1512 * directly, instead of going through eventfd. This probably should
1513 * test "tcg_enabled() || qtest_enabled()", or should just go away.
1514 */
1515 if (!kvm_enabled() &&
8c56c1a5
PF
1516 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1517 return MEMTX_OK;
1518 }
1519
ce5d2f33 1520 if (mr->ops->write) {
cc05c43a
PM
1521 return access_with_adjusted_size(addr, &data, size,
1522 mr->ops->impl.min_access_size,
1523 mr->ops->impl.max_access_size,
1524 memory_region_write_accessor, mr,
1525 attrs);
62a0db94 1526 } else {
cc05c43a
PM
1527 return
1528 access_with_adjusted_size(addr, &data, size,
1529 mr->ops->impl.min_access_size,
1530 mr->ops->impl.max_access_size,
1531 memory_region_write_with_attrs_accessor,
1532 mr, attrs);
74901c3b 1533 }
093bc2cd
AK
1534}
1535
093bc2cd 1536void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1537 Object *owner,
093bc2cd
AK
1538 const MemoryRegionOps *ops,
1539 void *opaque,
1540 const char *name,
1541 uint64_t size)
1542{
2c9b15ca 1543 memory_region_init(mr, owner, name, size);
6d6d2abf 1544 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1545 mr->opaque = opaque;
14a3c10a 1546 mr->terminates = true;
093bc2cd
AK
1547}
1548
62c19b72 1549bool memory_region_init_ram_nomigrate(MemoryRegion *mr,
1cfe48c1
PM
1550 Object *owner,
1551 const char *name,
1552 uint64_t size,
1553 Error **errp)
06329cce 1554{
62c19b72
PMD
1555 return memory_region_init_ram_flags_nomigrate(mr, owner, name,
1556 size, 0, errp);
06329cce
MA
1557}
1558
cbbc4340 1559bool memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
7f863cba
DH
1560 Object *owner,
1561 const char *name,
1562 uint64_t size,
1563 uint32_t ram_flags,
1564 Error **errp)
093bc2cd 1565{
1cd3d492 1566 Error *err = NULL;
2c9b15ca 1567 memory_region_init(mr, owner, name, size);
8ea9252a 1568 mr->ram = true;
14a3c10a 1569 mr->terminates = true;
545e92e0 1570 mr->destructor = memory_region_destructor_ram;
ebef62d0 1571 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1cd3d492
IM
1572 if (err) {
1573 mr->size = int128_zero();
1574 object_unparent(OBJECT(mr));
1575 error_propagate(errp, err);
cbbc4340 1576 return false;
1cd3d492 1577 }
cbbc4340 1578 return true;
0b183fc8
PB
1579}
1580
60786ef3
MT
1581void memory_region_init_resizeable_ram(MemoryRegion *mr,
1582 Object *owner,
1583 const char *name,
1584 uint64_t size,
1585 uint64_t max_size,
1586 void (*resized)(const char*,
1587 uint64_t length,
1588 void *host),
1589 Error **errp)
1590{
1cd3d492 1591 Error *err = NULL;
60786ef3
MT
1592 memory_region_init(mr, owner, name, size);
1593 mr->ram = true;
1594 mr->terminates = true;
1595 mr->destructor = memory_region_destructor_ram;
8e41fb63 1596 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1cd3d492 1597 mr, &err);
1cd3d492
IM
1598 if (err) {
1599 mr->size = int128_zero();
1600 object_unparent(OBJECT(mr));
1601 error_propagate(errp, err);
1602 }
60786ef3
MT
1603}
1604
d5dbde46 1605#ifdef CONFIG_POSIX
0b183fc8 1606void memory_region_init_ram_from_file(MemoryRegion *mr,
d32335e8 1607 Object *owner,
0b183fc8
PB
1608 const char *name,
1609 uint64_t size,
98376843 1610 uint64_t align,
cbfc0171 1611 uint32_t ram_flags,
7f56e740 1612 const char *path,
4b870dc4 1613 ram_addr_t offset,
7f56e740 1614 Error **errp)
0b183fc8 1615{
1cd3d492 1616 Error *err = NULL;
0b183fc8
PB
1617 memory_region_init(mr, owner, name, size);
1618 mr->ram = true;
5c52a219 1619 mr->readonly = !!(ram_flags & RAM_READONLY);
0b183fc8
PB
1620 mr->terminates = true;
1621 mr->destructor = memory_region_destructor_ram;
98376843 1622 mr->align = align;
369d6dc4 1623 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
5c52a219 1624 offset, &err);
1cd3d492
IM
1625 if (err) {
1626 mr->size = int128_zero();
1627 object_unparent(OBJECT(mr));
1628 error_propagate(errp, err);
1629 }
093bc2cd 1630}
fea617c5
MAL
1631
1632void memory_region_init_ram_from_fd(MemoryRegion *mr,
d32335e8 1633 Object *owner,
fea617c5
MAL
1634 const char *name,
1635 uint64_t size,
d5015b80 1636 uint32_t ram_flags,
fea617c5 1637 int fd,
44a4ff31 1638 ram_addr_t offset,
fea617c5
MAL
1639 Error **errp)
1640{
1cd3d492 1641 Error *err = NULL;
fea617c5
MAL
1642 memory_region_init(mr, owner, name, size);
1643 mr->ram = true;
5c52a219 1644 mr->readonly = !!(ram_flags & RAM_READONLY);
fea617c5
MAL
1645 mr->terminates = true;
1646 mr->destructor = memory_region_destructor_ram;
d5015b80 1647 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
5c52a219 1648 &err);
1cd3d492
IM
1649 if (err) {
1650 mr->size = int128_zero();
1651 object_unparent(OBJECT(mr));
1652 error_propagate(errp, err);
1653 }
fea617c5 1654}
0b183fc8 1655#endif
093bc2cd
AK
1656
1657void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1658 Object *owner,
093bc2cd
AK
1659 const char *name,
1660 uint64_t size,
1661 void *ptr)
1662{
2c9b15ca 1663 memory_region_init(mr, owner, name, size);
8ea9252a 1664 mr->ram = true;
14a3c10a 1665 mr->terminates = true;
fc3e7665 1666 mr->destructor = memory_region_destructor_ram;
ef701d7b
HT
1667
1668 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1669 assert(ptr != NULL);
cd911363 1670 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
093bc2cd
AK
1671}
1672
21e00fa5
AW
1673void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1674 Object *owner,
1675 const char *name,
1676 uint64_t size,
1677 void *ptr)
e4dc3f59 1678{
2ddb89b0
BS
1679 memory_region_init(mr, owner, name, size);
1680 mr->ram = true;
1681 mr->terminates = true;
21e00fa5 1682 mr->ram_device = true;
4a2e242b
AW
1683 mr->ops = &ram_device_mem_ops;
1684 mr->opaque = mr;
2ddb89b0 1685 mr->destructor = memory_region_destructor_ram;
0a2949e0 1686
2ddb89b0
BS
1687 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1688 assert(ptr != NULL);
cd911363 1689 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
e4dc3f59
ND
1690}
1691
093bc2cd 1692void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1693 Object *owner,
093bc2cd
AK
1694 const char *name,
1695 MemoryRegion *orig,
a8170e5e 1696 hwaddr offset,
093bc2cd
AK
1697 uint64_t size)
1698{
2c9b15ca 1699 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1700 mr->alias = orig;
1701 mr->alias_offset = offset;
1702}
1703
197faa70 1704bool memory_region_init_rom_nomigrate(MemoryRegion *mr,
d32335e8 1705 Object *owner,
b59821a9
PM
1706 const char *name,
1707 uint64_t size,
1708 Error **errp)
a1777f7f 1709{
197faa70
PMD
1710 if (!memory_region_init_ram_flags_nomigrate(mr, owner, name,
1711 size, 0, errp)) {
1712 return false;
1713 }
a1777f7f 1714 mr->readonly = true;
197faa70
PMD
1715
1716 return true;
a1777f7f
PM
1717}
1718
b59821a9
PM
1719void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1720 Object *owner,
1721 const MemoryRegionOps *ops,
1722 void *opaque,
1723 const char *name,
1724 uint64_t size,
1725 Error **errp)
d0a9b5bc 1726{
1cd3d492 1727 Error *err = NULL;
39e0b03d 1728 assert(ops);
2c9b15ca 1729 memory_region_init(mr, owner, name, size);
7bc2b9cd 1730 mr->ops = ops;
75f5941c 1731 mr->opaque = opaque;
d0a9b5bc 1732 mr->terminates = true;
75c578dc 1733 mr->rom_device = true;
58268c8d 1734 mr->destructor = memory_region_destructor_ram;
ebef62d0 1735 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1cd3d492
IM
1736 if (err) {
1737 mr->size = int128_zero();
1738 object_unparent(OBJECT(mr));
1739 error_propagate(errp, err);
1740 }
d0a9b5bc
AK
1741}
1742
1221a474
AK
1743void memory_region_init_iommu(void *_iommu_mr,
1744 size_t instance_size,
1745 const char *mrtypename,
2c9b15ca 1746 Object *owner,
30951157
AK
1747 const char *name,
1748 uint64_t size)
1749{
1221a474 1750 struct IOMMUMemoryRegion *iommu_mr;
3df9d748
AK
1751 struct MemoryRegion *mr;
1752
1221a474
AK
1753 object_initialize(_iommu_mr, instance_size, mrtypename);
1754 mr = MEMORY_REGION(_iommu_mr);
3df9d748
AK
1755 memory_region_do_init(mr, owner, name, size);
1756 iommu_mr = IOMMU_MEMORY_REGION(mr);
30951157 1757 mr->terminates = true; /* then re-forwards */
3df9d748
AK
1758 QLIST_INIT(&iommu_mr->iommu_notify);
1759 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
30951157
AK
1760}
1761
b4fefef9 1762static void memory_region_finalize(Object *obj)
093bc2cd 1763{
b4fefef9
PC
1764 MemoryRegion *mr = MEMORY_REGION(obj);
1765
2e2b8eb7
PB
1766 assert(!mr->container);
1767
1768 /* We know the region is not visible in any address space (it
1769 * does not have a container and cannot be a root either because
1770 * it has no references, so we can blindly clear mr->enabled.
1771 * memory_region_set_enabled instead could trigger a transaction
1772 * and cause an infinite loop.
1773 */
1774 mr->enabled = false;
1775 memory_region_transaction_begin();
1776 while (!QTAILQ_EMPTY(&mr->subregions)) {
1777 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1778 memory_region_del_subregion(mr, subregion);
1779 }
1780 memory_region_transaction_commit();
1781
545e92e0 1782 mr->destructor(mr);
093bc2cd 1783 memory_region_clear_coalescing(mr);
302fa283 1784 g_free((char *)mr->name);
7267c094 1785 g_free(mr->ioeventfds);
093bc2cd
AK
1786}
1787
803c0816
PB
1788Object *memory_region_owner(MemoryRegion *mr)
1789{
22a893e4
PB
1790 Object *obj = OBJECT(mr);
1791 return obj->parent;
803c0816
PB
1792}
1793
46637be2
PB
1794void memory_region_ref(MemoryRegion *mr)
1795{
22a893e4
PB
1796 /* MMIO callbacks most likely will access data that belongs
1797 * to the owner, hence the need to ref/unref the owner whenever
1798 * the memory region is in use.
1799 *
1800 * The memory region is a child of its owner. As long as the
1801 * owner doesn't call unparent itself on the memory region,
1802 * ref-ing the owner will also keep the memory region alive.
612263cf
PB
1803 * Memory regions without an owner are supposed to never go away;
1804 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1805 */
612263cf
PB
1806 if (mr && mr->owner) {
1807 object_ref(mr->owner);
46637be2
PB
1808 }
1809}
1810
1811void memory_region_unref(MemoryRegion *mr)
1812{
612263cf
PB
1813 if (mr && mr->owner) {
1814 object_unref(mr->owner);
46637be2
PB
1815 }
1816}
1817
093bc2cd
AK
1818uint64_t memory_region_size(MemoryRegion *mr)
1819{
08dafab4
AK
1820 if (int128_eq(mr->size, int128_2_64())) {
1821 return UINT64_MAX;
1822 }
1823 return int128_get64(mr->size);
093bc2cd
AK
1824}
1825
5d546d4b 1826const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1827{
d1dd32af
PC
1828 if (!mr->name) {
1829 ((MemoryRegion *)mr)->name =
7a309cc9 1830 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
d1dd32af 1831 }
302fa283 1832 return mr->name;
8991c79b
AK
1833}
1834
21e00fa5 1835bool memory_region_is_ram_device(MemoryRegion *mr)
e4dc3f59 1836{
21e00fa5 1837 return mr->ram_device;
e4dc3f59
ND
1838}
1839
56918a12
SC
1840bool memory_region_is_protected(MemoryRegion *mr)
1841{
1842 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1843}
1844
2d1a35be 1845uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1846{
6f6a5ef3 1847 uint8_t mask = mr->dirty_log_mask;
1370d61a
ZY
1848 RAMBlock *rb = mr->ram_block;
1849
63b41db4 1850 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1370d61a 1851 memory_region_is_iommu(mr))) {
6f6a5ef3
PB
1852 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1853 }
0a2949e0
PB
1854
1855 if (tcg_enabled() && rb) {
1856 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1857 mask |= (1 << DIRTY_MEMORY_CODE);
1858 }
6f6a5ef3 1859 return mask;
55043ba3
AK
1860}
1861
2d1a35be
PB
1862bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1863{
1864 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1865}
1866
549d4005
EA
1867static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1868 Error **errp)
5bf3d319
PX
1869{
1870 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1871 IOMMUNotifier *iommu_notifier;
1221a474 1872 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
549d4005 1873 int ret = 0;
5bf3d319 1874
3df9d748 1875 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
5bf3d319
PX
1876 flags |= iommu_notifier->notifier_flags;
1877 }
1878
1221a474 1879 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
549d4005
EA
1880 ret = imrc->notify_flag_changed(iommu_mr,
1881 iommu_mr->iommu_notify_flags,
1882 flags, errp);
5bf3d319
PX
1883 }
1884
549d4005
EA
1885 if (!ret) {
1886 iommu_mr->iommu_notify_flags = flags;
1887 }
1888 return ret;
5bf3d319
PX
1889}
1890
457f8cbb
BB
1891int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1892 uint64_t page_size_mask,
1893 Error **errp)
1894{
1895 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1896 int ret = 0;
1897
1898 if (imrc->iommu_set_page_size_mask) {
1899 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1900 }
1901 return ret;
1902}
1903
51478a8e
EA
1904int memory_region_iommu_set_iova_ranges(IOMMUMemoryRegion *iommu_mr,
1905 GList *iova_ranges,
1906 Error **errp)
1907{
1908 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1909 int ret = 0;
1910
1911 if (imrc->iommu_set_iova_ranges) {
1912 ret = imrc->iommu_set_iova_ranges(iommu_mr, iova_ranges, errp);
1913 }
1914 return ret;
1915}
1916
549d4005
EA
1917int memory_region_register_iommu_notifier(MemoryRegion *mr,
1918 IOMMUNotifier *n, Error **errp)
06866575 1919{
3df9d748 1920 IOMMUMemoryRegion *iommu_mr;
549d4005 1921 int ret;
3df9d748 1922
efcd38c5 1923 if (mr->alias) {
549d4005 1924 return memory_region_register_iommu_notifier(mr->alias, n, errp);
efcd38c5
JW
1925 }
1926
cdb30812 1927 /* We need to register for at least one bitfield */
3df9d748 1928 iommu_mr = IOMMU_MEMORY_REGION(mr);
cdb30812 1929 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
698feb5e 1930 assert(n->start <= n->end);
cb1efcf4
PM
1931 assert(n->iommu_idx >= 0 &&
1932 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1933
3df9d748 1934 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
549d4005
EA
1935 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1936 if (ret) {
1937 QLIST_REMOVE(n, node);
1938 }
1939 return ret;
06866575
DG
1940}
1941
3df9d748 1942uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
a788f227 1943{
1221a474
AK
1944 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1945
1946 if (imrc->get_min_page_size) {
1947 return imrc->get_min_page_size(iommu_mr);
f682e9c2
AK
1948 }
1949 return TARGET_PAGE_SIZE;
1950}
1951
3df9d748 1952void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
f682e9c2 1953{
b1ab8f9c 1954 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1221a474 1955 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
f682e9c2 1956 hwaddr addr, granularity;
a788f227
DG
1957 IOMMUTLBEntry iotlb;
1958
faa362e3 1959 /* If the IOMMU has its own replay callback, override */
1221a474
AK
1960 if (imrc->replay) {
1961 imrc->replay(iommu_mr, n);
faa362e3
PX
1962 return;
1963 }
1964
3df9d748 1965 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
f682e9c2 1966
b1ab8f9c 1967 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
2c91bcf2 1968 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
a788f227
DG
1969 if (iotlb.perm != IOMMU_NONE) {
1970 n->notify(n, &iotlb);
1971 }
1972
1973 /* if (2^64 - MR size) < granularity, it's possible to get an
1974 * infinite loop here. This should catch such a wraparound */
1975 if ((addr + granularity) < addr) {
1976 break;
1977 }
1978 }
1979}
1980
cdb30812
PX
1981void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1982 IOMMUNotifier *n)
06866575 1983{
3df9d748
AK
1984 IOMMUMemoryRegion *iommu_mr;
1985
efcd38c5
JW
1986 if (mr->alias) {
1987 memory_region_unregister_iommu_notifier(mr->alias, n);
1988 return;
1989 }
cdb30812 1990 QLIST_REMOVE(n, node);
3df9d748 1991 iommu_mr = IOMMU_MEMORY_REGION(mr);
549d4005 1992 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
06866575
DG
1993}
1994
3b5ebf85 1995void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
5039caf3 1996 IOMMUTLBEvent *event)
06866575 1997{
5039caf3 1998 IOMMUTLBEntry *entry = &event->entry;
03c7140c 1999 hwaddr entry_end = entry->iova + entry->addr_mask;
1804857f 2000 IOMMUTLBEntry tmp = *entry;
cdb30812 2001
5039caf3
EP
2002 if (event->type == IOMMU_NOTIFIER_UNMAP) {
2003 assert(entry->perm == IOMMU_NONE);
2004 }
2005
bd2bfa4c
PX
2006 /*
2007 * Skip the notification if the notification does not overlap
2008 * with registered range.
2009 */
03c7140c 2010 if (notifier->start > entry_end || notifier->end < entry->iova) {
bd2bfa4c
PX
2011 return;
2012 }
cdb30812 2013
1804857f
EP
2014 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2015 /* Crop (iova, addr_mask) to range */
2016 tmp.iova = MAX(tmp.iova, notifier->start);
2017 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2018 } else {
2019 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2020 }
03c7140c 2021
5039caf3 2022 if (event->type & notifier->notifier_flags) {
1804857f 2023 notifier->notify(notifier, &tmp);
bd2bfa4c
PX
2024 }
2025}
2026
afa55c6e 2027void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier)
7caebbf9
JW
2028{
2029 IOMMUTLBEvent event;
2030
2031 event.type = IOMMU_NOTIFIER_UNMAP;
2032 event.entry.target_as = &address_space_memory;
afa55c6e 2033 event.entry.iova = notifier->start;
7caebbf9 2034 event.entry.perm = IOMMU_NONE;
afa55c6e 2035 event.entry.addr_mask = notifier->end - notifier->start;
7caebbf9 2036
afa55c6e 2037 memory_region_notify_iommu_one(notifier, &event);
7caebbf9
JW
2038}
2039
3df9d748 2040void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
cb1efcf4 2041 int iommu_idx,
5039caf3 2042 IOMMUTLBEvent event)
bd2bfa4c
PX
2043{
2044 IOMMUNotifier *iommu_notifier;
2045
3df9d748 2046 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
bd2bfa4c 2047
3df9d748 2048 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
cb1efcf4 2049 if (iommu_notifier->iommu_idx == iommu_idx) {
5039caf3 2050 memory_region_notify_iommu_one(iommu_notifier, &event);
cb1efcf4 2051 }
cdb30812 2052 }
06866575
DG
2053}
2054
f1334de6
AK
2055int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2056 enum IOMMUMemoryRegionAttr attr,
2057 void *data)
2058{
2059 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2060
2061 if (!imrc->get_attr) {
2062 return -EINVAL;
2063 }
2064
2065 return imrc->get_attr(iommu_mr, attr, data);
2066}
2067
21f40209
PM
2068int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2069 MemTxAttrs attrs)
2070{
2071 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2072
2073 if (!imrc->attrs_to_index) {
2074 return 0;
2075 }
2076
2077 return imrc->attrs_to_index(iommu_mr, attrs);
2078}
2079
2080int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2081{
2082 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2083
2084 if (!imrc->num_indexes) {
2085 return 1;
2086 }
2087
2088 return imrc->num_indexes(iommu_mr);
2089}
2090
8947d7fc
DH
2091RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2092{
aa5317ef 2093 if (!memory_region_is_ram(mr)) {
8947d7fc
DH
2094 return NULL;
2095 }
2096 return mr->rdm;
2097}
2098
2099void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2100 RamDiscardManager *rdm)
2101{
aa5317ef 2102 g_assert(memory_region_is_ram(mr));
8947d7fc
DH
2103 g_assert(!rdm || !mr->rdm);
2104 mr->rdm = rdm;
2105}
2106
2107uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2108 const MemoryRegion *mr)
2109{
2110 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2111
2112 g_assert(rdmc->get_min_granularity);
2113 return rdmc->get_min_granularity(rdm, mr);
2114}
2115
2116bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2117 const MemoryRegionSection *section)
2118{
2119 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2120
2121 g_assert(rdmc->is_populated);
2122 return rdmc->is_populated(rdm, section);
2123}
2124
2125int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2126 MemoryRegionSection *section,
2127 ReplayRamPopulate replay_fn,
2128 void *opaque)
2129{
2130 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2131
2132 g_assert(rdmc->replay_populated);
2133 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2134}
2135
adaf9d92
DH
2136void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2137 MemoryRegionSection *section,
2138 ReplayRamDiscard replay_fn,
2139 void *opaque)
2140{
2141 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2142
2143 g_assert(rdmc->replay_discarded);
2144 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2145}
2146
8947d7fc
DH
2147void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2148 RamDiscardListener *rdl,
2149 MemoryRegionSection *section)
2150{
2151 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2152
2153 g_assert(rdmc->register_listener);
2154 rdmc->register_listener(rdm, rdl, section);
2155}
2156
2157void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2158 RamDiscardListener *rdl)
2159{
2160 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2161
2162 g_assert(rdmc->unregister_listener);
2163 rdmc->unregister_listener(rdm, rdl);
2164}
2165
baa44bce
CL
2166/* Called with rcu_read_lock held. */
2167bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2168 ram_addr_t *ram_addr, bool *read_only,
2169 bool *mr_has_discard_manager)
2170{
2171 MemoryRegion *mr;
2172 hwaddr xlat;
2173 hwaddr len = iotlb->addr_mask + 1;
2174 bool writable = iotlb->perm & IOMMU_WO;
2175
2176 if (mr_has_discard_manager) {
2177 *mr_has_discard_manager = false;
2178 }
2179 /*
2180 * The IOMMU TLB entry we have just covers translation through
2181 * this IOMMU to its immediate target. We need to translate
2182 * it the rest of the way through to memory.
2183 */
2184 mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2185 &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2186 if (!memory_region_is_ram(mr)) {
2187 error_report("iommu map to non memory area %" HWADDR_PRIx "", xlat);
2188 return false;
2189 } else if (memory_region_has_ram_discard_manager(mr)) {
2190 RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2191 MemoryRegionSection tmp = {
2192 .mr = mr,
2193 .offset_within_region = xlat,
2194 .size = int128_make64(len),
2195 };
2196 if (mr_has_discard_manager) {
2197 *mr_has_discard_manager = true;
2198 }
2199 /*
2200 * Malicious VMs can map memory into the IOMMU, which is expected
2201 * to remain discarded. vfio will pin all pages, populating memory.
2202 * Disallow that. vmstate priorities make sure any RamDiscardManager
2203 * were already restored before IOMMUs are restored.
2204 */
2205 if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2206 error_report("iommu map to discarded memory (e.g., unplugged via"
2207 " virtio-mem): %" HWADDR_PRIx "",
2208 iotlb->translated_addr);
2209 return false;
2210 }
2211 }
2212
2213 /*
2214 * Translation truncates length to the IOMMU page size,
2215 * check that it did not truncate too much.
2216 */
2217 if (len & iotlb->addr_mask) {
2218 error_report("iommu has granularity incompatible with target AS");
2219 return false;
2220 }
2221
2222 if (vaddr) {
2223 *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2224 }
2225
2226 if (ram_addr) {
2227 *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2228 }
2229
2230 if (read_only) {
2231 *read_only = !writable || mr->readonly;
2232 }
2233
2234 return true;
2235}
2236
093bc2cd
AK
2237void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2238{
5a583347 2239 uint8_t mask = 1 << client;
deb809ed 2240 uint8_t old_logging;
5a583347 2241
dbddac6d 2242 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB
2243 old_logging = mr->vga_logging_count;
2244 mr->vga_logging_count += log ? 1 : -1;
2245 if (!!old_logging == !!mr->vga_logging_count) {
2246 return;
2247 }
2248
59023ef4 2249 memory_region_transaction_begin();
5a583347 2250 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 2251 memory_region_update_pending |= mr->enabled;
59023ef4 2252 memory_region_transaction_commit();
093bc2cd
AK
2253}
2254
a8170e5e
AK
2255void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2256 hwaddr size)
093bc2cd 2257{
8e41fb63
FZ
2258 assert(mr->ram_block);
2259 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2260 size,
58d2707e 2261 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK
2262}
2263
b87eaa9b
PX
2264/*
2265 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2266 * dirty bitmap for the specified memory region.
2267 */
1e493be5 2268static void memory_region_sync_dirty_bitmap(MemoryRegion *mr, bool last_stage)
093bc2cd 2269{
0a752eee 2270 MemoryListener *listener;
0d673e36 2271 AddressSpace *as;
0a752eee 2272 FlatView *view;
5a583347
AK
2273 FlatRange *fr;
2274
0a752eee
PB
2275 /* If the same address space has multiple log_sync listeners, we
2276 * visit that address space's FlatView multiple times. But because
2277 * log_sync listeners are rare, it's still cheaper than walking each
2278 * address space once.
2279 */
2280 QTAILQ_FOREACH(listener, &memory_listeners, link) {
b87eaa9b
PX
2281 if (listener->log_sync) {
2282 as = listener->address_space;
2283 view = address_space_get_flatview(as);
2284 FOR_EACH_FLAT_RANGE(fr, view) {
2285 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2286 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2287 listener->log_sync(listener, &mrs);
2288 }
0d673e36 2289 }
b87eaa9b 2290 flatview_unref(view);
fcb3ab34 2291 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
b87eaa9b
PX
2292 } else if (listener->log_sync_global) {
2293 /*
2294 * No matter whether MR is specified, what we can do here
2295 * is to do a global sync, because we are not capable to
2296 * sync in a finer granularity.
2297 */
1e493be5 2298 listener->log_sync_global(listener, last_stage);
fcb3ab34 2299 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
5a583347
AK
2300 }
2301 }
093bc2cd
AK
2302}
2303
077874e0
PX
2304void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2305 hwaddr len)
2306{
2307 MemoryRegionSection mrs;
2308 MemoryListener *listener;
2309 AddressSpace *as;
2310 FlatView *view;
2311 FlatRange *fr;
2312 hwaddr sec_start, sec_end, sec_size;
2313
2314 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2315 if (!listener->log_clear) {
2316 continue;
2317 }
2318 as = listener->address_space;
2319 view = address_space_get_flatview(as);
2320 FOR_EACH_FLAT_RANGE(fr, view) {
2321 if (!fr->dirty_log_mask || fr->mr != mr) {
2322 /*
2323 * Clear dirty bitmap operation only applies to those
2324 * regions whose dirty logging is at least enabled
2325 */
2326 continue;
2327 }
2328
2329 mrs = section_from_flat_range(fr, view);
2330
2331 sec_start = MAX(mrs.offset_within_region, start);
2332 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2333 sec_end = MIN(sec_end, start + len);
2334
2335 if (sec_start >= sec_end) {
2336 /*
2337 * If this memory region section has no intersection
2338 * with the requested range, skip.
2339 */
2340 continue;
2341 }
2342
2343 /* Valid case; shrink the section if needed */
2344 mrs.offset_within_address_space +=
2345 sec_start - mrs.offset_within_region;
2346 mrs.offset_within_region = sec_start;
2347 sec_size = sec_end - sec_start;
2348 mrs.size = int128_make64(sec_size);
2349 listener->log_clear(listener, &mrs);
2350 }
2351 flatview_unref(view);
2352 }
2353}
2354
0fe1eca7
PB
2355DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2356 hwaddr addr,
2357 hwaddr size,
2358 unsigned client)
2359{
9458a9a1 2360 DirtyBitmapSnapshot *snapshot;
0fe1eca7 2361 assert(mr->ram_block);
1e493be5 2362 memory_region_sync_dirty_bitmap(mr, false);
9458a9a1
PB
2363 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2364 memory_global_after_dirty_log_sync();
2365 return snapshot;
0fe1eca7
PB
2366}
2367
2368bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2369 hwaddr addr, hwaddr size)
2370{
2371 assert(mr->ram_block);
2372 return cpu_physical_memory_snapshot_get_dirty(snap,
2373 memory_region_get_ram_addr(mr) + addr, size);
2374}
2375
093bc2cd
AK
2376void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2377{
fb1cd6f9 2378 if (mr->readonly != readonly) {
59023ef4 2379 memory_region_transaction_begin();
fb1cd6f9 2380 mr->readonly = readonly;
22bde714 2381 memory_region_update_pending |= mr->enabled;
59023ef4 2382 memory_region_transaction_commit();
fb1cd6f9 2383 }
093bc2cd
AK
2384}
2385
c26763f8
MAL
2386void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2387{
2388 if (mr->nonvolatile != nonvolatile) {
2389 memory_region_transaction_begin();
2390 mr->nonvolatile = nonvolatile;
2391 memory_region_update_pending |= mr->enabled;
2392 memory_region_transaction_commit();
2393 }
2394}
2395
5f9a5ea1 2396void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 2397{
5f9a5ea1 2398 if (mr->romd_mode != romd_mode) {
59023ef4 2399 memory_region_transaction_begin();
5f9a5ea1 2400 mr->romd_mode = romd_mode;
22bde714 2401 memory_region_update_pending |= mr->enabled;
59023ef4 2402 memory_region_transaction_commit();
d0a9b5bc
AK
2403 }
2404}
2405
a8170e5e
AK
2406void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2407 hwaddr size, unsigned client)
093bc2cd 2408{
8e41fb63
FZ
2409 assert(mr->ram_block);
2410 cpu_physical_memory_test_and_clear_dirty(
2411 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK
2412}
2413
a35ba7be
PB
2414int memory_region_get_fd(MemoryRegion *mr)
2415{
694ea274 2416 RCU_READ_LOCK_GUARD();
4ff87573
PB
2417 while (mr->alias) {
2418 mr = mr->alias;
a35ba7be 2419 }
66997c42 2420 return mr->ram_block->fd;
4ff87573 2421}
a35ba7be 2422
093bc2cd
AK
2423void *memory_region_get_ram_ptr(MemoryRegion *mr)
2424{
49b24afc 2425 uint64_t offset = 0;
093bc2cd 2426
694ea274 2427 RCU_READ_LOCK_GUARD();
49b24afc
PB
2428 while (mr->alias) {
2429 offset += mr->alias_offset;
2430 mr = mr->alias;
2431 }
8e41fb63 2432 assert(mr->ram_block);
66997c42 2433 return qemu_map_ram_ptr(mr->ram_block, offset);
093bc2cd
AK
2434}
2435
07bdaa41
PB
2436MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2437{
2438 RAMBlock *block;
2439
2440 block = qemu_ram_block_from_host(ptr, false, offset);
2441 if (!block) {
2442 return NULL;
2443 }
2444
2445 return block->mr;
2446}
2447
7ebb2745
FZ
2448ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2449{
2450 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2451}
2452
37d7c084
PB
2453void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2454{
8e41fb63 2455 assert(mr->ram_block);
37d7c084 2456
fa53a0e5 2457 qemu_ram_resize(mr->ram_block, newsize, errp);
37d7c084
PB
2458}
2459
9ecc996a
PMD
2460void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2461{
2462 if (mr->ram_block) {
ab7e41e6 2463 qemu_ram_msync(mr->ram_block, addr, size);
9ecc996a
PMD
2464 }
2465}
61c490e2 2466
4dfe59d1 2467void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
61c490e2
BM
2468{
2469 /*
2470 * Might be extended case needed to cover
2471 * different types of memory regions
2472 */
9ecc996a
PMD
2473 if (mr->dirty_log_mask) {
2474 memory_region_msync(mr, addr, size);
61c490e2
BM
2475 }
2476}
2477
b960fc17
PX
2478/*
2479 * Call proper memory listeners about the change on the newly
2480 * added/removed CoalescedMemoryRange.
2481 */
2482static void memory_region_update_coalesced_range(MemoryRegion *mr,
2483 CoalescedMemoryRange *cmr,
2484 bool add)
093bc2cd 2485{
b960fc17 2486 AddressSpace *as;
99e86347 2487 FlatView *view;
093bc2cd 2488 FlatRange *fr;
093bc2cd 2489
0d673e36 2490 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
b960fc17
PX
2491 view = address_space_get_flatview(as);
2492 FOR_EACH_FLAT_RANGE(fr, view) {
2493 if (fr->mr == mr) {
2494 flat_range_coalesced_io_notify(fr, as, cmr, add);
2495 }
2496 }
2497 flatview_unref(view);
0d673e36
AK
2498 }
2499}
2500
093bc2cd
AK
2501void memory_region_set_coalescing(MemoryRegion *mr)
2502{
2503 memory_region_clear_coalescing(mr);
08dafab4 2504 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
2505}
2506
2507void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 2508 hwaddr offset,
093bc2cd
AK
2509 uint64_t size)
2510{
7267c094 2511 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 2512
08dafab4 2513 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd 2514 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
b960fc17 2515 memory_region_update_coalesced_range(mr, cmr, true);
d410515e 2516 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
2517}
2518
2519void memory_region_clear_coalescing(MemoryRegion *mr)
2520{
2521 CoalescedMemoryRange *cmr;
9c1aa1c2
PX
2522
2523 if (QTAILQ_EMPTY(&mr->coalesced)) {
2524 return;
2525 }
093bc2cd 2526
d410515e
JK
2527 qemu_flush_coalesced_mmio_buffer();
2528 mr->flush_coalesced_mmio = false;
2529
093bc2cd
AK
2530 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2531 cmr = QTAILQ_FIRST(&mr->coalesced);
2532 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
b960fc17 2533 memory_region_update_coalesced_range(mr, cmr, false);
7267c094 2534 g_free(cmr);
ab5b3db5 2535 }
093bc2cd
AK
2536}
2537
d410515e
JK
2538void memory_region_set_flush_coalesced(MemoryRegion *mr)
2539{
2540 mr->flush_coalesced_mmio = true;
2541}
2542
2543void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2544{
2545 qemu_flush_coalesced_mmio_buffer();
2546 if (QTAILQ_EMPTY(&mr->coalesced)) {
2547 mr->flush_coalesced_mmio = false;
2548 }
2549}
2550
3e9d69e7 2551void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 2552 hwaddr addr,
3e9d69e7
AK
2553 unsigned size,
2554 bool match_data,
2555 uint64_t data,
753d5e14 2556 EventNotifier *e)
3e9d69e7
AK
2557{
2558 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
2559 .addr.start = int128_make64(addr),
2560 .addr.size = int128_make64(size),
3e9d69e7
AK
2561 .match_data = match_data,
2562 .data = data,
753d5e14 2563 .e = e,
3e9d69e7
AK
2564 };
2565 unsigned i;
2566
b8aecea2 2567 if (size) {
9bf825bf 2568 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
b8aecea2 2569 }
59023ef4 2570 memory_region_transaction_begin();
3e9d69e7 2571 for (i = 0; i < mr->ioeventfd_nb; ++i) {
73bb753d 2572 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
3e9d69e7
AK
2573 break;
2574 }
2575 }
2576 ++mr->ioeventfd_nb;
7267c094 2577 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
2578 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2579 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2580 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2581 mr->ioeventfds[i] = mrfd;
4dc56152 2582 ioeventfd_update_pending |= mr->enabled;
59023ef4 2583 memory_region_transaction_commit();
3e9d69e7
AK
2584}
2585
2586void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 2587 hwaddr addr,
3e9d69e7
AK
2588 unsigned size,
2589 bool match_data,
2590 uint64_t data,
753d5e14 2591 EventNotifier *e)
3e9d69e7
AK
2592{
2593 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
2594 .addr.start = int128_make64(addr),
2595 .addr.size = int128_make64(size),
3e9d69e7
AK
2596 .match_data = match_data,
2597 .data = data,
753d5e14 2598 .e = e,
3e9d69e7
AK
2599 };
2600 unsigned i;
2601
b8aecea2 2602 if (size) {
9bf825bf 2603 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
b8aecea2 2604 }
59023ef4 2605 memory_region_transaction_begin();
3e9d69e7 2606 for (i = 0; i < mr->ioeventfd_nb; ++i) {
73bb753d 2607 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
3e9d69e7
AK
2608 break;
2609 }
2610 }
2611 assert(i != mr->ioeventfd_nb);
2612 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2613 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2614 --mr->ioeventfd_nb;
7267c094 2615 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 2616 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 2617 ioeventfd_update_pending |= mr->enabled;
59023ef4 2618 memory_region_transaction_commit();
3e9d69e7
AK
2619}
2620
feca4ac1 2621static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 2622{
feca4ac1 2623 MemoryRegion *mr = subregion->container;
093bc2cd
AK
2624 MemoryRegion *other;
2625
59023ef4
JK
2626 memory_region_transaction_begin();
2627
dfde4e6e 2628 memory_region_ref(subregion);
093bc2cd
AK
2629 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2630 if (subregion->priority >= other->priority) {
2631 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2632 goto done;
2633 }
2634 }
2635 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2636done:
22bde714 2637 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2638 memory_region_transaction_commit();
093bc2cd
AK
2639}
2640
0598701a
PC
2641static void memory_region_add_subregion_common(MemoryRegion *mr,
2642 hwaddr offset,
2643 MemoryRegion *subregion)
2644{
5ead6218
DH
2645 MemoryRegion *alias;
2646
feca4ac1
PB
2647 assert(!subregion->container);
2648 subregion->container = mr;
5ead6218
DH
2649 for (alias = subregion->alias; alias; alias = alias->alias) {
2650 alias->mapped_via_alias++;
2651 }
0598701a 2652 subregion->addr = offset;
feca4ac1 2653 memory_region_update_container_subregions(subregion);
0598701a 2654}
093bc2cd
AK
2655
2656void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 2657 hwaddr offset,
093bc2cd
AK
2658 MemoryRegion *subregion)
2659{
093bc2cd
AK
2660 subregion->priority = 0;
2661 memory_region_add_subregion_common(mr, offset, subregion);
2662}
2663
2664void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 2665 hwaddr offset,
093bc2cd 2666 MemoryRegion *subregion,
a1ff8ae0 2667 int priority)
093bc2cd 2668{
093bc2cd
AK
2669 subregion->priority = priority;
2670 memory_region_add_subregion_common(mr, offset, subregion);
2671}
2672
2673void memory_region_del_subregion(MemoryRegion *mr,
2674 MemoryRegion *subregion)
2675{
5ead6218
DH
2676 MemoryRegion *alias;
2677
59023ef4 2678 memory_region_transaction_begin();
feca4ac1
PB
2679 assert(subregion->container == mr);
2680 subregion->container = NULL;
5ead6218
DH
2681 for (alias = subregion->alias; alias; alias = alias->alias) {
2682 alias->mapped_via_alias--;
2683 assert(alias->mapped_via_alias >= 0);
2684 }
093bc2cd 2685 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 2686 memory_region_unref(subregion);
22bde714 2687 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2688 memory_region_transaction_commit();
6bba19ba
AK
2689}
2690
2691void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2692{
2693 if (enabled == mr->enabled) {
2694 return;
2695 }
59023ef4 2696 memory_region_transaction_begin();
6bba19ba 2697 mr->enabled = enabled;
22bde714 2698 memory_region_update_pending = true;
59023ef4 2699 memory_region_transaction_commit();
093bc2cd 2700}
1c0ffa58 2701
e7af4c67
MT
2702void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2703{
2704 Int128 s = int128_make64(size);
2705
2706 if (size == UINT64_MAX) {
2707 s = int128_2_64();
2708 }
2709 if (int128_eq(s, mr->size)) {
2710 return;
2711 }
2712 memory_region_transaction_begin();
2713 mr->size = s;
2714 memory_region_update_pending = true;
2715 memory_region_transaction_commit();
2716}
2717
67891b8a 2718static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 2719{
feca4ac1 2720 MemoryRegion *container = mr->container;
2282e1af 2721
feca4ac1 2722 if (container) {
67891b8a
PC
2723 memory_region_transaction_begin();
2724 memory_region_ref(mr);
feca4ac1 2725 memory_region_del_subregion(container, mr);
a8749d7c 2726 memory_region_add_subregion_common(container, mr->addr, mr);
67891b8a
PC
2727 memory_region_unref(mr);
2728 memory_region_transaction_commit();
2282e1af 2729 }
67891b8a 2730}
2282e1af 2731
67891b8a
PC
2732void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2733{
2734 if (addr != mr->addr) {
2735 mr->addr = addr;
2736 memory_region_readd_subregion(mr);
2737 }
2282e1af
AK
2738}
2739
a8170e5e 2740void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 2741{
4703359e 2742 assert(mr->alias);
4703359e 2743
59023ef4 2744 if (offset == mr->alias_offset) {
4703359e
AK
2745 return;
2746 }
2747
59023ef4
JK
2748 memory_region_transaction_begin();
2749 mr->alias_offset = offset;
22bde714 2750 memory_region_update_pending |= mr->enabled;
59023ef4 2751 memory_region_transaction_commit();
4703359e
AK
2752}
2753
533f5d66
DH
2754void memory_region_set_unmergeable(MemoryRegion *mr, bool unmergeable)
2755{
2756 if (unmergeable == mr->unmergeable) {
2757 return;
2758 }
2759
2760 memory_region_transaction_begin();
2761 mr->unmergeable = unmergeable;
2762 memory_region_update_pending |= mr->enabled;
2763 memory_region_transaction_commit();
2764}
2765
a2b257d6
IM
2766uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2767{
2768 return mr->align;
2769}
2770
e2177955
AK
2771static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2772{
2773 const AddrRange *addr = addr_;
2774 const FlatRange *fr = fr_;
2775
2776 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2777 return -1;
2778 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2779 return 1;
2780 }
2781 return 0;
2782}
2783
99e86347 2784static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2785{
99e86347 2786 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
2787 sizeof(FlatRange), cmp_flatrange_addr);
2788}
2789
eed2bacf
IM
2790bool memory_region_is_mapped(MemoryRegion *mr)
2791{
5ead6218 2792 return !!mr->container || mr->mapped_via_alias;
eed2bacf
IM
2793}
2794
c6742b14
PB
2795/* Same as memory_region_find, but it does not add a reference to the
2796 * returned region. It must be called from an RCU critical section.
2797 */
2798static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2799 hwaddr addr, uint64_t size)
e2177955 2800{
052e87b0 2801 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
2802 MemoryRegion *root;
2803 AddressSpace *as;
2804 AddrRange range;
99e86347 2805 FlatView *view;
73034e9e
PB
2806 FlatRange *fr;
2807
2808 addr += mr->addr;
feca4ac1
PB
2809 for (root = mr; root->container; ) {
2810 root = root->container;
73034e9e
PB
2811 addr += root->addr;
2812 }
e2177955 2813
73034e9e 2814 as = memory_region_to_address_space(root);
eed2bacf
IM
2815 if (!as) {
2816 return ret;
2817 }
73034e9e 2818 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2819
16620684 2820 view = address_space_to_flatview(as);
99e86347 2821 fr = flatview_lookup(view, range);
e2177955 2822 if (!fr) {
c6742b14 2823 return ret;
e2177955
AK
2824 }
2825
99e86347 2826 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
2827 --fr;
2828 }
2829
2830 ret.mr = fr->mr;
16620684 2831 ret.fv = view;
e2177955
AK
2832 range = addrrange_intersection(range, fr->addr);
2833 ret.offset_within_region = fr->offset_in_region;
2834 ret.offset_within_region += int128_get64(int128_sub(range.start,
2835 fr->addr.start));
052e87b0 2836 ret.size = range.size;
e2177955 2837 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2838 ret.readonly = fr->readonly;
c26763f8 2839 ret.nonvolatile = fr->nonvolatile;
c6742b14
PB
2840 return ret;
2841}
2842
2843MemoryRegionSection memory_region_find(MemoryRegion *mr,
2844 hwaddr addr, uint64_t size)
2845{
2846 MemoryRegionSection ret;
694ea274 2847 RCU_READ_LOCK_GUARD();
c6742b14
PB
2848 ret = memory_region_find_rcu(mr, addr, size);
2849 if (ret.mr) {
2850 memory_region_ref(ret.mr);
2851 }
e2177955
AK
2852 return ret;
2853}
2854
22843838
DH
2855MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2856{
2857 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2858
2859 *tmp = *s;
2860 if (tmp->mr) {
2861 memory_region_ref(tmp->mr);
2862 }
2863 if (tmp->fv) {
2864 bool ret = flatview_ref(tmp->fv);
2865
2866 g_assert(ret);
2867 }
2868 return tmp;
2869}
2870
2871void memory_region_section_free_copy(MemoryRegionSection *s)
2872{
2873 if (s->fv) {
2874 flatview_unref(s->fv);
2875 }
2876 if (s->mr) {
2877 memory_region_unref(s->mr);
2878 }
2879 g_free(s);
2880}
2881
c6742b14
PB
2882bool memory_region_present(MemoryRegion *container, hwaddr addr)
2883{
2884 MemoryRegion *mr;
2885
694ea274 2886 RCU_READ_LOCK_GUARD();
c6742b14 2887 mr = memory_region_find_rcu(container, addr, 1).mr;
c6742b14
PB
2888 return mr && mr != container;
2889}
2890
1e493be5 2891void memory_global_dirty_log_sync(bool last_stage)
86e775c6 2892{
1e493be5 2893 memory_region_sync_dirty_bitmap(NULL, last_stage);
7664e80c
AK
2894}
2895
9458a9a1
PB
2896void memory_global_after_dirty_log_sync(void)
2897{
2898 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2899}
2900
a5c90c61
PX
2901/*
2902 * Dirty track stop flags that are postponed due to VM being stopped. Should
2903 * only be used within vmstate_change hook.
2904 */
2905static unsigned int postponed_stop_flags;
19310760 2906static VMChangeStateEntry *vmstate_change;
a5c90c61 2907static void memory_global_dirty_log_stop_postponed_run(void);
19310760 2908
63b41db4 2909void memory_global_dirty_log_start(unsigned int flags)
7664e80c 2910{
a5c90c61
PX
2911 unsigned int old_flags;
2912
2913 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
7b0538ed 2914
19310760 2915 if (vmstate_change) {
a5c90c61
PX
2916 /* If there is postponed stop(), operate on it first */
2917 postponed_stop_flags &= ~flags;
2918 memory_global_dirty_log_stop_postponed_run();
19310760
JZ
2919 }
2920
a5c90c61
PX
2921 flags &= ~global_dirty_tracking;
2922 if (!flags) {
2923 return;
2924 }
2925
2926 old_flags = global_dirty_tracking;
63b41db4 2927 global_dirty_tracking |= flags;
63b41db4 2928 trace_global_dirty_changed(global_dirty_tracking);
6f6a5ef3 2929
7b0538ed
PX
2930 if (!old_flags) {
2931 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2932 memory_region_transaction_begin();
2933 memory_region_update_pending = true;
2934 memory_region_transaction_commit();
2935 }
7664e80c
AK
2936}
2937
63b41db4 2938static void memory_global_dirty_log_do_stop(unsigned int flags)
7664e80c 2939{
63b41db4
HH
2940 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2941 assert((global_dirty_tracking & flags) == flags);
2942 global_dirty_tracking &= ~flags;
2943
2944 trace_global_dirty_changed(global_dirty_tracking);
6f6a5ef3 2945
7b0538ed
PX
2946 if (!global_dirty_tracking) {
2947 memory_region_transaction_begin();
2948 memory_region_update_pending = true;
2949 memory_region_transaction_commit();
2950 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2951 }
7664e80c
AK
2952}
2953
a5c90c61
PX
2954/*
2955 * Execute the postponed dirty log stop operations if there is, then reset
2956 * everything (including the flags and the vmstate change hook).
2957 */
2958static void memory_global_dirty_log_stop_postponed_run(void)
2959{
2960 /* This must be called with the vmstate handler registered */
2961 assert(vmstate_change);
2962
2963 /* Note: postponed_stop_flags can be cleared in log start routine */
2964 if (postponed_stop_flags) {
2965 memory_global_dirty_log_do_stop(postponed_stop_flags);
2966 postponed_stop_flags = 0;
2967 }
2968
2969 qemu_del_vm_change_state_handler(vmstate_change);
2970 vmstate_change = NULL;
2971}
2972
538f0497 2973static void memory_vm_change_state_handler(void *opaque, bool running,
19310760
JZ
2974 RunState state)
2975{
2976 if (running) {
a5c90c61 2977 memory_global_dirty_log_stop_postponed_run();
19310760
JZ
2978 }
2979}
2980
63b41db4 2981void memory_global_dirty_log_stop(unsigned int flags)
19310760
JZ
2982{
2983 if (!runstate_is_running()) {
a5c90c61 2984 /* Postpone the dirty log stop, e.g., to when VM starts again */
19310760 2985 if (vmstate_change) {
a5c90c61
PX
2986 /* Batch with previous postponed flags */
2987 postponed_stop_flags |= flags;
2988 } else {
2989 postponed_stop_flags = flags;
2990 vmstate_change = qemu_add_vm_change_state_handler(
2991 memory_vm_change_state_handler, NULL);
19310760 2992 }
19310760
JZ
2993 return;
2994 }
2995
63b41db4 2996 memory_global_dirty_log_do_stop(flags);
19310760
JZ
2997}
2998
7664e80c
AK
2999static void listener_add_address_space(MemoryListener *listener,
3000 AddressSpace *as)
3001{
99e86347 3002 FlatView *view;
7664e80c
AK
3003 FlatRange *fr;
3004
680a4783
PB
3005 if (listener->begin) {
3006 listener->begin(listener);
3007 }
63b41db4 3008 if (global_dirty_tracking) {
975aefe0
AK
3009 if (listener->log_global_start) {
3010 listener->log_global_start(listener);
3011 }
7664e80c 3012 }
975aefe0 3013
856d7245 3014 view = address_space_get_flatview(as);
99e86347 3015 FOR_EACH_FLAT_RANGE(fr, view) {
279836f8
DH
3016 MemoryRegionSection section = section_from_flat_range(fr, view);
3017
975aefe0
AK
3018 if (listener->region_add) {
3019 listener->region_add(listener, &section);
3020 }
ae990e6c
DH
3021 if (fr->dirty_log_mask && listener->log_start) {
3022 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
3023 }
7664e80c 3024 }
680a4783
PB
3025 if (listener->commit) {
3026 listener->commit(listener);
3027 }
856d7245 3028 flatview_unref(view);
7664e80c
AK
3029}
3030
d25836ca
PX
3031static void listener_del_address_space(MemoryListener *listener,
3032 AddressSpace *as)
3033{
3034 FlatView *view;
3035 FlatRange *fr;
3036
3037 if (listener->begin) {
3038 listener->begin(listener);
3039 }
3040 view = address_space_get_flatview(as);
3041 FOR_EACH_FLAT_RANGE(fr, view) {
3042 MemoryRegionSection section = section_from_flat_range(fr, view);
3043
3044 if (fr->dirty_log_mask && listener->log_stop) {
3045 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
3046 }
3047 if (listener->region_del) {
3048 listener->region_del(listener, &section);
3049 }
3050 }
3051 if (listener->commit) {
3052 listener->commit(listener);
3053 }
3054 flatview_unref(view);
3055}
3056
d45fa784 3057void memory_listener_register(MemoryListener *listener, AddressSpace *as)
7664e80c 3058{
72e22d2f
AK
3059 MemoryListener *other = NULL;
3060
b87eaa9b
PX
3061 /* Only one of them can be defined for a listener */
3062 assert(!(listener->log_sync && listener->log_sync_global));
3063
d45fa784 3064 listener->address_space = as;
72e22d2f 3065 if (QTAILQ_EMPTY(&memory_listeners)
eae3eb3e 3066 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
72e22d2f
AK
3067 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3068 } else {
3069 QTAILQ_FOREACH(other, &memory_listeners, link) {
3070 if (listener->priority < other->priority) {
3071 break;
3072 }
3073 }
3074 QTAILQ_INSERT_BEFORE(other, listener, link);
3075 }
0d673e36 3076
9a54635d 3077 if (QTAILQ_EMPTY(&as->listeners)
eae3eb3e 3078 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
9a54635d
PB
3079 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3080 } else {
3081 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3082 if (listener->priority < other->priority) {
3083 break;
3084 }
3085 }
3086 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3087 }
3088
d45fa784 3089 listener_add_address_space(listener, as);
544cff46 3090
3091 if (listener->eventfd_add || listener->eventfd_del) {
3092 as->ioeventfd_notifiers++;
3093 }
7664e80c
AK
3094}
3095
3096void memory_listener_unregister(MemoryListener *listener)
3097{
1d8280c1
PB
3098 if (!listener->address_space) {
3099 return;
3100 }
3101
544cff46 3102 if (listener->eventfd_add || listener->eventfd_del) {
3103 listener->address_space->ioeventfd_notifiers--;
3104 }
3105
d25836ca 3106 listener_del_address_space(listener, listener->address_space);
72e22d2f 3107 QTAILQ_REMOVE(&memory_listeners, listener, link);
9a54635d 3108 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
1d8280c1 3109 listener->address_space = NULL;
86e775c6 3110}
e2177955 3111
a2166410
GK
3112void address_space_remove_listeners(AddressSpace *as)
3113{
3114 while (!QTAILQ_EMPTY(&as->listeners)) {
3115 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3116 }
3117}
3118
7dca8043 3119void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 3120{
ac95190e 3121 memory_region_ref(root);
8786db7c 3122 as->root = root;
67ace39b 3123 as->current_map = NULL;
4c19eb72
AK
3124 as->ioeventfd_nb = 0;
3125 as->ioeventfds = NULL;
9a54635d 3126 QTAILQ_INIT(&as->listeners);
0d673e36 3127 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 3128 as->name = g_strdup(name ? name : "anonymous");
202fc01b
AK
3129 address_space_update_topology(as);
3130 address_space_update_ioeventfds(as);
1c0ffa58 3131}
658b2224 3132
374f2981 3133static void do_address_space_destroy(AddressSpace *as)
83f3c251 3134{
9a54635d 3135 assert(QTAILQ_EMPTY(&as->listeners));
078c44f4 3136
856d7245 3137 flatview_unref(as->current_map);
7dca8043 3138 g_free(as->name);
4c19eb72 3139 g_free(as->ioeventfds);
ac95190e 3140 memory_region_unref(as->root);
83f3c251
AK
3141}
3142
374f2981
PB
3143void address_space_destroy(AddressSpace *as)
3144{
ac95190e
PB
3145 MemoryRegion *root = as->root;
3146
374f2981
PB
3147 /* Flush out anything from MemoryListeners listening in on this */
3148 memory_region_transaction_begin();
3149 as->root = NULL;
3150 memory_region_transaction_commit();
3151 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3152
3153 /* At this point, as->dispatch and as->current_map are dummy
3154 * entries that the guest should never use. Wait for the old
3155 * values to expire before freeing the data.
3156 */
ac95190e 3157 as->root = root;
374f2981
PB
3158 call_rcu(as, do_address_space_destroy, rcu);
3159}
3160
4e831901
PX
3161static const char *memory_region_type(MemoryRegion *mr)
3162{
39fa93c4
PMD
3163 if (mr->alias) {
3164 return memory_region_type(mr->alias);
3165 }
4e831901
PX
3166 if (memory_region_is_ram_device(mr)) {
3167 return "ramd";
3168 } else if (memory_region_is_romd(mr)) {
3169 return "romd";
3170 } else if (memory_region_is_rom(mr)) {
3171 return "rom";
3172 } else if (memory_region_is_ram(mr)) {
3173 return "ram";
3174 } else {
3175 return "i/o";
3176 }
3177}
3178
314e2987
BS
3179typedef struct MemoryRegionList MemoryRegionList;
3180
3181struct MemoryRegionList {
3182 const MemoryRegion *mr;
a16878d2 3183 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
314e2987
BS
3184};
3185
b58deb34 3186typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
314e2987 3187
4e831901
PX
3188#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3189 int128_sub((size), int128_one())) : 0)
3190#define MTREE_INDENT " "
3191
b6b71cb5 3192static void mtree_expand_owner(const char *label, Object *obj)
fc051ae6
AK
3193{
3194 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3195
b6b71cb5 3196 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
fc051ae6 3197 if (dev && dev->id) {
b6b71cb5 3198 qemu_printf(" id=%s", dev->id);
fc051ae6 3199 } else {
ddfb0baa 3200 char *canonical_path = object_get_canonical_path(obj);
fc051ae6 3201 if (canonical_path) {
b6b71cb5 3202 qemu_printf(" path=%s", canonical_path);
fc051ae6
AK
3203 g_free(canonical_path);
3204 } else {
b6b71cb5 3205 qemu_printf(" type=%s", object_get_typename(obj));
fc051ae6
AK
3206 }
3207 }
b6b71cb5 3208 qemu_printf("}");
fc051ae6
AK
3209}
3210
b6b71cb5 3211static void mtree_print_mr_owner(const MemoryRegion *mr)
fc051ae6
AK
3212{
3213 Object *owner = mr->owner;
3214 Object *parent = memory_region_owner((MemoryRegion *)mr);
3215
3216 if (!owner && !parent) {
b6b71cb5 3217 qemu_printf(" orphan");
fc051ae6
AK
3218 return;
3219 }
3220 if (owner) {
b6b71cb5 3221 mtree_expand_owner("owner", owner);
fc051ae6
AK
3222 }
3223 if (parent && parent != owner) {
b6b71cb5 3224 mtree_expand_owner("parent", parent);
fc051ae6
AK
3225 }
3226}
3227
b6b71cb5 3228static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
a8170e5e 3229 hwaddr base,
fc051ae6 3230 MemoryRegionListHead *alias_print_queue,
2261d393 3231 bool owner, bool display_disabled)
314e2987 3232{
9479c57a
JK
3233 MemoryRegionList *new_ml, *ml, *next_ml;
3234 MemoryRegionListHead submr_print_queue;
314e2987
BS
3235 const MemoryRegion *submr;
3236 unsigned int i;
b31f8412 3237 hwaddr cur_start, cur_end;
314e2987 3238
f8a9f720 3239 if (!mr) {
314e2987
BS
3240 return;
3241 }
3242
b31f8412
PX
3243 cur_start = base + mr->addr;
3244 cur_end = cur_start + MR_SIZE(mr->size);
3245
3246 /*
3247 * Try to detect overflow of memory region. This should never
3248 * happen normally. When it happens, we dump something to warn the
3249 * user who is observing this.
3250 */
3251 if (cur_start < base || cur_end < cur_start) {
b6b71cb5 3252 qemu_printf("[DETECTED OVERFLOW!] ");
b31f8412
PX
3253 }
3254
314e2987 3255 if (mr->alias) {
314e2987
BS
3256 bool found = false;
3257
3258 /* check if the alias is already in the queue */
a16878d2 3259 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
f54bb15f 3260 if (ml->mr == mr->alias) {
314e2987
BS
3261 found = true;
3262 }
3263 }
3264
3265 if (!found) {
3266 ml = g_new(MemoryRegionList, 1);
3267 ml->mr = mr->alias;
a16878d2 3268 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
314e2987 3269 }
2261d393
PMD
3270 if (mr->enabled || display_disabled) {
3271 for (i = 0; i < level; i++) {
3272 qemu_printf(MTREE_INDENT);
3273 }
883f2c59
PMD
3274 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3275 " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3276 "-" HWADDR_FMT_plx "%s",
2261d393
PMD
3277 cur_start, cur_end,
3278 mr->priority,
3279 mr->nonvolatile ? "nv-" : "",
3280 memory_region_type((MemoryRegion *)mr),
3281 memory_region_name(mr),
3282 memory_region_name(mr->alias),
3283 mr->alias_offset,
3284 mr->alias_offset + MR_SIZE(mr->size),
3285 mr->enabled ? "" : " [disabled]");
3286 if (owner) {
3287 mtree_print_mr_owner(mr);
3288 }
3289 qemu_printf("\n");
fc051ae6 3290 }
314e2987 3291 } else {
2261d393
PMD
3292 if (mr->enabled || display_disabled) {
3293 for (i = 0; i < level; i++) {
3294 qemu_printf(MTREE_INDENT);
3295 }
883f2c59 3296 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
2261d393
PMD
3297 " (prio %d, %s%s): %s%s",
3298 cur_start, cur_end,
3299 mr->priority,
3300 mr->nonvolatile ? "nv-" : "",
3301 memory_region_type((MemoryRegion *)mr),
3302 memory_region_name(mr),
3303 mr->enabled ? "" : " [disabled]");
3304 if (owner) {
3305 mtree_print_mr_owner(mr);
3306 }
3307 qemu_printf("\n");
fc051ae6 3308 }
314e2987 3309 }
9479c57a
JK
3310
3311 QTAILQ_INIT(&submr_print_queue);
3312
314e2987 3313 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
3314 new_ml = g_new(MemoryRegionList, 1);
3315 new_ml->mr = submr;
a16878d2 3316 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
9479c57a
JK
3317 if (new_ml->mr->addr < ml->mr->addr ||
3318 (new_ml->mr->addr == ml->mr->addr &&
3319 new_ml->mr->priority > ml->mr->priority)) {
a16878d2 3320 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
9479c57a
JK
3321 new_ml = NULL;
3322 break;
3323 }
3324 }
3325 if (new_ml) {
a16878d2 3326 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
9479c57a
JK
3327 }
3328 }
3329
a16878d2 3330 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
b6b71cb5 3331 mtree_print_mr(ml->mr, level + 1, cur_start,
2261d393 3332 alias_print_queue, owner, display_disabled);
9479c57a
JK
3333 }
3334
a16878d2 3335 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
9479c57a 3336 g_free(ml);
314e2987
BS
3337 }
3338}
3339
5e8fd947 3340struct FlatViewInfo {
5e8fd947
AK
3341 int counter;
3342 bool dispatch_tree;
fc051ae6 3343 bool owner;
8072aae3 3344 AccelClass *ac;
5e8fd947
AK
3345};
3346
3347static void mtree_print_flatview(gpointer key, gpointer value,
3348 gpointer user_data)
57bb40c9 3349{
5e8fd947
AK
3350 FlatView *view = key;
3351 GArray *fv_address_spaces = value;
3352 struct FlatViewInfo *fvi = user_data;
57bb40c9
PX
3353 FlatRange *range = &view->ranges[0];
3354 MemoryRegion *mr;
3355 int n = view->nr;
5e8fd947
AK
3356 int i;
3357 AddressSpace *as;
3358
b6b71cb5 3359 qemu_printf("FlatView #%d\n", fvi->counter);
5e8fd947
AK
3360 ++fvi->counter;
3361
3362 for (i = 0; i < fv_address_spaces->len; ++i) {
3363 as = g_array_index(fv_address_spaces, AddressSpace*, i);
b6b71cb5
MA
3364 qemu_printf(" AS \"%s\", root: %s",
3365 as->name, memory_region_name(as->root));
5e8fd947 3366 if (as->root->alias) {
b6b71cb5 3367 qemu_printf(", alias %s", memory_region_name(as->root->alias));
5e8fd947 3368 }
b6b71cb5 3369 qemu_printf("\n");
5e8fd947
AK
3370 }
3371
b6b71cb5 3372 qemu_printf(" Root memory region: %s\n",
5e8fd947 3373 view->root ? memory_region_name(view->root) : "(none)");
57bb40c9
PX
3374
3375 if (n <= 0) {
b6b71cb5 3376 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
57bb40c9
PX
3377 return;
3378 }
3379
3380 while (n--) {
3381 mr = range->mr;
377a07aa 3382 if (range->offset_in_region) {
883f2c59
PMD
3383 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3384 " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
b6b71cb5
MA
3385 int128_get64(range->addr.start),
3386 int128_get64(range->addr.start)
3387 + MR_SIZE(range->addr.size),
3388 mr->priority,
3389 range->nonvolatile ? "nv-" : "",
3390 range->readonly ? "rom" : memory_region_type(mr),
3391 memory_region_name(mr),
3392 range->offset_in_region);
377a07aa 3393 } else {
883f2c59 3394 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
b6b71cb5
MA
3395 " (prio %d, %s%s): %s",
3396 int128_get64(range->addr.start),
3397 int128_get64(range->addr.start)
3398 + MR_SIZE(range->addr.size),
3399 mr->priority,
3400 range->nonvolatile ? "nv-" : "",
3401 range->readonly ? "rom" : memory_region_type(mr),
3402 memory_region_name(mr));
377a07aa 3403 }
fc051ae6 3404 if (fvi->owner) {
b6b71cb5 3405 mtree_print_mr_owner(mr);
fc051ae6 3406 }
8072aae3
AK
3407
3408 if (fvi->ac) {
3409 for (i = 0; i < fv_address_spaces->len; ++i) {
3410 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3411 if (fvi->ac->has_memory(current_machine, as,
3412 int128_get64(range->addr.start),
3413 MR_SIZE(range->addr.size) + 1)) {
53b62bec 3414 qemu_printf(" %s", fvi->ac->name);
8072aae3
AK
3415 }
3416 }
3417 }
b6b71cb5 3418 qemu_printf("\n");
57bb40c9
PX
3419 range++;
3420 }
3421
5e8fd947
AK
3422#if !defined(CONFIG_USER_ONLY)
3423 if (fvi->dispatch_tree && view->root) {
b6b71cb5 3424 mtree_print_dispatch(view->dispatch, view->root);
5e8fd947
AK
3425 }
3426#endif
3427
b6b71cb5 3428 qemu_printf("\n");
5e8fd947
AK
3429}
3430
3431static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3432 gpointer user_data)
3433{
3434 FlatView *view = key;
3435 GArray *fv_address_spaces = value;
3436
3437 g_array_unref(fv_address_spaces);
57bb40c9 3438 flatview_unref(view);
5e8fd947
AK
3439
3440 return true;
57bb40c9
PX
3441}
3442
670c0780 3443static void mtree_info_flatview(bool dispatch_tree, bool owner)
314e2987 3444{
670c0780
PMD
3445 struct FlatViewInfo fvi = {
3446 .counter = 0,
3447 .dispatch_tree = dispatch_tree,
3448 .owner = owner,
3449 };
0d673e36 3450 AddressSpace *as;
670c0780
PMD
3451 FlatView *view;
3452 GArray *fv_address_spaces;
3453 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3454 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
314e2987 3455
670c0780
PMD
3456 if (ac->has_memory) {
3457 fvi.ac = ac;
3458 }
5e8fd947 3459
670c0780
PMD
3460 /* Gather all FVs in one table */
3461 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3462 view = address_space_get_flatview(as);
5e8fd947 3463
670c0780
PMD
3464 fv_address_spaces = g_hash_table_lookup(views, view);
3465 if (!fv_address_spaces) {
3466 fv_address_spaces = g_array_new(false, false, sizeof(as));
3467 g_hash_table_insert(views, view, fv_address_spaces);
57bb40c9 3468 }
5e8fd947 3469
670c0780
PMD
3470 g_array_append_val(fv_address_spaces, as);
3471 }
5e8fd947 3472
670c0780
PMD
3473 /* Print */
3474 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
5e8fd947 3475
670c0780
PMD
3476 /* Free */
3477 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3478 g_hash_table_unref(views);
3479}
3480
7bdbf99a
PMD
3481struct AddressSpaceInfo {
3482 MemoryRegionListHead *ml_head;
3483 bool owner;
3484 bool disabled;
3485};
3486
3487/* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3488static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3489{
3490 const AddressSpace *as_a = a;
3491 const AddressSpace *as_b = b;
3492
3493 return g_strcmp0(as_a->name, as_b->name);
3494}
3495
3496static void mtree_print_as_name(gpointer data, gpointer user_data)
3497{
3498 AddressSpace *as = data;
3499
3500 qemu_printf("address-space: %s\n", as->name);
3501}
3502
3503static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3504{
3505 MemoryRegion *mr = key;
3506 GSList *as_same_root_mr_list = value;
3507 struct AddressSpaceInfo *asi = user_data;
3508
3509 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3510 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3511 qemu_printf("\n");
3512}
3513
3514static gboolean mtree_info_as_free(gpointer key, gpointer value,
3515 gpointer user_data)
3516{
3517 GSList *as_same_root_mr_list = value;
3518
3519 g_slist_free(as_same_root_mr_list);
3520
3521 return true;
3522}
3523
670c0780
PMD
3524static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3525{
3526 MemoryRegionListHead ml_head;
3527 MemoryRegionList *ml, *ml2;
3528 AddressSpace *as;
7bdbf99a
PMD
3529 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3530 GSList *as_same_root_mr_list;
3531 struct AddressSpaceInfo asi = {
3532 .ml_head = &ml_head,
3533 .owner = owner,
3534 .disabled = disabled,
3535 };
57bb40c9 3536
314e2987
BS
3537 QTAILQ_INIT(&ml_head);
3538
0d673e36 3539 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
7bdbf99a
PMD
3540 /* Create hashtable, key=AS root MR, value = list of AS */
3541 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3542 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3543 address_space_compare_name);
3544 g_hash_table_insert(views, as->root, as_same_root_mr_list);
b9f9be88
BS
3545 }
3546
7bdbf99a
PMD
3547 /* print address spaces */
3548 g_hash_table_foreach(views, mtree_print_as, &asi);
3549 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3550 g_hash_table_unref(views);
3551
314e2987 3552 /* print aliased regions */
a16878d2 3553 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
b6b71cb5 3554 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
2261d393 3555 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
b6b71cb5 3556 qemu_printf("\n");
314e2987
BS
3557 }
3558
a16878d2 3559 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
88365e47 3560 g_free(ml);
314e2987 3561 }
314e2987 3562}
b4fefef9 3563
670c0780
PMD
3564void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3565{
3566 if (flatview) {
3567 mtree_info_flatview(dispatch_tree, owner);
3568 } else {
3569 mtree_info_as(dispatch_tree, owner, disabled);
3570 }
3571}
3572
fe5f33d6 3573bool memory_region_init_ram(MemoryRegion *mr,
d32335e8 3574 Object *owner,
b08199c6
PM
3575 const char *name,
3576 uint64_t size,
3577 Error **errp)
3578{
3579 DeviceState *owner_dev;
b08199c6 3580
d3143bd5 3581 if (!memory_region_init_ram_nomigrate(mr, owner, name, size, errp)) {
fe5f33d6 3582 return false;
b08199c6
PM
3583 }
3584 /* This will assert if owner is neither NULL nor a DeviceState.
3585 * We only want the owner here for the purposes of defining a
3586 * unique name for migration. TODO: Ideally we should implement
3587 * a naming scheme for Objects which are not DeviceStates, in
3588 * which case we can relax this restriction.
3589 */
3590 owner_dev = DEVICE(owner);
3591 vmstate_register_ram(mr, owner_dev);
fe5f33d6
PMD
3592
3593 return true;
b08199c6
PM
3594}
3595
b9159451 3596bool memory_region_init_rom(MemoryRegion *mr,
d32335e8 3597 Object *owner,
b08199c6
PM
3598 const char *name,
3599 uint64_t size,
3600 Error **errp)
3601{
3602 DeviceState *owner_dev;
b08199c6 3603
fd7549ee 3604 if (!memory_region_init_rom_nomigrate(mr, owner, name, size, errp)) {
b9159451 3605 return false;
b08199c6
PM
3606 }
3607 /* This will assert if owner is neither NULL nor a DeviceState.
3608 * We only want the owner here for the purposes of defining a
3609 * unique name for migration. TODO: Ideally we should implement
3610 * a naming scheme for Objects which are not DeviceStates, in
3611 * which case we can relax this restriction.
3612 */
3613 owner_dev = DEVICE(owner);
3614 vmstate_register_ram(mr, owner_dev);
b9159451
PMD
3615
3616 return true;
b08199c6
PM
3617}
3618
3619void memory_region_init_rom_device(MemoryRegion *mr,
d32335e8 3620 Object *owner,
b08199c6
PM
3621 const MemoryRegionOps *ops,
3622 void *opaque,
3623 const char *name,
3624 uint64_t size,
3625 Error **errp)
3626{
3627 DeviceState *owner_dev;
3628 Error *err = NULL;
3629
3630 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3631 name, size, &err);
3632 if (err) {
3633 error_propagate(errp, err);
3634 return;
3635 }
3636 /* This will assert if owner is neither NULL nor a DeviceState.
3637 * We only want the owner here for the purposes of defining a
3638 * unique name for migration. TODO: Ideally we should implement
3639 * a naming scheme for Objects which are not DeviceStates, in
3640 * which case we can relax this restriction.
3641 */
3642 owner_dev = DEVICE(owner);
3643 vmstate_register_ram(mr, owner_dev);
3644}
3645
e7d3222e 3646/*
c2646d49 3647 * Support system builds with CONFIG_FUZZ using a weak symbol and a stub for
e7d3222e
AB
3648 * the fuzz_dma_read_cb callback
3649 */
3650#ifdef CONFIG_FUZZ
3651void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3652 size_t len,
fc1c8344 3653 MemoryRegion *mr)
e7d3222e
AB
3654{
3655}
3656#endif
3657
b4fefef9
PC
3658static const TypeInfo memory_region_info = {
3659 .parent = TYPE_OBJECT,
3660 .name = TYPE_MEMORY_REGION,
1b53ecd9 3661 .class_size = sizeof(MemoryRegionClass),
b4fefef9
PC
3662 .instance_size = sizeof(MemoryRegion),
3663 .instance_init = memory_region_initfn,
3664 .instance_finalize = memory_region_finalize,
3665};
3666
3df9d748
AK
3667static const TypeInfo iommu_memory_region_info = {
3668 .parent = TYPE_MEMORY_REGION,
3669 .name = TYPE_IOMMU_MEMORY_REGION,
1221a474 3670 .class_size = sizeof(IOMMUMemoryRegionClass),
3df9d748
AK
3671 .instance_size = sizeof(IOMMUMemoryRegion),
3672 .instance_init = iommu_memory_region_initfn,
1221a474 3673 .abstract = true,
3df9d748
AK
3674};
3675
8947d7fc
DH
3676static const TypeInfo ram_discard_manager_info = {
3677 .parent = TYPE_INTERFACE,
3678 .name = TYPE_RAM_DISCARD_MANAGER,
3679 .class_size = sizeof(RamDiscardManagerClass),
3680};
3681
b4fefef9
PC
3682static void memory_register_types(void)
3683{
3684 type_register_static(&memory_region_info);
3df9d748 3685 type_register_static(&iommu_memory_region_info);
8947d7fc 3686 type_register_static(&ram_discard_manager_info);
b4fefef9
PC
3687}
3688
3689type_init(memory_register_types)