MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type

[mirror_edk2.git] / ArmPlatformPkg / Library / HdLcd / HdLcd.c

/** @file\r
  This file contains the platform independent parts of HdLcd\r
\r
  Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>\r
\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <Library/DebugLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/LcdHwLib.h>\r
#include <Library/LcdPlatformLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/PcdLib.h>\r
\r
#include "HdLcd.h"\r
\r
#define BYTES_PER_PIXEL 4\r
\r
/** Initialize display.\r
\r
  @param[in]  VramBaseAddress    Address of the framebuffer.\r
\r
  @retval EFI_SUCCESS            Display initialization successful.\r
**/\r
EFI_STATUS\r
LcdInitialize (\r
  IN EFI_PHYSICAL_ADDRESS   VramBaseAddress\r
  )\r
{\r
  // Disable the controller\r
  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
\r
  // Disable all interrupts\r
  MmioWrite32 (HDLCD_REG_INT_MASK, 0);\r
\r
  // Define start of the VRAM. This never changes for any graphics mode\r
  MmioWrite32 (HDLCD_REG_FB_BASE, (UINT32)VramBaseAddress);\r
\r
  // Setup various registers that never change\r
  MmioWrite32 (HDLCD_REG_BUS_OPTIONS,  (4 << 8) | HDLCD_BURST_8);\r
\r
  MmioWrite32 (HDLCD_REG_POLARITIES, HDLCD_DEFAULT_POLARITIES);\r
\r
  MmioWrite32 (\r
    HDLCD_REG_PIXEL_FORMAT,\r
    HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL\r
    );\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/** Set requested mode of the display.\r
\r
  @param[in] ModeNumber          Display mode number.\r
\r
  @retval EFI_SUCCESS            Display mode set successfully.\r
  @retval !(EFI_SUCCESS)         Other errors.\r
**/\r
EFI_STATUS\r
LcdSetMode (\r
  IN UINT32  ModeNumber\r
  )\r
{\r
  EFI_STATUS        Status;\r
  SCAN_TIMINGS      *Horizontal;\r
  SCAN_TIMINGS      *Vertical;\r
\r
  EFI_GRAPHICS_PIXEL_FORMAT  PixelFormat;\r
\r
  EFI_GRAPHICS_OUTPUT_MODE_INFORMATION  ModeInfo;\r
\r
  // Set the video mode timings and other relevant information\r
  Status = LcdPlatformGetTimings (\r
             ModeNumber,\r
             &Horizontal,\r
             &Vertical\r
             );\r
  if (EFI_ERROR (Status)) {\r
    ASSERT_EFI_ERROR (Status);\r
    return Status;\r
  }\r
\r
  ASSERT (Horizontal != NULL);\r
  ASSERT (Vertical != NULL);\r
\r
  // Get the pixel format information.\r
  Status = LcdPlatformQueryMode (ModeNumber, &ModeInfo);\r
  if (EFI_ERROR (Status)) {\r
    ASSERT_EFI_ERROR (Status);\r
    return Status;\r
  }\r
\r
  // By default PcdArmHdLcdSwapBlueRedSelect is set to false\r
  // However on the Juno platform HW lines for BLUE and RED are swapped\r
  // Therefore PcdArmHdLcdSwapBlueRedSelect is set to TRUE for the Juno platform\r
  PixelFormat = FixedPcdGetBool (PcdArmHdLcdSwapBlueRedSelect)\r
                ? PixelRedGreenBlueReserved8BitPerColor\r
                : PixelBlueGreenRedReserved8BitPerColor;\r
\r
  if (ModeInfo.PixelFormat == PixelFormat) {\r
    MmioWrite32 (HDLCD_REG_RED_SELECT,  (8 << 8) | 16);\r
    MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 0);\r
  } else {\r
    MmioWrite32 (HDLCD_REG_BLUE_SELECT, (8 << 8) | 16);\r
    MmioWrite32 (HDLCD_REG_RED_SELECT,  (8 << 8) | 0);\r
  }\r
\r
  MmioWrite32 (HDLCD_REG_GREEN_SELECT, (8 << 8) | 8);\r
\r
  // Disable the controller\r
  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
\r
  // Update the frame buffer information with the new settings\r
  MmioWrite32 (\r
    HDLCD_REG_FB_LINE_LENGTH,\r
    Horizontal->Resolution * BYTES_PER_PIXEL\r
    );\r
\r
  MmioWrite32 (\r
    HDLCD_REG_FB_LINE_PITCH,\r
    Horizontal->Resolution * BYTES_PER_PIXEL\r
    );\r
\r
  MmioWrite32 (HDLCD_REG_FB_LINE_COUNT, Vertical->Resolution - 1);\r
\r
  // Set the vertical timing information\r
  MmioWrite32 (HDLCD_REG_V_SYNC,        Vertical->Sync);\r
  MmioWrite32 (HDLCD_REG_V_BACK_PORCH,  Vertical->BackPorch);\r
  MmioWrite32 (HDLCD_REG_V_DATA,        Vertical->Resolution - 1);\r
  MmioWrite32 (HDLCD_REG_V_FRONT_PORCH, Vertical->FrontPorch);\r
\r
  // Set the horizontal timing information\r
  MmioWrite32 (HDLCD_REG_H_SYNC,        Horizontal->Sync);\r
  MmioWrite32 (HDLCD_REG_H_BACK_PORCH,  Horizontal->BackPorch);\r
  MmioWrite32 (HDLCD_REG_H_DATA,        Horizontal->Resolution - 1);\r
  MmioWrite32 (HDLCD_REG_H_FRONT_PORCH, Horizontal->FrontPorch);\r
\r
  // Enable the controller\r
  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_ENABLE);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/** De-initializes the display.\r
**/\r
VOID\r
LcdShutdown (\r
  VOID\r
  )\r
{\r
  // Disable the controller\r
  MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
}\r
\r
/** Check for presence of HDLCD.\r
\r
  @retval EFI_SUCCESS            Returns success if platform implements a HDLCD\r
                                 controller.\r
  @retval EFI_NOT_FOUND          HDLCD display controller not found on the\r
                                 platform.\r
**/\r
EFI_STATUS\r
LcdIdentify (\r
  VOID\r
  )\r
{\r
  if ((MmioRead32 (HDLCD_REG_VERSION) >> 16) == HDLCD_PRODUCT_ID) {\r
    return EFI_SUCCESS;\r
  }\r
\r
  return EFI_NOT_FOUND;\r
}\r