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ARM Packages: Replaced the macro GetCorePositionFromMpId() by the ArmPlatformGetCoreP...
[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / Arm / PrePeiCoreEntryPoint.S
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11c20f4e 1//\r
bebda7ce 2// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
11c20f4e 3// \r
4// This program and the accompanying materials \r
5// are licensed and made available under the terms and conditions of the BSD License \r
6// which accompanies this distribution. The full text of the license may be found at \r
7// http://opensource.org/licenses/bsd-license.php \r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
15#include <Base.h>\r
16#include <Library/PcdLib.h>\r
17#include <AutoGen.h>\r
18\r
19.text\r
20.align 3\r
21\r
11c20f4e 22GCC_ASM_IMPORT(CEntryPoint)\r
2d45f194 23GCC_ASM_IMPORT(ArmPlatformGetCorePosition)\r
bebda7ce 24GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)\r
0787bc61 25GCC_ASM_IMPORT(ArmReadMpidr)\r
11c20f4e 26GCC_ASM_EXPORT(_ModuleEntryPoint)\r
27\r
0787bc61 28StartupAddr: .word CEntryPoint\r
11c20f4e 29\r
30ASM_PFX(_ModuleEntryPoint):\r
2dbcb8f0 31 // Identify CPU ID\r
0787bc61 32 bl ASM_PFX(ArmReadMpidr)\r
bebda7ce 33 // Keep a copy of the MpId register value\r
34 mov r5, r0\r
35\r
36 // Is it the Primary Core ?\r
37 bl ASM_PFX(ArmPlatformIsPrimaryCore)\r
38\r
1377db63 39 // Get the top of the primary stacks (and the base of the secondary stacks)\r
2dbcb8f0 40 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r
41 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
1377db63 42 add r1, r1, r2\r
2dbcb8f0 43\r
bebda7ce 44 // r0 is equal to 1 if I am the primary core\r
45 cmp r0, #1\r
2dbcb8f0 46 beq _SetupPrimaryCoreStack\r
47\r
48_SetupSecondaryCoreStack:\r
1377db63 49 // r1 contains the base of the secondary stacks\r
2dbcb8f0 50\r
2d45f194 51 // Get the Core Position\r
52 mov r6, r1 // Save base of the secondary stacks\r
53 mov r0, r5\r
54 bl ASM_PFX(ArmPlatformGetCorePosition)\r
2dbcb8f0 55 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
1377db63 56 add r0, r0, #1\r
2dbcb8f0 57\r
2dbcb8f0 58 // StackOffset = CorePos * StackSize\r
1377db63 59 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
60 mul r0, r0, r2\r
2dbcb8f0 61 // SP = StackBase + StackOffset\r
2d45f194 62 add sp, r6, r0\r
11c20f4e 63\r
64_PrepareArguments:\r
2dbcb8f0 65 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
f92b93c9 66 LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
11c20f4e 67 add r2, r2, #4\r
68 ldr r1, [r2]\r
69\r
1377db63 70 // Move sec startup address into a data register\r
71 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
72 ldr r3, StartupAddr\r
73 \r
74 // Jump to PrePeiCore C code\r
2dbcb8f0 75 // r0 = mp_id\r
76 // r1 = pei_core_address\r
1377db63 77 mov r0, r5\r
78 blx r3\r
79\r
80_SetupPrimaryCoreStack:\r
81 // r1 contains the top of the primary stack\r
82 LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
83\r
84 // The reserved space for global variable must be 8-bytes aligned for pushing\r
85 // 64-bit variable on the stack\r
86 SetPrimaryStack (r1, r2, r3)\r
87 b _PrepareArguments\r
2dbcb8f0 88\r
89_NeverReturn:\r
90 b _NeverReturn\r