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ArmPlatformPkg/ArmPlatformLib: Added ArmPlatformGetPrimaryCoreMpId()
[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / Arm / PrePeiCoreEntryPoint.asm
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1d5d0ae9 1//\r
bebda7ce 2// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
1d5d0ae9 3// \r
4// This program and the accompanying materials \r
5// are licensed and made available under the terms and conditions of the BSD License \r
6// which accompanies this distribution. The full text of the license may be found at \r
7// http://opensource.org/licenses/bsd-license.php \r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
15#include <Base.h>\r
16#include <Library/PcdLib.h>\r
17#include <AutoGen.h>\r
18\r
19 INCLUDE AsmMacroIoLib.inc\r
20 \r
21 IMPORT CEntryPoint\r
bebda7ce 22 IMPORT ArmPlatformIsPrimaryCore\r
0787bc61 23 IMPORT ArmReadMpidr\r
1d5d0ae9 24 EXPORT _ModuleEntryPoint\r
25 \r
26 PRESERVE8\r
27 AREA PrePeiCoreEntryPoint, CODE, READONLY\r
28 \r
29StartupAddr DCD CEntryPoint\r
30\r
1d5d0ae9 31_ModuleEntryPoint\r
32 // Identify CPU ID\r
0787bc61 33 bl ArmReadMpidr\r
bebda7ce 34 // Keep a copy of the MpId register value\r
35 mov r5, r0\r
1377db63 36 \r
bebda7ce 37 // Is it the Primary Core ?\r
38 bl ArmPlatformIsPrimaryCore\r
39\r
1377db63 40 // Get the top of the primary stacks (and the base of the secondary stacks)\r
2dbcb8f0 41 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r
42 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
1377db63 43 add r1, r1, r2\r
2dbcb8f0 44\r
bebda7ce 45 // r0 is equal to 1 if I am the primary core\r
46 cmp r0, #1\r
2dbcb8f0 47 beq _SetupPrimaryCoreStack\r
48\r
49_SetupSecondaryCoreStack\r
1377db63 50 // r1 contains the base of the secondary stacks\r
2dbcb8f0 51\r
1377db63 52 // Get the Core Position (ClusterId * 4) + CoreId\r
a32dae48 53 GetCorePositionFromMpId(r0, r5, r2)\r
2dbcb8f0 54 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
1377db63 55 add r0, r0, #1\r
1d5d0ae9 56\r
2dbcb8f0 57 // StackOffset = CorePos * StackSize\r
1377db63 58 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
59 mul r0, r0, r2\r
2dbcb8f0 60 // SP = StackBase + StackOffset\r
1377db63 61 add sp, r1, r0\r
47a8e12f 62\r
63_PrepareArguments\r
1d5d0ae9 64 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
f92b93c9 65 LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
1d5d0ae9 66 add r2, r2, #4\r
67 ldr r1, [r2]\r
68\r
1377db63 69 // Move sec startup address into a data register\r
70 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
71 ldr r3, StartupAddr\r
72 \r
73 // Jump to PrePeiCore C code\r
0787bc61 74 // r0 = mp_id\r
1d5d0ae9 75 // r1 = pei_core_address\r
1377db63 76 mov r0, r5\r
77 blx r3\r
78\r
79_SetupPrimaryCoreStack\r
80 // r1 contains the top of the primary stack\r
81 LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
82\r
83 // The reserved space for global variable must be 8-bytes aligned for pushing\r
84 // 64-bit variable on the stack\r
85 SetPrimaryStack (r1, r2, r3)\r
86 b _PrepareArguments\r
1d5d0ae9 87\r
2dbcb8f0 88_NeverReturn\r
89 b _NeverReturn\r
90\r
1d5d0ae9 91 END\r