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cd872e40 | 1 | //\r |
063ad84e | 2 | // Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r |
cd872e40 | 3 | //\r |
4 | // This program and the accompanying materials\r | |
5 | // are licensed and made available under the terms and conditions of the BSD License\r | |
6 | // which accompanies this distribution. The full text of the license may be found at\r | |
7 | // http://opensource.org/licenses/bsd-license.php\r | |
8 | //\r | |
9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | //\r | |
12 | //\r | |
13 | \r | |
14 | #include <AsmMacroIoLib.h>\r | |
15 | #include <Base.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <AutoGen.h>\r | |
18 | \r | |
063ad84e | 19 | #include <Chipset/ArmV7.h>\r |
20 | \r | |
cd872e40 | 21 | INCLUDE AsmMacroIoLib.inc\r |
22 | \r | |
23 | IMPORT CEntryPoint\r | |
0787bc61 | 24 | IMPORT ArmReadMpidr\r |
695df8ba | 25 | IMPORT ArmPlatformStackSet\r |
26 | \r | |
cd872e40 | 27 | EXPORT _ModuleEntryPoint\r |
28 | \r | |
29 | PRESERVE8\r | |
30 | AREA PrePiCoreEntryPoint, CODE, READONLY\r | |
31 | \r | |
32 | StartupAddr DCD CEntryPoint\r | |
33 | \r | |
34 | _ModuleEntryPoint\r | |
0787bc61 | 35 | // Get ID of this CPU in Multicore system\r |
36 | bl ArmReadMpidr\r | |
37 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r | |
17839a45 | 38 | and r6, r0, r1\r |
cd872e40 | 39 | \r |
d269095b | 40 | _SetSVCMode\r |
99565b88 | 41 | // Enter SVC mode, Disable FIQ and IRQ\r |
063ad84e | 42 | mov r1, #(CPSR_MODE_SVC :OR: CPSR_IRQ :OR: CPSR_FIQ)\r |
d269095b | 43 | msr CPSR_c, r1\r |
44 | \r | |
2dbcb8f0 | 45 | // Check if we can install the stack at the top of the System Memory or if we need\r |
d269095b | 46 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r |
47 | // at the top of the DRAM)\r | |
48 | _SetupStackPosition\r | |
cd872e40 | 49 | // Compute Top of System Memory\r |
50 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r | |
51 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r | |
2569b068 | 52 | sub r2, r2, #1\r |
cd872e40 | 53 | add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r |
cd872e40 | 54 | \r |
d269095b | 55 | // Calculate Top of the Firmware Device\r |
f92b93c9 | 56 | LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r |
57 | LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r | |
2569b068 | 58 | sub r3, r3, #1\r |
7defe7b3 | 59 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r |
d269095b | 60 | \r |
61 | // UEFI Memory Size (stacks are allocated in this region)\r | |
62 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r | |
63 | \r | |
64 | //\r | |
65 | // Reserve the memory for the UEFI region (contain stacks on its top)\r | |
66 | //\r | |
67 | \r | |
68 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r | |
2dbcb8f0 | 69 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r |
70 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r | |
71 | cmp r0, r4\r | |
d269095b | 72 | bge _SetupStack\r |
73 | \r | |
74 | // Case the top of stacks is the FdBaseAddress\r | |
75 | mov r1, r2\r | |
cd872e40 | 76 | \r |
77 | _SetupStack\r | |
2dbcb8f0 | 78 | // r1 contains the top of the stack (and the UEFI Memory)\r |
d269095b | 79 | \r |
2569b068 | 80 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r |
81 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r | |
82 | // top of the memory space)\r | |
17839a45 | 83 | adds r7, r1, #1\r |
2569b068 | 84 | bcs _SetupOverflowStack\r |
85 | \r | |
86 | _SetupAlignedStack\r | |
17839a45 | 87 | mov r1, r7\r |
2569b068 | 88 | b _GetBaseUefiMemory\r |
89 | \r | |
90 | _SetupOverflowStack\r | |
91 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r | |
92 | // aligned (4KB)\r | |
17839a45 | 93 | LoadConstantToReg (EFI_PAGE_MASK, r7)\r |
94 | and r7, r7, r1\r | |
95 | sub r1, r1, r7\r | |
2569b068 | 96 | \r |
97 | _GetBaseUefiMemory\r | |
d269095b | 98 | // Calculate the Base of the UEFI Memory\r |
17839a45 | 99 | sub r7, r1, r4\r |
cd872e40 | 100 | \r |
2dbcb8f0 | 101 | _GetStackBase\r |
1377db63 | 102 | // r1 = The top of the Mpcore Stacks\r |
2dbcb8f0 | 103 | // Stack for the primary core = PrimaryCoreStack\r |
104 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
695df8ba | 105 | sub r8, r1, r2\r |
106 | \r | |
107 | // Stack for the secondary core = Number of Cores - 1\r | |
108 | LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)\r | |
109 | sub r0, r0, #1\r | |
110 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)\r | |
111 | mul r1, r1, r0\r | |
112 | sub r8, r8, r1\r | |
113 | \r | |
114 | // r8 = The base of the MpCore Stacks (primary stack & secondary stacks)\r | |
115 | mov r0, r8\r | |
116 | mov r1, r6\r | |
117 | //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)\r | |
118 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r | |
2dbcb8f0 | 119 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r |
17839a45 | 120 | bl ArmPlatformStackSet\r |
2dbcb8f0 | 121 | \r |
122 | // Is it the Primary Core ?\r | |
123 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r | |
17839a45 | 124 | cmp r6, r4\r |
cd872e40 | 125 | bne _PrepareArguments\r |
126 | \r | |
17839a45 | 127 | _ReserveGlobalVariable\r |
128 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r0)\r | |
129 | // InitializePrimaryStack($GlobalVariableSize, $Tmp1)\r | |
130 | InitializePrimaryStack r0, r1\r | |
2dbcb8f0 | 131 | \r |
cd872e40 | 132 | _PrepareArguments\r |
17839a45 | 133 | mov r0, r6\r |
134 | mov r1, r7\r | |
135 | mov r2, r8\r | |
c524ffbb | 136 | mov r3, sp\r |
137 | \r | |
cd872e40 | 138 | // Move sec startup address into a data register\r |
139 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r | |
c524ffbb | 140 | ldr r4, StartupAddr\r |
cd872e40 | 141 | \r |
d269095b | 142 | // Jump to PrePiCore C code\r |
0787bc61 | 143 | // r0 = MpId\r |
cd872e40 | 144 | // r1 = UefiMemoryBase\r |
c524ffbb | 145 | // r2 = StacksBase\r |
146 | // r3 = GlobalVariableBase\r | |
147 | blx r4\r | |
cd872e40 | 148 | \r |
2dbcb8f0 | 149 | _NeverReturn\r |
150 | b _NeverReturn\r | |
151 | \r | |
cd872e40 | 152 | END\r |