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8bdadcc8 1/** @file\r
37640ed3 2 This file contains just some basic definitions that are needed by drivers\r
3 that dealing with ATA/ATAPI interface.\r
8bdadcc8 4\r
37640ed3 5Copyright (c) 2007 - 2008, Intel Corporation\r
8bdadcc8 6All rights reserved. This program and the accompanying materials\r
7are licensed and made available under the terms and conditions of the BSD License\r
8which accompanies this distribution. The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php\r
10\r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
42eedea9 16#ifndef _ATAPI_H_\r
17#define _ATAPI_H_\r
8bdadcc8 18\r
766f4bc1 19#pragma pack(1)\r
20\r
1bc5d021 21///\r
22/// ATAPI_IDENTIFY_DATA is defined in ATA-6\r
23///\r
8bdadcc8 24typedef struct {\r
37640ed3 25 UINT16 config; ///< General Configuration\r
8bdadcc8 26 UINT16 obsolete_1;\r
27 UINT16 specific_config;\r
28 UINT16 obsolete_3;\r
29 UINT16 retired_4_5[2];\r
30 UINT16 obsolete_6;\r
31 UINT16 cfa_reserved_7_8[2];\r
32 UINT16 retired_9;\r
37640ed3 33 CHAR8 SerialNo[20]; ///< ASCII\r
8bdadcc8 34 UINT16 retired_20_21[2];\r
35 UINT16 obsolete_22;\r
37640ed3 36 CHAR8 FirmwareVer[8]; ///< ASCII\r
37 CHAR8 ModelName[40]; ///< ASCII\r
8bdadcc8 38 UINT16 multi_sector_cmd_max_sct_cnt;\r
39 UINT16 reserved_48;\r
40 UINT16 capabilities_49;\r
41 UINT16 capabilities_50;\r
42 UINT16 obsolete_51_52[2];\r
43 UINT16 field_validity;\r
44 UINT16 obsolete_54_58[5];\r
45 UINT16 mutil_sector_setting;\r
46 UINT16 user_addressable_sectors_lo;\r
47 UINT16 user_addressable_sectors_hi;\r
48 UINT16 obsolete_62;\r
49 UINT16 multi_word_dma_mode;\r
50 UINT16 advanced_pio_modes;\r
51 UINT16 min_multi_word_dma_cycle_time;\r
52 UINT16 rec_multi_word_dma_cycle_time;\r
53 UINT16 min_pio_cycle_time_without_flow_control;\r
54 UINT16 min_pio_cycle_time_with_flow_control;\r
55 UINT16 reserved_69_74[6];\r
56 UINT16 queue_depth;\r
57 UINT16 reserved_76_79[4];\r
58 UINT16 major_version_no;\r
59 UINT16 minor_version_no;\r
60 UINT16 cmd_set_support_82;\r
61 UINT16 cmd_set_support_83;\r
62 UINT16 cmd_feature_support;\r
63 UINT16 cmd_feature_enable_85;\r
64 UINT16 cmd_feature_enable_86;\r
65 UINT16 cmd_feature_default;\r
66 UINT16 ultra_dma_select;\r
67 UINT16 time_required_for_sec_erase;\r
68 UINT16 time_required_for_enhanced_sec_erase;\r
69 UINT16 current_advanced_power_mgmt_value;\r
70 UINT16 master_pwd_revison_code;\r
71 UINT16 hardware_reset_result;\r
72 UINT16 current_auto_acoustic_mgmt_value;\r
73 UINT16 reserved_95_99[5];\r
74 UINT16 max_user_lba_for_48bit_addr[4];\r
75 UINT16 reserved_104_126[23];\r
76 UINT16 removable_media_status_notification_support;\r
77 UINT16 security_status;\r
78 UINT16 vendor_data_129_159[31];\r
79 UINT16 cfa_power_mode;\r
80 UINT16 cfa_reserved_161_175[15];\r
81 UINT16 current_media_serial_no[30];\r
82 UINT16 reserved_206_254[49];\r
83 UINT16 integrity_word;\r
84} ATAPI_IDENTIFY_DATA;\r
85\r
37640ed3 86///\r
53bbea41 87/// Standard Quiry Data format, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
37640ed3 88///\r
8bdadcc8 89typedef struct {\r
90 UINT8 peripheral_type;\r
91 UINT8 RMB;\r
92 UINT8 version;\r
93 UINT8 response_data_format;\r
53bbea41 94 UINT8 addnl_length; ///< n - 4, Numbers of bytes following this one\r
8bdadcc8 95 UINT8 reserved_5;\r
96 UINT8 reserved_6;\r
97 UINT8 reserved_7;\r
98 UINT8 vendor_info[8];\r
99 UINT8 product_id[16];\r
100 UINT8 product_revision_level[4];\r
37640ed3 101 UINT8 vendor_specific_36_55[55 - 36 + 1];\r
102 UINT8 reserved_56_95[95 - 56 + 1];\r
103 ///\r
53bbea41 104 /// Vendor specific parameters fields, the sizeof (ATAPI_INQUIRY_DATA) is 254\r
37640ed3 105 /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
106 ///\r
53bbea41 107 UINT8 vendor_specific_96_253[253 - 96 + 1];\r
37640ed3 108} ATAPI_INQUIRY_DATA;\r
109\r
db835e01 110///\r
111/// Request Sense Standard Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
112///\r
8bdadcc8 113typedef struct {\r
114 UINT8 error_code : 7;\r
115 UINT8 valid : 1;\r
116 UINT8 reserved_1;\r
117 UINT8 sense_key : 4;\r
37640ed3 118 UINT8 reserved_2 : 1;\r
119 UINT8 Vendor_specifc_1 : 3;\r
8bdadcc8 120 UINT8 vendor_specific_3;\r
121 UINT8 vendor_specific_4;\r
122 UINT8 vendor_specific_5;\r
123 UINT8 vendor_specific_6;\r
37640ed3 124 UINT8 addnl_sense_length; ///< n - 7\r
8bdadcc8 125 UINT8 vendor_specific_8;\r
126 UINT8 vendor_specific_9;\r
127 UINT8 vendor_specific_10;\r
128 UINT8 vendor_specific_11;\r
37640ed3 129 UINT8 addnl_sense_code; ///< mandatory\r
130 UINT8 addnl_sense_code_qualifier; ///< mandatory\r
131 UINT8 field_replaceable_unit_code; ///< optional\r
132 UINT8 sense_key_specific_15 : 7;\r
133 UINT8 SKSV : 1;\r
134 UINT8 sense_key_specific_16;\r
135 UINT8 sense_key_specific_17;\r
136 ///\r
137 /// Followed by additional sense bytes.\r
53bbea41 138 /// the sizeof (ATAPI_REQUEST_SENSE_DATA) is 254, \r
37640ed3 139 /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
140 ///\r
53bbea41 141 UINT8 additional_sense_bytes_18_253[253 - 18 + 1];\r
8bdadcc8 142} ATAPI_REQUEST_SENSE_DATA;\r
143\r
766f4bc1 144///\r
145/// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
146///\r
db835e01 147\r
148///\r
149/// READ CAPACITY Data \r
37640ed3 150///\r
8bdadcc8 151typedef struct {\r
152 UINT8 LastLba3;\r
153 UINT8 LastLba2;\r
154 UINT8 LastLba1;\r
155 UINT8 LastLba0;\r
156 UINT8 BlockSize3;\r
157 UINT8 BlockSize2;\r
158 UINT8 BlockSize1;\r
159 UINT8 BlockSize0;\r
160} ATAPI_READ_CAPACITY_DATA;\r
161\r
37640ed3 162///\r
db835e01 163/// Capacity List Header + Current/Maximum Capacity Descriptor,\r
37640ed3 164///\r
8bdadcc8 165typedef struct {\r
166 UINT8 reserved_0;\r
167 UINT8 reserved_1;\r
168 UINT8 reserved_2;\r
169 UINT8 Capacity_Length;\r
170 UINT8 LastLba3;\r
171 UINT8 LastLba2;\r
172 UINT8 LastLba1;\r
173 UINT8 LastLba0;\r
174 UINT8 DesCode : 2;\r
175 UINT8 reserved_9 : 6;\r
176 UINT8 BlockSize2;\r
177 UINT8 BlockSize1;\r
178 UINT8 BlockSize0;\r
179} ATAPI_READ_FORMAT_CAPACITY_DATA;\r
180\r
37640ed3 181///\r
182/// Test Unit Ready Command\r
183///\r
8bdadcc8 184typedef struct {\r
185 UINT8 opcode;\r
186 UINT8 reserved_1;\r
187 UINT8 reserved_2;\r
188 UINT8 reserved_3;\r
189 UINT8 reserved_4;\r
190 UINT8 reserved_5;\r
191 UINT8 reserved_6;\r
192 UINT8 reserved_7;\r
193 UINT8 reserved_8;\r
194 UINT8 reserved_9;\r
195 UINT8 reserved_10;\r
196 UINT8 reserved_11;\r
197} ATAPI_TEST_UNIT_READY_CMD;\r
198\r
37640ed3 199///\r
200/// INQUIRY Command\r
201///\r
8bdadcc8 202typedef struct {\r
203 UINT8 opcode;\r
37640ed3 204 UINT8 reserved_1 : 5;\r
205 UINT8 lun : 3;\r
206 UINT8 page_code; ///< defined in SFF8090i, V6\r
8bdadcc8 207 UINT8 reserved_3;\r
208 UINT8 allocation_length;\r
209 UINT8 reserved_5;\r
210 UINT8 reserved_6;\r
211 UINT8 reserved_7;\r
212 UINT8 reserved_8;\r
213 UINT8 reserved_9;\r
214 UINT8 reserved_10;\r
215 UINT8 reserved_11;\r
216} ATAPI_INQUIRY_CMD;\r
217\r
37640ed3 218///\r
219/// REQUEST SENSE Command\r
220///\r
8bdadcc8 221typedef struct {\r
222 UINT8 opcode;\r
37640ed3 223 UINT8 reserved_1 : 5;\r
224 UINT8 lun : 3;\r
8bdadcc8 225 UINT8 reserved_2;\r
226 UINT8 reserved_3;\r
227 UINT8 allocation_length;\r
228 UINT8 reserved_5;\r
229 UINT8 reserved_6;\r
230 UINT8 reserved_7;\r
231 UINT8 reserved_8;\r
232 UINT8 reserved_9;\r
233 UINT8 reserved_10;\r
234 UINT8 reserved_11;\r
235} ATAPI_REQUEST_SENSE_CMD;\r
236\r
37640ed3 237///\r
238/// READ (10) Command\r
239///\r
8bdadcc8 240typedef struct {\r
241 UINT8 opcode;\r
242 UINT8 reserved_1 : 5;\r
243 UINT8 lun : 3;\r
244 UINT8 Lba0;\r
245 UINT8 Lba1;\r
246 UINT8 Lba2;\r
247 UINT8 Lba3;\r
248 UINT8 reserved_6;\r
249 UINT8 TranLen0;\r
250 UINT8 TranLen1;\r
251 UINT8 reserved_9;\r
252 UINT8 reserved_10;\r
253 UINT8 reserved_11;\r
254} ATAPI_READ10_CMD;\r
255\r
37640ed3 256///\r
257/// READ Format Capacity Command\r
258///\r
8bdadcc8 259typedef struct {\r
260 UINT8 opcode;\r
37640ed3 261 UINT8 reserved_1 : 5;\r
262 UINT8 lun : 3;\r
8bdadcc8 263 UINT8 reserved_2;\r
264 UINT8 reserved_3;\r
265 UINT8 reserved_4;\r
266 UINT8 reserved_5;\r
267 UINT8 reserved_6;\r
268 UINT8 allocation_length_hi;\r
269 UINT8 allocation_length_lo;\r
270 UINT8 reserved_9;\r
271 UINT8 reserved_10;\r
272 UINT8 reserved_11;\r
273} ATAPI_READ_FORMAT_CAP_CMD;\r
274\r
37640ed3 275///\r
276/// MODE SENSE Command\r
277///\r
8bdadcc8 278typedef struct {\r
279 UINT8 opcode;\r
37640ed3 280 UINT8 reserved_1 : 5;\r
281 UINT8 lun : 3;\r
282 UINT8 page_code : 6;\r
283 UINT8 page_control : 2;\r
8bdadcc8 284 UINT8 reserved_3;\r
285 UINT8 reserved_4;\r
286 UINT8 reserved_5;\r
287 UINT8 reserved_6;\r
288 UINT8 parameter_list_length_hi;\r
289 UINT8 parameter_list_length_lo;\r
290 UINT8 reserved_9;\r
291 UINT8 reserved_10;\r
292 UINT8 reserved_11;\r
293} ATAPI_MODE_SENSE_CMD;\r
294\r
1bc5d021 295///\r
296/// ATAPI_PACKET_COMMAND is not defined in ATA specification.\r
297/// We add it here for the convenience for ATA/ATAPI module writer. \r
298///\r
8bdadcc8 299typedef union {\r
300 UINT16 Data16[6];\r
301 ATAPI_TEST_UNIT_READY_CMD TestUnitReady;\r
302 ATAPI_READ10_CMD Read10;\r
303 ATAPI_REQUEST_SENSE_CMD RequestSence;\r
304 ATAPI_INQUIRY_CMD Inquiry;\r
305 ATAPI_MODE_SENSE_CMD ModeSense;\r
306 ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;\r
307} ATAPI_PACKET_COMMAND;\r
308\r
766f4bc1 309#pragma pack()\r
310\r
8bdadcc8 311\r
312#define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000\r
313#define ATAPI_MAX_DMA_CMD_SECTORS 0x100\r
314\r
315//\r
316// ATA Packet Command Code\r
317//\r
37640ed3 318#define ATA_CMD_SOFT_RESET 0x08 ///< defined in ATA-6\r
319#define ATA_CMD_PACKET 0xA0 ///< defined in ATA-6\r
320#define ATA_CMD_IDENTIFY_DEVICE 0xA1 ///< defined in ATA-6\r
321#define ATA_CMD_SERVICE 0xA2 ///< defined in ATA-6\r
322#define ATA_CMD_TEST_UNIT_READY 0x00 ///< defined in ATA-6\r
323#define ATA_CMD_REQUEST_SENSE 0x03 ///< defined in ATA-6\r
324#define ATA_CMD_INQUIRY 0x12 ///< defined in ATAPI Removable Rewritable Media Devcies\r
325#define ATA_CMD_READ_FORMAT_CAPACITY 0x23 ///< defined in ATAPI Removable Rewritable Media Devcies\r
326#define ATA_CMD_READ_CAPACITY 0x25 ///< defined in ATAPI Removable Rewritable Media Devcies\r
327#define ATA_CMD_READ_10 0x28 ///< defined in ATAPI Removable Rewritable Media Devcies\r
328#define ATA_CMD_WRITE_10 0x2A ///< defined in ATAPI Removable Rewritable Media Devcies\r
8bdadcc8 329\r
330//\r
331// ATA Commands Code\r
332//\r
333\r
334//\r
335// Class 1: PIO Data-In Commands\r
336//\r
337#define ATA_CMD_IDENTIFY_DRIVE 0xec\r
338#define ATA_CMD_READ_BUFFER 0xe4\r
37640ed3 339#define ATA_CMD_READ_SECTORS 0x20 ///< defined in ATA-5 \r
340#define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21 ///< defined in ATA-5\r
341#define ATA_CMD_READ_LONG 0x22 ///< defined in ATA-5\r
342#define ATA_CMD_READ_LONG_WITH_RETRY 0x23 ///< defined in ATA-5\r
343#define ATA_CMD_READ_SECTORS_EXT 0x24 ///< defined in ATA-6\r
8bdadcc8 344\r
766f4bc1 345\r
8bdadcc8 346//\r
347// Class 2: PIO Data-Out Commands\r
348//\r
37640ed3 349#define ATA_CMD_FORMAT_TRACK 0x50 ///< defined in ATA-3\r
350#define ATA_CMD_WRITE_BUFFER 0xe8 ///< defined in ATA-6 \r
351#define ATA_CMD_WRITE_SECTORS 0x30 ///< defined in ATA-6\r
352#define ATA_CMD_WRITE_SECTORS_WITH_RETRY 0x31 ///< defined in ATA-4\r
353#define ATA_CMD_WRITE_LONG 0x32 ///< defined in ATA-3\r
354#define ATA_CMD_WRITE_LONG_WITH_RETRY 0x33 ///< defined in ATA-3\r
355#define ATA_CMD_WRITE_VERIFY 0x3c ///< defined in ATA-3\r
356#define ATA_CMD_WRITE_SECTORS_EXT 0x34 ///< defined in ATA-6\r
8bdadcc8 357\r
358//\r
359// Class 3 No Data Command\r
360//\r
37640ed3 361#define ATA_CMD_ACK_MEDIA_CHANGE 0xdb ///< defined in ATA-2\r
362#define ATA_CMD_BOOT_POST_BOOT 0xdc ///< defined in ATA-2\r
363#define ATA_CMD_BOOT_PRE_BOOT 0xdd ///< defined in ATA-2\r
364#define ATA_CMD_CHECK_POWER_MODE 0x98 ///< defined in ATA-3\r
365#define ATA_CMD_CHECK_POWER_MODE_ALIAS 0xe5 ///< defined in ATA-6\r
366#define ATA_CMD_DOOR_LOCK 0xde ///< defined in ATA-6\r
367#define ATA_CMD_DOOR_UNLOCK 0xdf ///< defined in ATA-6\r
368#define ATA_CMD_EXEC_DRIVE_DIAG 0x90 ///< defined in ATA-6\r
369#define ATA_CMD_IDLE_ALIAS 0x97 ///< defined in ATA-3\r
370#define ATA_CMD_IDLE 0xe3 ///< defined in ATA-6\r
371#define ATA_CMD_IDLE_IMMEDIATE 0x95 ///< defined in ATA-3\r
372#define ATA_CMD_IDLE_IMMEDIATE_ALIAS 0xe1 ///< defined in ATA-6\r
373#define ATA_CMD_INIT_DRIVE_PARAM 0x91 ///< defined in ATA-5\r
374#define ATA_CMD_RECALIBRATE 0x10 ///< defined in ATA-3\r
375#define ATA_CMD_READ_DRIVE_STATE 0xe9 ///< defined in ATA-2\r
376#define ATA_CMD_SET_MULTIPLE_MODE 0xC6 ///< defined in ATA-6\r
377#define ATA_CMD_READ_VERIFY 0x40 ///< defined in ATA-6\r
378#define ATA_CMD_READ_VERIFY_WITH_RETRY 0x41 ///< defined in ATA-4\r
379#define ATA_CMD_SEEK 0x70 ///< defined in ATA-6\r
380#define ATA_CMD_SET_FEATURES 0xef ///< defined in ATA-6\r
381#define ATA_CMD_STANDBY 0x96 ///< defined in ATA-3\r
382#define ATA_CMD_STANDBY_ALIAS 0xe2 ///< defined in ATA-6\r
383#define ATA_CMD_STANDBY_IMMEDIATE 0x94 ///< defined in ATA-3\r
384#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0 ///< defined in ATA-6\r
385///\r
386/// S.M.A.R.T\r
387///\r
8bdadcc8 388#define ATA_CMD_SMART 0xb0\r
389#define ATA_CONSTANT_C2 0xc2\r
390#define ATA_CONSTANT_4F 0x4f\r
391#define ATA_SMART_ENABLE_OPERATION 0xd8\r
392#define ATA_SMART_RETURN_STATUS 0xda\r
393\r
766f4bc1 394\r
37640ed3 395///\r
396/// Class 4: DMA Command\r
397///\r
398#define ATA_CMD_READ_DMA 0xc8 ///< defined in ATA-6\r
399#define ATA_CMD_READ_DMA_WITH_RETRY 0xc9 ///< defined in ATA-4\r
400#define ATA_CMD_READ_DMA_EXT 0x25 ///< defined in ATA-6\r
401#define ATA_CMD_WRITE_DMA 0xca ///< defined in ATA-6\r
402#define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb ///< defined in ATA-4\r
403#define ATA_CMD_WRITE_DMA_EXT 0x35 ///< defined in ATA-6\r
766f4bc1 404\r
405\r
406\r
37640ed3 407///\r
408/// default content of device control register, disable INT,\r
409/// Bit3 is set to 1 according ATA-1\r
410///\r
411#define ATA_DEFAULT_CTL (0x0a) \r
412///\r
413/// default context of Device/Head Register,\r
414/// Bit7 and Bit5 are set to 1 for back-compatibilities\r
415///\r
8bdadcc8 416#define ATA_DEFAULT_CMD (0xa0)\r
417\r
418#define ATAPI_MAX_BYTE_COUNT (0xfffe)\r
419\r
53bbea41 420#define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i\r
421\r
766f4bc1 422///\r
423/// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r
424/// defined in MultiMedia Commands (MMC, MMC-2) \r
425///\r
426/// Sense Key \r
427///\r
8bdadcc8 428#define ATA_SK_NO_SENSE (0x0)\r
429#define ATA_SK_RECOVERY_ERROR (0x1)\r
430#define ATA_SK_NOT_READY (0x2)\r
431#define ATA_SK_MEDIUM_ERROR (0x3)\r
432#define ATA_SK_HARDWARE_ERROR (0x4)\r
433#define ATA_SK_ILLEGAL_REQUEST (0x5)\r
434#define ATA_SK_UNIT_ATTENTION (0x6)\r
435#define ATA_SK_DATA_PROTECT (0x7)\r
436#define ATA_SK_BLANK_CHECK (0x8)\r
437#define ATA_SK_VENDOR_SPECIFIC (0x9)\r
438#define ATA_SK_RESERVED_A (0xA)\r
439#define ATA_SK_ABORT (0xB)\r
440#define ATA_SK_RESERVED_C (0xC)\r
441#define ATA_SK_OVERFLOW (0xD)\r
442#define ATA_SK_MISCOMPARE (0xE)\r
443#define ATA_SK_RESERVED_F (0xF)\r
444\r
766f4bc1 445///\r
446/// Additional Sense Codes\r
447///\r
8bdadcc8 448#define ATA_ASC_NOT_READY (0x04)\r
449#define ATA_ASC_MEDIA_ERR1 (0x10)\r
450#define ATA_ASC_MEDIA_ERR2 (0x11)\r
451#define ATA_ASC_MEDIA_ERR3 (0x14)\r
452#define ATA_ASC_MEDIA_ERR4 (0x30)\r
453#define ATA_ASC_MEDIA_UPSIDE_DOWN (0x06)\r
454#define ATA_ASC_INVALID_CMD (0x20)\r
455#define ATA_ASC_LBA_OUT_OF_RANGE (0x21)\r
456#define ATA_ASC_INVALID_FIELD (0x24)\r
457#define ATA_ASC_WRITE_PROTECTED (0x27)\r
458#define ATA_ASC_MEDIA_CHANGE (0x28)\r
37640ed3 459#define ATA_ASC_RESET (0x29) ///< Power On Reset or Bus Reset occurred\r
8bdadcc8 460#define ATA_ASC_ILLEGAL_FIELD (0x26)\r
461#define ATA_ASC_NO_MEDIA (0x3A)\r
462#define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r
463\r
464//\r
465// Additional Sense Code Qualifier\r
466//\r
467#define ATA_ASCQ_IN_PROGRESS (0x01)\r
468\r
766f4bc1 469///\r
470/// Error Register\r
471///\r
37640ed3 472#define ATA_ERRREG_BBK BIT7 ///< Bad block detected defined in ATA-1\r
473#define ATA_ERRREG_UNC BIT6 ///< Uncorrectable Data defined in ATA-3\r
474#define ATA_ERRREG_MC BIT5 ///< Media Change defined in ATA-3\r
475#define ATA_ERRREG_IDNF BIT4 ///< ID Not Found defined in ATA-3\r
476#define ATA_ERRREG_MCR BIT3 ///< Media Change Requested defined in ATA-3\r
477#define ATA_ERRREG_ABRT BIT2 ///< Aborted Command defined in ATA-6\r
478#define ATA_ERRREG_TK0NF BIT1 ///< Track 0 Not Found defined in ATA-3\r
479#define ATA_ERRREG_AMNF BIT0 ///< Address Mark Not Found defined in ATA-3\r
8bdadcc8 480\r
766f4bc1 481///\r
482/// Status Register\r
483///\r
37640ed3 484#define ATA_STSREG_BSY BIT7 ///< Controller Busy defined in ATA-6\r
485#define ATA_STSREG_DRDY BIT6 ///< Drive Ready defined in ATA-6\r
486#define ATA_STSREG_DWF BIT5 ///< Drive Write Fault defined in ATA-6\r
487#define ATA_STSREG_DSC BIT4 ///< Disk Seek Complete defined in ATA-3\r
488#define ATA_STSREG_DRQ BIT3 ///< Data Request defined in ATA-6\r
489#define ATA_STSREG_CORR BIT2 ///< Corrected Data defined in ATA-3\r
490#define ATA_STSREG_IDX BIT1 ///< Index defined in ATA-3\r
491#define ATA_STSREG_ERR BIT0 ///< Error defined in ATA-6\r
8bdadcc8 492\r
766f4bc1 493///\r
494/// Device Control Register\r
495///\r
37640ed3 496#define ATA_CTLREG_SRST BIT2 ///< Software Reset\r
497#define ATA_CTLREG_IEN_L BIT1 ///< Interrupt Enable #\r
8bdadcc8 498\r
499#endif\r
500\r
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