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ac644614 1/** @file\r
50a64e5b 2 Provides string functions, linked list functions, math functions, synchronization\r
3 functions, and CPU architecture specific functions.\r
ac644614 4\r
2fe241a2 5Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
50a64e5b 6All rights reserved. This program and the accompanying materials\r
7are licensed and made available under the terms and conditions of the BSD License\r
8which accompanies this distribution. The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php\r
ac644614 10\r
50a64e5b 11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
ac644614 13\r
14**/\r
15\r
16#ifndef __BASE_LIB__\r
17#define __BASE_LIB__\r
18\r
fc30687f 19///\r
1106ffe1 20/// Definitions for SPIN_LOCK\r
fc30687f 21///\r
ac644614 22typedef volatile UINTN SPIN_LOCK;\r
23\r
1106ffe1 24//\r
25// Definitions for architecture specific types\r
26//\r
ac644614 27#if defined (MDE_CPU_IA32)\r
fc30687f 28///\r
29/// IA32 context buffer used by SetJump() and LongJump()\r
30///\r
ac644614 31typedef struct {\r
32 UINT32 Ebx;\r
33 UINT32 Esi;\r
34 UINT32 Edi;\r
35 UINT32 Ebp;\r
36 UINT32 Esp;\r
37 UINT32 Eip;\r
38} BASE_LIBRARY_JUMP_BUFFER;\r
39\r
40#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
41\r
aa4df547 42#endif // defined (MDE_CPU_IA32)\r
43\r
44#if defined (MDE_CPU_IPF)\r
ac644614 45\r
fc30687f 46///\r
47/// IPF context buffer used by SetJump() and LongJump()\r
48///\r
ac644614 49typedef struct {\r
50 UINT64 F2[2];\r
51 UINT64 F3[2];\r
52 UINT64 F4[2];\r
53 UINT64 F5[2];\r
54 UINT64 F16[2];\r
55 UINT64 F17[2];\r
56 UINT64 F18[2];\r
57 UINT64 F19[2];\r
58 UINT64 F20[2];\r
59 UINT64 F21[2];\r
60 UINT64 F22[2];\r
61 UINT64 F23[2];\r
62 UINT64 F24[2];\r
63 UINT64 F25[2];\r
64 UINT64 F26[2];\r
65 UINT64 F27[2];\r
66 UINT64 F28[2];\r
67 UINT64 F29[2];\r
68 UINT64 F30[2];\r
69 UINT64 F31[2];\r
70 UINT64 R4;\r
71 UINT64 R5;\r
72 UINT64 R6;\r
73 UINT64 R7;\r
74 UINT64 SP;\r
75 UINT64 BR0;\r
76 UINT64 BR1;\r
77 UINT64 BR2;\r
78 UINT64 BR3;\r
79 UINT64 BR4;\r
80 UINT64 BR5;\r
81 UINT64 InitialUNAT;\r
82 UINT64 AfterSpillUNAT;\r
83 UINT64 PFS;\r
84 UINT64 BSP;\r
85 UINT64 Predicates;\r
86 UINT64 LoopCount;\r
87 UINT64 FPSR;\r
88} BASE_LIBRARY_JUMP_BUFFER;\r
89\r
90#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r
91\r
aa4df547 92#endif // defined (MDE_CPU_IPF)\r
93\r
94#if defined (MDE_CPU_X64)\r
fc30687f 95///\r
030cd1a2 96/// x64 context buffer used by SetJump() and LongJump()\r
fc30687f 97///\r
ac644614 98typedef struct {\r
99 UINT64 Rbx;\r
100 UINT64 Rsp;\r
101 UINT64 Rbp;\r
102 UINT64 Rdi;\r
103 UINT64 Rsi;\r
104 UINT64 R12;\r
105 UINT64 R13;\r
106 UINT64 R14;\r
107 UINT64 R15;\r
108 UINT64 Rip;\r
109} BASE_LIBRARY_JUMP_BUFFER;\r
110\r
111#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
112\r
aa4df547 113#endif // defined (MDE_CPU_X64)\r
114\r
115#if defined (MDE_CPU_EBC)\r
fc30687f 116///\r
117/// EBC context buffer used by SetJump() and LongJump()\r
118///\r
ac644614 119typedef struct {\r
120 UINT64 R0;\r
121 UINT64 R1;\r
122 UINT64 R2;\r
123 UINT64 R3;\r
124 UINT64 IP;\r
125} BASE_LIBRARY_JUMP_BUFFER;\r
126\r
127#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
128\r
aa4df547 129#endif // defined (MDE_CPU_EBC)\r
ac644614 130\r
131//\r
132// String Services\r
133//\r
134\r
135/**\r
136 Copies one Null-terminated Unicode string to another Null-terminated Unicode\r
137 string and returns the new Unicode string.\r
138\r
139 This function copies the contents of the Unicode string Source to the Unicode\r
140 string Destination, and returns Destination. If Source and Destination\r
141 overlap, then the results are undefined.\r
142\r
143 If Destination is NULL, then ASSERT().\r
144 If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
145 If Source is NULL, then ASSERT().\r
146 If Source is not aligned on a 16-bit boundary, then ASSERT().\r
147 If Source and Destination overlap, then ASSERT().\r
148 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
149 PcdMaximumUnicodeStringLength Unicode characters not including the\r
150 Null-terminator, then ASSERT().\r
151\r
152 @param Destination Pointer to a Null-terminated Unicode string.\r
153 @param Source Pointer to a Null-terminated Unicode string.\r
154\r
9aa049d9 155 @return Destination.\r
ac644614 156\r
157**/\r
158CHAR16 *\r
159EFIAPI\r
160StrCpy (\r
161 OUT CHAR16 *Destination,\r
162 IN CONST CHAR16 *Source\r
163 );\r
164\r
165\r
166/**\r
17f695ed 167 Copies up to a specified length from one Null-terminated Unicode string to \r
168 another Null-terminated Unicode string and returns the new Unicode string.\r
ac644614 169\r
170 This function copies the contents of the Unicode string Source to the Unicode\r
171 string Destination, and returns Destination. At most, Length Unicode\r
172 characters are copied from Source to Destination. If Length is 0, then\r
173 Destination is returned unmodified. If Length is greater that the number of\r
174 Unicode characters in Source, then Destination is padded with Null Unicode\r
175 characters. If Source and Destination overlap, then the results are\r
176 undefined.\r
177\r
178 If Length > 0 and Destination is NULL, then ASSERT().\r
179 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
180 If Length > 0 and Source is NULL, then ASSERT().\r
181 If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().\r
182 If Source and Destination overlap, then ASSERT().\r
183 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
184 PcdMaximumUnicodeStringLength Unicode characters not including the\r
185 Null-terminator, then ASSERT().\r
186\r
187 @param Destination Pointer to a Null-terminated Unicode string.\r
188 @param Source Pointer to a Null-terminated Unicode string.\r
189 @param Length Maximum number of Unicode characters to copy.\r
190\r
9aa049d9 191 @return Destination.\r
ac644614 192\r
193**/\r
194CHAR16 *\r
195EFIAPI\r
196StrnCpy (\r
197 OUT CHAR16 *Destination,\r
198 IN CONST CHAR16 *Source,\r
199 IN UINTN Length\r
200 );\r
201\r
202\r
203/**\r
204 Returns the length of a Null-terminated Unicode string.\r
205\r
206 This function returns the number of Unicode characters in the Null-terminated\r
207 Unicode string specified by String.\r
208\r
209 If String is NULL, then ASSERT().\r
210 If String is not aligned on a 16-bit boundary, then ASSERT().\r
211 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
212 PcdMaximumUnicodeStringLength Unicode characters not including the\r
213 Null-terminator, then ASSERT().\r
214\r
215 @param String Pointer to a Null-terminated Unicode string.\r
216\r
217 @return The length of String.\r
218\r
219**/\r
220UINTN\r
221EFIAPI\r
222StrLen (\r
223 IN CONST CHAR16 *String\r
224 );\r
225\r
226\r
227/**\r
228 Returns the size of a Null-terminated Unicode string in bytes, including the\r
229 Null terminator.\r
230\r
17f695ed 231 This function returns the size, in bytes, of the Null-terminated Unicode string \r
232 specified by String.\r
ac644614 233\r
234 If String is NULL, then ASSERT().\r
235 If String is not aligned on a 16-bit boundary, then ASSERT().\r
236 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
237 PcdMaximumUnicodeStringLength Unicode characters not including the\r
238 Null-terminator, then ASSERT().\r
239\r
240 @param String Pointer to a Null-terminated Unicode string.\r
241\r
242 @return The size of String.\r
243\r
244**/\r
245UINTN\r
246EFIAPI\r
247StrSize (\r
248 IN CONST CHAR16 *String\r
249 );\r
250\r
251\r
252/**\r
253 Compares two Null-terminated Unicode strings, and returns the difference\r
254 between the first mismatched Unicode characters.\r
255\r
256 This function compares the Null-terminated Unicode string FirstString to the\r
257 Null-terminated Unicode string SecondString. If FirstString is identical to\r
258 SecondString, then 0 is returned. Otherwise, the value returned is the first\r
259 mismatched Unicode character in SecondString subtracted from the first\r
260 mismatched Unicode character in FirstString.\r
261\r
262 If FirstString is NULL, then ASSERT().\r
263 If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r
264 If SecondString is NULL, then ASSERT().\r
265 If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r
266 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
267 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
268 Null-terminator, then ASSERT().\r
269 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
270 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
271 Null-terminator, then ASSERT().\r
272\r
273 @param FirstString Pointer to a Null-terminated Unicode string.\r
274 @param SecondString Pointer to a Null-terminated Unicode string.\r
275\r
1106ffe1 276 @retval 0 FirstString is identical to SecondString.\r
277 @return others FirstString is not identical to SecondString.\r
ac644614 278\r
279**/\r
280INTN\r
281EFIAPI\r
282StrCmp (\r
283 IN CONST CHAR16 *FirstString,\r
284 IN CONST CHAR16 *SecondString\r
285 );\r
286\r
287\r
288/**\r
17f695ed 289 Compares up to a specified length the contents of two Null-terminated Unicode strings,\r
290 and returns the difference between the first mismatched Unicode characters.\r
291 \r
ac644614 292 This function compares the Null-terminated Unicode string FirstString to the\r
293 Null-terminated Unicode string SecondString. At most, Length Unicode\r
294 characters will be compared. If Length is 0, then 0 is returned. If\r
295 FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
296 value returned is the first mismatched Unicode character in SecondString\r
297 subtracted from the first mismatched Unicode character in FirstString.\r
298\r
299 If Length > 0 and FirstString is NULL, then ASSERT().\r
300 If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().\r
301 If Length > 0 and SecondString is NULL, then ASSERT().\r
302 If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().\r
303 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
304 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
305 Null-terminator, then ASSERT().\r
306 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
307 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
308 Null-terminator, then ASSERT().\r
309\r
310 @param FirstString Pointer to a Null-terminated Unicode string.\r
311 @param SecondString Pointer to a Null-terminated Unicode string.\r
312 @param Length Maximum number of Unicode characters to compare.\r
313\r
1106ffe1 314 @retval 0 FirstString is identical to SecondString.\r
315 @return others FirstString is not identical to SecondString.\r
ac644614 316\r
317**/\r
318INTN\r
319EFIAPI\r
320StrnCmp (\r
321 IN CONST CHAR16 *FirstString,\r
322 IN CONST CHAR16 *SecondString,\r
323 IN UINTN Length\r
324 );\r
325\r
326\r
327/**\r
328 Concatenates one Null-terminated Unicode string to another Null-terminated\r
329 Unicode string, and returns the concatenated Unicode string.\r
330\r
331 This function concatenates two Null-terminated Unicode strings. The contents\r
332 of Null-terminated Unicode string Source are concatenated to the end of\r
333 Null-terminated Unicode string Destination. The Null-terminated concatenated\r
334 Unicode String is returned. If Source and Destination overlap, then the\r
335 results are undefined.\r
336\r
337 If Destination is NULL, then ASSERT().\r
338 If Destination is not aligned on a 16-bit bounadary, then ASSERT().\r
339 If Source is NULL, then ASSERT().\r
340 If Source is not aligned on a 16-bit bounadary, then ASSERT().\r
341 If Source and Destination overlap, then ASSERT().\r
342 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
343 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
344 Null-terminator, then ASSERT().\r
345 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
346 PcdMaximumUnicodeStringLength Unicode characters not including the\r
347 Null-terminator, then ASSERT().\r
348 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
349 and Source results in a Unicode string with more than\r
350 PcdMaximumUnicodeStringLength Unicode characters not including the\r
351 Null-terminator, then ASSERT().\r
352\r
353 @param Destination Pointer to a Null-terminated Unicode string.\r
354 @param Source Pointer to a Null-terminated Unicode string.\r
355\r
9aa049d9 356 @return Destination.\r
ac644614 357\r
358**/\r
359CHAR16 *\r
360EFIAPI\r
361StrCat (\r
362 IN OUT CHAR16 *Destination,\r
363 IN CONST CHAR16 *Source\r
364 );\r
365\r
366\r
367/**\r
17f695ed 368 Concatenates up to a specified length one Null-terminated Unicode to the end \r
369 of another Null-terminated Unicode string, and returns the concatenated \r
ac644614 370 Unicode string.\r
371\r
372 This function concatenates two Null-terminated Unicode strings. The contents\r
373 of Null-terminated Unicode string Source are concatenated to the end of\r
374 Null-terminated Unicode string Destination, and Destination is returned. At\r
375 most, Length Unicode characters are concatenated from Source to the end of\r
376 Destination, and Destination is always Null-terminated. If Length is 0, then\r
377 Destination is returned unmodified. If Source and Destination overlap, then\r
378 the results are undefined.\r
379\r
380 If Destination is NULL, then ASSERT().\r
381 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
382 If Length > 0 and Source is NULL, then ASSERT().\r
383 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
384 If Source and Destination overlap, then ASSERT().\r
385 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
386 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
387 Null-terminator, then ASSERT().\r
388 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
389 PcdMaximumUnicodeStringLength Unicode characters not including the\r
390 Null-terminator, then ASSERT().\r
391 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
392 and Source results in a Unicode string with more than\r
393 PcdMaximumUnicodeStringLength Unicode characters not including the\r
394 Null-terminator, then ASSERT().\r
395\r
396 @param Destination Pointer to a Null-terminated Unicode string.\r
397 @param Source Pointer to a Null-terminated Unicode string.\r
398 @param Length Maximum number of Unicode characters to concatenate from\r
399 Source.\r
400\r
9aa049d9 401 @return Destination.\r
ac644614 402\r
403**/\r
404CHAR16 *\r
405EFIAPI\r
406StrnCat (\r
407 IN OUT CHAR16 *Destination,\r
408 IN CONST CHAR16 *Source,\r
409 IN UINTN Length\r
410 );\r
411\r
412/**\r
9aa049d9 413 Returns the first occurrence of a Null-terminated Unicode sub-string\r
ac644614 414 in a Null-terminated Unicode string.\r
415\r
416 This function scans the contents of the Null-terminated Unicode string\r
417 specified by String and returns the first occurrence of SearchString.\r
418 If SearchString is not found in String, then NULL is returned. If\r
419 the length of SearchString is zero, then String is\r
420 returned.\r
421\r
422 If String is NULL, then ASSERT().\r
423 If String is not aligned on a 16-bit boundary, then ASSERT().\r
424 If SearchString is NULL, then ASSERT().\r
425 If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r
426\r
427 If PcdMaximumUnicodeStringLength is not zero, and SearchString\r
428 or String contains more than PcdMaximumUnicodeStringLength Unicode\r
429 characters not including the Null-terminator, then ASSERT().\r
430\r
17f695ed 431 @param String Pointer to a Null-terminated Unicode string.\r
432 @param SearchString Pointer to a Null-terminated Unicode string to search for.\r
ac644614 433\r
434 @retval NULL If the SearchString does not appear in String.\r
1106ffe1 435 @return others If there is a match.\r
ac644614 436\r
437**/\r
438CHAR16 *\r
439EFIAPI\r
440StrStr (\r
17f695ed 441 IN CONST CHAR16 *String,\r
442 IN CONST CHAR16 *SearchString\r
ac644614 443 );\r
444\r
445/**\r
446 Convert a Null-terminated Unicode decimal string to a value of\r
447 type UINTN.\r
448\r
449 This function returns a value of type UINTN by interpreting the contents\r
450 of the Unicode string specified by String as a decimal number. The format\r
451 of the input Unicode string String is:\r
452\r
453 [spaces] [decimal digits].\r
454\r
455 The valid decimal digit character is in the range [0-9]. The\r
456 function will ignore the pad space, which includes spaces or\r
457 tab characters, before [decimal digits]. The running zero in the\r
458 beginning of [decimal digits] will be ignored. Then, the function\r
459 stops at the first character that is a not a valid decimal character\r
460 or a Null-terminator, whichever one comes first.\r
461\r
462 If String is NULL, then ASSERT().\r
463 If String is not aligned in a 16-bit boundary, then ASSERT().\r
464 If String has only pad spaces, then 0 is returned.\r
465 If String has no pad spaces or valid decimal digits,\r
466 then 0 is returned.\r
467 If the number represented by String overflows according\r
468 to the range defined by UINTN, then ASSERT().\r
469\r
470 If PcdMaximumUnicodeStringLength is not zero, and String contains\r
471 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
472 the Null-terminator, then ASSERT().\r
473\r
17f695ed 474 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 475\r
38bbd3d9 476 @retval Value translated from String.\r
ac644614 477\r
478**/\r
479UINTN\r
480EFIAPI\r
481StrDecimalToUintn (\r
17f695ed 482 IN CONST CHAR16 *String\r
ac644614 483 );\r
484\r
485/**\r
486 Convert a Null-terminated Unicode decimal string to a value of\r
487 type UINT64.\r
488\r
489 This function returns a value of type UINT64 by interpreting the contents\r
490 of the Unicode string specified by String as a decimal number. The format\r
491 of the input Unicode string String is:\r
492\r
493 [spaces] [decimal digits].\r
494\r
495 The valid decimal digit character is in the range [0-9]. The\r
496 function will ignore the pad space, which includes spaces or\r
497 tab characters, before [decimal digits]. The running zero in the\r
498 beginning of [decimal digits] will be ignored. Then, the function\r
499 stops at the first character that is a not a valid decimal character\r
500 or a Null-terminator, whichever one comes first.\r
501\r
502 If String is NULL, then ASSERT().\r
503 If String is not aligned in a 16-bit boundary, then ASSERT().\r
504 If String has only pad spaces, then 0 is returned.\r
505 If String has no pad spaces or valid decimal digits,\r
506 then 0 is returned.\r
507 If the number represented by String overflows according\r
508 to the range defined by UINT64, then ASSERT().\r
509\r
510 If PcdMaximumUnicodeStringLength is not zero, and String contains\r
511 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
512 the Null-terminator, then ASSERT().\r
513\r
17f695ed 514 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 515\r
38bbd3d9 516 @retval Value translated from String.\r
ac644614 517\r
518**/\r
519UINT64\r
520EFIAPI\r
521StrDecimalToUint64 (\r
17f695ed 522 IN CONST CHAR16 *String\r
ac644614 523 );\r
524 \r
525\r
526/**\r
527 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r
528\r
529 This function returns a value of type UINTN by interpreting the contents\r
530 of the Unicode string specified by String as a hexadecimal number.\r
531 The format of the input Unicode string String is:\r
532\r
533 [spaces][zeros][x][hexadecimal digits].\r
534\r
535 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
536 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
537 If "x" appears in the input string, it must be prefixed with at least one 0.\r
538 The function will ignore the pad space, which includes spaces or tab characters,\r
539 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
540 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
541 first valid hexadecimal digit. Then, the function stops at the first character that is\r
542 a not a valid hexadecimal character or NULL, whichever one comes first.\r
543\r
544 If String is NULL, then ASSERT().\r
545 If String is not aligned in a 16-bit boundary, then ASSERT().\r
546 If String has only pad spaces, then zero is returned.\r
547 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
548 then zero is returned.\r
549 If the number represented by String overflows according to the range defined by\r
550 UINTN, then ASSERT().\r
551\r
552 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
553 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
554 then ASSERT().\r
555\r
17f695ed 556 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 557\r
38bbd3d9 558 @retval Value translated from String.\r
ac644614 559\r
560**/\r
561UINTN\r
562EFIAPI\r
563StrHexToUintn (\r
17f695ed 564 IN CONST CHAR16 *String\r
ac644614 565 );\r
566\r
567\r
568/**\r
569 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r
570\r
571 This function returns a value of type UINT64 by interpreting the contents\r
572 of the Unicode string specified by String as a hexadecimal number.\r
573 The format of the input Unicode string String is\r
574\r
575 [spaces][zeros][x][hexadecimal digits].\r
576\r
577 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
578 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
579 If "x" appears in the input string, it must be prefixed with at least one 0.\r
580 The function will ignore the pad space, which includes spaces or tab characters,\r
581 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
582 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
583 first valid hexadecimal digit. Then, the function stops at the first character that is\r
584 a not a valid hexadecimal character or NULL, whichever one comes first.\r
585\r
586 If String is NULL, then ASSERT().\r
587 If String is not aligned in a 16-bit boundary, then ASSERT().\r
588 If String has only pad spaces, then zero is returned.\r
589 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
590 then zero is returned.\r
591 If the number represented by String overflows according to the range defined by\r
592 UINT64, then ASSERT().\r
593\r
594 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
595 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
596 then ASSERT().\r
597\r
17f695ed 598 @param String Pointer to a Null-terminated Unicode string.\r
ac644614 599\r
38bbd3d9 600 @retval Value translated from String.\r
ac644614 601\r
602**/\r
603UINT64\r
604EFIAPI\r
605StrHexToUint64 (\r
17f695ed 606 IN CONST CHAR16 *String\r
ac644614 607 );\r
608\r
ac644614 609/**\r
17f695ed 610 Convert a Null-terminated Unicode string to a Null-terminated\r
ac644614 611 ASCII string and returns the ASCII string.\r
612\r
613 This function converts the content of the Unicode string Source\r
614 to the ASCII string Destination by copying the lower 8 bits of\r
615 each Unicode character. It returns Destination.\r
616\r
617 If any Unicode characters in Source contain non-zero value in\r
618 the upper 8 bits, then ASSERT().\r
619\r
620 If Destination is NULL, then ASSERT().\r
621 If Source is NULL, then ASSERT().\r
622 If Source is not aligned on a 16-bit boundary, then ASSERT().\r
623 If Source and Destination overlap, then ASSERT().\r
624\r
625 If PcdMaximumUnicodeStringLength is not zero, and Source contains\r
626 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
627 the Null-terminator, then ASSERT().\r
628\r
629 If PcdMaximumAsciiStringLength is not zero, and Source contains more\r
630 than PcdMaximumAsciiStringLength Unicode characters not including the\r
631 Null-terminator, then ASSERT().\r
632\r
633 @param Source Pointer to a Null-terminated Unicode string.\r
634 @param Destination Pointer to a Null-terminated ASCII string.\r
635\r
9aa049d9 636 @return Destination.\r
ac644614 637\r
638**/\r
639CHAR8 *\r
640EFIAPI\r
641UnicodeStrToAsciiStr (\r
17f695ed 642 IN CONST CHAR16 *Source,\r
643 OUT CHAR8 *Destination\r
ac644614 644 );\r
645\r
646\r
647/**\r
648 Copies one Null-terminated ASCII string to another Null-terminated ASCII\r
649 string and returns the new ASCII string.\r
650\r
651 This function copies the contents of the ASCII string Source to the ASCII\r
652 string Destination, and returns Destination. If Source and Destination\r
653 overlap, then the results are undefined.\r
654\r
655 If Destination is NULL, then ASSERT().\r
656 If Source is NULL, then ASSERT().\r
657 If Source and Destination overlap, then ASSERT().\r
658 If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
659 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
660 then ASSERT().\r
661\r
662 @param Destination Pointer to a Null-terminated ASCII string.\r
663 @param Source Pointer to a Null-terminated ASCII string.\r
664\r
665 @return Destination\r
666\r
667**/\r
668CHAR8 *\r
669EFIAPI\r
670AsciiStrCpy (\r
671 OUT CHAR8 *Destination,\r
672 IN CONST CHAR8 *Source\r
673 );\r
674\r
675\r
676/**\r
17f695ed 677 Copies up to a specified length one Null-terminated ASCII string to another \r
678 Null-terminated ASCII string and returns the new ASCII string.\r
ac644614 679\r
680 This function copies the contents of the ASCII string Source to the ASCII\r
681 string Destination, and returns Destination. At most, Length ASCII characters\r
682 are copied from Source to Destination. If Length is 0, then Destination is\r
683 returned unmodified. If Length is greater that the number of ASCII characters\r
684 in Source, then Destination is padded with Null ASCII characters. If Source\r
685 and Destination overlap, then the results are undefined.\r
686\r
687 If Destination is NULL, then ASSERT().\r
688 If Source is NULL, then ASSERT().\r
689 If Source and Destination overlap, then ASSERT().\r
690 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
691 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
692 then ASSERT().\r
693\r
694 @param Destination Pointer to a Null-terminated ASCII string.\r
695 @param Source Pointer to a Null-terminated ASCII string.\r
696 @param Length Maximum number of ASCII characters to copy.\r
697\r
698 @return Destination\r
699\r
700**/\r
701CHAR8 *\r
702EFIAPI\r
703AsciiStrnCpy (\r
704 OUT CHAR8 *Destination,\r
705 IN CONST CHAR8 *Source,\r
706 IN UINTN Length\r
707 );\r
708\r
709\r
710/**\r
711 Returns the length of a Null-terminated ASCII string.\r
712\r
713 This function returns the number of ASCII characters in the Null-terminated\r
714 ASCII string specified by String.\r
715\r
716 If Length > 0 and Destination is NULL, then ASSERT().\r
717 If Length > 0 and Source is NULL, then ASSERT().\r
718 If PcdMaximumAsciiStringLength is not zero and String contains more than\r
719 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
720 then ASSERT().\r
721\r
722 @param String Pointer to a Null-terminated ASCII string.\r
723\r
724 @return The length of String.\r
725\r
726**/\r
727UINTN\r
728EFIAPI\r
729AsciiStrLen (\r
730 IN CONST CHAR8 *String\r
731 );\r
732\r
733\r
734/**\r
735 Returns the size of a Null-terminated ASCII string in bytes, including the\r
736 Null terminator.\r
737\r
738 This function returns the size, in bytes, of the Null-terminated ASCII string\r
739 specified by String.\r
740\r
741 If String is NULL, then ASSERT().\r
742 If PcdMaximumAsciiStringLength is not zero and String contains more than\r
743 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
744 then ASSERT().\r
745\r
746 @param String Pointer to a Null-terminated ASCII string.\r
747\r
748 @return The size of String.\r
749\r
750**/\r
751UINTN\r
752EFIAPI\r
753AsciiStrSize (\r
754 IN CONST CHAR8 *String\r
755 );\r
756\r
757\r
758/**\r
759 Compares two Null-terminated ASCII strings, and returns the difference\r
760 between the first mismatched ASCII characters.\r
761\r
762 This function compares the Null-terminated ASCII string FirstString to the\r
763 Null-terminated ASCII string SecondString. If FirstString is identical to\r
764 SecondString, then 0 is returned. Otherwise, the value returned is the first\r
765 mismatched ASCII character in SecondString subtracted from the first\r
766 mismatched ASCII character in FirstString.\r
767\r
768 If FirstString is NULL, then ASSERT().\r
769 If SecondString is NULL, then ASSERT().\r
770 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
771 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
772 then ASSERT().\r
773 If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
774 than PcdMaximumAsciiStringLength ASCII characters not including the\r
775 Null-terminator, then ASSERT().\r
776\r
777 @param FirstString Pointer to a Null-terminated ASCII string.\r
778 @param SecondString Pointer to a Null-terminated ASCII string.\r
779\r
17f695ed 780 @retval ==0 FirstString is identical to SecondString.\r
781 @retval !=0 FirstString is not identical to SecondString.\r
ac644614 782\r
783**/\r
784INTN\r
785EFIAPI\r
786AsciiStrCmp (\r
787 IN CONST CHAR8 *FirstString,\r
788 IN CONST CHAR8 *SecondString\r
789 );\r
790\r
791\r
792/**\r
793 Performs a case insensitive comparison of two Null-terminated ASCII strings,\r
794 and returns the difference between the first mismatched ASCII characters.\r
795\r
796 This function performs a case insensitive comparison of the Null-terminated\r
797 ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r
798 FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
799 value returned is the first mismatched lower case ASCII character in\r
800 SecondString subtracted from the first mismatched lower case ASCII character\r
801 in FirstString.\r
802\r
803 If FirstString is NULL, then ASSERT().\r
804 If SecondString is NULL, then ASSERT().\r
805 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
806 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
807 then ASSERT().\r
808 If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
809 than PcdMaximumAsciiStringLength ASCII characters not including the\r
810 Null-terminator, then ASSERT().\r
811\r
812 @param FirstString Pointer to a Null-terminated ASCII string.\r
813 @param SecondString Pointer to a Null-terminated ASCII string.\r
814\r
17f695ed 815 @retval ==0 FirstString is identical to SecondString using case insensitive\r
1106ffe1 816 comparisons.\r
17f695ed 817 @retval !=0 FirstString is not identical to SecondString using case\r
1106ffe1 818 insensitive comparisons.\r
ac644614 819\r
820**/\r
821INTN\r
822EFIAPI\r
823AsciiStriCmp (\r
824 IN CONST CHAR8 *FirstString,\r
825 IN CONST CHAR8 *SecondString\r
826 );\r
827\r
828\r
829/**\r
830 Compares two Null-terminated ASCII strings with maximum lengths, and returns\r
831 the difference between the first mismatched ASCII characters.\r
832\r
833 This function compares the Null-terminated ASCII string FirstString to the\r
834 Null-terminated ASCII string SecondString. At most, Length ASCII characters\r
835 will be compared. If Length is 0, then 0 is returned. If FirstString is\r
836 identical to SecondString, then 0 is returned. Otherwise, the value returned\r
837 is the first mismatched ASCII character in SecondString subtracted from the\r
838 first mismatched ASCII character in FirstString.\r
839\r
840 If Length > 0 and FirstString is NULL, then ASSERT().\r
841 If Length > 0 and SecondString is NULL, then ASSERT().\r
842 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
843 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
844 then ASSERT().\r
845 If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r
846 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
847 then ASSERT().\r
848\r
849 @param FirstString Pointer to a Null-terminated ASCII string.\r
850 @param SecondString Pointer to a Null-terminated ASCII string.\r
851 @param Length Maximum number of ASCII characters for compare.\r
852 \r
17f695ed 853 @retval ==0 FirstString is identical to SecondString.\r
854 @retval !=0 FirstString is not identical to SecondString.\r
ac644614 855\r
856**/\r
857INTN\r
858EFIAPI\r
859AsciiStrnCmp (\r
860 IN CONST CHAR8 *FirstString,\r
861 IN CONST CHAR8 *SecondString,\r
862 IN UINTN Length\r
863 );\r
864\r
865\r
866/**\r
867 Concatenates one Null-terminated ASCII string to another Null-terminated\r
868 ASCII string, and returns the concatenated ASCII string.\r
869\r
870 This function concatenates two Null-terminated ASCII strings. The contents of\r
871 Null-terminated ASCII string Source are concatenated to the end of Null-\r
872 terminated ASCII string Destination. The Null-terminated concatenated ASCII\r
873 String is returned.\r
874\r
875 If Destination is NULL, then ASSERT().\r
876 If Source is NULL, then ASSERT().\r
877 If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r
878 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
879 then ASSERT().\r
880 If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
881 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
882 then ASSERT().\r
883 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r
884 Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
885 ASCII characters, then ASSERT().\r
886\r
887 @param Destination Pointer to a Null-terminated ASCII string.\r
888 @param Source Pointer to a Null-terminated ASCII string.\r
889\r
890 @return Destination\r
891\r
892**/\r
893CHAR8 *\r
894EFIAPI\r
895AsciiStrCat (\r
896 IN OUT CHAR8 *Destination,\r
897 IN CONST CHAR8 *Source\r
898 );\r
899\r
900\r
901/**\r
17f695ed 902 Concatenates up to a specified length one Null-terminated ASCII string to \r
903 the end of another Null-terminated ASCII string, and returns the \r
904 concatenated ASCII string.\r
ac644614 905\r
906 This function concatenates two Null-terminated ASCII strings. The contents\r
907 of Null-terminated ASCII string Source are concatenated to the end of Null-\r
908 terminated ASCII string Destination, and Destination is returned. At most,\r
909 Length ASCII characters are concatenated from Source to the end of\r
910 Destination, and Destination is always Null-terminated. If Length is 0, then\r
911 Destination is returned unmodified. If Source and Destination overlap, then\r
912 the results are undefined.\r
913\r
914 If Length > 0 and Destination is NULL, then ASSERT().\r
915 If Length > 0 and Source is NULL, then ASSERT().\r
916 If Source and Destination overlap, then ASSERT().\r
917 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r
918 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
919 then ASSERT().\r
920 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
921 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
922 then ASSERT().\r
923 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r
924 Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
925 ASCII characters not including the Null-terminator, then ASSERT().\r
926\r
927 @param Destination Pointer to a Null-terminated ASCII string.\r
928 @param Source Pointer to a Null-terminated ASCII string.\r
929 @param Length Maximum number of ASCII characters to concatenate from\r
930 Source.\r
931\r
932 @return Destination\r
933\r
934**/\r
935CHAR8 *\r
936EFIAPI\r
937AsciiStrnCat (\r
938 IN OUT CHAR8 *Destination,\r
939 IN CONST CHAR8 *Source,\r
940 IN UINTN Length\r
941 );\r
942\r
943\r
944/**\r
9aa049d9 945 Returns the first occurrence of a Null-terminated ASCII sub-string\r
ac644614 946 in a Null-terminated ASCII string.\r
947\r
948 This function scans the contents of the ASCII string specified by String\r
949 and returns the first occurrence of SearchString. If SearchString is not\r
950 found in String, then NULL is returned. If the length of SearchString is zero,\r
951 then String is returned.\r
952\r
953 If String is NULL, then ASSERT().\r
954 If SearchString is NULL, then ASSERT().\r
955\r
956 If PcdMaximumAsciiStringLength is not zero, and SearchString or\r
957 String contains more than PcdMaximumAsciiStringLength Unicode characters\r
958 not including the Null-terminator, then ASSERT().\r
959\r
1106ffe1 960 @param String Pointer to a Null-terminated ASCII string.\r
961 @param SearchString Pointer to a Null-terminated ASCII string to search for.\r
ac644614 962\r
963 @retval NULL If the SearchString does not appear in String.\r
17f695ed 964 @retval others If there is a match return the first occurrence of SearchingString.\r
9aa049d9 965 If the length of SearchString is zero,return String.\r
ac644614 966\r
967**/\r
968CHAR8 *\r
969EFIAPI\r
970AsciiStrStr (\r
17f695ed 971 IN CONST CHAR8 *String,\r
972 IN CONST CHAR8 *SearchString\r
ac644614 973 );\r
974\r
975\r
976/**\r
977 Convert a Null-terminated ASCII decimal string to a value of type\r
978 UINTN.\r
979\r
980 This function returns a value of type UINTN by interpreting the contents\r
981 of the ASCII string String as a decimal number. The format of the input\r
982 ASCII string String is:\r
983\r
984 [spaces] [decimal digits].\r
985\r
986 The valid decimal digit character is in the range [0-9]. The function will\r
987 ignore the pad space, which includes spaces or tab characters, before the digits.\r
988 The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
989 function stops at the first character that is a not a valid decimal character or\r
990 Null-terminator, whichever on comes first.\r
991\r
992 If String has only pad spaces, then 0 is returned.\r
993 If String has no pad spaces or valid decimal digits, then 0 is returned.\r
994 If the number represented by String overflows according to the range defined by\r
995 UINTN, then ASSERT().\r
996 If String is NULL, then ASSERT().\r
997 If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
998 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
999 then ASSERT().\r
1000\r
17f695ed 1001 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1002\r
38bbd3d9 1003 @retval Value translated from String.\r
ac644614 1004\r
1005**/\r
1006UINTN\r
1007EFIAPI\r
1008AsciiStrDecimalToUintn (\r
1009 IN CONST CHAR8 *String\r
1010 );\r
1011\r
1012\r
1013/**\r
1014 Convert a Null-terminated ASCII decimal string to a value of type\r
1015 UINT64.\r
1016\r
1017 This function returns a value of type UINT64 by interpreting the contents\r
1018 of the ASCII string String as a decimal number. The format of the input\r
1019 ASCII string String is:\r
1020\r
1021 [spaces] [decimal digits].\r
1022\r
1023 The valid decimal digit character is in the range [0-9]. The function will\r
1024 ignore the pad space, which includes spaces or tab characters, before the digits.\r
1025 The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
1026 function stops at the first character that is a not a valid decimal character or\r
1027 Null-terminator, whichever on comes first.\r
1028\r
1029 If String has only pad spaces, then 0 is returned.\r
1030 If String has no pad spaces or valid decimal digits, then 0 is returned.\r
1031 If the number represented by String overflows according to the range defined by\r
1032 UINT64, then ASSERT().\r
1033 If String is NULL, then ASSERT().\r
1034 If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
1035 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
1036 then ASSERT().\r
1037\r
17f695ed 1038 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1039\r
38bbd3d9 1040 @retval Value translated from String.\r
ac644614 1041\r
1042**/\r
1043UINT64\r
1044EFIAPI\r
1045AsciiStrDecimalToUint64 (\r
17f695ed 1046 IN CONST CHAR8 *String\r
ac644614 1047 );\r
1048\r
1049\r
1050/**\r
1051 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r
1052\r
1053 This function returns a value of type UINTN by interpreting the contents of\r
1054 the ASCII string String as a hexadecimal number. The format of the input ASCII\r
1055 string String is:\r
1056\r
1057 [spaces][zeros][x][hexadecimal digits].\r
1058\r
1059 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
1060 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
1061 appears in the input string, it must be prefixed with at least one 0. The function\r
1062 will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
1063 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
1064 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
1065 digit. Then, the function stops at the first character that is a not a valid\r
1066 hexadecimal character or Null-terminator, whichever on comes first.\r
1067\r
1068 If String has only pad spaces, then 0 is returned.\r
1069 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
1070 0 is returned.\r
1071\r
1072 If the number represented by String overflows according to the range defined by UINTN,\r
1073 then ASSERT().\r
1074 If String is NULL, then ASSERT().\r
1075 If PcdMaximumAsciiStringLength is not zero,\r
1076 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
1077 the Null-terminator, then ASSERT().\r
1078\r
17f695ed 1079 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1080\r
38bbd3d9 1081 @retval Value translated from String.\r
ac644614 1082\r
1083**/\r
1084UINTN\r
1085EFIAPI\r
1086AsciiStrHexToUintn (\r
17f695ed 1087 IN CONST CHAR8 *String\r
ac644614 1088 );\r
1089\r
1090\r
1091/**\r
1092 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r
1093\r
1094 This function returns a value of type UINT64 by interpreting the contents of\r
1095 the ASCII string String as a hexadecimal number. The format of the input ASCII\r
1096 string String is:\r
1097\r
1098 [spaces][zeros][x][hexadecimal digits].\r
1099\r
1100 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
1101 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
1102 appears in the input string, it must be prefixed with at least one 0. The function\r
1103 will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
1104 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
1105 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
1106 digit. Then, the function stops at the first character that is a not a valid\r
1107 hexadecimal character or Null-terminator, whichever on comes first.\r
1108\r
1109 If String has only pad spaces, then 0 is returned.\r
1110 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
1111 0 is returned.\r
1112\r
1113 If the number represented by String overflows according to the range defined by UINT64,\r
1114 then ASSERT().\r
1115 If String is NULL, then ASSERT().\r
1116 If PcdMaximumAsciiStringLength is not zero,\r
1117 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
1118 the Null-terminator, then ASSERT().\r
1119\r
17f695ed 1120 @param String Pointer to a Null-terminated ASCII string.\r
ac644614 1121\r
38bbd3d9 1122 @retval Value translated from String.\r
ac644614 1123\r
1124**/\r
1125UINT64\r
1126EFIAPI\r
1127AsciiStrHexToUint64 (\r
17f695ed 1128 IN CONST CHAR8 *String\r
ac644614 1129 );\r
1130\r
1131\r
1132/**\r
1133 Convert one Null-terminated ASCII string to a Null-terminated\r
1134 Unicode string and returns the Unicode string.\r
1135\r
1136 This function converts the contents of the ASCII string Source to the Unicode\r
1137 string Destination, and returns Destination. The function terminates the\r
1138 Unicode string Destination by appending a Null-terminator character at the end.\r
1139 The caller is responsible to make sure Destination points to a buffer with size\r
1140 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r
1141\r
1142 If Destination is NULL, then ASSERT().\r
1143 If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
1144 If Source is NULL, then ASSERT().\r
1145 If Source and Destination overlap, then ASSERT().\r
1146 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
1147 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
1148 then ASSERT().\r
1149 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
1150 PcdMaximumUnicodeStringLength ASCII characters not including the\r
1151 Null-terminator, then ASSERT().\r
1152\r
1153 @param Source Pointer to a Null-terminated ASCII string.\r
1154 @param Destination Pointer to a Null-terminated Unicode string.\r
1155\r
9aa049d9 1156 @return Destination.\r
ac644614 1157\r
1158**/\r
1159CHAR16 *\r
1160EFIAPI\r
1161AsciiStrToUnicodeStr (\r
17f695ed 1162 IN CONST CHAR8 *Source,\r
1163 OUT CHAR16 *Destination\r
ac644614 1164 );\r
1165\r
1166\r
1167/**\r
1168 Converts an 8-bit value to an 8-bit BCD value.\r
1169\r
1170 Converts the 8-bit value specified by Value to BCD. The BCD value is\r
1171 returned.\r
1172\r
1173 If Value >= 100, then ASSERT().\r
1174\r
1175 @param Value The 8-bit value to convert to BCD. Range 0..99.\r
1176\r
9aa049d9 1177 @return The BCD value.\r
ac644614 1178\r
1179**/\r
1180UINT8\r
1181EFIAPI\r
1182DecimalToBcd8 (\r
1183 IN UINT8 Value\r
1184 );\r
1185\r
1186\r
1187/**\r
1188 Converts an 8-bit BCD value to an 8-bit value.\r
1189\r
1190 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r
1191 value is returned.\r
1192\r
1193 If Value >= 0xA0, then ASSERT().\r
1194 If (Value & 0x0F) >= 0x0A, then ASSERT().\r
1195\r
1196 @param Value The 8-bit BCD value to convert to an 8-bit value.\r
1197\r
1198 @return The 8-bit value is returned.\r
1199\r
1200**/\r
1201UINT8\r
1202EFIAPI\r
1203BcdToDecimal8 (\r
1204 IN UINT8 Value\r
1205 );\r
1206\r
1207\r
1208//\r
1209// Linked List Functions and Macros\r
1210//\r
1211\r
1212/**\r
1213 Initializes the head node of a doubly linked list that is declared as a\r
1214 global variable in a module.\r
1215\r
1216 Initializes the forward and backward links of a new linked list. After\r
1217 initializing a linked list with this macro, the other linked list functions\r
1218 may be used to add and remove nodes from the linked list. This macro results\r
1219 in smaller executables by initializing the linked list in the data section,\r
1220 instead if calling the InitializeListHead() function to perform the\r
1221 equivalent operation.\r
1222\r
1223 @param ListHead The head note of a list to initiailize.\r
1224\r
1225**/\r
17f695ed 1226#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r
ac644614 1227\r
1228\r
1229/**\r
1230 Initializes the head node of a doubly linked list, and returns the pointer to\r
1231 the head node of the doubly linked list.\r
1232\r
1233 Initializes the forward and backward links of a new linked list. After\r
1234 initializing a linked list with this function, the other linked list\r
1235 functions may be used to add and remove nodes from the linked list. It is up\r
1236 to the caller of this function to allocate the memory for ListHead.\r
1237\r
1238 If ListHead is NULL, then ASSERT().\r
1239\r
1240 @param ListHead A pointer to the head node of a new doubly linked list.\r
1241\r
1242 @return ListHead\r
1243\r
1244**/\r
1245LIST_ENTRY *\r
1246EFIAPI\r
1247InitializeListHead (\r
aa0583c7 1248 IN OUT LIST_ENTRY *ListHead\r
ac644614 1249 );\r
1250\r
1251\r
1252/**\r
1253 Adds a node to the beginning of a doubly linked list, and returns the pointer\r
1254 to the head node of the doubly linked list.\r
1255\r
1256 Adds the node Entry at the beginning of the doubly linked list denoted by\r
1257 ListHead, and returns ListHead.\r
1258\r
1259 If ListHead is NULL, then ASSERT().\r
1260 If Entry is NULL, then ASSERT().\r
17f695ed 1261 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
1262 InitializeListHead(), then ASSERT().\r
ac644614 1263 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
1264 of nodes in ListHead, including the ListHead node, is greater than or\r
1265 equal to PcdMaximumLinkedListLength, then ASSERT().\r
1266\r
1267 @param ListHead A pointer to the head node of a doubly linked list.\r
1268 @param Entry A pointer to a node that is to be inserted at the beginning\r
1269 of a doubly linked list.\r
1270\r
1271 @return ListHead\r
1272\r
1273**/\r
1274LIST_ENTRY *\r
1275EFIAPI\r
1276InsertHeadList (\r
aa0583c7 1277 IN OUT LIST_ENTRY *ListHead,\r
1278 IN OUT LIST_ENTRY *Entry\r
ac644614 1279 );\r
1280\r
1281\r
1282/**\r
1283 Adds a node to the end of a doubly linked list, and returns the pointer to\r
1284 the head node of the doubly linked list.\r
1285\r
1286 Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r
1287 and returns ListHead.\r
1288\r
1289 If ListHead is NULL, then ASSERT().\r
1290 If Entry is NULL, then ASSERT().\r
17f695ed 1291 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1292 InitializeListHead(), then ASSERT().\r
ac644614 1293 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
1294 of nodes in ListHead, including the ListHead node, is greater than or\r
1295 equal to PcdMaximumLinkedListLength, then ASSERT().\r
1296\r
1297 @param ListHead A pointer to the head node of a doubly linked list.\r
1298 @param Entry A pointer to a node that is to be added at the end of the\r
1299 doubly linked list.\r
1300\r
1301 @return ListHead\r
1302\r
1303**/\r
1304LIST_ENTRY *\r
1305EFIAPI\r
1306InsertTailList (\r
aa0583c7 1307 IN OUT LIST_ENTRY *ListHead,\r
1308 IN OUT LIST_ENTRY *Entry\r
ac644614 1309 );\r
1310\r
1311\r
1312/**\r
1313 Retrieves the first node of a doubly linked list.\r
1314\r
17f695ed 1315 Returns the first node of a doubly linked list. List must have been \r
1316 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
1317 If List is empty, then List is returned.\r
ac644614 1318\r
1319 If List is NULL, then ASSERT().\r
17f695ed 1320 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1321 InitializeListHead(), then ASSERT().\r
ac644614 1322 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1323 in List, including the List node, is greater than or equal to\r
1324 PcdMaximumLinkedListLength, then ASSERT().\r
1325\r
1326 @param List A pointer to the head node of a doubly linked list.\r
1327\r
1328 @return The first node of a doubly linked list.\r
1329 @retval NULL The list is empty.\r
1330\r
1331**/\r
1332LIST_ENTRY *\r
1333EFIAPI\r
1334GetFirstNode (\r
1335 IN CONST LIST_ENTRY *List\r
1336 );\r
1337\r
1338\r
1339/**\r
1340 Retrieves the next node of a doubly linked list.\r
1341\r
17f695ed 1342 Returns the node of a doubly linked list that follows Node. \r
1343 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
1344 or InitializeListHead(). If List is empty, then List is returned.\r
ac644614 1345\r
1346 If List is NULL, then ASSERT().\r
1347 If Node is NULL, then ASSERT().\r
17f695ed 1348 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1349 InitializeListHead(), then ASSERT().\r
ac644614 1350 If PcdMaximumLinkedListLenth is not zero, and List contains more than\r
1351 PcdMaximumLinkedListLenth nodes, then ASSERT().\r
1352 If Node is not a node in List, then ASSERT().\r
1353\r
1354 @param List A pointer to the head node of a doubly linked list.\r
1355 @param Node A pointer to a node in the doubly linked list.\r
1356\r
1357 @return Pointer to the next node if one exists. Otherwise a null value which\r
1358 is actually List is returned.\r
1359\r
1360**/\r
1361LIST_ENTRY *\r
1362EFIAPI\r
1363GetNextNode (\r
1364 IN CONST LIST_ENTRY *List,\r
1365 IN CONST LIST_ENTRY *Node\r
1366 );\r
1367\r
1368\r
1369/**\r
1370 Checks to see if a doubly linked list is empty or not.\r
1371\r
1372 Checks to see if the doubly linked list is empty. If the linked list contains\r
1373 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r
1374\r
1375 If ListHead is NULL, then ASSERT().\r
17f695ed 1376 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1377 InitializeListHead(), then ASSERT().\r
ac644614 1378 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1379 in List, including the List node, is greater than or equal to\r
1380 PcdMaximumLinkedListLength, then ASSERT().\r
1381\r
1382 @param ListHead A pointer to the head node of a doubly linked list.\r
1383\r
1384 @retval TRUE The linked list is empty.\r
1385 @retval FALSE The linked list is not empty.\r
1386\r
1387**/\r
1388BOOLEAN\r
1389EFIAPI\r
1390IsListEmpty (\r
1391 IN CONST LIST_ENTRY *ListHead\r
1392 );\r
1393\r
1394\r
1395/**\r
aa0583c7 1396 Determines if a node in a doubly linked list is the head node of a the same\r
1397 doubly linked list. This function is typically used to terminate a loop that\r
1398 traverses all the nodes in a doubly linked list starting with the head node.\r
ac644614 1399\r
aa0583c7 1400 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r
1401 nodes in the doubly linked list specified by List. List must have been\r
17f695ed 1402 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
ac644614 1403\r
1404 If List is NULL, then ASSERT().\r
1405 If Node is NULL, then ASSERT().\r
17f695ed 1406 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r
1407 then ASSERT().\r
ac644614 1408 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1409 in List, including the List node, is greater than or equal to\r
1410 PcdMaximumLinkedListLength, then ASSERT().\r
1411 If Node is not a node in List and Node is not equal to List, then ASSERT().\r
1412\r
1413 @param List A pointer to the head node of a doubly linked list.\r
1414 @param Node A pointer to a node in the doubly linked list.\r
1415\r
1416 @retval TRUE Node is one of the nodes in the doubly linked list.\r
1417 @retval FALSE Node is not one of the nodes in the doubly linked list.\r
1418\r
1419**/\r
1420BOOLEAN\r
1421EFIAPI\r
1422IsNull (\r
1423 IN CONST LIST_ENTRY *List,\r
1424 IN CONST LIST_ENTRY *Node\r
1425 );\r
1426\r
1427\r
1428/**\r
1429 Determines if a node the last node in a doubly linked list.\r
1430\r
1431 Returns TRUE if Node is the last node in the doubly linked list specified by\r
1432 List. Otherwise, FALSE is returned. List must have been initialized with\r
17f695ed 1433 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
ac644614 1434\r
1435 If List is NULL, then ASSERT().\r
1436 If Node is NULL, then ASSERT().\r
17f695ed 1437 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
1438 InitializeListHead(), then ASSERT().\r
ac644614 1439 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1440 in List, including the List node, is greater than or equal to\r
1441 PcdMaximumLinkedListLength, then ASSERT().\r
1442 If Node is not a node in List, then ASSERT().\r
1443\r
1444 @param List A pointer to the head node of a doubly linked list.\r
1445 @param Node A pointer to a node in the doubly linked list.\r
1446\r
1447 @retval TRUE Node is the last node in the linked list.\r
1448 @retval FALSE Node is not the last node in the linked list.\r
1449\r
1450**/\r
1451BOOLEAN\r
1452EFIAPI\r
1453IsNodeAtEnd (\r
1454 IN CONST LIST_ENTRY *List,\r
1455 IN CONST LIST_ENTRY *Node\r
1456 );\r
1457\r
1458\r
1459/**\r
1460 Swaps the location of two nodes in a doubly linked list, and returns the\r
1461 first node after the swap.\r
1462\r
1463 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r
1464 Otherwise, the location of the FirstEntry node is swapped with the location\r
1465 of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r
1466 same double linked list as FirstEntry and that double linked list must have\r
17f695ed 1467 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r
1468 SecondEntry is returned after the nodes are swapped.\r
ac644614 1469\r
1470 If FirstEntry is NULL, then ASSERT().\r
1471 If SecondEntry is NULL, then ASSERT().\r
1472 If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r
1473 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
1474 linked list containing the FirstEntry and SecondEntry nodes, including\r
1475 the FirstEntry and SecondEntry nodes, is greater than or equal to\r
1476 PcdMaximumLinkedListLength, then ASSERT().\r
1477\r
1478 @param FirstEntry A pointer to a node in a linked list.\r
1479 @param SecondEntry A pointer to another node in the same linked list.\r
38bbd3d9 1480 \r
9aa049d9 1481 @return SecondEntry.\r
ac644614 1482\r
1483**/\r
1484LIST_ENTRY *\r
1485EFIAPI\r
1486SwapListEntries (\r
aa0583c7 1487 IN OUT LIST_ENTRY *FirstEntry,\r
1488 IN OUT LIST_ENTRY *SecondEntry\r
ac644614 1489 );\r
1490\r
1491\r
1492/**\r
1493 Removes a node from a doubly linked list, and returns the node that follows\r
1494 the removed node.\r
1495\r
1496 Removes the node Entry from a doubly linked list. It is up to the caller of\r
1497 this function to release the memory used by this node if that is required. On\r
1498 exit, the node following Entry in the doubly linked list is returned. If\r
1499 Entry is the only node in the linked list, then the head node of the linked\r
1500 list is returned.\r
1501\r
1502 If Entry is NULL, then ASSERT().\r
1503 If Entry is the head node of an empty list, then ASSERT().\r
1504 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
1505 linked list containing Entry, including the Entry node, is greater than\r
1506 or equal to PcdMaximumLinkedListLength, then ASSERT().\r
1507\r
9aa049d9 1508 @param Entry A pointer to a node in a linked list.\r
ac644614 1509\r
9aa049d9 1510 @return Entry.\r
ac644614 1511\r
1512**/\r
1513LIST_ENTRY *\r
1514EFIAPI\r
1515RemoveEntryList (\r
1516 IN CONST LIST_ENTRY *Entry\r
1517 );\r
1518\r
1519//\r
1520// Math Services\r
1521//\r
1522\r
1523/**\r
1524 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r
1525 with zeros. The shifted value is returned.\r
1526\r
1527 This function shifts the 64-bit value Operand to the left by Count bits. The\r
1528 low Count bits are set to zero. The shifted value is returned.\r
1529\r
1530 If Count is greater than 63, then ASSERT().\r
1531\r
1532 @param Operand The 64-bit operand to shift left.\r
1533 @param Count The number of bits to shift left.\r
1534\r
9aa049d9 1535 @return Operand << Count.\r
ac644614 1536\r
1537**/\r
1538UINT64\r
1539EFIAPI\r
1540LShiftU64 (\r
1541 IN UINT64 Operand,\r
1542 IN UINTN Count\r
1543 );\r
1544\r
1545\r
1546/**\r
1547 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r
1548 filled with zeros. The shifted value is returned.\r
1549\r
1550 This function shifts the 64-bit value Operand to the right by Count bits. The\r
1551 high Count bits are set to zero. The shifted value is returned.\r
1552\r
1553 If Count is greater than 63, then ASSERT().\r
1554\r
1555 @param Operand The 64-bit operand to shift right.\r
1556 @param Count The number of bits to shift right.\r
1557\r
1558 @return Operand >> Count\r
1559\r
1560**/\r
1561UINT64\r
1562EFIAPI\r
1563RShiftU64 (\r
1564 IN UINT64 Operand,\r
1565 IN UINTN Count\r
1566 );\r
1567\r
1568\r
1569/**\r
1570 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r
1571 with original integer's bit 63. The shifted value is returned.\r
1572\r
1573 This function shifts the 64-bit value Operand to the right by Count bits. The\r
1574 high Count bits are set to bit 63 of Operand. The shifted value is returned.\r
1575\r
1576 If Count is greater than 63, then ASSERT().\r
1577\r
1578 @param Operand The 64-bit operand to shift right.\r
1579 @param Count The number of bits to shift right.\r
1580\r
1581 @return Operand >> Count\r
1582\r
1583**/\r
1584UINT64\r
1585EFIAPI\r
1586ARShiftU64 (\r
1587 IN UINT64 Operand,\r
1588 IN UINTN Count\r
1589 );\r
1590\r
1591\r
1592/**\r
1593 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r
1594 with the high bits that were rotated.\r
1595\r
1596 This function rotates the 32-bit value Operand to the left by Count bits. The\r
1597 low Count bits are fill with the high Count bits of Operand. The rotated\r
1598 value is returned.\r
1599\r
1600 If Count is greater than 31, then ASSERT().\r
1601\r
1602 @param Operand The 32-bit operand to rotate left.\r
1603 @param Count The number of bits to rotate left.\r
1604\r
17f695ed 1605 @return Operand << Count\r
ac644614 1606\r
1607**/\r
1608UINT32\r
1609EFIAPI\r
1610LRotU32 (\r
1611 IN UINT32 Operand,\r
1612 IN UINTN Count\r
1613 );\r
1614\r
1615\r
1616/**\r
1617 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r
1618 with the low bits that were rotated.\r
1619\r
1620 This function rotates the 32-bit value Operand to the right by Count bits.\r
1621 The high Count bits are fill with the low Count bits of Operand. The rotated\r
1622 value is returned.\r
1623\r
1624 If Count is greater than 31, then ASSERT().\r
1625\r
1626 @param Operand The 32-bit operand to rotate right.\r
1627 @param Count The number of bits to rotate right.\r
1628\r
2fe241a2 1629 @return Operand >> Count\r
ac644614 1630\r
1631**/\r
1632UINT32\r
1633EFIAPI\r
1634RRotU32 (\r
1635 IN UINT32 Operand,\r
1636 IN UINTN Count\r
1637 );\r
1638\r
1639\r
1640/**\r
1641 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r
1642 with the high bits that were rotated.\r
1643\r
1644 This function rotates the 64-bit value Operand to the left by Count bits. The\r
1645 low Count bits are fill with the high Count bits of Operand. The rotated\r
1646 value is returned.\r
1647\r
1648 If Count is greater than 63, then ASSERT().\r
1649\r
1650 @param Operand The 64-bit operand to rotate left.\r
1651 @param Count The number of bits to rotate left.\r
1652\r
17f695ed 1653 @return Operand << Count\r
ac644614 1654\r
1655**/\r
1656UINT64\r
1657EFIAPI\r
1658LRotU64 (\r
1659 IN UINT64 Operand,\r
1660 IN UINTN Count\r
1661 );\r
1662\r
1663\r
1664/**\r
1665 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r
1666 with the high low bits that were rotated.\r
1667\r
1668 This function rotates the 64-bit value Operand to the right by Count bits.\r
1669 The high Count bits are fill with the low Count bits of Operand. The rotated\r
1670 value is returned.\r
1671\r
1672 If Count is greater than 63, then ASSERT().\r
1673\r
1674 @param Operand The 64-bit operand to rotate right.\r
1675 @param Count The number of bits to rotate right.\r
1676\r
17f695ed 1677 @return Operand >> Count\r
ac644614 1678\r
1679**/\r
1680UINT64\r
1681EFIAPI\r
1682RRotU64 (\r
1683 IN UINT64 Operand,\r
1684 IN UINTN Count\r
1685 );\r
1686\r
1687\r
1688/**\r
1689 Returns the bit position of the lowest bit set in a 32-bit value.\r
1690\r
1691 This function computes the bit position of the lowest bit set in the 32-bit\r
1692 value specified by Operand. If Operand is zero, then -1 is returned.\r
1693 Otherwise, a value between 0 and 31 is returned.\r
1694\r
1695 @param Operand The 32-bit operand to evaluate.\r
1696\r
9aa049d9 1697 @retval 0..31 The lowest bit set in Operand was found.\r
17f695ed 1698 @retval -1 Operand is zero.\r
ac644614 1699\r
1700**/\r
1701INTN\r
1702EFIAPI\r
1703LowBitSet32 (\r
1704 IN UINT32 Operand\r
1705 );\r
1706\r
1707\r
1708/**\r
1709 Returns the bit position of the lowest bit set in a 64-bit value.\r
1710\r
1711 This function computes the bit position of the lowest bit set in the 64-bit\r
1712 value specified by Operand. If Operand is zero, then -1 is returned.\r
1713 Otherwise, a value between 0 and 63 is returned.\r
1714\r
1715 @param Operand The 64-bit operand to evaluate.\r
1716\r
9aa049d9 1717 @retval 0..63 The lowest bit set in Operand was found.\r
17f695ed 1718 @retval -1 Operand is zero.\r
1719\r
ac644614 1720\r
1721**/\r
1722INTN\r
1723EFIAPI\r
1724LowBitSet64 (\r
1725 IN UINT64 Operand\r
1726 );\r
1727\r
1728\r
1729/**\r
1730 Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r
1731 to log2(x).\r
1732\r
1733 This function computes the bit position of the highest bit set in the 32-bit\r
1734 value specified by Operand. If Operand is zero, then -1 is returned.\r
1735 Otherwise, a value between 0 and 31 is returned.\r
1736\r
1737 @param Operand The 32-bit operand to evaluate.\r
1738\r
9aa049d9 1739 @retval 0..31 Position of the highest bit set in Operand if found.\r
17f695ed 1740 @retval -1 Operand is zero.\r
ac644614 1741\r
1742**/\r
1743INTN\r
1744EFIAPI\r
1745HighBitSet32 (\r
1746 IN UINT32 Operand\r
1747 );\r
1748\r
1749\r
1750/**\r
1751 Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r
1752 to log2(x).\r
1753\r
1754 This function computes the bit position of the highest bit set in the 64-bit\r
1755 value specified by Operand. If Operand is zero, then -1 is returned.\r
1756 Otherwise, a value between 0 and 63 is returned.\r
1757\r
1758 @param Operand The 64-bit operand to evaluate.\r
1759\r
9aa049d9 1760 @retval 0..63 Position of the highest bit set in Operand if found.\r
17f695ed 1761 @retval -1 Operand is zero.\r
ac644614 1762\r
1763**/\r
1764INTN\r
1765EFIAPI\r
1766HighBitSet64 (\r
1767 IN UINT64 Operand\r
1768 );\r
1769\r
1770\r
1771/**\r
1772 Returns the value of the highest bit set in a 32-bit value. Equivalent to\r
17f695ed 1773 1 << log2(x).\r
ac644614 1774\r
1775 This function computes the value of the highest bit set in the 32-bit value\r
1776 specified by Operand. If Operand is zero, then zero is returned.\r
1777\r
1778 @param Operand The 32-bit operand to evaluate.\r
1779\r
1780 @return 1 << HighBitSet32(Operand)\r
1781 @retval 0 Operand is zero.\r
1782\r
1783**/\r
1784UINT32\r
1785EFIAPI\r
1786GetPowerOfTwo32 (\r
1787 IN UINT32 Operand\r
1788 );\r
1789\r
1790\r
1791/**\r
1792 Returns the value of the highest bit set in a 64-bit value. Equivalent to\r
17f695ed 1793 1 << log2(x).\r
ac644614 1794\r
1795 This function computes the value of the highest bit set in the 64-bit value\r
1796 specified by Operand. If Operand is zero, then zero is returned.\r
1797\r
1798 @param Operand The 64-bit operand to evaluate.\r
1799\r
1800 @return 1 << HighBitSet64(Operand)\r
1801 @retval 0 Operand is zero.\r
1802\r
1803**/\r
1804UINT64\r
1805EFIAPI\r
1806GetPowerOfTwo64 (\r
1807 IN UINT64 Operand\r
1808 );\r
1809\r
1810\r
1811/**\r
1812 Switches the endianess of a 16-bit integer.\r
1813\r
1814 This function swaps the bytes in a 16-bit unsigned value to switch the value\r
1815 from little endian to big endian or vice versa. The byte swapped value is\r
1816 returned.\r
1817\r
2a53dabf 1818 @param Value A 16-bit unsigned value.\r
ac644614 1819\r
efb23117 1820 @return The byte swapped Value.\r
ac644614 1821\r
1822**/\r
1823UINT16\r
1824EFIAPI\r
1825SwapBytes16 (\r
1826 IN UINT16 Value\r
1827 );\r
1828\r
1829\r
1830/**\r
1831 Switches the endianess of a 32-bit integer.\r
1832\r
1833 This function swaps the bytes in a 32-bit unsigned value to switch the value\r
1834 from little endian to big endian or vice versa. The byte swapped value is\r
1835 returned.\r
1836\r
2a53dabf 1837 @param Value A 32-bit unsigned value.\r
ac644614 1838\r
efb23117 1839 @return The byte swapped Value.\r
ac644614 1840\r
1841**/\r
1842UINT32\r
1843EFIAPI\r
1844SwapBytes32 (\r
1845 IN UINT32 Value\r
1846 );\r
1847\r
1848\r
1849/**\r
1850 Switches the endianess of a 64-bit integer.\r
1851\r
1852 This function swaps the bytes in a 64-bit unsigned value to switch the value\r
1853 from little endian to big endian or vice versa. The byte swapped value is\r
1854 returned.\r
1855\r
2a53dabf 1856 @param Value A 64-bit unsigned value.\r
ac644614 1857\r
efb23117 1858 @return The byte swapped Value.\r
ac644614 1859\r
1860**/\r
1861UINT64\r
1862EFIAPI\r
1863SwapBytes64 (\r
1864 IN UINT64 Value\r
1865 );\r
1866\r
1867\r
1868/**\r
1869 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r
1870 generates a 64-bit unsigned result.\r
1871\r
1872 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
1873 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
1874 bit unsigned result is returned.\r
1875\r
ac644614 1876 @param Multiplicand A 64-bit unsigned value.\r
1877 @param Multiplier A 32-bit unsigned value.\r
1878\r
1879 @return Multiplicand * Multiplier\r
1880\r
1881**/\r
1882UINT64\r
1883EFIAPI\r
1884MultU64x32 (\r
1885 IN UINT64 Multiplicand,\r
1886 IN UINT32 Multiplier\r
1887 );\r
1888\r
1889\r
1890/**\r
1891 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r
1892 generates a 64-bit unsigned result.\r
1893\r
1894 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
1895 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
1896 bit unsigned result is returned.\r
1897\r
ac644614 1898 @param Multiplicand A 64-bit unsigned value.\r
1899 @param Multiplier A 64-bit unsigned value.\r
1900\r
1901 @return Multiplicand * Multiplier\r
1902\r
1903**/\r
1904UINT64\r
1905EFIAPI\r
1906MultU64x64 (\r
1907 IN UINT64 Multiplicand,\r
1908 IN UINT64 Multiplier\r
1909 );\r
1910\r
1911\r
1912/**\r
1913 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r
1914 64-bit signed result.\r
1915\r
1916 This function multiples the 64-bit signed value Multiplicand by the 64-bit\r
1917 signed value Multiplier and generates a 64-bit signed result. This 64-bit\r
1918 signed result is returned.\r
1919\r
ac644614 1920 @param Multiplicand A 64-bit signed value.\r
1921 @param Multiplier A 64-bit signed value.\r
1922\r
1923 @return Multiplicand * Multiplier\r
1924\r
1925**/\r
1926INT64\r
1927EFIAPI\r
1928MultS64x64 (\r
1929 IN INT64 Multiplicand,\r
1930 IN INT64 Multiplier\r
1931 );\r
1932\r
1933\r
1934/**\r
1935 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1936 a 64-bit unsigned result.\r
1937\r
1938 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1939 unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
1940 function returns the 64-bit unsigned quotient.\r
1941\r
1942 If Divisor is 0, then ASSERT().\r
1943\r
1944 @param Dividend A 64-bit unsigned value.\r
1945 @param Divisor A 32-bit unsigned value.\r
1946\r
1947 @return Dividend / Divisor\r
1948\r
1949**/\r
1950UINT64\r
1951EFIAPI\r
1952DivU64x32 (\r
1953 IN UINT64 Dividend,\r
1954 IN UINT32 Divisor\r
1955 );\r
1956\r
1957\r
1958/**\r
1959 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1960 a 32-bit unsigned remainder.\r
1961\r
1962 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1963 unsigned value Divisor and generates a 32-bit remainder. This function\r
1964 returns the 32-bit unsigned remainder.\r
1965\r
1966 If Divisor is 0, then ASSERT().\r
1967\r
1968 @param Dividend A 64-bit unsigned value.\r
1969 @param Divisor A 32-bit unsigned value.\r
1970\r
1971 @return Dividend % Divisor\r
1972\r
1973**/\r
1974UINT32\r
1975EFIAPI\r
1976ModU64x32 (\r
1977 IN UINT64 Dividend,\r
1978 IN UINT32 Divisor\r
1979 );\r
1980\r
1981\r
1982/**\r
1983 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1984 a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
1985\r
1986 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1987 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
1988 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
1989 This function returns the 64-bit unsigned quotient.\r
1990\r
1991 If Divisor is 0, then ASSERT().\r
1992\r
1993 @param Dividend A 64-bit unsigned value.\r
1994 @param Divisor A 32-bit unsigned value.\r
1995 @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r
1996 optional and may be NULL.\r
1997\r
1998 @return Dividend / Divisor\r
1999\r
2000**/\r
2001UINT64\r
2002EFIAPI\r
2003DivU64x32Remainder (\r
2004 IN UINT64 Dividend,\r
2005 IN UINT32 Divisor,\r
2006 OUT UINT32 *Remainder OPTIONAL\r
2007 );\r
2008\r
2009\r
2010/**\r
2011 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r
2012 a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
2013\r
2014 This function divides the 64-bit unsigned value Dividend by the 64-bit\r
2015 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
2016 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
2017 This function returns the 64-bit unsigned quotient.\r
2018\r
2019 If Divisor is 0, then ASSERT().\r
2020\r
2021 @param Dividend A 64-bit unsigned value.\r
2022 @param Divisor A 64-bit unsigned value.\r
2023 @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r
2024 optional and may be NULL.\r
2025\r
2026 @return Dividend / Divisor\r
2027\r
2028**/\r
2029UINT64\r
2030EFIAPI\r
2031DivU64x64Remainder (\r
2032 IN UINT64 Dividend,\r
2033 IN UINT64 Divisor,\r
2034 OUT UINT64 *Remainder OPTIONAL\r
2035 );\r
2036\r
2037\r
2038/**\r
2039 Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r
2040 64-bit signed result and a optional 64-bit signed remainder.\r
2041\r
2042 This function divides the 64-bit signed value Dividend by the 64-bit signed\r
2043 value Divisor and generates a 64-bit signed quotient. If Remainder is not\r
2044 NULL, then the 64-bit signed remainder is returned in Remainder. This\r
2045 function returns the 64-bit signed quotient.\r
2046\r
9aa049d9 2047 It is the caller's responsibility to not call this function with a Divisor of 0.\r
17f695ed 2048 If Divisor is 0, then the quotient and remainder should be assumed to be \r
2049 the largest negative integer.\r
2050\r
ac644614 2051 If Divisor is 0, then ASSERT().\r
2052\r
2053 @param Dividend A 64-bit signed value.\r
2054 @param Divisor A 64-bit signed value.\r
2055 @param Remainder A pointer to a 64-bit signed value. This parameter is\r
2056 optional and may be NULL.\r
2057\r
2058 @return Dividend / Divisor\r
2059\r
2060**/\r
2061INT64\r
2062EFIAPI\r
2063DivS64x64Remainder (\r
2064 IN INT64 Dividend,\r
2065 IN INT64 Divisor,\r
2066 OUT INT64 *Remainder OPTIONAL\r
2067 );\r
2068\r
2069\r
2070/**\r
2071 Reads a 16-bit value from memory that may be unaligned.\r
2072\r
2073 This function returns the 16-bit value pointed to by Buffer. The function\r
2074 guarantees that the read operation does not produce an alignment fault.\r
2075\r
2076 If the Buffer is NULL, then ASSERT().\r
2077\r
5385a579 2078 @param Buffer Pointer to a 16-bit value that may be unaligned.\r
ac644614 2079\r
5385a579 2080 @return The 16-bit value read from Buffer.\r
ac644614 2081\r
2082**/\r
2083UINT16\r
2084EFIAPI\r
2085ReadUnaligned16 (\r
5385a579 2086 IN CONST UINT16 *Buffer\r
ac644614 2087 );\r
2088\r
2089\r
2090/**\r
2091 Writes a 16-bit value to memory that may be unaligned.\r
2092\r
2093 This function writes the 16-bit value specified by Value to Buffer. Value is\r
2094 returned. The function guarantees that the write operation does not produce\r
2095 an alignment fault.\r
2096\r
2097 If the Buffer is NULL, then ASSERT().\r
2098\r
5385a579 2099 @param Buffer Pointer to a 16-bit value that may be unaligned.\r
ac644614 2100 @param Value 16-bit value to write to Buffer.\r
2101\r
5385a579 2102 @return The 16-bit value to write to Buffer.\r
ac644614 2103\r
2104**/\r
2105UINT16\r
2106EFIAPI\r
2107WriteUnaligned16 (\r
5385a579 2108 OUT UINT16 *Buffer,\r
2109 IN UINT16 Value\r
ac644614 2110 );\r
2111\r
2112\r
2113/**\r
2114 Reads a 24-bit value from memory that may be unaligned.\r
2115\r
2116 This function returns the 24-bit value pointed to by Buffer. The function\r
2117 guarantees that the read operation does not produce an alignment fault.\r
2118\r
2119 If the Buffer is NULL, then ASSERT().\r
2120\r
2121 @param Buffer Pointer to a 24-bit value that may be unaligned.\r
2122\r
5385a579 2123 @return The 24-bit value read from Buffer.\r
ac644614 2124\r
2125**/\r
2126UINT32\r
2127EFIAPI\r
2128ReadUnaligned24 (\r
5385a579 2129 IN CONST UINT32 *Buffer\r
ac644614 2130 );\r
2131\r
2132\r
2133/**\r
2134 Writes a 24-bit value to memory that may be unaligned.\r
2135\r
2136 This function writes the 24-bit value specified by Value to Buffer. Value is\r
2137 returned. The function guarantees that the write operation does not produce\r
2138 an alignment fault.\r
2139\r
2140 If the Buffer is NULL, then ASSERT().\r
2141\r
2142 @param Buffer Pointer to a 24-bit value that may be unaligned.\r
2143 @param Value 24-bit value to write to Buffer.\r
2144\r
5385a579 2145 @return The 24-bit value to write to Buffer.\r
ac644614 2146\r
2147**/\r
2148UINT32\r
2149EFIAPI\r
2150WriteUnaligned24 (\r
5385a579 2151 OUT UINT32 *Buffer,\r
2152 IN UINT32 Value\r
ac644614 2153 );\r
2154\r
2155\r
2156/**\r
2157 Reads a 32-bit value from memory that may be unaligned.\r
2158\r
2159 This function returns the 32-bit value pointed to by Buffer. The function\r
2160 guarantees that the read operation does not produce an alignment fault.\r
2161\r
2162 If the Buffer is NULL, then ASSERT().\r
2163\r
5385a579 2164 @param Buffer Pointer to a 32-bit value that may be unaligned.\r
ac644614 2165\r
5385a579 2166 @return The 32-bit value read from Buffer.\r
ac644614 2167\r
2168**/\r
2169UINT32\r
2170EFIAPI\r
2171ReadUnaligned32 (\r
5385a579 2172 IN CONST UINT32 *Buffer\r
ac644614 2173 );\r
2174\r
2175\r
2176/**\r
2177 Writes a 32-bit value to memory that may be unaligned.\r
2178\r
2179 This function writes the 32-bit value specified by Value to Buffer. Value is\r
2180 returned. The function guarantees that the write operation does not produce\r
2181 an alignment fault.\r
2182\r
2183 If the Buffer is NULL, then ASSERT().\r
2184\r
5385a579 2185 @param Buffer Pointer to a 32-bit value that may be unaligned.\r
ac644614 2186 @param Value 32-bit value to write to Buffer.\r
2187\r
5385a579 2188 @return The 32-bit value to write to Buffer.\r
ac644614 2189\r
2190**/\r
2191UINT32\r
2192EFIAPI\r
2193WriteUnaligned32 (\r
5385a579 2194 OUT UINT32 *Buffer,\r
2195 IN UINT32 Value\r
ac644614 2196 );\r
2197\r
2198\r
2199/**\r
2200 Reads a 64-bit value from memory that may be unaligned.\r
2201\r
2202 This function returns the 64-bit value pointed to by Buffer. The function\r
2203 guarantees that the read operation does not produce an alignment fault.\r
2204\r
2205 If the Buffer is NULL, then ASSERT().\r
2206\r
5385a579 2207 @param Buffer Pointer to a 64-bit value that may be unaligned.\r
ac644614 2208\r
5385a579 2209 @return The 64-bit value read from Buffer.\r
ac644614 2210\r
2211**/\r
2212UINT64\r
2213EFIAPI\r
2214ReadUnaligned64 (\r
5385a579 2215 IN CONST UINT64 *Buffer\r
ac644614 2216 );\r
2217\r
2218\r
2219/**\r
2220 Writes a 64-bit value to memory that may be unaligned.\r
2221\r
2222 This function writes the 64-bit value specified by Value to Buffer. Value is\r
2223 returned. The function guarantees that the write operation does not produce\r
2224 an alignment fault.\r
2225\r
2226 If the Buffer is NULL, then ASSERT().\r
2227\r
5385a579 2228 @param Buffer Pointer to a 64-bit value that may be unaligned.\r
ac644614 2229 @param Value 64-bit value to write to Buffer.\r
2230\r
5385a579 2231 @return The 64-bit value to write to Buffer.\r
ac644614 2232\r
2233**/\r
2234UINT64\r
2235EFIAPI\r
2236WriteUnaligned64 (\r
5385a579 2237 OUT UINT64 *Buffer,\r
2238 IN UINT64 Value\r
ac644614 2239 );\r
2240\r
2241\r
2242//\r
2243// Bit Field Functions\r
2244//\r
2245\r
2246/**\r
2247 Returns a bit field from an 8-bit value.\r
2248\r
2249 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2250\r
2251 If 8-bit operations are not supported, then ASSERT().\r
2252 If StartBit is greater than 7, then ASSERT().\r
2253 If EndBit is greater than 7, then ASSERT().\r
2254 If EndBit is less than StartBit, then ASSERT().\r
2255\r
2256 @param Operand Operand on which to perform the bitfield operation.\r
2257 @param StartBit The ordinal of the least significant bit in the bit field.\r
2258 Range 0..7.\r
2259 @param EndBit The ordinal of the most significant bit in the bit field.\r
2260 Range 0..7.\r
2261\r
2262 @return The bit field read.\r
2263\r
2264**/\r
2265UINT8\r
2266EFIAPI\r
2267BitFieldRead8 (\r
2268 IN UINT8 Operand,\r
2269 IN UINTN StartBit,\r
2270 IN UINTN EndBit\r
2271 );\r
2272\r
2273\r
2274/**\r
2275 Writes a bit field to an 8-bit value, and returns the result.\r
2276\r
2277 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2278 Operand. All other bits in Operand are preserved. The new 8-bit value is\r
2279 returned.\r
2280\r
2281 If 8-bit operations are not supported, then ASSERT().\r
2282 If StartBit is greater than 7, then ASSERT().\r
2283 If EndBit is greater than 7, then ASSERT().\r
2284 If EndBit is less than StartBit, then ASSERT().\r
2285\r
2286 @param Operand Operand on which to perform the bitfield operation.\r
2287 @param StartBit The ordinal of the least significant bit in the bit field.\r
2288 Range 0..7.\r
2289 @param EndBit The ordinal of the most significant bit in the bit field.\r
2290 Range 0..7.\r
2291 @param Value New value of the bit field.\r
2292\r
2293 @return The new 8-bit value.\r
2294\r
2295**/\r
2296UINT8\r
2297EFIAPI\r
2298BitFieldWrite8 (\r
2299 IN UINT8 Operand,\r
2300 IN UINTN StartBit,\r
2301 IN UINTN EndBit,\r
2302 IN UINT8 Value\r
2303 );\r
2304\r
2305\r
2306/**\r
2307 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
2308 result.\r
2309\r
62991af2 2310 Performs a bitwise OR between the bit field specified by StartBit\r
ac644614 2311 and EndBit in Operand and the value specified by OrData. All other bits in\r
2312 Operand are preserved. The new 8-bit value is returned.\r
2313\r
2314 If 8-bit operations are not supported, then ASSERT().\r
2315 If StartBit is greater than 7, then ASSERT().\r
2316 If EndBit is greater than 7, then ASSERT().\r
2317 If EndBit is less than StartBit, then ASSERT().\r
2318\r
2319 @param Operand Operand on which to perform the bitfield operation.\r
2320 @param StartBit The ordinal of the least significant bit in the bit field.\r
2321 Range 0..7.\r
2322 @param EndBit The ordinal of the most significant bit in the bit field.\r
2323 Range 0..7.\r
2324 @param OrData The value to OR with the read value from the value\r
2325\r
2326 @return The new 8-bit value.\r
2327\r
2328**/\r
2329UINT8\r
2330EFIAPI\r
2331BitFieldOr8 (\r
2332 IN UINT8 Operand,\r
2333 IN UINTN StartBit,\r
2334 IN UINTN EndBit,\r
2335 IN UINT8 OrData\r
2336 );\r
2337\r
2338\r
2339/**\r
2340 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r
2341 the result.\r
2342\r
2343 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2344 in Operand and the value specified by AndData. All other bits in Operand are\r
2345 preserved. The new 8-bit value is returned.\r
2346\r
2347 If 8-bit operations are not supported, then ASSERT().\r
2348 If StartBit is greater than 7, then ASSERT().\r
2349 If EndBit is greater than 7, then ASSERT().\r
2350 If EndBit is less than StartBit, then ASSERT().\r
2351\r
2352 @param Operand Operand on which to perform the bitfield operation.\r
2353 @param StartBit The ordinal of the least significant bit in the bit field.\r
2354 Range 0..7.\r
2355 @param EndBit The ordinal of the most significant bit in the bit field.\r
2356 Range 0..7.\r
2357 @param AndData The value to AND with the read value from the value.\r
2358\r
2359 @return The new 8-bit value.\r
2360\r
2361**/\r
2362UINT8\r
2363EFIAPI\r
2364BitFieldAnd8 (\r
2365 IN UINT8 Operand,\r
2366 IN UINTN StartBit,\r
2367 IN UINTN EndBit,\r
2368 IN UINT8 AndData\r
2369 );\r
2370\r
2371\r
2372/**\r
2373 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r
2374 bitwise OR, and returns the result.\r
2375\r
2376 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
62991af2 2377 in Operand and the value specified by AndData, followed by a bitwise \r
2378 OR with value specified by OrData. All other bits in Operand are\r
ac644614 2379 preserved. The new 8-bit value is returned.\r
2380\r
2381 If 8-bit operations are not supported, then ASSERT().\r
2382 If StartBit is greater than 7, then ASSERT().\r
2383 If EndBit is greater than 7, then ASSERT().\r
2384 If EndBit is less than StartBit, then ASSERT().\r
2385\r
2386 @param Operand Operand on which to perform the bitfield operation.\r
2387 @param StartBit The ordinal of the least significant bit in the bit field.\r
2388 Range 0..7.\r
2389 @param EndBit The ordinal of the most significant bit in the bit field.\r
2390 Range 0..7.\r
2391 @param AndData The value to AND with the read value from the value.\r
2392 @param OrData The value to OR with the result of the AND operation.\r
2393\r
2394 @return The new 8-bit value.\r
2395\r
2396**/\r
2397UINT8\r
2398EFIAPI\r
2399BitFieldAndThenOr8 (\r
2400 IN UINT8 Operand,\r
2401 IN UINTN StartBit,\r
2402 IN UINTN EndBit,\r
2403 IN UINT8 AndData,\r
2404 IN UINT8 OrData\r
2405 );\r
2406\r
2407\r
2408/**\r
2409 Returns a bit field from a 16-bit value.\r
2410\r
2411 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2412\r
2413 If 16-bit operations are not supported, then ASSERT().\r
2414 If StartBit is greater than 15, then ASSERT().\r
2415 If EndBit is greater than 15, then ASSERT().\r
2416 If EndBit is less than StartBit, then ASSERT().\r
2417\r
2418 @param Operand Operand on which to perform the bitfield operation.\r
2419 @param StartBit The ordinal of the least significant bit in the bit field.\r
2420 Range 0..15.\r
2421 @param EndBit The ordinal of the most significant bit in the bit field.\r
2422 Range 0..15.\r
2423\r
2424 @return The bit field read.\r
2425\r
2426**/\r
2427UINT16\r
2428EFIAPI\r
2429BitFieldRead16 (\r
2430 IN UINT16 Operand,\r
2431 IN UINTN StartBit,\r
2432 IN UINTN EndBit\r
2433 );\r
2434\r
2435\r
2436/**\r
2437 Writes a bit field to a 16-bit value, and returns the result.\r
2438\r
2439 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2440 Operand. All other bits in Operand are preserved. The new 16-bit value is\r
2441 returned.\r
2442\r
2443 If 16-bit operations are not supported, then ASSERT().\r
2444 If StartBit is greater than 15, then ASSERT().\r
2445 If EndBit is greater than 15, then ASSERT().\r
2446 If EndBit is less than StartBit, then ASSERT().\r
2447\r
2448 @param Operand Operand on which to perform the bitfield operation.\r
2449 @param StartBit The ordinal of the least significant bit in the bit field.\r
2450 Range 0..15.\r
2451 @param EndBit The ordinal of the most significant bit in the bit field.\r
2452 Range 0..15.\r
2453 @param Value New value of the bit field.\r
2454\r
2455 @return The new 16-bit value.\r
2456\r
2457**/\r
2458UINT16\r
2459EFIAPI\r
2460BitFieldWrite16 (\r
2461 IN UINT16 Operand,\r
2462 IN UINTN StartBit,\r
2463 IN UINTN EndBit,\r
2464 IN UINT16 Value\r
2465 );\r
2466\r
2467\r
2468/**\r
2469 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
2470 result.\r
2471\r
62991af2 2472 Performs a bitwise OR between the bit field specified by StartBit\r
ac644614 2473 and EndBit in Operand and the value specified by OrData. All other bits in\r
2474 Operand are preserved. The new 16-bit value is returned.\r
2475\r
2476 If 16-bit operations are not supported, then ASSERT().\r
2477 If StartBit is greater than 15, then ASSERT().\r
2478 If EndBit is greater than 15, then ASSERT().\r
2479 If EndBit is less than StartBit, then ASSERT().\r
2480\r
2481 @param Operand Operand on which to perform the bitfield operation.\r
2482 @param StartBit The ordinal of the least significant bit in the bit field.\r
2483 Range 0..15.\r
2484 @param EndBit The ordinal of the most significant bit in the bit field.\r
2485 Range 0..15.\r
2486 @param OrData The value to OR with the read value from the value\r
2487\r
2488 @return The new 16-bit value.\r
2489\r
2490**/\r
2491UINT16\r
2492EFIAPI\r
2493BitFieldOr16 (\r
2494 IN UINT16 Operand,\r
2495 IN UINTN StartBit,\r
2496 IN UINTN EndBit,\r
2497 IN UINT16 OrData\r
2498 );\r
2499\r
2500\r
2501/**\r
2502 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r
2503 the result.\r
2504\r
2505 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2506 in Operand and the value specified by AndData. All other bits in Operand are\r
2507 preserved. The new 16-bit value is returned.\r
2508\r
2509 If 16-bit operations are not supported, then ASSERT().\r
2510 If StartBit is greater than 15, then ASSERT().\r
2511 If EndBit is greater than 15, then ASSERT().\r
2512 If EndBit is less than StartBit, then ASSERT().\r
2513\r
2514 @param Operand Operand on which to perform the bitfield operation.\r
2515 @param StartBit The ordinal of the least significant bit in the bit field.\r
2516 Range 0..15.\r
2517 @param EndBit The ordinal of the most significant bit in the bit field.\r
2518 Range 0..15.\r
2519 @param AndData The value to AND with the read value from the value\r
2520\r
2521 @return The new 16-bit value.\r
2522\r
2523**/\r
2524UINT16\r
2525EFIAPI\r
2526BitFieldAnd16 (\r
2527 IN UINT16 Operand,\r
2528 IN UINTN StartBit,\r
2529 IN UINTN EndBit,\r
2530 IN UINT16 AndData\r
2531 );\r
2532\r
2533\r
2534/**\r
2535 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r
2536 bitwise OR, and returns the result.\r
2537\r
2538 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
62991af2 2539 in Operand and the value specified by AndData, followed by a bitwise \r
2540 OR with value specified by OrData. All other bits in Operand are\r
ac644614 2541 preserved. The new 16-bit value is returned.\r
2542\r
2543 If 16-bit operations are not supported, then ASSERT().\r
2544 If StartBit is greater than 15, then ASSERT().\r
2545 If EndBit is greater than 15, then ASSERT().\r
2546 If EndBit is less than StartBit, then ASSERT().\r
2547\r
2548 @param Operand Operand on which to perform the bitfield operation.\r
2549 @param StartBit The ordinal of the least significant bit in the bit field.\r
2550 Range 0..15.\r
2551 @param EndBit The ordinal of the most significant bit in the bit field.\r
2552 Range 0..15.\r
2553 @param AndData The value to AND with the read value from the value.\r
2554 @param OrData The value to OR with the result of the AND operation.\r
2555\r
2556 @return The new 16-bit value.\r
2557\r
2558**/\r
2559UINT16\r
2560EFIAPI\r
2561BitFieldAndThenOr16 (\r
2562 IN UINT16 Operand,\r
2563 IN UINTN StartBit,\r
2564 IN UINTN EndBit,\r
2565 IN UINT16 AndData,\r
2566 IN UINT16 OrData\r
2567 );\r
2568\r
2569\r
2570/**\r
2571 Returns a bit field from a 32-bit value.\r
2572\r
2573 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2574\r
2575 If 32-bit operations are not supported, then ASSERT().\r
2576 If StartBit is greater than 31, then ASSERT().\r
2577 If EndBit is greater than 31, then ASSERT().\r
2578 If EndBit is less than StartBit, then ASSERT().\r
2579\r
2580 @param Operand Operand on which to perform the bitfield operation.\r
2581 @param StartBit The ordinal of the least significant bit in the bit field.\r
2582 Range 0..31.\r
2583 @param EndBit The ordinal of the most significant bit in the bit field.\r
2584 Range 0..31.\r
2585\r
2586 @return The bit field read.\r
2587\r
2588**/\r
2589UINT32\r
2590EFIAPI\r
2591BitFieldRead32 (\r
2592 IN UINT32 Operand,\r
2593 IN UINTN StartBit,\r
2594 IN UINTN EndBit\r
2595 );\r
2596\r
2597\r
2598/**\r
2599 Writes a bit field to a 32-bit value, and returns the result.\r
2600\r
2601 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2602 Operand. All other bits in Operand are preserved. The new 32-bit value is\r
2603 returned.\r
2604\r
2605 If 32-bit operations are not supported, then ASSERT().\r
2606 If StartBit is greater than 31, then ASSERT().\r
2607 If EndBit is greater than 31, then ASSERT().\r
2608 If EndBit is less than StartBit, then ASSERT().\r
2609\r
2610 @param Operand Operand on which to perform the bitfield operation.\r
2611 @param StartBit The ordinal of the least significant bit in the bit field.\r
2612 Range 0..31.\r
2613 @param EndBit The ordinal of the most significant bit in the bit field.\r
2614 Range 0..31.\r
2615 @param Value New value of the bit field.\r
2616\r
2617 @return The new 32-bit value.\r
2618\r
2619**/\r
2620UINT32\r
2621EFIAPI\r
2622BitFieldWrite32 (\r
2623 IN UINT32 Operand,\r
2624 IN UINTN StartBit,\r
2625 IN UINTN EndBit,\r
2626 IN UINT32 Value\r
2627 );\r
2628\r
2629\r
2630/**\r
2631 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
2632 result.\r
2633\r
62991af2 2634 Performs a bitwise OR between the bit field specified by StartBit\r
ac644614 2635 and EndBit in Operand and the value specified by OrData. All other bits in\r
2636 Operand are preserved. The new 32-bit value is returned.\r
2637\r
2638 If 32-bit operations are not supported, then ASSERT().\r
2639 If StartBit is greater than 31, then ASSERT().\r
2640 If EndBit is greater than 31, then ASSERT().\r
2641 If EndBit is less than StartBit, then ASSERT().\r
2642\r
2643 @param Operand Operand on which to perform the bitfield operation.\r
2644 @param StartBit The ordinal of the least significant bit in the bit field.\r
2645 Range 0..31.\r
2646 @param EndBit The ordinal of the most significant bit in the bit field.\r
2647 Range 0..31.\r
2648 @param OrData The value to OR with the read value from the value\r
2649\r
2650 @return The new 32-bit value.\r
2651\r
2652**/\r
2653UINT32\r
2654EFIAPI\r
2655BitFieldOr32 (\r
2656 IN UINT32 Operand,\r
2657 IN UINTN StartBit,\r
2658 IN UINTN EndBit,\r
2659 IN UINT32 OrData\r
2660 );\r
2661\r
2662\r
2663/**\r
2664 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r
2665 the result.\r
2666\r
2667 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2668 in Operand and the value specified by AndData. All other bits in Operand are\r
2669 preserved. The new 32-bit value is returned.\r
2670\r
2671 If 32-bit operations are not supported, then ASSERT().\r
2672 If StartBit is greater than 31, then ASSERT().\r
2673 If EndBit is greater than 31, then ASSERT().\r
2674 If EndBit is less than StartBit, then ASSERT().\r
2675\r
2676 @param Operand Operand on which to perform the bitfield operation.\r
2677 @param StartBit The ordinal of the least significant bit in the bit field.\r
2678 Range 0..31.\r
2679 @param EndBit The ordinal of the most significant bit in the bit field.\r
2680 Range 0..31.\r
2681 @param AndData The value to AND with the read value from the value\r
2682\r
2683 @return The new 32-bit value.\r
2684\r
2685**/\r
2686UINT32\r
2687EFIAPI\r
2688BitFieldAnd32 (\r
2689 IN UINT32 Operand,\r
2690 IN UINTN StartBit,\r
2691 IN UINTN EndBit,\r
2692 IN UINT32 AndData\r
2693 );\r
2694\r
2695\r
2696/**\r
2697 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r
2698 bitwise OR, and returns the result.\r
2699\r
2700 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
62991af2 2701 in Operand and the value specified by AndData, followed by a bitwise \r
2702 OR with value specified by OrData. All other bits in Operand are\r
ac644614 2703 preserved. The new 32-bit value is returned.\r
2704\r
2705 If 32-bit operations are not supported, then ASSERT().\r
2706 If StartBit is greater than 31, then ASSERT().\r
2707 If EndBit is greater than 31, then ASSERT().\r
2708 If EndBit is less than StartBit, then ASSERT().\r
2709\r
2710 @param Operand Operand on which to perform the bitfield operation.\r
2711 @param StartBit The ordinal of the least significant bit in the bit field.\r
2712 Range 0..31.\r
2713 @param EndBit The ordinal of the most significant bit in the bit field.\r
2714 Range 0..31.\r
2715 @param AndData The value to AND with the read value from the value.\r
2716 @param OrData The value to OR with the result of the AND operation.\r
2717\r
2718 @return The new 32-bit value.\r
2719\r
2720**/\r
2721UINT32\r
2722EFIAPI\r
2723BitFieldAndThenOr32 (\r
2724 IN UINT32 Operand,\r
2725 IN UINTN StartBit,\r
2726 IN UINTN EndBit,\r
2727 IN UINT32 AndData,\r
2728 IN UINT32 OrData\r
2729 );\r
2730\r
2731\r
2732/**\r
2733 Returns a bit field from a 64-bit value.\r
2734\r
2735 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2736\r
2737 If 64-bit operations are not supported, then ASSERT().\r
2738 If StartBit is greater than 63, then ASSERT().\r
2739 If EndBit is greater than 63, then ASSERT().\r
2740 If EndBit is less than StartBit, then ASSERT().\r
2741\r
2742 @param Operand Operand on which to perform the bitfield operation.\r
2743 @param StartBit The ordinal of the least significant bit in the bit field.\r
2744 Range 0..63.\r
2745 @param EndBit The ordinal of the most significant bit in the bit field.\r
2746 Range 0..63.\r
2747\r
2748 @return The bit field read.\r
2749\r
2750**/\r
2751UINT64\r
2752EFIAPI\r
2753BitFieldRead64 (\r
2754 IN UINT64 Operand,\r
2755 IN UINTN StartBit,\r
2756 IN UINTN EndBit\r
2757 );\r
2758\r
2759\r
2760/**\r
2761 Writes a bit field to a 64-bit value, and returns the result.\r
2762\r
2763 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2764 Operand. All other bits in Operand are preserved. The new 64-bit value is\r
2765 returned.\r
2766\r
2767 If 64-bit operations are not supported, then ASSERT().\r
2768 If StartBit is greater than 63, then ASSERT().\r
2769 If EndBit is greater than 63, then ASSERT().\r
2770 If EndBit is less than StartBit, then ASSERT().\r
2771\r
2772 @param Operand Operand on which to perform the bitfield operation.\r
2773 @param StartBit The ordinal of the least significant bit in the bit field.\r
2774 Range 0..63.\r
2775 @param EndBit The ordinal of the most significant bit in the bit field.\r
2776 Range 0..63.\r
2777 @param Value New value of the bit field.\r
2778\r
2779 @return The new 64-bit value.\r
2780\r
2781**/\r
2782UINT64\r
2783EFIAPI\r
2784BitFieldWrite64 (\r
2785 IN UINT64 Operand,\r
2786 IN UINTN StartBit,\r
2787 IN UINTN EndBit,\r
2788 IN UINT64 Value\r
2789 );\r
2790\r
2791\r
2792/**\r
2793 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
2794 result.\r
2795\r
62991af2 2796 Performs a bitwise OR between the bit field specified by StartBit\r
ac644614 2797 and EndBit in Operand and the value specified by OrData. All other bits in\r
2798 Operand are preserved. The new 64-bit value is returned.\r
2799\r
2800 If 64-bit operations are not supported, then ASSERT().\r
2801 If StartBit is greater than 63, then ASSERT().\r
2802 If EndBit is greater than 63, then ASSERT().\r
2803 If EndBit is less than StartBit, then ASSERT().\r
2804\r
2805 @param Operand Operand on which to perform the bitfield operation.\r
2806 @param StartBit The ordinal of the least significant bit in the bit field.\r
2807 Range 0..63.\r
2808 @param EndBit The ordinal of the most significant bit in the bit field.\r
2809 Range 0..63.\r
2810 @param OrData The value to OR with the read value from the value\r
2811\r
2812 @return The new 64-bit value.\r
2813\r
2814**/\r
2815UINT64\r
2816EFIAPI\r
2817BitFieldOr64 (\r
2818 IN UINT64 Operand,\r
2819 IN UINTN StartBit,\r
2820 IN UINTN EndBit,\r
2821 IN UINT64 OrData\r
2822 );\r
2823\r
2824\r
2825/**\r
2826 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r
2827 the result.\r
2828\r
2829 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2830 in Operand and the value specified by AndData. All other bits in Operand are\r
2831 preserved. The new 64-bit value is returned.\r
2832\r
2833 If 64-bit operations are not supported, then ASSERT().\r
2834 If StartBit is greater than 63, then ASSERT().\r
2835 If EndBit is greater than 63, then ASSERT().\r
2836 If EndBit is less than StartBit, then ASSERT().\r
2837\r
2838 @param Operand Operand on which to perform the bitfield operation.\r
2839 @param StartBit The ordinal of the least significant bit in the bit field.\r
2840 Range 0..63.\r
2841 @param EndBit The ordinal of the most significant bit in the bit field.\r
2842 Range 0..63.\r
2843 @param AndData The value to AND with the read value from the value\r
2844\r
2845 @return The new 64-bit value.\r
2846\r
2847**/\r
2848UINT64\r
2849EFIAPI\r
2850BitFieldAnd64 (\r
2851 IN UINT64 Operand,\r
2852 IN UINTN StartBit,\r
2853 IN UINTN EndBit,\r
2854 IN UINT64 AndData\r
2855 );\r
2856\r
2857\r
2858/**\r
2859 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r
2860 bitwise OR, and returns the result.\r
2861\r
2862 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
62991af2 2863 in Operand and the value specified by AndData, followed by a bitwise \r
2864 OR with value specified by OrData. All other bits in Operand are\r
ac644614 2865 preserved. The new 64-bit value is returned.\r
2866\r
2867 If 64-bit operations are not supported, then ASSERT().\r
2868 If StartBit is greater than 63, then ASSERT().\r
2869 If EndBit is greater than 63, then ASSERT().\r
2870 If EndBit is less than StartBit, then ASSERT().\r
2871\r
2872 @param Operand Operand on which to perform the bitfield operation.\r
2873 @param StartBit The ordinal of the least significant bit in the bit field.\r
2874 Range 0..63.\r
2875 @param EndBit The ordinal of the most significant bit in the bit field.\r
2876 Range 0..63.\r
2877 @param AndData The value to AND with the read value from the value.\r
2878 @param OrData The value to OR with the result of the AND operation.\r
2879\r
2880 @return The new 64-bit value.\r
2881\r
2882**/\r
2883UINT64\r
2884EFIAPI\r
2885BitFieldAndThenOr64 (\r
2886 IN UINT64 Operand,\r
2887 IN UINTN StartBit,\r
2888 IN UINTN EndBit,\r
2889 IN UINT64 AndData,\r
2890 IN UINT64 OrData\r
2891 );\r
2892\r
2893\r
2894//\r
2895// Base Library Synchronization Functions\r
2896//\r
2897\r
2898/**\r
2899 Retrieves the architecture specific spin lock alignment requirements for\r
2900 optimal spin lock performance.\r
2901\r
2902 This function retrieves the spin lock alignment requirements for optimal\r
2903 performance on a given CPU architecture. The spin lock alignment must be a\r
2904 power of two and is returned by this function. If there are no alignment\r
2905 requirements, then 1 must be returned. The spin lock synchronization\r
2906 functions must function correctly if the spin lock size and alignment values\r
2907 returned by this function are not used at all. These values are hints to the\r
2908 consumers of the spin lock synchronization functions to obtain optimal spin\r
2909 lock performance.\r
2910\r
2911 @return The architecture specific spin lock alignment.\r
2912\r
2913**/\r
2914UINTN\r
2915EFIAPI\r
2916GetSpinLockProperties (\r
2917 VOID\r
2918 );\r
2919\r
2920\r
2921/**\r
2922 Initializes a spin lock to the released state and returns the spin lock.\r
2923\r
2924 This function initializes the spin lock specified by SpinLock to the released\r
2925 state, and returns SpinLock. Optimal performance can be achieved by calling\r
2926 GetSpinLockProperties() to determine the size and alignment requirements for\r
2927 SpinLock.\r
2928\r
2929 If SpinLock is NULL, then ASSERT().\r
2930\r
2931 @param SpinLock A pointer to the spin lock to initialize to the released\r
2932 state.\r
2933\r
38bbd3d9 2934 @return SpinLock in release state.\r
ac644614 2935\r
2936**/\r
2937SPIN_LOCK *\r
2938EFIAPI\r
2939InitializeSpinLock (\r
282b7ec6 2940 OUT SPIN_LOCK *SpinLock\r
ac644614 2941 );\r
2942\r
2943\r
2944/**\r
2945 Waits until a spin lock can be placed in the acquired state.\r
2946\r
2947 This function checks the state of the spin lock specified by SpinLock. If\r
2948 SpinLock is in the released state, then this function places SpinLock in the\r
2949 acquired state and returns SpinLock. Otherwise, this function waits\r
2950 indefinitely for the spin lock to be released, and then places it in the\r
2951 acquired state and returns SpinLock. All state transitions of SpinLock must\r
2952 be performed using MP safe mechanisms.\r
2953\r
2954 If SpinLock is NULL, then ASSERT().\r
2955 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
2956 If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r
2957 PcdSpinLockTimeout microseconds, then ASSERT().\r
2958\r
2959 @param SpinLock A pointer to the spin lock to place in the acquired state.\r
2960\r
9aa049d9 2961 @return SpinLock acquired lock.\r
ac644614 2962\r
2963**/\r
2964SPIN_LOCK *\r
2965EFIAPI\r
2966AcquireSpinLock (\r
aa0583c7 2967 IN OUT SPIN_LOCK *SpinLock\r
ac644614 2968 );\r
2969\r
2970\r
2971/**\r
2972 Attempts to place a spin lock in the acquired state.\r
2973\r
2974 This function checks the state of the spin lock specified by SpinLock. If\r
2975 SpinLock is in the released state, then this function places SpinLock in the\r
2976 acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r
2977 transitions of SpinLock must be performed using MP safe mechanisms.\r
2978\r
2979 If SpinLock is NULL, then ASSERT().\r
2980 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
2981\r
2982 @param SpinLock A pointer to the spin lock to place in the acquired state.\r
2983\r
2984 @retval TRUE SpinLock was placed in the acquired state.\r
2985 @retval FALSE SpinLock could not be acquired.\r
2986\r
2987**/\r
2988BOOLEAN\r
2989EFIAPI\r
2990AcquireSpinLockOrFail (\r
aa0583c7 2991 IN OUT SPIN_LOCK *SpinLock\r
ac644614 2992 );\r
2993\r
2994\r
2995/**\r
2996 Releases a spin lock.\r
2997\r
2998 This function places the spin lock specified by SpinLock in the release state\r
2999 and returns SpinLock.\r
3000\r
3001 If SpinLock is NULL, then ASSERT().\r
3002 If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
3003\r
3004 @param SpinLock A pointer to the spin lock to release.\r
3005\r
38bbd3d9 3006 @return SpinLock released lock.\r
ac644614 3007\r
3008**/\r
3009SPIN_LOCK *\r
3010EFIAPI\r
3011ReleaseSpinLock (\r
aa0583c7 3012 IN OUT SPIN_LOCK *SpinLock\r
ac644614 3013 );\r
3014\r
3015\r
3016/**\r
3017 Performs an atomic increment of an 32-bit unsigned integer.\r
3018\r
3019 Performs an atomic increment of the 32-bit unsigned integer specified by\r
3020 Value and returns the incremented value. The increment operation must be\r
3021 performed using MP safe mechanisms. The state of the return value is not\r
3022 guaranteed to be MP safe.\r
3023\r
3024 If Value is NULL, then ASSERT().\r
3025\r
3026 @param Value A pointer to the 32-bit value to increment.\r
3027\r
3028 @return The incremented value.\r
3029\r
3030**/\r
3031UINT32\r
3032EFIAPI\r
3033InterlockedIncrement (\r
3034 IN UINT32 *Value\r
3035 );\r
3036\r
3037\r
3038/**\r
3039 Performs an atomic decrement of an 32-bit unsigned integer.\r
3040\r
3041 Performs an atomic decrement of the 32-bit unsigned integer specified by\r
3042 Value and returns the decremented value. The decrement operation must be\r
3043 performed using MP safe mechanisms. The state of the return value is not\r
3044 guaranteed to be MP safe.\r
3045\r
3046 If Value is NULL, then ASSERT().\r
3047\r
3048 @param Value A pointer to the 32-bit value to decrement.\r
3049\r
3050 @return The decremented value.\r
3051\r
3052**/\r
3053UINT32\r
3054EFIAPI\r
3055InterlockedDecrement (\r
3056 IN UINT32 *Value\r
3057 );\r
3058\r
3059\r
3060/**\r
3061 Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
3062\r
3063 Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
3064 specified by Value. If Value is equal to CompareValue, then Value is set to\r
3065 ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r
3066 then Value is returned. The compare exchange operation must be performed using\r
3067 MP safe mechanisms.\r
3068\r
3069 If Value is NULL, then ASSERT().\r
3070\r
3071 @param Value A pointer to the 32-bit value for the compare exchange\r
3072 operation.\r
3073 @param CompareValue 32-bit value used in compare operation.\r
3074 @param ExchangeValue 32-bit value used in exchange operation.\r
3075\r
3076 @return The original *Value before exchange.\r
3077\r
3078**/\r
3079UINT32\r
3080EFIAPI\r
3081InterlockedCompareExchange32 (\r
3082 IN OUT UINT32 *Value,\r
3083 IN UINT32 CompareValue,\r
3084 IN UINT32 ExchangeValue\r
3085 );\r
3086\r
3087\r
3088/**\r
3089 Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
3090\r
3091 Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r
3092 by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and\r
3093 CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.\r
3094 The compare exchange operation must be performed using MP safe mechanisms.\r
3095\r
3096 If Value is NULL, then ASSERT().\r
3097\r
3098 @param Value A pointer to the 64-bit value for the compare exchange\r
3099 operation.\r
3100 @param CompareValue 64-bit value used in compare operation.\r
3101 @param ExchangeValue 64-bit value used in exchange operation.\r
3102\r
3103 @return The original *Value before exchange.\r
3104\r
3105**/\r
3106UINT64\r
3107EFIAPI\r
3108InterlockedCompareExchange64 (\r
3109 IN OUT UINT64 *Value,\r
3110 IN UINT64 CompareValue,\r
3111 IN UINT64 ExchangeValue\r
3112 );\r
3113\r
3114\r
3115/**\r
3116 Performs an atomic compare exchange operation on a pointer value.\r
3117\r
3118 Performs an atomic compare exchange operation on the pointer value specified\r
3119 by Value. If Value is equal to CompareValue, then Value is set to\r
3120 ExchangeValue and CompareValue is returned. If Value is not equal to\r
3121 CompareValue, then Value is returned. The compare exchange operation must be\r
3122 performed using MP safe mechanisms.\r
3123\r
3124 If Value is NULL, then ASSERT().\r
3125\r
3126 @param Value A pointer to the pointer value for the compare exchange\r
3127 operation.\r
3128 @param CompareValue Pointer value used in compare operation.\r
3129 @param ExchangeValue Pointer value used in exchange operation.\r
3130\r
38bbd3d9 3131 @return The original *Value before exchange.\r
ac644614 3132**/\r
3133VOID *\r
3134EFIAPI\r
3135InterlockedCompareExchangePointer (\r
3136 IN OUT VOID **Value,\r
3137 IN VOID *CompareValue,\r
3138 IN VOID *ExchangeValue\r
3139 );\r
3140\r
3141\r
3142//\r
3143// Base Library Checksum Functions\r
3144//\r
3145\r
3146/**\r
17f695ed 3147 Returns the sum of all elements in a buffer in unit of UINT8.\r
ac644614 3148 During calculation, the carry bits are dropped.\r
3149\r
3150 This function calculates the sum of all elements in a buffer\r
3151 in unit of UINT8. The carry bits in result of addition are dropped.\r
3152 The result is returned as UINT8. If Length is Zero, then Zero is\r
3153 returned.\r
3154\r
3155 If Buffer is NULL, then ASSERT().\r
3156 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3157\r
1106ffe1 3158 @param Buffer Pointer to the buffer to carry out the sum operation.\r
17f695ed 3159 @param Length The size, in bytes, of Buffer.\r
ac644614 3160\r
3161 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3162\r
3163**/\r
3164UINT8\r
3165EFIAPI\r
3166CalculateSum8 (\r
ee6c452c 3167 IN CONST UINT8 *Buffer,\r
3168 IN UINTN Length\r
ac644614 3169 );\r
3170\r
3171\r
3172/**\r
3173 Returns the two's complement checksum of all elements in a buffer\r
3174 of 8-bit values.\r
3175\r
3176 This function first calculates the sum of the 8-bit values in the\r
3177 buffer specified by Buffer and Length. The carry bits in the result\r
3178 of addition are dropped. Then, the two's complement of the sum is\r
3179 returned. If Length is 0, then 0 is returned.\r
3180\r
3181 If Buffer is NULL, then ASSERT().\r
3182 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3183\r
1106ffe1 3184 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3185 @param Length The size, in bytes, of Buffer.\r
ac644614 3186\r
ee6c452c 3187 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3188\r
3189**/\r
3190UINT8\r
3191EFIAPI\r
3192CalculateCheckSum8 (\r
ee6c452c 3193 IN CONST UINT8 *Buffer,\r
3194 IN UINTN Length\r
ac644614 3195 );\r
3196\r
3197\r
3198/**\r
3199 Returns the sum of all elements in a buffer of 16-bit values. During\r
3200 calculation, the carry bits are dropped.\r
3201\r
3202 This function calculates the sum of the 16-bit values in the buffer\r
3203 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
3204 The 16-bit result is returned. If Length is 0, then 0 is returned.\r
3205\r
3206 If Buffer is NULL, then ASSERT().\r
3207 If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
3208 If Length is not aligned on a 16-bit boundary, then ASSERT().\r
3209 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3210\r
1106ffe1 3211 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3212 @param Length The size, in bytes, of Buffer.\r
ac644614 3213\r
3214 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3215\r
3216**/\r
3217UINT16\r
3218EFIAPI\r
3219CalculateSum16 (\r
ee6c452c 3220 IN CONST UINT16 *Buffer,\r
3221 IN UINTN Length\r
ac644614 3222 );\r
3223\r
3224\r
3225/**\r
3226 Returns the two's complement checksum of all elements in a buffer of\r
3227 16-bit values.\r
3228\r
3229 This function first calculates the sum of the 16-bit values in the buffer\r
3230 specified by Buffer and Length. The carry bits in the result of addition\r
3231 are dropped. Then, the two's complement of the sum is returned. If Length\r
3232 is 0, then 0 is returned.\r
3233\r
3234 If Buffer is NULL, then ASSERT().\r
3235 If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
3236 If Length is not aligned on a 16-bit boundary, then ASSERT().\r
3237 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3238\r
1106ffe1 3239 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3240 @param Length The size, in bytes, of Buffer.\r
ac644614 3241\r
ee6c452c 3242 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3243\r
3244**/\r
3245UINT16\r
3246EFIAPI\r
3247CalculateCheckSum16 (\r
ee6c452c 3248 IN CONST UINT16 *Buffer,\r
3249 IN UINTN Length\r
ac644614 3250 );\r
3251\r
3252\r
3253/**\r
17f695ed 3254 Returns the sum of all elements in a buffer of 32-bit values. During\r
ac644614 3255 calculation, the carry bits are dropped.\r
3256\r
3257 This function calculates the sum of the 32-bit values in the buffer\r
3258 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
17f695ed 3259 The 32-bit result is returned. If Length is 0, then 0 is returned.\r
ac644614 3260\r
3261 If Buffer is NULL, then ASSERT().\r
3262 If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
3263 If Length is not aligned on a 32-bit boundary, then ASSERT().\r
3264 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3265\r
1106ffe1 3266 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3267 @param Length The size, in bytes, of Buffer.\r
ac644614 3268\r
3269 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3270\r
3271**/\r
3272UINT32\r
3273EFIAPI\r
3274CalculateSum32 (\r
ee6c452c 3275 IN CONST UINT32 *Buffer,\r
3276 IN UINTN Length\r
ac644614 3277 );\r
3278\r
3279\r
3280/**\r
3281 Returns the two's complement checksum of all elements in a buffer of\r
3282 32-bit values.\r
3283\r
3284 This function first calculates the sum of the 32-bit values in the buffer\r
3285 specified by Buffer and Length. The carry bits in the result of addition\r
3286 are dropped. Then, the two's complement of the sum is returned. If Length\r
3287 is 0, then 0 is returned.\r
3288\r
3289 If Buffer is NULL, then ASSERT().\r
3290 If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
3291 If Length is not aligned on a 32-bit boundary, then ASSERT().\r
3292 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3293\r
1106ffe1 3294 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3295 @param Length The size, in bytes, of Buffer.\r
ac644614 3296\r
ee6c452c 3297 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3298\r
3299**/\r
3300UINT32\r
3301EFIAPI\r
3302CalculateCheckSum32 (\r
ee6c452c 3303 IN CONST UINT32 *Buffer,\r
3304 IN UINTN Length\r
ac644614 3305 );\r
3306\r
3307\r
3308/**\r
3309 Returns the sum of all elements in a buffer of 64-bit values. During\r
3310 calculation, the carry bits are dropped.\r
3311\r
3312 This function calculates the sum of the 64-bit values in the buffer\r
3313 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
3314 The 64-bit result is returned. If Length is 0, then 0 is returned.\r
3315\r
3316 If Buffer is NULL, then ASSERT().\r
3317 If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
3318 If Length is not aligned on a 64-bit boundary, then ASSERT().\r
3319 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3320\r
1106ffe1 3321 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3322 @param Length The size, in bytes, of Buffer.\r
ac644614 3323\r
3324 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3325\r
3326**/\r
3327UINT64\r
3328EFIAPI\r
3329CalculateSum64 (\r
ee6c452c 3330 IN CONST UINT64 *Buffer,\r
3331 IN UINTN Length\r
ac644614 3332 );\r
3333\r
3334\r
3335/**\r
3336 Returns the two's complement checksum of all elements in a buffer of\r
3337 64-bit values.\r
3338\r
3339 This function first calculates the sum of the 64-bit values in the buffer\r
3340 specified by Buffer and Length. The carry bits in the result of addition\r
3341 are dropped. Then, the two's complement of the sum is returned. If Length\r
3342 is 0, then 0 is returned.\r
3343\r
3344 If Buffer is NULL, then ASSERT().\r
3345 If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
3346 If Length is not aligned on a 64-bit boundary, then ASSERT().\r
3347 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3348\r
1106ffe1 3349 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3350 @param Length The size, in bytes, of Buffer.\r
ac644614 3351\r
ee6c452c 3352 @return Checksum The 2's complement checksum of Buffer.\r
ac644614 3353\r
3354**/\r
3355UINT64\r
3356EFIAPI\r
3357CalculateCheckSum64 (\r
ee6c452c 3358 IN CONST UINT64 *Buffer,\r
3359 IN UINTN Length\r
ac644614 3360 );\r
3361\r
3362\r
d75f9fc2 3363//\r
3364// Base Library CPU Functions\r
3365//\r
3366\r
3367/**\r
3368 Function entry point used when a stack switch is requested with SwitchStack()\r
3369\r
3370 @param Context1 Context1 parameter passed into SwitchStack().\r
3371 @param Context2 Context2 parameter passed into SwitchStack().\r
3372\r
3373**/\r
ac644614 3374typedef\r
3375VOID\r
9810cdd8 3376(EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r
ac644614 3377 IN VOID *Context1, OPTIONAL\r
3378 IN VOID *Context2 OPTIONAL\r
3379 );\r
3380\r
3381\r
3382/**\r
3383 Used to serialize load and store operations.\r
3384\r
3385 All loads and stores that proceed calls to this function are guaranteed to be\r
3386 globally visible when this function returns.\r
3387\r
3388**/\r
3389VOID\r
3390EFIAPI\r
3391MemoryFence (\r
3392 VOID\r
3393 );\r
3394\r
3395\r
3396/**\r
3397 Saves the current CPU context that can be restored with a call to LongJump()\r
3398 and returns 0.\r
3399\r
3400 Saves the current CPU context in the buffer specified by JumpBuffer and\r
3401 returns 0. The initial call to SetJump() must always return 0. Subsequent\r
3402 calls to LongJump() cause a non-zero value to be returned by SetJump().\r
3403\r
3404 If JumpBuffer is NULL, then ASSERT().\r
3405 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
17f695ed 3406 \r
3407 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r
3408 The same structure must never be used for more than one CPU architecture context.\r
3409 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r
3410 SetJump()/LongJump() is not currently supported for the EBC processor type. \r
ac644614 3411\r
3412 @param JumpBuffer A pointer to CPU context buffer.\r
3413\r
3414 @retval 0 Indicates a return from SetJump().\r
3415\r
3416**/\r
3417UINTN\r
3418EFIAPI\r
3419SetJump (\r
3420 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r
3421 );\r
3422\r
3423\r
3424/**\r
3425 Restores the CPU context that was saved with SetJump().\r
3426\r
3427 Restores the CPU context from the buffer specified by JumpBuffer. This\r
3428 function never returns to the caller. Instead is resumes execution based on\r
3429 the state of JumpBuffer.\r
3430\r
3431 If JumpBuffer is NULL, then ASSERT().\r
3432 For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
3433 If Value is 0, then ASSERT().\r
3434\r
3435 @param JumpBuffer A pointer to CPU context buffer.\r
3436 @param Value The value to return when the SetJump() context is\r
3437 restored and must be non-zero.\r
3438\r
3439**/\r
3440VOID\r
3441EFIAPI\r
3442LongJump (\r
3443 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r
3444 IN UINTN Value\r
3445 );\r
3446\r
3447\r
3448/**\r
3449 Enables CPU interrupts.\r
3450\r
ac644614 3451**/\r
3452VOID\r
3453EFIAPI\r
3454EnableInterrupts (\r
3455 VOID\r
3456 );\r
3457\r
3458\r
3459/**\r
3460 Disables CPU interrupts.\r
3461\r
ac644614 3462**/\r
3463VOID\r
3464EFIAPI\r
3465DisableInterrupts (\r
3466 VOID\r
3467 );\r
3468\r
3469\r
3470/**\r
3471 Disables CPU interrupts and returns the interrupt state prior to the disable\r
3472 operation.\r
3473\r
ac644614 3474 @retval TRUE CPU interrupts were enabled on entry to this call.\r
3475 @retval FALSE CPU interrupts were disabled on entry to this call.\r
3476\r
3477**/\r
3478BOOLEAN\r
3479EFIAPI\r
3480SaveAndDisableInterrupts (\r
3481 VOID\r
3482 );\r
3483\r
3484\r
3485/**\r
3486 Enables CPU interrupts for the smallest window required to capture any\r
3487 pending interrupts.\r
3488\r
ac644614 3489**/\r
3490VOID\r
3491EFIAPI\r
3492EnableDisableInterrupts (\r
3493 VOID\r
3494 );\r
3495\r
3496\r
3497/**\r
3498 Retrieves the current CPU interrupt state.\r
3499\r
38bbd3d9 3500 Returns TRUE is interrupts are currently enabled. Otherwise\r
3501 returns FALSE.\r
ac644614 3502\r
3503 @retval TRUE CPU interrupts are enabled.\r
3504 @retval FALSE CPU interrupts are disabled.\r
3505\r
3506**/\r
3507BOOLEAN\r
3508EFIAPI\r
3509GetInterruptState (\r
3510 VOID\r
3511 );\r
3512\r
3513\r
3514/**\r
3515 Set the current CPU interrupt state.\r
3516\r
3517 Sets the current CPU interrupt state to the state specified by\r
3518 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r
3519 InterruptState is FALSE, then interrupts are disabled. InterruptState is\r
3520 returned.\r
3521\r
3522 @param InterruptState TRUE if interrupts should enabled. FALSE if\r
3523 interrupts should be disabled.\r
3524\r
3525 @return InterruptState\r
3526\r
3527**/\r
3528BOOLEAN\r
3529EFIAPI\r
3530SetInterruptState (\r
3531 IN BOOLEAN InterruptState\r
3532 );\r
3533\r
3534\r
3535/**\r
3536 Requests CPU to pause for a short period of time.\r
3537\r
3538 Requests CPU to pause for a short period of time. Typically used in MP\r
3539 systems to prevent memory starvation while waiting for a spin lock.\r
3540\r
3541**/\r
3542VOID\r
3543EFIAPI\r
3544CpuPause (\r
3545 VOID\r
3546 );\r
3547\r
3548\r
3549/**\r
3550 Transfers control to a function starting with a new stack.\r
3551\r
3552 Transfers control to the function specified by EntryPoint using the\r
3553 new stack specified by NewStack and passing in the parameters specified\r
3554 by Context1 and Context2. Context1 and Context2 are optional and may\r
3555 be NULL. The function EntryPoint must never return. This function\r
3556 supports a variable number of arguments following the NewStack parameter.\r
3557 These additional arguments are ignored on IA-32, x64, and EBC.\r
3558 IPF CPUs expect one additional parameter of type VOID * that specifies\r
3559 the new backing store pointer.\r
3560\r
3561 If EntryPoint is NULL, then ASSERT().\r
3562 If NewStack is NULL, then ASSERT().\r
3563\r
3564 @param EntryPoint A pointer to function to call with the new stack.\r
3565 @param Context1 A pointer to the context to pass into the EntryPoint\r
3566 function.\r
3567 @param Context2 A pointer to the context to pass into the EntryPoint\r
3568 function.\r
3569 @param NewStack A pointer to the new stack to use for the EntryPoint\r
3570 function.\r
285010e7 3571 @param ... This variable argument list is ignored for IA32, x64, and EBC. \r
3572 For IPF, this variable argument list is expected to contain \r
3573 a single parameter of type VOID * that specifies the new backing \r
3574 store pointer.\r
42eedea9 3575\r
ac644614 3576\r
3577**/\r
3578VOID\r
3579EFIAPI\r
3580SwitchStack (\r
3581 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
3582 IN VOID *Context1, OPTIONAL\r
3583 IN VOID *Context2, OPTIONAL\r
3584 IN VOID *NewStack,\r
3585 ...\r
3586 );\r
3587\r
3588\r
3589/**\r
3590 Generates a breakpoint on the CPU.\r
3591\r
3592 Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
3593 that code can resume normal execution after the breakpoint.\r
3594\r
3595**/\r
3596VOID\r
3597EFIAPI\r
3598CpuBreakpoint (\r
3599 VOID\r
3600 );\r
3601\r
3602\r
3603/**\r
3604 Executes an infinite loop.\r
3605\r
3606 Forces the CPU to execute an infinite loop. A debugger may be used to skip\r
3607 past the loop and the code that follows the loop must execute properly. This\r
3608 implies that the infinite loop must not cause the code that follow it to be\r
3609 optimized away.\r
3610\r
3611**/\r
3612VOID\r
3613EFIAPI\r
3614CpuDeadLoop (\r
3615 VOID\r
3616 );\r
2fe241a2 3617 \r
ac644614 3618#if defined (MDE_CPU_IPF)\r
3619\r
3620/**\r
3621 Flush a range of cache lines in the cache coherency domain of the calling\r
3622 CPU.\r
3623\r
cc39b88b 3624 Flushes the cache lines specified by Address and Length. If Address is not aligned \r
3625 on a cache line boundary, then entire cache line containing Address is flushed. \r
3626 If Address + Length is not aligned on a cache line boundary, then the entire cache \r
3627 line containing Address + Length - 1 is flushed. This function may choose to flush \r
3628 the entire cache if that is more efficient than flushing the specified range. If \r
3629 Length is 0, the no cache lines are flushed. Address is returned. \r
3630 This function is only available on IPF.\r
ac644614 3631\r
3632 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
3633\r
3634 @param Address The base address of the instruction lines to invalidate. If\r
3635 the CPU is in a physical addressing mode, then Address is a\r
3636 physical address. If the CPU is in a virtual addressing mode,\r
3637 then Address is a virtual address.\r
3638\r
3639 @param Length The number of bytes to invalidate from the instruction cache.\r
3640\r
cc39b88b 3641 @return Address.\r
ac644614 3642\r
3643**/\r
3644VOID *\r
3645EFIAPI\r
cc39b88b 3646AsmFlushCacheRange (\r
ac644614 3647 IN VOID *Address,\r
3648 IN UINTN Length\r
3649 );\r
3650\r
3651\r
3652/**\r
3653 Executes a FC instruction\r
3654 Executes a FC instruction on the cache line specified by Address.\r
3655 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
3656 An implementation may flush a larger region. This function is only available on IPF.\r
3657\r
ee6c452c 3658 @param Address The Address of cache line to be flushed.\r
ac644614 3659\r
3660 @return The address of FC instruction executed.\r
3661\r
3662**/\r
3663UINT64\r
3664EFIAPI\r
3665AsmFc (\r
3666 IN UINT64 Address\r
3667 );\r
3668\r
3669\r
3670/**\r
3671 Executes a FC.I instruction.\r
3672 Executes a FC.I instruction on the cache line specified by Address.\r
3673 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
3674 An implementation may flush a larger region. This function is only available on IPF.\r
3675\r
ee6c452c 3676 @param Address The Address of cache line to be flushed.\r
ac644614 3677\r
3678 @return The address of FC.I instruction executed.\r
3679\r
3680**/\r
3681UINT64\r
3682EFIAPI\r
3683AsmFci (\r
3684 IN UINT64 Address\r
3685 );\r
3686\r
3687\r
3688/**\r
3689 Reads the current value of a Processor Identifier Register (CPUID).\r
17f695ed 3690 \r
3691 Reads and returns the current value of Processor Identifier Register specified by Index. \r
ac644614 3692 The Index of largest implemented CPUID (One less than the number of implemented CPUID\r
3693 registers) is determined by CPUID [3] bits {7:0}.\r
3694 No parameter checking is performed on Index. If the Index value is beyond the\r
3695 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r
3696 must either guarantee that Index is valid, or the caller must set up fault handlers to\r
3697 catch the faults. This function is only available on IPF.\r
3698\r
ee6c452c 3699 @param Index The 8-bit Processor Identifier Register index to read.\r
ac644614 3700\r
3701 @return The current value of Processor Identifier Register specified by Index.\r
3702\r
3703**/\r
3704UINT64\r
3705EFIAPI\r
3706AsmReadCpuid (\r
3707 IN UINT8 Index\r
3708 );\r
3709\r
3710\r
3711/**\r
3712 Reads the current value of 64-bit Processor Status Register (PSR).\r
3713 This function is only available on IPF.\r
3714\r
3715 @return The current value of PSR.\r
3716\r
3717**/\r
3718UINT64\r
3719EFIAPI\r
3720AsmReadPsr (\r
3721 VOID\r
3722 );\r
3723\r
3724\r
3725/**\r
3726 Writes the current value of 64-bit Processor Status Register (PSR).\r
22388319 3727\r
ac644614 3728 No parameter checking is performed on Value. All bits of Value corresponding to\r
22388319 3729 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r
3730 The caller must either guarantee that Value is valid, or the caller must set up\r
3731 fault handlers to catch the faults. This function is only available on IPF.\r
ac644614 3732\r
ee6c452c 3733 @param Value The 64-bit value to write to PSR.\r
ac644614 3734\r
3735 @return The 64-bit value written to the PSR.\r
3736\r
3737**/\r
3738UINT64\r
3739EFIAPI\r
3740AsmWritePsr (\r
3741 IN UINT64 Value\r
3742 );\r
3743\r
3744\r
3745/**\r
3746 Reads the current value of 64-bit Kernel Register #0 (KR0).\r
2fe241a2 3747 \r
3748 Reads and returns the current value of KR0. \r
ac644614 3749 This function is only available on IPF.\r
3750\r
3751 @return The current value of KR0.\r
3752\r
3753**/\r
3754UINT64\r
3755EFIAPI\r
3756AsmReadKr0 (\r
3757 VOID\r
3758 );\r
3759\r
3760\r
3761/**\r
3762 Reads the current value of 64-bit Kernel Register #1 (KR1).\r
2fe241a2 3763\r
3764 Reads and returns the current value of KR1. \r
ac644614 3765 This function is only available on IPF.\r
3766\r
3767 @return The current value of KR1.\r
3768\r
3769**/\r
3770UINT64\r
3771EFIAPI\r
3772AsmReadKr1 (\r
3773 VOID\r
3774 );\r
3775\r
3776\r
3777/**\r
3778 Reads the current value of 64-bit Kernel Register #2 (KR2).\r
2fe241a2 3779\r
3780 Reads and returns the current value of KR2. \r
ac644614 3781 This function is only available on IPF.\r
3782\r
3783 @return The current value of KR2.\r
3784\r
3785**/\r
3786UINT64\r
3787EFIAPI\r
3788AsmReadKr2 (\r
3789 VOID\r
3790 );\r
3791\r
3792\r
3793/**\r
3794 Reads the current value of 64-bit Kernel Register #3 (KR3).\r
2fe241a2 3795\r
3796 Reads and returns the current value of KR3. \r
ac644614 3797 This function is only available on IPF.\r
3798\r
3799 @return The current value of KR3.\r
3800\r
3801**/\r
3802UINT64\r
3803EFIAPI\r
3804AsmReadKr3 (\r
3805 VOID\r
3806 );\r
3807\r
3808\r
3809/**\r
3810 Reads the current value of 64-bit Kernel Register #4 (KR4).\r
ac644614 3811\r
2fe241a2 3812 Reads and returns the current value of KR4. \r
3813 This function is only available on IPF.\r
3814 \r
ac644614 3815 @return The current value of KR4.\r
3816\r
3817**/\r
3818UINT64\r
3819EFIAPI\r
3820AsmReadKr4 (\r
3821 VOID\r
3822 );\r
3823\r
3824\r
3825/**\r
3826 Reads the current value of 64-bit Kernel Register #5 (KR5).\r
2fe241a2 3827\r
3828 Reads and returns the current value of KR5. \r
ac644614 3829 This function is only available on IPF.\r
3830\r
3831 @return The current value of KR5.\r
3832\r
3833**/\r
3834UINT64\r
3835EFIAPI\r
3836AsmReadKr5 (\r
3837 VOID\r
3838 );\r
3839\r
3840\r
3841/**\r
3842 Reads the current value of 64-bit Kernel Register #6 (KR6).\r
2fe241a2 3843\r
3844 Reads and returns the current value of KR6. \r
ac644614 3845 This function is only available on IPF.\r
3846\r
3847 @return The current value of KR6.\r
3848\r
3849**/\r
3850UINT64\r
3851EFIAPI\r
3852AsmReadKr6 (\r
3853 VOID\r
3854 );\r
3855\r
3856\r
3857/**\r
3858 Reads the current value of 64-bit Kernel Register #7 (KR7).\r
2fe241a2 3859\r
3860 Reads and returns the current value of KR7. \r
ac644614 3861 This function is only available on IPF.\r
3862\r
3863 @return The current value of KR7.\r
3864\r
3865**/\r
3866UINT64\r
3867EFIAPI\r
3868AsmReadKr7 (\r
3869 VOID\r
3870 );\r
3871\r
3872\r
3873/**\r
3874 Write the current value of 64-bit Kernel Register #0 (KR0).\r
2fe241a2 3875 \r
3876 Writes the current value of KR0. The 64-bit value written to \r
3877 the KR0 is returned. This function is only available on IPF.\r
ac644614 3878\r
ee6c452c 3879 @param Value The 64-bit value to write to KR0.\r
ac644614 3880\r
3881 @return The 64-bit value written to the KR0.\r
3882\r
3883**/\r
3884UINT64\r
3885EFIAPI\r
3886AsmWriteKr0 (\r
3887 IN UINT64 Value\r
3888 );\r
3889\r
3890\r
3891/**\r
3892 Write the current value of 64-bit Kernel Register #1 (KR1).\r
2fe241a2 3893\r
3894 Writes the current value of KR1. The 64-bit value written to \r
3895 the KR1 is returned. This function is only available on IPF.\r
ac644614 3896\r
ee6c452c 3897 @param Value The 64-bit value to write to KR1.\r
ac644614 3898\r
3899 @return The 64-bit value written to the KR1.\r
3900\r
3901**/\r
3902UINT64\r
3903EFIAPI\r
3904AsmWriteKr1 (\r
3905 IN UINT64 Value\r
3906 );\r
3907\r
3908\r
3909/**\r
3910 Write the current value of 64-bit Kernel Register #2 (KR2).\r
2fe241a2 3911\r
3912 Writes the current value of KR2. The 64-bit value written to \r
3913 the KR2 is returned. This function is only available on IPF.\r
ac644614 3914\r
ee6c452c 3915 @param Value The 64-bit value to write to KR2.\r
ac644614 3916\r
3917 @return The 64-bit value written to the KR2.\r
3918\r
3919**/\r
3920UINT64\r
3921EFIAPI\r
3922AsmWriteKr2 (\r
3923 IN UINT64 Value\r
3924 );\r
3925\r
3926\r
3927/**\r
3928 Write the current value of 64-bit Kernel Register #3 (KR3).\r
2fe241a2 3929\r
3930 Writes the current value of KR3. The 64-bit value written to \r
3931 the KR3 is returned. This function is only available on IPF.\r
ac644614 3932\r
ee6c452c 3933 @param Value The 64-bit value to write to KR3.\r
ac644614 3934\r
3935 @return The 64-bit value written to the KR3.\r
3936\r
3937**/\r
3938UINT64\r
3939EFIAPI\r
3940AsmWriteKr3 (\r
3941 IN UINT64 Value\r
3942 );\r
3943\r
3944\r
3945/**\r
3946 Write the current value of 64-bit Kernel Register #4 (KR4).\r
2fe241a2 3947\r
3948 Writes the current value of KR4. The 64-bit value written to \r
3949 the KR4 is returned. This function is only available on IPF.\r
ac644614 3950\r
ee6c452c 3951 @param Value The 64-bit value to write to KR4.\r
ac644614 3952\r
3953 @return The 64-bit value written to the KR4.\r
3954\r
3955**/\r
3956UINT64\r
3957EFIAPI\r
3958AsmWriteKr4 (\r
3959 IN UINT64 Value\r
3960 );\r
3961\r
3962\r
3963/**\r
3964 Write the current value of 64-bit Kernel Register #5 (KR5).\r
2fe241a2 3965\r
3966 Writes the current value of KR5. The 64-bit value written to \r
3967 the KR5 is returned. This function is only available on IPF.\r
ac644614 3968\r
ee6c452c 3969 @param Value The 64-bit value to write to KR5.\r
ac644614 3970\r
3971 @return The 64-bit value written to the KR5.\r
3972\r
3973**/\r
3974UINT64\r
3975EFIAPI\r
3976AsmWriteKr5 (\r
3977 IN UINT64 Value\r
3978 );\r
3979\r
3980\r
3981/**\r
3982 Write the current value of 64-bit Kernel Register #6 (KR6).\r
2fe241a2 3983\r
3984 Writes the current value of KR6. The 64-bit value written to \r
3985 the KR6 is returned. This function is only available on IPF.\r
ac644614 3986\r
ee6c452c 3987 @param Value The 64-bit value to write to KR6.\r
ac644614 3988\r
3989 @return The 64-bit value written to the KR6.\r
3990\r
3991**/\r
3992UINT64\r
3993EFIAPI\r
3994AsmWriteKr6 (\r
3995 IN UINT64 Value\r
3996 );\r
3997\r
3998\r
3999/**\r
4000 Write the current value of 64-bit Kernel Register #7 (KR7).\r
2fe241a2 4001\r
4002 Writes the current value of KR7. The 64-bit value written to \r
4003 the KR7 is returned. This function is only available on IPF.\r
ac644614 4004\r
ee6c452c 4005 @param Value The 64-bit value to write to KR7.\r
ac644614 4006\r
4007 @return The 64-bit value written to the KR7.\r
4008\r
4009**/\r
4010UINT64\r
4011EFIAPI\r
4012AsmWriteKr7 (\r
4013 IN UINT64 Value\r
4014 );\r
4015\r
4016\r
4017/**\r
4018 Reads the current value of Interval Timer Counter Register (ITC).\r
2fe241a2 4019 \r
4020 Reads and returns the current value of ITC.\r
ac644614 4021 This function is only available on IPF.\r
4022\r
4023 @return The current value of ITC.\r
4024\r
4025**/\r
4026UINT64\r
4027EFIAPI\r
4028AsmReadItc (\r
4029 VOID\r
4030 );\r
4031\r
4032\r
4033/**\r
4034 Reads the current value of Interval Timer Vector Register (ITV).\r
2fe241a2 4035 \r
4036 Reads and returns the current value of ITV. \r
ac644614 4037 This function is only available on IPF.\r
4038\r
4039 @return The current value of ITV.\r
4040\r
4041**/\r
4042UINT64\r
4043EFIAPI\r
4044AsmReadItv (\r
4045 VOID\r
4046 );\r
4047\r
4048\r
4049/**\r
4050 Reads the current value of Interval Timer Match Register (ITM).\r
2fe241a2 4051 \r
4052 Reads and returns the current value of ITM.\r
ac644614 4053 This function is only available on IPF.\r
4054\r
4055 @return The current value of ITM.\r
4056**/\r
4057UINT64\r
4058EFIAPI\r
4059AsmReadItm (\r
4060 VOID\r
4061 );\r
4062\r
4063\r
4064/**\r
4065 Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r
2fe241a2 4066 \r
4067 Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r
ac644614 4068 This function is only available on IPF.\r
4069\r
ee6c452c 4070 @param Value The 64-bit value to write to ITC.\r
ac644614 4071\r
4072 @return The 64-bit value written to the ITC.\r
4073\r
4074**/\r
4075UINT64\r
4076EFIAPI\r
4077AsmWriteItc (\r
4078 IN UINT64 Value\r
4079 );\r
4080\r
4081\r
4082/**\r
4083 Writes the current value of 64-bit Interval Timer Match Register (ITM).\r
2fe241a2 4084 \r
4085 Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r
ac644614 4086 This function is only available on IPF.\r
4087\r
ee6c452c 4088 @param Value The 64-bit value to write to ITM.\r
ac644614 4089\r
4090 @return The 64-bit value written to the ITM.\r
4091\r
4092**/\r
4093UINT64\r
4094EFIAPI\r
4095AsmWriteItm (\r
4096 IN UINT64 Value\r
4097 );\r
4098\r
4099\r
4100/**\r
4101 Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r
2fe241a2 4102 \r
4103 Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r
ac644614 4104 No parameter checking is performed on Value. All bits of Value corresponding to\r
4105 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r
4106 The caller must either guarantee that Value is valid, or the caller must set up\r
4107 fault handlers to catch the faults.\r
4108 This function is only available on IPF.\r
4109\r
ee6c452c 4110 @param Value The 64-bit value to write to ITV.\r
ac644614 4111\r
4112 @return The 64-bit value written to the ITV.\r
4113\r
4114**/\r
4115UINT64\r
4116EFIAPI\r
4117AsmWriteItv (\r
4118 IN UINT64 Value\r
4119 );\r
4120\r
4121\r
4122/**\r
4123 Reads the current value of Default Control Register (DCR).\r
2fe241a2 4124 \r
4125 Reads and returns the current value of DCR. This function is only available on IPF.\r
ac644614 4126\r
4127 @return The current value of DCR.\r
4128\r
4129**/\r
4130UINT64\r
4131EFIAPI\r
4132AsmReadDcr (\r
4133 VOID\r
4134 );\r
4135\r
4136\r
4137/**\r
4138 Reads the current value of Interruption Vector Address Register (IVA).\r
2fe241a2 4139 \r
4140 Reads and returns the current value of IVA. This function is only available on IPF.\r
ac644614 4141\r
4142 @return The current value of IVA.\r
4143**/\r
4144UINT64\r
4145EFIAPI\r
4146AsmReadIva (\r
4147 VOID\r
4148 );\r
4149\r
4150\r
4151/**\r
4152 Reads the current value of Page Table Address Register (PTA).\r
2fe241a2 4153 \r
4154 Reads and returns the current value of PTA. This function is only available on IPF.\r
ac644614 4155\r
4156 @return The current value of PTA.\r
4157\r
4158**/\r
4159UINT64\r
4160EFIAPI\r
4161AsmReadPta (\r
4162 VOID\r
4163 );\r
4164\r
4165\r
4166/**\r
4167 Writes the current value of 64-bit Default Control Register (DCR).\r
2fe241a2 4168 \r
4169 Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r
ac644614 4170 No parameter checking is performed on Value. All bits of Value corresponding to\r
4171 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
4172 The caller must either guarantee that Value is valid, or the caller must set up\r
4173 fault handlers to catch the faults.\r
4174 This function is only available on IPF.\r
4175\r
ee6c452c 4176 @param Value The 64-bit value to write to DCR.\r
ac644614 4177\r
4178 @return The 64-bit value written to the DCR.\r
4179\r
4180**/\r
4181UINT64\r
4182EFIAPI\r
4183AsmWriteDcr (\r
4184 IN UINT64 Value\r
4185 );\r
4186\r
4187\r
4188/**\r
4189 Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r
2fe241a2 4190 \r
4191 Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r
ac644614 4192 The size of vector table is 32 K bytes and is 32 K bytes aligned\r
4193 the low 15 bits of Value is ignored when written.\r
4194 This function is only available on IPF.\r
4195\r
ee6c452c 4196 @param Value The 64-bit value to write to IVA.\r
ac644614 4197\r
4198 @return The 64-bit value written to the IVA.\r
4199\r
4200**/\r
4201UINT64\r
4202EFIAPI\r
4203AsmWriteIva (\r
4204 IN UINT64 Value\r
4205 );\r
4206\r
4207\r
4208/**\r
4209 Writes the current value of 64-bit Page Table Address Register (PTA).\r
2fe241a2 4210 \r
4211 Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r
ac644614 4212 No parameter checking is performed on Value. All bits of Value corresponding to\r
4213 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
4214 The caller must either guarantee that Value is valid, or the caller must set up\r
4215 fault handlers to catch the faults.\r
4216 This function is only available on IPF.\r
4217\r
ee6c452c 4218 @param Value The 64-bit value to write to PTA.\r
ac644614 4219\r
4220 @return The 64-bit value written to the PTA.\r
4221**/\r
4222UINT64\r
4223EFIAPI\r
4224AsmWritePta (\r
4225 IN UINT64 Value\r
4226 );\r
4227\r
4228\r
4229/**\r
4230 Reads the current value of Local Interrupt ID Register (LID).\r
2fe241a2 4231 \r
4232 Reads and returns the current value of LID. This function is only available on IPF.\r
ac644614 4233\r
4234 @return The current value of LID.\r
4235\r
4236**/\r
4237UINT64\r
4238EFIAPI\r
4239AsmReadLid (\r
4240 VOID\r
4241 );\r
4242\r
4243\r
4244/**\r
4245 Reads the current value of External Interrupt Vector Register (IVR).\r
2fe241a2 4246 \r
4247 Reads and returns the current value of IVR. This function is only available on IPF. \r
ac644614 4248\r
4249 @return The current value of IVR.\r
4250\r
4251**/\r
4252UINT64\r
4253EFIAPI\r
4254AsmReadIvr (\r
4255 VOID\r
4256 );\r
4257\r
4258\r
4259/**\r
4260 Reads the current value of Task Priority Register (TPR).\r
2fe241a2 4261 \r
4262 Reads and returns the current value of TPR. This function is only available on IPF. \r
ac644614 4263\r
4264 @return The current value of TPR.\r
4265\r
4266**/\r
4267UINT64\r
4268EFIAPI\r
4269AsmReadTpr (\r
4270 VOID\r
4271 );\r
4272\r
4273\r
4274/**\r
4275 Reads the current value of External Interrupt Request Register #0 (IRR0).\r
2fe241a2 4276 \r
4277 Reads and returns the current value of IRR0. This function is only available on IPF. \r
ac644614 4278\r
4279 @return The current value of IRR0.\r
4280\r
4281**/\r
4282UINT64\r
4283EFIAPI\r
4284AsmReadIrr0 (\r
4285 VOID\r
4286 );\r
4287\r
4288\r
4289/**\r
4290 Reads the current value of External Interrupt Request Register #1 (IRR1).\r
2fe241a2 4291 \r
4292 Reads and returns the current value of IRR1. This function is only available on IPF. \r
ac644614 4293\r
4294 @return The current value of IRR1.\r
4295\r
4296**/\r
4297UINT64\r
4298EFIAPI\r
4299AsmReadIrr1 (\r
4300 VOID\r
4301 );\r
4302\r
4303\r
4304/**\r
4305 Reads the current value of External Interrupt Request Register #2 (IRR2).\r
2fe241a2 4306 \r
4307 Reads and returns the current value of IRR2. This function is only available on IPF.\r
ac644614 4308\r
4309 @return The current value of IRR2.\r
4310\r
4311**/\r
4312UINT64\r
4313EFIAPI\r
4314AsmReadIrr2 (\r
4315 VOID\r
4316 );\r
4317\r
4318\r
4319/**\r
4320 Reads the current value of External Interrupt Request Register #3 (IRR3).\r
2fe241a2 4321 \r
4322 Reads and returns the current value of IRR3. This function is only available on IPF. \r
ac644614 4323\r
4324 @return The current value of IRR3.\r
4325\r
4326**/\r
4327UINT64\r
4328EFIAPI\r
4329AsmReadIrr3 (\r
4330 VOID\r
4331 );\r
4332\r
4333\r
4334/**\r
4335 Reads the current value of Performance Monitor Vector Register (PMV).\r
2fe241a2 4336 \r
4337 Reads and returns the current value of PMV. This function is only available on IPF. \r
ac644614 4338\r
4339 @return The current value of PMV.\r
4340\r
4341**/\r
4342UINT64\r
4343EFIAPI\r
4344AsmReadPmv (\r
4345 VOID\r
4346 );\r
4347\r
4348\r
4349/**\r
4350 Reads the current value of Corrected Machine Check Vector Register (CMCV).\r
2fe241a2 4351 \r
4352 Reads and returns the current value of CMCV. This function is only available on IPF.\r
ac644614 4353\r
4354 @return The current value of CMCV.\r
4355\r
4356**/\r
4357UINT64\r
4358EFIAPI\r
4359AsmReadCmcv (\r
4360 VOID\r
4361 );\r
4362\r
4363\r
4364/**\r
4365 Reads the current value of Local Redirection Register #0 (LRR0).\r
2fe241a2 4366 \r
4367 Reads and returns the current value of LRR0. This function is only available on IPF. \r
ac644614 4368\r
4369 @return The current value of LRR0.\r
4370\r
4371**/\r
4372UINT64\r
4373EFIAPI\r
4374AsmReadLrr0 (\r
4375 VOID\r
4376 );\r
4377\r
4378\r
4379/**\r
4380 Reads the current value of Local Redirection Register #1 (LRR1).\r
2fe241a2 4381 \r
4382 Reads and returns the current value of LRR1. This function is only available on IPF.\r
ac644614 4383\r
4384 @return The current value of LRR1.\r
4385\r
4386**/\r
4387UINT64\r
4388EFIAPI\r
4389AsmReadLrr1 (\r
4390 VOID\r
4391 );\r
4392\r
4393\r
4394/**\r
4395 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r
2fe241a2 4396 \r
4397 Writes the current value of LID. The 64-bit value written to the LID is returned. \r
ac644614 4398 No parameter checking is performed on Value. All bits of Value corresponding to\r
4399 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r
4400 The caller must either guarantee that Value is valid, or the caller must set up\r
4401 fault handlers to catch the faults.\r
4402 This function is only available on IPF.\r
4403\r
ee6c452c 4404 @param Value The 64-bit value to write to LID.\r
ac644614 4405\r
4406 @return The 64-bit value written to the LID.\r
4407\r
4408**/\r
4409UINT64\r
4410EFIAPI\r
4411AsmWriteLid (\r
4412 IN UINT64 Value\r
4413 );\r
4414\r
4415\r
4416/**\r
4417 Writes the current value of 64-bit Task Priority Register (TPR).\r
2fe241a2 4418 \r
4419 Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r
ac644614 4420 No parameter checking is performed on Value. All bits of Value corresponding to\r
4421 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r
4422 The caller must either guarantee that Value is valid, or the caller must set up\r
4423 fault handlers to catch the faults.\r
4424 This function is only available on IPF.\r
4425\r
ee6c452c 4426 @param Value The 64-bit value to write to TPR.\r
ac644614 4427\r
4428 @return The 64-bit value written to the TPR.\r
4429\r
4430**/\r
4431UINT64\r
4432EFIAPI\r
4433AsmWriteTpr (\r
4434 IN UINT64 Value\r
4435 );\r
4436\r
4437\r
4438/**\r
4439 Performs a write operation on End OF External Interrupt Register (EOI).\r
2fe241a2 4440 \r
ac644614 4441 Writes a value of 0 to the EOI Register. This function is only available on IPF.\r
4442\r
4443**/\r
4444VOID\r
4445EFIAPI\r
4446AsmWriteEoi (\r
4447 VOID\r
4448 );\r
4449\r
4450\r
4451/**\r
4452 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r
2fe241a2 4453 \r
4454 Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r
ac644614 4455 No parameter checking is performed on Value. All bits of Value corresponding\r
4456 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r
4457 The caller must either guarantee that Value is valid, or the caller must set up\r
4458 fault handlers to catch the faults.\r
4459 This function is only available on IPF.\r
4460\r
ee6c452c 4461 @param Value The 64-bit value to write to PMV.\r
ac644614 4462\r
4463 @return The 64-bit value written to the PMV.\r
4464\r
4465**/\r
4466UINT64\r
4467EFIAPI\r
4468AsmWritePmv (\r
4469 IN UINT64 Value\r
4470 );\r
4471\r
4472\r
4473/**\r
4474 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r
2fe241a2 4475 \r
4476 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r
ac644614 4477 No parameter checking is performed on Value. All bits of Value corresponding\r
4478 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r
4479 The caller must either guarantee that Value is valid, or the caller must set up\r
4480 fault handlers to catch the faults.\r
4481 This function is only available on IPF.\r
4482\r
ee6c452c 4483 @param Value The 64-bit value to write to CMCV.\r
ac644614 4484\r
4485 @return The 64-bit value written to the CMCV.\r
4486\r
4487**/\r
4488UINT64\r
4489EFIAPI\r
4490AsmWriteCmcv (\r
4491 IN UINT64 Value\r
4492 );\r
4493\r
4494\r
4495/**\r
4496 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r
2fe241a2 4497 \r
4498 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r
ac644614 4499 No parameter checking is performed on Value. All bits of Value corresponding\r
4500 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r
4501 The caller must either guarantee that Value is valid, or the caller must set up\r
4502 fault handlers to catch the faults.\r
4503 This function is only available on IPF.\r
4504\r
ee6c452c 4505 @param Value The 64-bit value to write to LRR0.\r
ac644614 4506\r
4507 @return The 64-bit value written to the LRR0.\r
4508\r
4509**/\r
4510UINT64\r
4511EFIAPI\r
4512AsmWriteLrr0 (\r
4513 IN UINT64 Value\r
4514 );\r
4515\r
4516\r
4517/**\r
4518 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r
2fe241a2 4519 \r
4520 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r
ac644614 4521 No parameter checking is performed on Value. All bits of Value corresponding\r
4522 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r
4523 The caller must either guarantee that Value is valid, or the caller must\r
4524 set up fault handlers to catch the faults.\r
4525 This function is only available on IPF.\r
4526\r
ee6c452c 4527 @param Value The 64-bit value to write to LRR1.\r
ac644614 4528\r
4529 @return The 64-bit value written to the LRR1.\r
4530\r
4531**/\r
4532UINT64\r
4533EFIAPI\r
4534AsmWriteLrr1 (\r
4535 IN UINT64 Value\r
4536 );\r
4537\r
4538\r
4539/**\r
4540 Reads the current value of Instruction Breakpoint Register (IBR).\r
4541 \r
4542 The Instruction Breakpoint Registers are used in pairs. The even numbered\r
4543 registers contain breakpoint addresses, and the odd numbered registers contain\r
4544 breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r
4545 on all processor models. Implemented registers are contiguous starting with\r
4546 register 0. No parameter checking is performed on Index, and if the Index value\r
4547 is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
4548 occur. The caller must either guarantee that Index is valid, or the caller must\r
4549 set up fault handlers to catch the faults.\r
4550 This function is only available on IPF.\r
4551\r
ee6c452c 4552 @param Index The 8-bit Instruction Breakpoint Register index to read.\r
ac644614 4553\r
4554 @return The current value of Instruction Breakpoint Register specified by Index.\r
4555\r
4556**/\r
4557UINT64\r
4558EFIAPI\r
4559AsmReadIbr (\r
4560 IN UINT8 Index\r
4561 );\r
4562\r
4563\r
4564/**\r
4565 Reads the current value of Data Breakpoint Register (DBR).\r
4566\r
4567 The Data Breakpoint Registers are used in pairs. The even numbered registers\r
4568 contain breakpoint addresses, and odd numbered registers contain breakpoint\r
4569 mask conditions. At least 4 data registers pairs are implemented on all processor\r
4570 models. Implemented registers are contiguous starting with register 0.\r
4571 No parameter checking is performed on Index. If the Index value is beyond\r
4572 the implemented DBR register range, a Reserved Register/Field fault may occur.\r
4573 The caller must either guarantee that Index is valid, or the caller must set up\r
4574 fault handlers to catch the faults.\r
4575 This function is only available on IPF.\r
4576\r
ee6c452c 4577 @param Index The 8-bit Data Breakpoint Register index to read.\r
ac644614 4578\r
4579 @return The current value of Data Breakpoint Register specified by Index.\r
4580\r
4581**/\r
4582UINT64\r
4583EFIAPI\r
4584AsmReadDbr (\r
4585 IN UINT8 Index\r
4586 );\r
4587\r
4588\r
4589/**\r
4590 Reads the current value of Performance Monitor Configuration Register (PMC).\r
4591\r
4592 All processor implementations provide at least 4 performance counters\r
4593 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
4594 status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
4595 additional implementation-dependent PMC and PMD to increase the number of\r
4596 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
4597 register set is implementation dependent. No parameter checking is performed\r
4598 on Index. If the Index value is beyond the implemented PMC register range,\r
4599 zero value will be returned.\r
4600 This function is only available on IPF.\r
4601\r
ee6c452c 4602 @param Index The 8-bit Performance Monitor Configuration Register index to read.\r
ac644614 4603\r
2fe241a2 4604 @return The current value of Performance Monitor Configuration Register\r
4605 specified by Index.\r
ac644614 4606\r
4607**/\r
4608UINT64\r
4609EFIAPI\r
4610AsmReadPmc (\r
4611 IN UINT8 Index\r
4612 );\r
4613\r
4614\r
4615/**\r
4616 Reads the current value of Performance Monitor Data Register (PMD).\r
4617\r
4618 All processor implementations provide at least 4 performance counters\r
4619 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r
4620 overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r
4621 provide additional implementation-dependent PMC and PMD to increase the number\r
4622 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
4623 register set is implementation dependent. No parameter checking is performed\r
4624 on Index. If the Index value is beyond the implemented PMD register range,\r
4625 zero value will be returned.\r
4626 This function is only available on IPF.\r
4627\r
ee6c452c 4628 @param Index The 8-bit Performance Monitor Data Register index to read.\r
ac644614 4629\r
4630 @return The current value of Performance Monitor Data Register specified by Index.\r
4631\r
4632**/\r
4633UINT64\r
4634EFIAPI\r
4635AsmReadPmd (\r
4636 IN UINT8 Index\r
4637 );\r
4638\r
4639\r
4640/**\r
4641 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r
4642\r
4643 Writes current value of Instruction Breakpoint Register specified by Index.\r
4644 The Instruction Breakpoint Registers are used in pairs. The even numbered\r
4645 registers contain breakpoint addresses, and odd numbered registers contain\r
4646 breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r
4647 on all processor models. Implemented registers are contiguous starting with\r
4648 register 0. No parameter checking is performed on Index. If the Index value\r
4649 is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
4650 occur. The caller must either guarantee that Index is valid, or the caller must\r
4651 set up fault handlers to catch the faults.\r
4652 This function is only available on IPF.\r
4653\r
ee6c452c 4654 @param Index The 8-bit Instruction Breakpoint Register index to write.\r
4655 @param Value The 64-bit value to write to IBR.\r
ac644614 4656\r
4657 @return The 64-bit value written to the IBR.\r
4658\r
4659**/\r
4660UINT64\r
4661EFIAPI\r
4662AsmWriteIbr (\r
4663 IN UINT8 Index,\r
4664 IN UINT64 Value\r
4665 );\r
4666\r
4667\r
4668/**\r
4669 Writes the current value of 64-bit Data Breakpoint Register (DBR).\r
4670\r
4671 Writes current value of Data Breakpoint Register specified by Index.\r
4672 The Data Breakpoint Registers are used in pairs. The even numbered registers\r
4673 contain breakpoint addresses, and odd numbered registers contain breakpoint\r
4674 mask conditions. At least 4 data registers pairs are implemented on all processor\r
4675 models. Implemented registers are contiguous starting with register 0. No parameter\r
4676 checking is performed on Index. If the Index value is beyond the implemented\r
4677 DBR register range, a Reserved Register/Field fault may occur. The caller must\r
4678 either guarantee that Index is valid, or the caller must set up fault handlers to\r
4679 catch the faults.\r
4680 This function is only available on IPF.\r
4681\r
ee6c452c 4682 @param Index The 8-bit Data Breakpoint Register index to write.\r
4683 @param Value The 64-bit value to write to DBR.\r
ac644614 4684\r
4685 @return The 64-bit value written to the DBR.\r
4686\r
4687**/\r
4688UINT64\r
4689EFIAPI\r
4690AsmWriteDbr (\r
4691 IN UINT8 Index,\r
4692 IN UINT64 Value\r
4693 );\r
4694\r
4695\r
4696/**\r
4697 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r
4698\r
4699 Writes current value of Performance Monitor Configuration Register specified by Index.\r
4700 All processor implementations provide at least 4 performance counters\r
4701 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status\r
4702 registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r
4703 implementation-dependent PMC and PMD to increase the number of 'generic' performance\r
4704 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r
4705 dependent. No parameter checking is performed on Index. If the Index value is\r
4706 beyond the implemented PMC register range, the write is ignored.\r
4707 This function is only available on IPF.\r
4708\r
ee6c452c 4709 @param Index The 8-bit Performance Monitor Configuration Register index to write.\r
4710 @param Value The 64-bit value to write to PMC.\r
ac644614 4711\r
4712 @return The 64-bit value written to the PMC.\r
4713\r
4714**/\r
4715UINT64\r
4716EFIAPI\r
4717AsmWritePmc (\r
4718 IN UINT8 Index,\r
4719 IN UINT64 Value\r
4720 );\r
4721\r
4722\r
4723/**\r
4724 Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r
4725\r
4726 Writes current value of Performance Monitor Data Register specified by Index.\r
4727 All processor implementations provide at least 4 performance counters\r
4728 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
4729 status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
4730 additional implementation-dependent PMC and PMD to increase the number of 'generic'\r
4731 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r
4732 is implementation dependent. No parameter checking is performed on Index. If the\r
4733 Index value is beyond the implemented PMD register range, the write is ignored.\r
4734 This function is only available on IPF.\r
4735\r
ee6c452c 4736 @param Index The 8-bit Performance Monitor Data Register index to write.\r
4737 @param Value The 64-bit value to write to PMD.\r
ac644614 4738\r
4739 @return The 64-bit value written to the PMD.\r
4740\r
4741**/\r
4742UINT64\r
4743EFIAPI\r
4744AsmWritePmd (\r
4745 IN UINT8 Index,\r
4746 IN UINT64 Value\r
4747 );\r
4748\r
4749\r
4750/**\r
4751 Reads the current value of 64-bit Global Pointer (GP).\r
4752\r
4753 Reads and returns the current value of GP.\r
4754 This function is only available on IPF.\r
4755\r
4756 @return The current value of GP.\r
4757\r
4758**/\r
4759UINT64\r
4760EFIAPI\r
4761AsmReadGp (\r
4762 VOID\r
4763 );\r
4764\r
4765\r
4766/**\r
4767 Write the current value of 64-bit Global Pointer (GP).\r
4768\r
4769 Writes the current value of GP. The 64-bit value written to the GP is returned.\r
4770 No parameter checking is performed on Value.\r
4771 This function is only available on IPF.\r
4772\r
4773 @param Value The 64-bit value to write to GP.\r
4774\r
4775 @return The 64-bit value written to the GP.\r
4776\r
4777**/\r
4778UINT64\r
4779EFIAPI\r
4780AsmWriteGp (\r
4781 IN UINT64 Value\r
4782 );\r
4783\r
4784\r
4785/**\r
4786 Reads the current value of 64-bit Stack Pointer (SP).\r
4787\r
4788 Reads and returns the current value of SP.\r
4789 This function is only available on IPF.\r
4790\r
4791 @return The current value of SP.\r
4792\r
4793**/\r
4794UINT64\r
4795EFIAPI\r
4796AsmReadSp (\r
4797 VOID\r
4798 );\r
4799\r
4800\r
aad6137d 4801///\r
4802/// Valid Index value for AsmReadControlRegister()\r
4803///\r
4804#define IPF_CONTROL_REGISTER_DCR 0\r
4805#define IPF_CONTROL_REGISTER_ITM 1\r
4806#define IPF_CONTROL_REGISTER_IVA 2\r
4807#define IPF_CONTROL_REGISTER_PTA 8\r
4808#define IPF_CONTROL_REGISTER_IPSR 16\r
4809#define IPF_CONTROL_REGISTER_ISR 17\r
4810#define IPF_CONTROL_REGISTER_IIP 19\r
4811#define IPF_CONTROL_REGISTER_IFA 20\r
4812#define IPF_CONTROL_REGISTER_ITIR 21\r
4813#define IPF_CONTROL_REGISTER_IIPA 22\r
4814#define IPF_CONTROL_REGISTER_IFS 23\r
4815#define IPF_CONTROL_REGISTER_IIM 24\r
4816#define IPF_CONTROL_REGISTER_IHA 25\r
4817#define IPF_CONTROL_REGISTER_LID 64\r
4818#define IPF_CONTROL_REGISTER_IVR 65\r
4819#define IPF_CONTROL_REGISTER_TPR 66\r
4820#define IPF_CONTROL_REGISTER_EOI 67\r
4821#define IPF_CONTROL_REGISTER_IRR0 68\r
4822#define IPF_CONTROL_REGISTER_IRR1 69\r
4823#define IPF_CONTROL_REGISTER_IRR2 70\r
4824#define IPF_CONTROL_REGISTER_IRR3 71\r
4825#define IPF_CONTROL_REGISTER_ITV 72\r
4826#define IPF_CONTROL_REGISTER_PMV 73\r
4827#define IPF_CONTROL_REGISTER_CMCV 74\r
4828#define IPF_CONTROL_REGISTER_LRR0 80\r
4829#define IPF_CONTROL_REGISTER_LRR1 81\r
4830\r
4831/**\r
4832 Reads a 64-bit control register.\r
4833\r
4834 Reads and returns the control register specified by Index. The valid Index valued are defined\r
4835 above in "Related Definitions".\r
4836 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.\r
4837\r
4838 @param Index The index of the control register to read.\r
4839\r
4840 @return The control register specified by Index.\r
4841\r
4842**/\r
4843UINT64\r
4844EFIAPI\r
4845AsmReadControlRegister (\r
4846 IN UINT64 Index\r
4847 );\r
4848\r
4849\r
4850///\r
4851/// Valid Index value for AsmReadApplicationRegister()\r
4852///\r
4853#define IPF_APPLICATION_REGISTER_K0 0\r
4854#define IPF_APPLICATION_REGISTER_K1 1\r
4855#define IPF_APPLICATION_REGISTER_K2 2\r
4856#define IPF_APPLICATION_REGISTER_K3 3\r
4857#define IPF_APPLICATION_REGISTER_K4 4\r
4858#define IPF_APPLICATION_REGISTER_K5 5\r
4859#define IPF_APPLICATION_REGISTER_K6 6\r
4860#define IPF_APPLICATION_REGISTER_K7 7\r
4861#define IPF_APPLICATION_REGISTER_RSC 16\r
4862#define IPF_APPLICATION_REGISTER_BSP 17\r
4863#define IPF_APPLICATION_REGISTER_BSPSTORE 18\r
4864#define IPF_APPLICATION_REGISTER_RNAT 19\r
4865#define IPF_APPLICATION_REGISTER_FCR 21\r
4866#define IPF_APPLICATION_REGISTER_EFLAG 24\r
4867#define IPF_APPLICATION_REGISTER_CSD 25\r
4868#define IPF_APPLICATION_REGISTER_SSD 26\r
4869#define IPF_APPLICATION_REGISTER_CFLG 27\r
4870#define IPF_APPLICATION_REGISTER_FSR 28\r
4871#define IPF_APPLICATION_REGISTER_FIR 29\r
4872#define IPF_APPLICATION_REGISTER_FDR 30\r
4873#define IPF_APPLICATION_REGISTER_CCV 32\r
4874#define IPF_APPLICATION_REGISTER_UNAT 36\r
4875#define IPF_APPLICATION_REGISTER_FPSR 40\r
4876#define IPF_APPLICATION_REGISTER_ITC 44\r
4877#define IPF_APPLICATION_REGISTER_PFS 64\r
4878#define IPF_APPLICATION_REGISTER_LC 65\r
4879#define IPF_APPLICATION_REGISTER_EC 66\r
4880\r
4881/**\r
4882 Reads a 64-bit application register.\r
4883\r
4884 Reads and returns the application register specified by Index. The valid Index valued are defined\r
4885 above in "Related Definitions".\r
4886 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on IPF.\r
4887\r
4888 @param Index The index of the application register to read.\r
4889\r
4890 @return The application register specified by Index.\r
4891\r
4892**/\r
4893UINT64\r
4894EFIAPI\r
4895AsmReadApplicationRegister (\r
4896 IN UINT64 Index\r
4897 );\r
4898\r
4899\r
ac644614 4900/**\r
4901 Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r
4902\r
4903 Determines the current execution mode of the CPU.\r
4904 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r
4905 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r
4906 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r
4907 and -1 is returned.\r
4908 This function is only available on IPF.\r
4909\r
17f695ed 4910 @retval 1 The CPU is in virtual mode.\r
4911 @retval 0 The CPU is in physical mode.\r
4912 @retval -1 The CPU is in mixed mode.\r
ac644614 4913\r
4914**/\r
4915INT64\r
4916EFIAPI\r
4917AsmCpuVirtual (\r
4918 VOID\r
4919 );\r
4920\r
4921\r
4922/**\r
4923 Makes a PAL procedure call.\r
4924\r
4925 This is a wrapper function to make a PAL procedure call. Based on the Index\r
4926 value this API will make static or stacked PAL call. The following table\r
4927 describes the usage of PAL Procedure Index Assignment. Architected procedures\r
4928 may be designated as required or optional. If a PAL procedure is specified\r
4929 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r
4930 Status field of the PAL_CALL_RETURN structure.\r
4931 This indicates that the procedure is not present in this PAL implementation.\r
4932 It is the caller's responsibility to check for this return code after calling\r
4933 any optional PAL procedure.\r
4934 No parameter checking is performed on the 5 input parameters, but there are\r
4935 some common rules that the caller should follow when making a PAL call. Any\r
4936 address passed to PAL as buffers for return parameters must be 8-byte aligned.\r
4937 Unaligned addresses may cause undefined results. For those parameters defined\r
4938 as reserved or some fields defined as reserved must be zero filled or the invalid\r
4939 argument return value may be returned or undefined result may occur during the\r
4940 execution of the procedure. If the PalEntryPoint does not point to a valid\r
4941 PAL entry point then the system behavior is undefined. This function is only\r
4942 available on IPF.\r
4943\r
ee6c452c 4944 @param PalEntryPoint The PAL procedure calls entry point.\r
4945 @param Index The PAL procedure Index number.\r
4946 @param Arg2 The 2nd parameter for PAL procedure calls.\r
4947 @param Arg3 The 3rd parameter for PAL procedure calls.\r
4948 @param Arg4 The 4th parameter for PAL procedure calls.\r
ac644614 4949\r
4950 @return structure returned from the PAL Call procedure, including the status and return value.\r
4951\r
4952**/\r
4953PAL_CALL_RETURN\r
4954EFIAPI\r
4955AsmPalCall (\r
4956 IN UINT64 PalEntryPoint,\r
4957 IN UINT64 Index,\r
4958 IN UINT64 Arg2,\r
4959 IN UINT64 Arg3,\r
4960 IN UINT64 Arg4\r
4961 );\r
fd163050 4962#endif\r
ac644614 4963\r
fd163050 4964#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
1106ffe1 4965///\r
030cd1a2 4966/// IA32 and x64 Specific Functions\r
1106ffe1 4967/// Byte packed structure for 16-bit Real Mode EFLAGS\r
4968///\r
ac644614 4969typedef union {\r
4970 struct {\r
2a53dabf
LG
4971 UINT32 CF:1; ///< Carry Flag\r
4972 UINT32 Reserved_0:1; ///< Reserved\r
4973 UINT32 PF:1; ///< Parity Flag\r
4974 UINT32 Reserved_1:1; ///< Reserved\r
4975 UINT32 AF:1; ///< Auxiliary Carry Flag\r
4976 UINT32 Reserved_2:1; ///< Reserved\r
4977 UINT32 ZF:1; ///< Zero Flag\r
4978 UINT32 SF:1; ///< Sign Flag\r
4979 UINT32 TF:1; ///< Trap Flag\r
4980 UINT32 IF:1; ///< Interrupt Enable Flag\r
4981 UINT32 DF:1; ///< Direction Flag\r
4982 UINT32 OF:1; ///< Overflow Flag\r
4983 UINT32 IOPL:2; ///< I/O Privilege Level\r
4984 UINT32 NT:1; ///< Nested Task\r
4985 UINT32 Reserved_3:1; ///< Reserved\r
ac644614 4986 } Bits;\r
4987 UINT16 Uint16;\r
4988} IA32_FLAGS16;\r
4989\r
1106ffe1 4990///\r
4991/// Byte packed structure for EFLAGS/RFLAGS\r
4992/// 32-bits on IA-32\r
030cd1a2 4993/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
1106ffe1 4994///\r
ac644614 4995typedef union {\r
4996 struct {\r
2a53dabf
LG
4997 UINT32 CF:1; ///< Carry Flag\r
4998 UINT32 Reserved_0:1; ///< Reserved\r
4999 UINT32 PF:1; ///< Parity Flag\r
5000 UINT32 Reserved_1:1; ///< Reserved\r
5001 UINT32 AF:1; ///< Auxiliary Carry Flag\r
5002 UINT32 Reserved_2:1; ///< Reserved\r
5003 UINT32 ZF:1; ///< Zero Flag\r
5004 UINT32 SF:1; ///< Sign Flag\r
5005 UINT32 TF:1; ///< Trap Flag\r
5006 UINT32 IF:1; ///< Interrupt Enable Flag\r
5007 UINT32 DF:1; ///< Direction Flag\r
5008 UINT32 OF:1; ///< Overflow Flag\r
5009 UINT32 IOPL:2; ///< I/O Privilege Level\r
5010 UINT32 NT:1; ///< Nested Task\r
5011 UINT32 Reserved_3:1; ///< Reserved\r
5012 UINT32 RF:1; ///< Resume Flag\r
5013 UINT32 VM:1; ///< Virtual 8086 Mode\r
5014 UINT32 AC:1; ///< Alignment Check\r
5015 UINT32 VIF:1; ///< Virtual Interrupt Flag\r
5016 UINT32 VIP:1; ///< Virtual Interrupt Pending\r
5017 UINT32 ID:1; ///< ID Flag\r
5018 UINT32 Reserved_4:10; ///< Reserved\r
ac644614 5019 } Bits;\r
5020 UINTN UintN;\r
5021} IA32_EFLAGS32;\r
5022\r
1106ffe1 5023///\r
5024/// Byte packed structure for Control Register 0 (CR0)\r
5025/// 32-bits on IA-32\r
030cd1a2 5026/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
1106ffe1 5027///\r
ac644614 5028typedef union {\r
5029 struct {\r
2a53dabf
LG
5030 UINT32 PE:1; ///< Protection Enable\r
5031 UINT32 MP:1; ///< Monitor Coprocessor\r
5032 UINT32 EM:1; ///< Emulation\r
5033 UINT32 TS:1; ///< Task Switched\r
5034 UINT32 ET:1; ///< Extension Type\r
5035 UINT32 NE:1; ///< Numeric Error\r
5036 UINT32 Reserved_0:10; ///< Reserved\r
5037 UINT32 WP:1; ///< Write Protect\r
5038 UINT32 Reserved_1:1; ///< Reserved\r
5039 UINT32 AM:1; ///< Alignment Mask\r
5040 UINT32 Reserved_2:10; ///< Reserved\r
5041 UINT32 NW:1; ///< Mot Write-through\r
5042 UINT32 CD:1; ///< Cache Disable\r
5043 UINT32 PG:1; ///< Paging\r
ac644614 5044 } Bits;\r
5045 UINTN UintN;\r
5046} IA32_CR0;\r
5047\r
1106ffe1 5048///\r
5049/// Byte packed structure for Control Register 4 (CR4)\r
5050/// 32-bits on IA-32\r
030cd1a2 5051/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
1106ffe1 5052///\r
ac644614 5053typedef union {\r
5054 struct {\r
2a53dabf
LG
5055 UINT32 VME:1; ///< Virtual-8086 Mode Extensions\r
5056 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts\r
5057 UINT32 TSD:1; ///< Time Stamp Disable\r
5058 UINT32 DE:1; ///< Debugging Extensions\r
5059 UINT32 PSE:1; ///< Page Size Extensions\r
5060 UINT32 PAE:1; ///< Physical Address Extension\r
5061 UINT32 MCE:1; ///< Machine Check Enable\r
5062 UINT32 PGE:1; ///< Page Global Enable\r
5063 UINT32 PCE:1; ///< Performance Monitoring Counter\r
5064 ///< Enable\r
5065 UINT32 OSFXSR:1; ///< Operating System Support for\r
5066 ///< FXSAVE and FXRSTOR instructions\r
5067 UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r
5068 ///< Unmasked SIMD Floating Point\r
5069 ///< Exceptions\r
5070 UINT32 Reserved_0:2; ///< Reserved\r
5071 UINT32 VMXE:1; ///< VMX Enable\r
5072 UINT32 Reserved_1:18; ///< Reseved\r
ac644614 5073 } Bits;\r
5074 UINTN UintN;\r
5075} IA32_CR4;\r
5076\r
1106ffe1 5077///\r
5078/// Byte packed structure for an IDTR, GDTR, LDTR descriptor\r
1106ffe1 5079///\r
ac644614 5080#pragma pack (1)\r
5081typedef struct {\r
5082 UINT16 Limit;\r
5083 UINTN Base;\r
5084} IA32_DESCRIPTOR;\r
5085#pragma pack ()\r
5086\r
5087#define IA32_IDT_GATE_TYPE_TASK 0x85\r
5088#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r
5089#define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r
5090#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r
5091#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r
5092\r
6f4aad3b 5093\r
5094#if defined (MDE_CPU_IA32)\r
1106ffe1 5095///\r
6f4aad3b 5096/// Byte packed structure for an IA32 Interrupt Gate Descriptor\r
1106ffe1 5097///\r
dc317713 5098typedef union {\r
5099 struct {\r
6f4aad3b 5100 UINT32 OffsetLow:16; ///< Offset bits 15..0\r
5101 UINT32 Selector:16; ///< Selector\r
5102 UINT32 Reserved_0:8; ///< Reserved\r
5103 UINT32 GateType:8; ///< Gate Type. See #defines above\r
5104 UINT32 OffsetHigh:16; ///< Offset bits 31..16\r
dc317713 5105 } Bits;\r
5106 UINT64 Uint64;\r
5107} IA32_IDT_GATE_DESCRIPTOR;\r
5108\r
5109#endif\r
5110\r
5111#if defined (MDE_CPU_X64)\r
6f4aad3b 5112///\r
5113/// Byte packed structure for an x64 Interrupt Gate Descriptor\r
5114///\r
ac644614 5115typedef union {\r
5116 struct {\r
6f4aad3b 5117 UINT32 OffsetLow:16; ///< Offset bits 15..0\r
5118 UINT32 Selector:16; ///< Selector\r
5119 UINT32 Reserved_0:8; ///< Reserved\r
5120 UINT32 GateType:8; ///< Gate Type. See #defines above\r
5121 UINT32 OffsetHigh:16; ///< Offset bits 31..16\r
5122 UINT32 OffsetUpper:32; ///< Offset bits 63..32\r
5123 UINT32 Reserved_1:32; ///< Reserved\r
ac644614 5124 } Bits;\r
6f4aad3b 5125 struct {\r
5126 UINT64 Uint64;\r
5127 UINT64 Uint64_1;\r
5128 } Uint128; \r
ac644614 5129} IA32_IDT_GATE_DESCRIPTOR;\r
5130\r
dc317713 5131#endif\r
5132\r
1106ffe1 5133///\r
5134/// Byte packed structure for an FP/SSE/SSE2 context\r
5135///\r
ac644614 5136typedef struct {\r
5137 UINT8 Buffer[512];\r
5138} IA32_FX_BUFFER;\r
5139\r
1106ffe1 5140///\r
5141/// Structures for the 16-bit real mode thunks\r
5142///\r
ac644614 5143typedef struct {\r
5144 UINT32 Reserved1;\r
5145 UINT32 Reserved2;\r
5146 UINT32 Reserved3;\r
5147 UINT32 Reserved4;\r
5148 UINT8 BL;\r
5149 UINT8 BH;\r
5150 UINT16 Reserved5;\r
5151 UINT8 DL;\r
5152 UINT8 DH;\r
5153 UINT16 Reserved6;\r
5154 UINT8 CL;\r
5155 UINT8 CH;\r
5156 UINT16 Reserved7;\r
5157 UINT8 AL;\r
5158 UINT8 AH;\r
5159 UINT16 Reserved8;\r
5160} IA32_BYTE_REGS;\r
5161\r
5162typedef struct {\r
5163 UINT16 DI;\r
5164 UINT16 Reserved1;\r
5165 UINT16 SI;\r
5166 UINT16 Reserved2;\r
5167 UINT16 BP;\r
5168 UINT16 Reserved3;\r
5169 UINT16 SP;\r
5170 UINT16 Reserved4;\r
5171 UINT16 BX;\r
5172 UINT16 Reserved5;\r
5173 UINT16 DX;\r
5174 UINT16 Reserved6;\r
5175 UINT16 CX;\r
5176 UINT16 Reserved7;\r
5177 UINT16 AX;\r
5178 UINT16 Reserved8;\r
5179} IA32_WORD_REGS;\r
5180\r
5181typedef struct {\r
5182 UINT32 EDI;\r
5183 UINT32 ESI;\r
5184 UINT32 EBP;\r
5185 UINT32 ESP;\r
5186 UINT32 EBX;\r
5187 UINT32 EDX;\r
5188 UINT32 ECX;\r
5189 UINT32 EAX;\r
5190 UINT16 DS;\r
5191 UINT16 ES;\r
5192 UINT16 FS;\r
5193 UINT16 GS;\r
5194 IA32_EFLAGS32 EFLAGS;\r
5195 UINT32 Eip;\r
5196 UINT16 CS;\r
5197 UINT16 SS;\r
5198} IA32_DWORD_REGS;\r
5199\r
5200typedef union {\r
5201 IA32_DWORD_REGS E;\r
5202 IA32_WORD_REGS X;\r
5203 IA32_BYTE_REGS H;\r
5204} IA32_REGISTER_SET;\r
5205\r
1106ffe1 5206///\r
5207/// Byte packed structure for an 16-bit real mode thunks\r
5208///\r
ac644614 5209typedef struct {\r
5210 IA32_REGISTER_SET *RealModeState;\r
5211 VOID *RealModeBuffer;\r
5212 UINT32 RealModeBufferSize;\r
5213 UINT32 ThunkAttributes;\r
5214} THUNK_CONTEXT;\r
5215\r
5216#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r
5217#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r
5218#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
5219\r
5220/**\r
5221 Retrieves CPUID information.\r
5222\r
5223 Executes the CPUID instruction with EAX set to the value specified by Index.\r
5224 This function always returns Index.\r
5225 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
5226 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
5227 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
5228 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
030cd1a2 5229 This function is only available on IA-32 and x64.\r
ac644614 5230\r
5231 @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r
5232 instruction.\r
5233 @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
5234 instruction. This is an optional parameter that may be NULL.\r
5235 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
5236 instruction. This is an optional parameter that may be NULL.\r
5237 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
5238 instruction. This is an optional parameter that may be NULL.\r
5239 @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
5240 instruction. This is an optional parameter that may be NULL.\r
5241\r
2fe241a2 5242 @return Index.\r
ac644614 5243\r
5244**/\r
5245UINT32\r
5246EFIAPI\r
5247AsmCpuid (\r
5248 IN UINT32 Index,\r
5249 OUT UINT32 *Eax, OPTIONAL\r
5250 OUT UINT32 *Ebx, OPTIONAL\r
5251 OUT UINT32 *Ecx, OPTIONAL\r
5252 OUT UINT32 *Edx OPTIONAL\r
5253 );\r
5254\r
5255\r
5256/**\r
5257 Retrieves CPUID information using an extended leaf identifier.\r
5258\r
5259 Executes the CPUID instruction with EAX set to the value specified by Index\r
5260 and ECX set to the value specified by SubIndex. This function always returns\r
5261 Index. This function is only available on IA-32 and x64.\r
5262\r
5263 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
5264 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
5265 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
5266 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
5267\r
5268 @param Index The 32-bit value to load into EAX prior to invoking the\r
5269 CPUID instruction.\r
5270 @param SubIndex The 32-bit value to load into ECX prior to invoking the\r
5271 CPUID instruction.\r
5272 @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
5273 instruction. This is an optional parameter that may be\r
5274 NULL.\r
5275 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
5276 instruction. This is an optional parameter that may be\r
5277 NULL.\r
5278 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
5279 instruction. This is an optional parameter that may be\r
5280 NULL.\r
5281 @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
5282 instruction. This is an optional parameter that may be\r
5283 NULL.\r
5284\r
2fe241a2 5285 @return Index.\r
ac644614 5286\r
5287**/\r
5288UINT32\r
5289EFIAPI\r
5290AsmCpuidEx (\r
5291 IN UINT32 Index,\r
5292 IN UINT32 SubIndex,\r
5293 OUT UINT32 *Eax, OPTIONAL\r
5294 OUT UINT32 *Ebx, OPTIONAL\r
5295 OUT UINT32 *Ecx, OPTIONAL\r
5296 OUT UINT32 *Edx OPTIONAL\r
5297 );\r
5298\r
5299\r
be5f1614 5300/**\r
5301 Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
5302\r
5303 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
5304 and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r
5305\r
5306**/\r
5307VOID\r
5308EFIAPI\r
5309AsmDisableCache (\r
5310 VOID\r
5311 );\r
5312\r
5313\r
5314/**\r
5315 Perform a WBINVD and clear both the CD and NW bits of CR0.\r
5316\r
5317 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r
5318 bits of CR0 to 0. This function is only available on IA-32 and x64.\r
5319\r
5320**/\r
5321VOID\r
5322EFIAPI\r
5323AsmEnableCache (\r
5324 VOID\r
5325 );\r
5326\r
5327\r
ac644614 5328/**\r
5329 Returns the lower 32-bits of a Machine Specific Register(MSR).\r
5330\r
5331 Reads and returns the lower 32-bits of the MSR specified by Index.\r
5332 No parameter checking is performed on Index, and some Index values may cause\r
5333 CPU exceptions. The caller must either guarantee that Index is valid, or the\r
5334 caller must set up exception handlers to catch the exceptions. This function\r
030cd1a2 5335 is only available on IA-32 and x64.\r
ac644614 5336\r
5337 @param Index The 32-bit MSR index to read.\r
5338\r
5339 @return The lower 32 bits of the MSR identified by Index.\r
5340\r
5341**/\r
5342UINT32\r
5343EFIAPI\r
5344AsmReadMsr32 (\r
5345 IN UINT32 Index\r
5346 );\r
5347\r
5348\r
5349/**\r
17f695ed 5350 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r
5351 The upper 32-bits of the MSR are set to zero.\r
ac644614 5352\r
5353 Writes the 32-bit value specified by Value to the MSR specified by Index. The\r
5354 upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r
5355 the MSR is returned. No parameter checking is performed on Index or Value,\r
5356 and some of these may cause CPU exceptions. The caller must either guarantee\r
5357 that Index and Value are valid, or the caller must establish proper exception\r
030cd1a2 5358 handlers. This function is only available on IA-32 and x64.\r
ac644614 5359\r
5360 @param Index The 32-bit MSR index to write.\r
5361 @param Value The 32-bit value to write to the MSR.\r
5362\r
5363 @return Value\r
5364\r
5365**/\r
5366UINT32\r
5367EFIAPI\r
5368AsmWriteMsr32 (\r
5369 IN UINT32 Index,\r
5370 IN UINT32 Value\r
5371 );\r
5372\r
5373\r
5374/**\r
62991af2 5375 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r
ac644614 5376 writes the result back to the 64-bit MSR.\r
5377\r
62991af2 5378 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
ac644614 5379 between the lower 32-bits of the read result and the value specified by\r
5380 OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
5381 32-bits of the value written to the MSR is returned. No parameter checking is\r
5382 performed on Index or OrData, and some of these may cause CPU exceptions. The\r
5383 caller must either guarantee that Index and OrData are valid, or the caller\r
5384 must establish proper exception handlers. This function is only available on\r
030cd1a2 5385 IA-32 and x64.\r
ac644614 5386\r
5387 @param Index The 32-bit MSR index to write.\r
5388 @param OrData The value to OR with the read value from the MSR.\r
5389\r
5390 @return The lower 32-bit value written to the MSR.\r
5391\r
5392**/\r
5393UINT32\r
5394EFIAPI\r
5395AsmMsrOr32 (\r
5396 IN UINT32 Index,\r
5397 IN UINT32 OrData\r
5398 );\r
5399\r
5400\r
5401/**\r
5402 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r
5403 the result back to the 64-bit MSR.\r
5404\r
5405 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5406 lower 32-bits of the read result and the value specified by AndData, and\r
5407 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r
5408 the value written to the MSR is returned. No parameter checking is performed\r
5409 on Index or AndData, and some of these may cause CPU exceptions. The caller\r
5410 must either guarantee that Index and AndData are valid, or the caller must\r
5411 establish proper exception handlers. This function is only available on IA-32\r
030cd1a2 5412 and x64.\r
ac644614 5413\r
5414 @param Index The 32-bit MSR index to write.\r
5415 @param AndData The value to AND with the read value from the MSR.\r
5416\r
5417 @return The lower 32-bit value written to the MSR.\r
5418\r
5419**/\r
5420UINT32\r
5421EFIAPI\r
5422AsmMsrAnd32 (\r
5423 IN UINT32 Index,\r
5424 IN UINT32 AndData\r
5425 );\r
5426\r
5427\r
5428/**\r
62991af2 5429 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r
ac644614 5430 on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
5431\r
5432 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5433 lower 32-bits of the read result and the value specified by AndData\r
62991af2 5434 preserving the upper 32-bits, performs a bitwise OR between the\r
ac644614 5435 result of the AND operation and the value specified by OrData, and writes the\r
5436 result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
5437 written to the MSR is returned. No parameter checking is performed on Index,\r
5438 AndData, or OrData, and some of these may cause CPU exceptions. The caller\r
5439 must either guarantee that Index, AndData, and OrData are valid, or the\r
5440 caller must establish proper exception handlers. This function is only\r
030cd1a2 5441 available on IA-32 and x64.\r
ac644614 5442\r
5443 @param Index The 32-bit MSR index to write.\r
5444 @param AndData The value to AND with the read value from the MSR.\r
5445 @param OrData The value to OR with the result of the AND operation.\r
5446\r
5447 @return The lower 32-bit value written to the MSR.\r
5448\r
5449**/\r
5450UINT32\r
5451EFIAPI\r
5452AsmMsrAndThenOr32 (\r
5453 IN UINT32 Index,\r
5454 IN UINT32 AndData,\r
5455 IN UINT32 OrData\r
5456 );\r
5457\r
5458\r
5459/**\r
5460 Reads a bit field of an MSR.\r
5461\r
5462 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r
5463 specified by the StartBit and the EndBit. The value of the bit field is\r
5464 returned. The caller must either guarantee that Index is valid, or the caller\r
5465 must set up exception handlers to catch the exceptions. This function is only\r
030cd1a2 5466 available on IA-32 and x64.\r
ac644614 5467\r
5468 If StartBit is greater than 31, then ASSERT().\r
5469 If EndBit is greater than 31, then ASSERT().\r
5470 If EndBit is less than StartBit, then ASSERT().\r
5471\r
5472 @param Index The 32-bit MSR index to read.\r
5473 @param StartBit The ordinal of the least significant bit in the bit field.\r
5474 Range 0..31.\r
5475 @param EndBit The ordinal of the most significant bit in the bit field.\r
5476 Range 0..31.\r
5477\r
5478 @return The bit field read from the MSR.\r
5479\r
5480**/\r
5481UINT32\r
5482EFIAPI\r
5483AsmMsrBitFieldRead32 (\r
5484 IN UINT32 Index,\r
5485 IN UINTN StartBit,\r
5486 IN UINTN EndBit\r
5487 );\r
5488\r
5489\r
5490/**\r
5491 Writes a bit field to an MSR.\r
5492\r
2fe241a2 5493 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
ac644614 5494 field is specified by the StartBit and the EndBit. All other bits in the\r
5495 destination MSR are preserved. The lower 32-bits of the MSR written is\r
62991af2 5496 returned. The caller must either guarantee that Index and the data written \r
5497 is valid, or the caller must set up exception handlers to catch the exceptions. \r
5498 This function is only available on IA-32 and x64.\r
ac644614 5499\r
5500 If StartBit is greater than 31, then ASSERT().\r
5501 If EndBit is greater than 31, then ASSERT().\r
5502 If EndBit is less than StartBit, then ASSERT().\r
5503\r
5504 @param Index The 32-bit MSR index to write.\r
5505 @param StartBit The ordinal of the least significant bit in the bit field.\r
5506 Range 0..31.\r
5507 @param EndBit The ordinal of the most significant bit in the bit field.\r
5508 Range 0..31.\r
5509 @param Value New value of the bit field.\r
5510\r
5511 @return The lower 32-bit of the value written to the MSR.\r
5512\r
5513**/\r
5514UINT32\r
5515EFIAPI\r
5516AsmMsrBitFieldWrite32 (\r
5517 IN UINT32 Index,\r
5518 IN UINTN StartBit,\r
5519 IN UINTN EndBit,\r
5520 IN UINT32 Value\r
5521 );\r
5522\r
5523\r
5524/**\r
5525 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
5526 result back to the bit field in the 64-bit MSR.\r
5527\r
62991af2 5528 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
ac644614 5529 between the read result and the value specified by OrData, and writes the\r
5530 result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
5531 written to the MSR are returned. Extra left bits in OrData are stripped. The\r
5532 caller must either guarantee that Index and the data written is valid, or\r
5533 the caller must set up exception handlers to catch the exceptions. This\r
030cd1a2 5534 function is only available on IA-32 and x64.\r
ac644614 5535\r
5536 If StartBit is greater than 31, then ASSERT().\r
5537 If EndBit is greater than 31, then ASSERT().\r
5538 If EndBit is less than StartBit, then ASSERT().\r
5539\r
5540 @param Index The 32-bit MSR index to write.\r
5541 @param StartBit The ordinal of the least significant bit in the bit field.\r
5542 Range 0..31.\r
5543 @param EndBit The ordinal of the most significant bit in the bit field.\r
5544 Range 0..31.\r
5545 @param OrData The value to OR with the read value from the MSR.\r
5546\r
5547 @return The lower 32-bit of the value written to the MSR.\r
5548\r
5549**/\r
5550UINT32\r
5551EFIAPI\r
5552AsmMsrBitFieldOr32 (\r
5553 IN UINT32 Index,\r
5554 IN UINTN StartBit,\r
5555 IN UINTN EndBit,\r
5556 IN UINT32 OrData\r
5557 );\r
5558\r
5559\r
5560/**\r
5561 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
5562 result back to the bit field in the 64-bit MSR.\r
5563\r
5564 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5565 read result and the value specified by AndData, and writes the result to the\r
5566 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r
5567 MSR are returned. Extra left bits in AndData are stripped. The caller must\r
5568 either guarantee that Index and the data written is valid, or the caller must\r
5569 set up exception handlers to catch the exceptions. This function is only\r
030cd1a2 5570 available on IA-32 and x64.\r
ac644614 5571\r
5572 If StartBit is greater than 31, then ASSERT().\r
5573 If EndBit is greater than 31, then ASSERT().\r
5574 If EndBit is less than StartBit, then ASSERT().\r
5575\r
5576 @param Index The 32-bit MSR index to write.\r
5577 @param StartBit The ordinal of the least significant bit in the bit field.\r
5578 Range 0..31.\r
5579 @param EndBit The ordinal of the most significant bit in the bit field.\r
5580 Range 0..31.\r
5581 @param AndData The value to AND with the read value from the MSR.\r
5582\r
5583 @return The lower 32-bit of the value written to the MSR.\r
5584\r
5585**/\r
5586UINT32\r
5587EFIAPI\r
5588AsmMsrBitFieldAnd32 (\r
5589 IN UINT32 Index,\r
5590 IN UINTN StartBit,\r
5591 IN UINTN EndBit,\r
5592 IN UINT32 AndData\r
5593 );\r
5594\r
5595\r
5596/**\r
5597 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
62991af2 5598 bitwise OR, and writes the result back to the bit field in the\r
ac644614 5599 64-bit MSR.\r
5600\r
5601 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
62991af2 5602 bitwise OR between the read result and the value specified by\r
ac644614 5603 AndData, and writes the result to the 64-bit MSR specified by Index. The\r
5604 lower 32-bits of the value written to the MSR are returned. Extra left bits\r
5605 in both AndData and OrData are stripped. The caller must either guarantee\r
5606 that Index and the data written is valid, or the caller must set up exception\r
5607 handlers to catch the exceptions. This function is only available on IA-32\r
030cd1a2 5608 and x64.\r
ac644614 5609\r
5610 If StartBit is greater than 31, then ASSERT().\r
5611 If EndBit is greater than 31, then ASSERT().\r
5612 If EndBit is less than StartBit, then ASSERT().\r
5613\r
5614 @param Index The 32-bit MSR index to write.\r
5615 @param StartBit The ordinal of the least significant bit in the bit field.\r
5616 Range 0..31.\r
5617 @param EndBit The ordinal of the most significant bit in the bit field.\r
5618 Range 0..31.\r
5619 @param AndData The value to AND with the read value from the MSR.\r
5620 @param OrData The value to OR with the result of the AND operation.\r
5621\r
5622 @return The lower 32-bit of the value written to the MSR.\r
5623\r
5624**/\r
5625UINT32\r
5626EFIAPI\r
5627AsmMsrBitFieldAndThenOr32 (\r
5628 IN UINT32 Index,\r
5629 IN UINTN StartBit,\r
5630 IN UINTN EndBit,\r
5631 IN UINT32 AndData,\r
5632 IN UINT32 OrData\r
5633 );\r
5634\r
5635\r
5636/**\r
5637 Returns a 64-bit Machine Specific Register(MSR).\r
5638\r
5639 Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r
5640 performed on Index, and some Index values may cause CPU exceptions. The\r
5641 caller must either guarantee that Index is valid, or the caller must set up\r
5642 exception handlers to catch the exceptions. This function is only available\r
030cd1a2 5643 on IA-32 and x64.\r
ac644614 5644\r
5645 @param Index The 32-bit MSR index to read.\r
5646\r
5647 @return The value of the MSR identified by Index.\r
5648\r
5649**/\r
5650UINT64\r
5651EFIAPI\r
5652AsmReadMsr64 (\r
5653 IN UINT32 Index\r
5654 );\r
5655\r
5656\r
5657/**\r
5658 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
5659 value.\r
5660\r
5661 Writes the 64-bit value specified by Value to the MSR specified by Index. The\r
5662 64-bit value written to the MSR is returned. No parameter checking is\r
5663 performed on Index or Value, and some of these may cause CPU exceptions. The\r
5664 caller must either guarantee that Index and Value are valid, or the caller\r
5665 must establish proper exception handlers. This function is only available on\r
030cd1a2 5666 IA-32 and x64.\r
ac644614 5667\r
5668 @param Index The 32-bit MSR index to write.\r
5669 @param Value The 64-bit value to write to the MSR.\r
5670\r
5671 @return Value\r
5672\r
5673**/\r
5674UINT64\r
5675EFIAPI\r
5676AsmWriteMsr64 (\r
5677 IN UINT32 Index,\r
5678 IN UINT64 Value\r
5679 );\r
5680\r
5681\r
5682/**\r
62991af2 5683 Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r
ac644614 5684 back to the 64-bit MSR.\r
5685\r
62991af2 5686 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
ac644614 5687 between the read result and the value specified by OrData, and writes the\r
5688 result to the 64-bit MSR specified by Index. The value written to the MSR is\r
5689 returned. No parameter checking is performed on Index or OrData, and some of\r
5690 these may cause CPU exceptions. The caller must either guarantee that Index\r
5691 and OrData are valid, or the caller must establish proper exception handlers.\r
030cd1a2 5692 This function is only available on IA-32 and x64.\r
ac644614 5693\r
5694 @param Index The 32-bit MSR index to write.\r
5695 @param OrData The value to OR with the read value from the MSR.\r
5696\r
5697 @return The value written back to the MSR.\r
5698\r
5699**/\r
5700UINT64\r
5701EFIAPI\r
5702AsmMsrOr64 (\r
5703 IN UINT32 Index,\r
5704 IN UINT64 OrData\r
5705 );\r
5706\r
5707\r
5708/**\r
5709 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r
5710 64-bit MSR.\r
5711\r
5712 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5713 read result and the value specified by OrData, and writes the result to the\r
5714 64-bit MSR specified by Index. The value written to the MSR is returned. No\r
5715 parameter checking is performed on Index or OrData, and some of these may\r
5716 cause CPU exceptions. The caller must either guarantee that Index and OrData\r
5717 are valid, or the caller must establish proper exception handlers. This\r
030cd1a2 5718 function is only available on IA-32 and x64.\r
ac644614 5719\r
5720 @param Index The 32-bit MSR index to write.\r
5721 @param AndData The value to AND with the read value from the MSR.\r
5722\r
5723 @return The value written back to the MSR.\r
5724\r
5725**/\r
5726UINT64\r
5727EFIAPI\r
5728AsmMsrAnd64 (\r
5729 IN UINT32 Index,\r
5730 IN UINT64 AndData\r
5731 );\r
5732\r
5733\r
5734/**\r
62991af2 5735 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r
ac644614 5736 OR, and writes the result back to the 64-bit MSR.\r
5737\r
5738 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
62991af2 5739 result and the value specified by AndData, performs a bitwise OR\r
ac644614 5740 between the result of the AND operation and the value specified by OrData,\r
5741 and writes the result to the 64-bit MSR specified by Index. The value written\r
5742 to the MSR is returned. No parameter checking is performed on Index, AndData,\r
5743 or OrData, and some of these may cause CPU exceptions. The caller must either\r
5744 guarantee that Index, AndData, and OrData are valid, or the caller must\r
5745 establish proper exception handlers. This function is only available on IA-32\r
030cd1a2 5746 and x64.\r
ac644614 5747\r
5748 @param Index The 32-bit MSR index to write.\r
5749 @param AndData The value to AND with the read value from the MSR.\r
5750 @param OrData The value to OR with the result of the AND operation.\r
5751\r
5752 @return The value written back to the MSR.\r
5753\r
5754**/\r
5755UINT64\r
5756EFIAPI\r
5757AsmMsrAndThenOr64 (\r
5758 IN UINT32 Index,\r
5759 IN UINT64 AndData,\r
5760 IN UINT64 OrData\r
5761 );\r
5762\r
5763\r
5764/**\r
5765 Reads a bit field of an MSR.\r
5766\r
5767 Reads the bit field in the 64-bit MSR. The bit field is specified by the\r
5768 StartBit and the EndBit. The value of the bit field is returned. The caller\r
5769 must either guarantee that Index is valid, or the caller must set up\r
5770 exception handlers to catch the exceptions. This function is only available\r
030cd1a2 5771 on IA-32 and x64.\r
ac644614 5772\r
5773 If StartBit is greater than 63, then ASSERT().\r
5774 If EndBit is greater than 63, then ASSERT().\r
5775 If EndBit is less than StartBit, then ASSERT().\r
5776\r
5777 @param Index The 32-bit MSR index to read.\r
5778 @param StartBit The ordinal of the least significant bit in the bit field.\r
5779 Range 0..63.\r
5780 @param EndBit The ordinal of the most significant bit in the bit field.\r
5781 Range 0..63.\r
5782\r
5783 @return The value read from the MSR.\r
5784\r
5785**/\r
5786UINT64\r
5787EFIAPI\r
5788AsmMsrBitFieldRead64 (\r
5789 IN UINT32 Index,\r
5790 IN UINTN StartBit,\r
5791 IN UINTN EndBit\r
5792 );\r
5793\r
5794\r
5795/**\r
5796 Writes a bit field to an MSR.\r
5797\r
5798 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
5799 the StartBit and the EndBit. All other bits in the destination MSR are\r
62991af2 5800 preserved. The MSR written is returned. The caller must either guarantee \r
5801 that Index and the data written is valid, or the caller must set up exception \r
5802 handlers to catch the exceptions. This function is only available on IA-32 and x64.\r
ac644614 5803\r
5804 If StartBit is greater than 63, then ASSERT().\r
5805 If EndBit is greater than 63, then ASSERT().\r
5806 If EndBit is less than StartBit, then ASSERT().\r
5807\r
5808 @param Index The 32-bit MSR index to write.\r
5809 @param StartBit The ordinal of the least significant bit in the bit field.\r
5810 Range 0..63.\r
5811 @param EndBit The ordinal of the most significant bit in the bit field.\r
5812 Range 0..63.\r
5813 @param Value New value of the bit field.\r
5814\r
5815 @return The value written back to the MSR.\r
5816\r
5817**/\r
5818UINT64\r
5819EFIAPI\r
5820AsmMsrBitFieldWrite64 (\r
5821 IN UINT32 Index,\r
5822 IN UINTN StartBit,\r
5823 IN UINTN EndBit,\r
5824 IN UINT64 Value\r
5825 );\r
5826\r
5827\r
5828/**\r
62991af2 5829 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r
ac644614 5830 writes the result back to the bit field in the 64-bit MSR.\r
5831\r
62991af2 5832 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
ac644614 5833 between the read result and the value specified by OrData, and writes the\r
5834 result to the 64-bit MSR specified by Index. The value written to the MSR is\r
5835 returned. Extra left bits in OrData are stripped. The caller must either\r
5836 guarantee that Index and the data written is valid, or the caller must set up\r
5837 exception handlers to catch the exceptions. This function is only available\r
030cd1a2 5838 on IA-32 and x64.\r
ac644614 5839\r
5840 If StartBit is greater than 63, then ASSERT().\r
5841 If EndBit is greater than 63, then ASSERT().\r
5842 If EndBit is less than StartBit, then ASSERT().\r
5843\r
5844 @param Index The 32-bit MSR index to write.\r
5845 @param StartBit The ordinal of the least significant bit in the bit field.\r
5846 Range 0..63.\r
5847 @param EndBit The ordinal of the most significant bit in the bit field.\r
5848 Range 0..63.\r
5849 @param OrData The value to OR with the read value from the bit field.\r
5850\r
5851 @return The value written back to the MSR.\r
5852\r
5853**/\r
5854UINT64\r
5855EFIAPI\r
5856AsmMsrBitFieldOr64 (\r
5857 IN UINT32 Index,\r
5858 IN UINTN StartBit,\r
5859 IN UINTN EndBit,\r
5860 IN UINT64 OrData\r
5861 );\r
5862\r
5863\r
5864/**\r
5865 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
5866 result back to the bit field in the 64-bit MSR.\r
5867\r
5868 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5869 read result and the value specified by AndData, and writes the result to the\r
5870 64-bit MSR specified by Index. The value written to the MSR is returned.\r
5871 Extra left bits in AndData are stripped. The caller must either guarantee\r
5872 that Index and the data written is valid, or the caller must set up exception\r
5873 handlers to catch the exceptions. This function is only available on IA-32\r
030cd1a2 5874 and x64.\r
ac644614 5875\r
5876 If StartBit is greater than 63, then ASSERT().\r
5877 If EndBit is greater than 63, then ASSERT().\r
5878 If EndBit is less than StartBit, then ASSERT().\r
5879\r
5880 @param Index The 32-bit MSR index to write.\r
5881 @param StartBit The ordinal of the least significant bit in the bit field.\r
5882 Range 0..63.\r
5883 @param EndBit The ordinal of the most significant bit in the bit field.\r
5884 Range 0..63.\r
5885 @param AndData The value to AND with the read value from the bit field.\r
5886\r
5887 @return The value written back to the MSR.\r
5888\r
5889**/\r
5890UINT64\r
5891EFIAPI\r
5892AsmMsrBitFieldAnd64 (\r
5893 IN UINT32 Index,\r
5894 IN UINTN StartBit,\r
5895 IN UINTN EndBit,\r
5896 IN UINT64 AndData\r
5897 );\r
5898\r
5899\r
5900/**\r
5901 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
62991af2 5902 bitwise OR, and writes the result back to the bit field in the\r
ac644614 5903 64-bit MSR.\r
5904\r
5905 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
62991af2 5906 a bitwise OR between the read result and the value specified by\r
ac644614 5907 AndData, and writes the result to the 64-bit MSR specified by Index. The\r
5908 value written to the MSR is returned. Extra left bits in both AndData and\r
5909 OrData are stripped. The caller must either guarantee that Index and the data\r
5910 written is valid, or the caller must set up exception handlers to catch the\r
030cd1a2 5911 exceptions. This function is only available on IA-32 and x64.\r
ac644614 5912\r
5913 If StartBit is greater than 63, then ASSERT().\r
5914 If EndBit is greater than 63, then ASSERT().\r
5915 If EndBit is less than StartBit, then ASSERT().\r
5916\r
5917 @param Index The 32-bit MSR index to write.\r
5918 @param StartBit The ordinal of the least significant bit in the bit field.\r
5919 Range 0..63.\r
5920 @param EndBit The ordinal of the most significant bit in the bit field.\r
5921 Range 0..63.\r
5922 @param AndData The value to AND with the read value from the bit field.\r
5923 @param OrData The value to OR with the result of the AND operation.\r
5924\r
5925 @return The value written back to the MSR.\r
5926\r
5927**/\r
5928UINT64\r
5929EFIAPI\r
5930AsmMsrBitFieldAndThenOr64 (\r
5931 IN UINT32 Index,\r
5932 IN UINTN StartBit,\r
5933 IN UINTN EndBit,\r
5934 IN UINT64 AndData,\r
5935 IN UINT64 OrData\r
5936 );\r
5937\r
5938\r
5939/**\r
5940 Reads the current value of the EFLAGS register.\r
5941\r
5942 Reads and returns the current value of the EFLAGS register. This function is\r
030cd1a2 5943 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r
5944 64-bit value on x64.\r
ac644614 5945\r
030cd1a2 5946 @return EFLAGS on IA-32 or RFLAGS on x64.\r
ac644614 5947\r
5948**/\r
5949UINTN\r
5950EFIAPI\r
5951AsmReadEflags (\r
5952 VOID\r
5953 );\r
5954\r
5955\r
5956/**\r
5957 Reads the current value of the Control Register 0 (CR0).\r
5958\r
5959 Reads and returns the current value of CR0. This function is only available\r
030cd1a2 5960 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5961 x64.\r
ac644614 5962\r
5963 @return The value of the Control Register 0 (CR0).\r
5964\r
5965**/\r
5966UINTN\r
5967EFIAPI\r
5968AsmReadCr0 (\r
5969 VOID\r
5970 );\r
5971\r
5972\r
5973/**\r
5974 Reads the current value of the Control Register 2 (CR2).\r
5975\r
5976 Reads and returns the current value of CR2. This function is only available\r
030cd1a2 5977 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5978 x64.\r
ac644614 5979\r
5980 @return The value of the Control Register 2 (CR2).\r
5981\r
5982**/\r
5983UINTN\r
5984EFIAPI\r
5985AsmReadCr2 (\r
5986 VOID\r
5987 );\r
5988\r
5989\r
5990/**\r
5991 Reads the current value of the Control Register 3 (CR3).\r
5992\r
5993 Reads and returns the current value of CR3. This function is only available\r
030cd1a2 5994 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5995 x64.\r
ac644614 5996\r
5997 @return The value of the Control Register 3 (CR3).\r
5998\r
5999**/\r
6000UINTN\r
6001EFIAPI\r
6002AsmReadCr3 (\r
6003 VOID\r
6004 );\r
6005\r
6006\r
6007/**\r
6008 Reads the current value of the Control Register 4 (CR4).\r
6009\r
6010 Reads and returns the current value of CR4. This function is only available\r
030cd1a2 6011 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6012 x64.\r
ac644614 6013\r
6014 @return The value of the Control Register 4 (CR4).\r
6015\r
6016**/\r
6017UINTN\r
6018EFIAPI\r
6019AsmReadCr4 (\r
6020 VOID\r
6021 );\r
6022\r
6023\r
6024/**\r
6025 Writes a value to Control Register 0 (CR0).\r
6026\r
6027 Writes and returns a new value to CR0. This function is only available on\r
030cd1a2 6028 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6029\r
6030 @param Cr0 The value to write to CR0.\r
6031\r
6032 @return The value written to CR0.\r
6033\r
6034**/\r
6035UINTN\r
6036EFIAPI\r
6037AsmWriteCr0 (\r
6038 UINTN Cr0\r
6039 );\r
6040\r
6041\r
6042/**\r
6043 Writes a value to Control Register 2 (CR2).\r
6044\r
6045 Writes and returns a new value to CR2. This function is only available on\r
030cd1a2 6046 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6047\r
6048 @param Cr2 The value to write to CR2.\r
6049\r
6050 @return The value written to CR2.\r
6051\r
6052**/\r
6053UINTN\r
6054EFIAPI\r
6055AsmWriteCr2 (\r
6056 UINTN Cr2\r
6057 );\r
6058\r
6059\r
6060/**\r
6061 Writes a value to Control Register 3 (CR3).\r
6062\r
6063 Writes and returns a new value to CR3. This function is only available on\r
030cd1a2 6064 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6065\r
6066 @param Cr3 The value to write to CR3.\r
6067\r
6068 @return The value written to CR3.\r
6069\r
6070**/\r
6071UINTN\r
6072EFIAPI\r
6073AsmWriteCr3 (\r
6074 UINTN Cr3\r
6075 );\r
6076\r
6077\r
6078/**\r
6079 Writes a value to Control Register 4 (CR4).\r
6080\r
6081 Writes and returns a new value to CR4. This function is only available on\r
030cd1a2 6082 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6083\r
6084 @param Cr4 The value to write to CR4.\r
6085\r
6086 @return The value written to CR4.\r
6087\r
6088**/\r
6089UINTN\r
6090EFIAPI\r
6091AsmWriteCr4 (\r
6092 UINTN Cr4\r
6093 );\r
6094\r
6095\r
6096/**\r
6097 Reads the current value of Debug Register 0 (DR0).\r
6098\r
6099 Reads and returns the current value of DR0. This function is only available\r
030cd1a2 6100 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6101 x64.\r
ac644614 6102\r
6103 @return The value of Debug Register 0 (DR0).\r
6104\r
6105**/\r
6106UINTN\r
6107EFIAPI\r
6108AsmReadDr0 (\r
6109 VOID\r
6110 );\r
6111\r
6112\r
6113/**\r
6114 Reads the current value of Debug Register 1 (DR1).\r
6115\r
6116 Reads and returns the current value of DR1. This function is only available\r
030cd1a2 6117 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6118 x64.\r
ac644614 6119\r
6120 @return The value of Debug Register 1 (DR1).\r
6121\r
6122**/\r
6123UINTN\r
6124EFIAPI\r
6125AsmReadDr1 (\r
6126 VOID\r
6127 );\r
6128\r
6129\r
6130/**\r
6131 Reads the current value of Debug Register 2 (DR2).\r
6132\r
6133 Reads and returns the current value of DR2. This function is only available\r
030cd1a2 6134 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6135 x64.\r
ac644614 6136\r
6137 @return The value of Debug Register 2 (DR2).\r
6138\r
6139**/\r
6140UINTN\r
6141EFIAPI\r
6142AsmReadDr2 (\r
6143 VOID\r
6144 );\r
6145\r
6146\r
6147/**\r
6148 Reads the current value of Debug Register 3 (DR3).\r
6149\r
6150 Reads and returns the current value of DR3. This function is only available\r
030cd1a2 6151 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6152 x64.\r
ac644614 6153\r
6154 @return The value of Debug Register 3 (DR3).\r
6155\r
6156**/\r
6157UINTN\r
6158EFIAPI\r
6159AsmReadDr3 (\r
6160 VOID\r
6161 );\r
6162\r
6163\r
6164/**\r
6165 Reads the current value of Debug Register 4 (DR4).\r
6166\r
6167 Reads and returns the current value of DR4. This function is only available\r
030cd1a2 6168 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6169 x64.\r
ac644614 6170\r
6171 @return The value of Debug Register 4 (DR4).\r
6172\r
6173**/\r
6174UINTN\r
6175EFIAPI\r
6176AsmReadDr4 (\r
6177 VOID\r
6178 );\r
6179\r
6180\r
6181/**\r
6182 Reads the current value of Debug Register 5 (DR5).\r
6183\r
6184 Reads and returns the current value of DR5. This function is only available\r
030cd1a2 6185 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6186 x64.\r
ac644614 6187\r
6188 @return The value of Debug Register 5 (DR5).\r
6189\r
6190**/\r
6191UINTN\r
6192EFIAPI\r
6193AsmReadDr5 (\r
6194 VOID\r
6195 );\r
6196\r
6197\r
6198/**\r
6199 Reads the current value of Debug Register 6 (DR6).\r
6200\r
6201 Reads and returns the current value of DR6. This function is only available\r
030cd1a2 6202 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6203 x64.\r
ac644614 6204\r
6205 @return The value of Debug Register 6 (DR6).\r
6206\r
6207**/\r
6208UINTN\r
6209EFIAPI\r
6210AsmReadDr6 (\r
6211 VOID\r
6212 );\r
6213\r
6214\r
6215/**\r
6216 Reads the current value of Debug Register 7 (DR7).\r
6217\r
6218 Reads and returns the current value of DR7. This function is only available\r
030cd1a2 6219 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6220 x64.\r
ac644614 6221\r
6222 @return The value of Debug Register 7 (DR7).\r
6223\r
6224**/\r
6225UINTN\r
6226EFIAPI\r
6227AsmReadDr7 (\r
6228 VOID\r
6229 );\r
6230\r
6231\r
6232/**\r
6233 Writes a value to Debug Register 0 (DR0).\r
6234\r
6235 Writes and returns a new value to DR0. This function is only available on\r
030cd1a2 6236 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6237\r
6238 @param Dr0 The value to write to Dr0.\r
6239\r
6240 @return The value written to Debug Register 0 (DR0).\r
6241\r
6242**/\r
6243UINTN\r
6244EFIAPI\r
6245AsmWriteDr0 (\r
6246 UINTN Dr0\r
6247 );\r
6248\r
6249\r
6250/**\r
6251 Writes a value to Debug Register 1 (DR1).\r
6252\r
6253 Writes and returns a new value to DR1. This function is only available on\r
030cd1a2 6254 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6255\r
6256 @param Dr1 The value to write to Dr1.\r
6257\r
6258 @return The value written to Debug Register 1 (DR1).\r
6259\r
6260**/\r
6261UINTN\r
6262EFIAPI\r
6263AsmWriteDr1 (\r
6264 UINTN Dr1\r
6265 );\r
6266\r
6267\r
6268/**\r
6269 Writes a value to Debug Register 2 (DR2).\r
6270\r
6271 Writes and returns a new value to DR2. This function is only available on\r
030cd1a2 6272 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6273\r
6274 @param Dr2 The value to write to Dr2.\r
6275\r
6276 @return The value written to Debug Register 2 (DR2).\r
6277\r
6278**/\r
6279UINTN\r
6280EFIAPI\r
6281AsmWriteDr2 (\r
6282 UINTN Dr2\r
6283 );\r
6284\r
6285\r
6286/**\r
6287 Writes a value to Debug Register 3 (DR3).\r
6288\r
6289 Writes and returns a new value to DR3. This function is only available on\r
030cd1a2 6290 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6291\r
6292 @param Dr3 The value to write to Dr3.\r
6293\r
6294 @return The value written to Debug Register 3 (DR3).\r
6295\r
6296**/\r
6297UINTN\r
6298EFIAPI\r
6299AsmWriteDr3 (\r
6300 UINTN Dr3\r
6301 );\r
6302\r
6303\r
6304/**\r
6305 Writes a value to Debug Register 4 (DR4).\r
6306\r
6307 Writes and returns a new value to DR4. This function is only available on\r
030cd1a2 6308 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6309\r
6310 @param Dr4 The value to write to Dr4.\r
6311\r
6312 @return The value written to Debug Register 4 (DR4).\r
6313\r
6314**/\r
6315UINTN\r
6316EFIAPI\r
6317AsmWriteDr4 (\r
6318 UINTN Dr4\r
6319 );\r
6320\r
6321\r
6322/**\r
6323 Writes a value to Debug Register 5 (DR5).\r
6324\r
6325 Writes and returns a new value to DR5. This function is only available on\r
030cd1a2 6326 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6327\r
6328 @param Dr5 The value to write to Dr5.\r
6329\r
6330 @return The value written to Debug Register 5 (DR5).\r
6331\r
6332**/\r
6333UINTN\r
6334EFIAPI\r
6335AsmWriteDr5 (\r
6336 UINTN Dr5\r
6337 );\r
6338\r
6339\r
6340/**\r
6341 Writes a value to Debug Register 6 (DR6).\r
6342\r
6343 Writes and returns a new value to DR6. This function is only available on\r
030cd1a2 6344 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6345\r
6346 @param Dr6 The value to write to Dr6.\r
6347\r
6348 @return The value written to Debug Register 6 (DR6).\r
6349\r
6350**/\r
6351UINTN\r
6352EFIAPI\r
6353AsmWriteDr6 (\r
6354 UINTN Dr6\r
6355 );\r
6356\r
6357\r
6358/**\r
6359 Writes a value to Debug Register 7 (DR7).\r
6360\r
6361 Writes and returns a new value to DR7. This function is only available on\r
030cd1a2 6362 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
ac644614 6363\r
6364 @param Dr7 The value to write to Dr7.\r
6365\r
6366 @return The value written to Debug Register 7 (DR7).\r
6367\r
6368**/\r
6369UINTN\r
6370EFIAPI\r
6371AsmWriteDr7 (\r
6372 UINTN Dr7\r
6373 );\r
6374\r
6375\r
6376/**\r
6377 Reads the current value of Code Segment Register (CS).\r
6378\r
6379 Reads and returns the current value of CS. This function is only available on\r
030cd1a2 6380 IA-32 and x64.\r
ac644614 6381\r
6382 @return The current value of CS.\r
6383\r
6384**/\r
6385UINT16\r
6386EFIAPI\r
6387AsmReadCs (\r
6388 VOID\r
6389 );\r
6390\r
6391\r
6392/**\r
6393 Reads the current value of Data Segment Register (DS).\r
6394\r
6395 Reads and returns the current value of DS. This function is only available on\r
030cd1a2 6396 IA-32 and x64.\r
ac644614 6397\r
6398 @return The current value of DS.\r
6399\r
6400**/\r
6401UINT16\r
6402EFIAPI\r
6403AsmReadDs (\r
6404 VOID\r
6405 );\r
6406\r
6407\r
6408/**\r
6409 Reads the current value of Extra Segment Register (ES).\r
6410\r
6411 Reads and returns the current value of ES. This function is only available on\r
030cd1a2 6412 IA-32 and x64.\r
ac644614 6413\r
6414 @return The current value of ES.\r
6415\r
6416**/\r
6417UINT16\r
6418EFIAPI\r
6419AsmReadEs (\r
6420 VOID\r
6421 );\r
6422\r
6423\r
6424/**\r
6425 Reads the current value of FS Data Segment Register (FS).\r
6426\r
6427 Reads and returns the current value of FS. This function is only available on\r
030cd1a2 6428 IA-32 and x64.\r
ac644614 6429\r
6430 @return The current value of FS.\r
6431\r
6432**/\r
6433UINT16\r
6434EFIAPI\r
6435AsmReadFs (\r
6436 VOID\r
6437 );\r
6438\r
6439\r
6440/**\r
6441 Reads the current value of GS Data Segment Register (GS).\r
6442\r
6443 Reads and returns the current value of GS. This function is only available on\r
030cd1a2 6444 IA-32 and x64.\r
ac644614 6445\r
6446 @return The current value of GS.\r
6447\r
6448**/\r
6449UINT16\r
6450EFIAPI\r
6451AsmReadGs (\r
6452 VOID\r
6453 );\r
6454\r
6455\r
6456/**\r
6457 Reads the current value of Stack Segment Register (SS).\r
6458\r
6459 Reads and returns the current value of SS. This function is only available on\r
030cd1a2 6460 IA-32 and x64.\r
ac644614 6461\r
6462 @return The current value of SS.\r
6463\r
6464**/\r
6465UINT16\r
6466EFIAPI\r
6467AsmReadSs (\r
6468 VOID\r
6469 );\r
6470\r
6471\r
6472/**\r
6473 Reads the current value of Task Register (TR).\r
6474\r
6475 Reads and returns the current value of TR. This function is only available on\r
030cd1a2 6476 IA-32 and x64.\r
ac644614 6477\r
6478 @return The current value of TR.\r
6479\r
6480**/\r
6481UINT16\r
6482EFIAPI\r
6483AsmReadTr (\r
6484 VOID\r
6485 );\r
6486\r
6487\r
6488/**\r
6489 Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
6490\r
6491 Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
030cd1a2 6492 function is only available on IA-32 and x64.\r
ac644614 6493\r
6494 If Gdtr is NULL, then ASSERT().\r
6495\r
6496 @param Gdtr Pointer to a GDTR descriptor.\r
6497\r
6498**/\r
6499VOID\r
6500EFIAPI\r
6501AsmReadGdtr (\r
6502 OUT IA32_DESCRIPTOR *Gdtr\r
6503 );\r
6504\r
6505\r
6506/**\r
6507 Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
6508\r
6509 Writes and the current GDTR descriptor specified by Gdtr. This function is\r
030cd1a2 6510 only available on IA-32 and x64.\r
ac644614 6511\r
6512 If Gdtr is NULL, then ASSERT().\r
6513\r
6514 @param Gdtr Pointer to a GDTR descriptor.\r
6515\r
6516**/\r
6517VOID\r
6518EFIAPI\r
6519AsmWriteGdtr (\r
6520 IN CONST IA32_DESCRIPTOR *Gdtr\r
6521 );\r
6522\r
6523\r
6524/**\r
17f695ed 6525 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
ac644614 6526\r
6527 Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
030cd1a2 6528 function is only available on IA-32 and x64.\r
ac644614 6529\r
6530 If Idtr is NULL, then ASSERT().\r
6531\r
6532 @param Idtr Pointer to a IDTR descriptor.\r
6533\r
6534**/\r
6535VOID\r
6536EFIAPI\r
6537AsmReadIdtr (\r
6538 OUT IA32_DESCRIPTOR *Idtr\r
6539 );\r
6540\r
6541\r
6542/**\r
17f695ed 6543 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
ac644614 6544\r
6545 Writes the current IDTR descriptor and returns it in Idtr. This function is\r
030cd1a2 6546 only available on IA-32 and x64.\r
ac644614 6547\r
6548 If Idtr is NULL, then ASSERT().\r
6549\r
6550 @param Idtr Pointer to a IDTR descriptor.\r
6551\r
6552**/\r
6553VOID\r
6554EFIAPI\r
6555AsmWriteIdtr (\r
6556 IN CONST IA32_DESCRIPTOR *Idtr\r
6557 );\r
6558\r
6559\r
6560/**\r
6561 Reads the current Local Descriptor Table Register(LDTR) selector.\r
6562\r
6563 Reads and returns the current 16-bit LDTR descriptor value. This function is\r
030cd1a2 6564 only available on IA-32 and x64.\r
ac644614 6565\r
6566 @return The current selector of LDT.\r
6567\r
6568**/\r
6569UINT16\r
6570EFIAPI\r
6571AsmReadLdtr (\r
6572 VOID\r
6573 );\r
6574\r
6575\r
6576/**\r
17f695ed 6577 Writes the current Local Descriptor Table Register (LDTR) selector.\r
ac644614 6578\r
6579 Writes and the current LDTR descriptor specified by Ldtr. This function is\r
030cd1a2 6580 only available on IA-32 and x64.\r
ac644614 6581\r
6582 @param Ldtr 16-bit LDTR selector value.\r
6583\r
6584**/\r
6585VOID\r
6586EFIAPI\r
6587AsmWriteLdtr (\r
6588 IN UINT16 Ldtr\r
6589 );\r
6590\r
6591\r
6592/**\r
6593 Save the current floating point/SSE/SSE2 context to a buffer.\r
6594\r
6595 Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
6596 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
030cd1a2 6597 available on IA-32 and x64.\r
ac644614 6598\r
6599 If Buffer is NULL, then ASSERT().\r
6600 If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
6601\r
6602 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
6603\r
6604**/\r
6605VOID\r
6606EFIAPI\r
6607AsmFxSave (\r
6608 OUT IA32_FX_BUFFER *Buffer\r
6609 );\r
6610\r
6611\r
6612/**\r
6613 Restores the current floating point/SSE/SSE2 context from a buffer.\r
6614\r
6615 Restores the current floating point/SSE/SSE2 state from the buffer specified\r
6616 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
030cd1a2 6617 only available on IA-32 and x64.\r
ac644614 6618\r
6619 If Buffer is NULL, then ASSERT().\r
6620 If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
6621 If Buffer was not saved with AsmFxSave(), then ASSERT().\r
6622\r
6623 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
6624\r
6625**/\r
6626VOID\r
6627EFIAPI\r
6628AsmFxRestore (\r
6629 IN CONST IA32_FX_BUFFER *Buffer\r
6630 );\r
6631\r
6632\r
6633/**\r
6634 Reads the current value of 64-bit MMX Register #0 (MM0).\r
6635\r
6636 Reads and returns the current value of MM0. This function is only available\r
030cd1a2 6637 on IA-32 and x64.\r
ac644614 6638\r
6639 @return The current value of MM0.\r
6640\r
6641**/\r
6642UINT64\r
6643EFIAPI\r
6644AsmReadMm0 (\r
6645 VOID\r
6646 );\r
6647\r
6648\r
6649/**\r
6650 Reads the current value of 64-bit MMX Register #1 (MM1).\r
6651\r
6652 Reads and returns the current value of MM1. This function is only available\r
030cd1a2 6653 on IA-32 and x64.\r
ac644614 6654\r
6655 @return The current value of MM1.\r
6656\r
6657**/\r
6658UINT64\r
6659EFIAPI\r
6660AsmReadMm1 (\r
6661 VOID\r
6662 );\r
6663\r
6664\r
6665/**\r
6666 Reads the current value of 64-bit MMX Register #2 (MM2).\r
6667\r
6668 Reads and returns the current value of MM2. This function is only available\r
030cd1a2 6669 on IA-32 and x64.\r
ac644614 6670\r
6671 @return The current value of MM2.\r
6672\r
6673**/\r
6674UINT64\r
6675EFIAPI\r
6676AsmReadMm2 (\r
6677 VOID\r
6678 );\r
6679\r
6680\r
6681/**\r
6682 Reads the current value of 64-bit MMX Register #3 (MM3).\r
6683\r
6684 Reads and returns the current value of MM3. This function is only available\r
030cd1a2 6685 on IA-32 and x64.\r
ac644614 6686\r
6687 @return The current value of MM3.\r
6688\r
6689**/\r
6690UINT64\r
6691EFIAPI\r
6692AsmReadMm3 (\r
6693 VOID\r
6694 );\r
6695\r
6696\r
6697/**\r
6698 Reads the current value of 64-bit MMX Register #4 (MM4).\r
6699\r
6700 Reads and returns the current value of MM4. This function is only available\r
030cd1a2 6701 on IA-32 and x64.\r
ac644614 6702\r
6703 @return The current value of MM4.\r
6704\r
6705**/\r
6706UINT64\r
6707EFIAPI\r
6708AsmReadMm4 (\r
6709 VOID\r
6710 );\r
6711\r
6712\r
6713/**\r
6714 Reads the current value of 64-bit MMX Register #5 (MM5).\r
6715\r
6716 Reads and returns the current value of MM5. This function is only available\r
030cd1a2 6717 on IA-32 and x64.\r
ac644614 6718\r
6719 @return The current value of MM5.\r
6720\r
6721**/\r
6722UINT64\r
6723EFIAPI\r
6724AsmReadMm5 (\r
6725 VOID\r
6726 );\r
6727\r
6728\r
6729/**\r
6730 Reads the current value of 64-bit MMX Register #6 (MM6).\r
6731\r
6732 Reads and returns the current value of MM6. This function is only available\r
030cd1a2 6733 on IA-32 and x64.\r
ac644614 6734\r
6735 @return The current value of MM6.\r
6736\r
6737**/\r
6738UINT64\r
6739EFIAPI\r
6740AsmReadMm6 (\r
6741 VOID\r
6742 );\r
6743\r
6744\r
6745/**\r
6746 Reads the current value of 64-bit MMX Register #7 (MM7).\r
6747\r
6748 Reads and returns the current value of MM7. This function is only available\r
030cd1a2 6749 on IA-32 and x64.\r
ac644614 6750\r
6751 @return The current value of MM7.\r
6752\r
6753**/\r
6754UINT64\r
6755EFIAPI\r
6756AsmReadMm7 (\r
6757 VOID\r
6758 );\r
6759\r
6760\r
6761/**\r
6762 Writes the current value of 64-bit MMX Register #0 (MM0).\r
6763\r
6764 Writes the current value of MM0. This function is only available on IA32 and\r
030cd1a2 6765 x64.\r
ac644614 6766\r
6767 @param Value The 64-bit value to write to MM0.\r
6768\r
6769**/\r
6770VOID\r
6771EFIAPI\r
6772AsmWriteMm0 (\r
6773 IN UINT64 Value\r
6774 );\r
6775\r
6776\r
6777/**\r
6778 Writes the current value of 64-bit MMX Register #1 (MM1).\r
6779\r
6780 Writes the current value of MM1. This function is only available on IA32 and\r
030cd1a2 6781 x64.\r
ac644614 6782\r
6783 @param Value The 64-bit value to write to MM1.\r
6784\r
6785**/\r
6786VOID\r
6787EFIAPI\r
6788AsmWriteMm1 (\r
6789 IN UINT64 Value\r
6790 );\r
6791\r
6792\r
6793/**\r
6794 Writes the current value of 64-bit MMX Register #2 (MM2).\r
6795\r
6796 Writes the current value of MM2. This function is only available on IA32 and\r
030cd1a2 6797 x64.\r
ac644614 6798\r
6799 @param Value The 64-bit value to write to MM2.\r
6800\r
6801**/\r
6802VOID\r
6803EFIAPI\r
6804AsmWriteMm2 (\r
6805 IN UINT64 Value\r
6806 );\r
6807\r
6808\r
6809/**\r
6810 Writes the current value of 64-bit MMX Register #3 (MM3).\r
6811\r
6812 Writes the current value of MM3. This function is only available on IA32 and\r
030cd1a2 6813 x64.\r
ac644614 6814\r
6815 @param Value The 64-bit value to write to MM3.\r
6816\r
6817**/\r
6818VOID\r
6819EFIAPI\r
6820AsmWriteMm3 (\r
6821 IN UINT64 Value\r
6822 );\r
6823\r
6824\r
6825/**\r
6826 Writes the current value of 64-bit MMX Register #4 (MM4).\r
6827\r
6828 Writes the current value of MM4. This function is only available on IA32 and\r
030cd1a2 6829 x64.\r
ac644614 6830\r
6831 @param Value The 64-bit value to write to MM4.\r
6832\r
6833**/\r
6834VOID\r
6835EFIAPI\r
6836AsmWriteMm4 (\r
6837 IN UINT64 Value\r
6838 );\r
6839\r
6840\r
6841/**\r
6842 Writes the current value of 64-bit MMX Register #5 (MM5).\r
6843\r
6844 Writes the current value of MM5. This function is only available on IA32 and\r
030cd1a2 6845 x64.\r
ac644614 6846\r
6847 @param Value The 64-bit value to write to MM5.\r
6848\r
6849**/\r
6850VOID\r
6851EFIAPI\r
6852AsmWriteMm5 (\r
6853 IN UINT64 Value\r
6854 );\r
6855\r
6856\r
6857/**\r
6858 Writes the current value of 64-bit MMX Register #6 (MM6).\r
6859\r
6860 Writes the current value of MM6. This function is only available on IA32 and\r
030cd1a2 6861 x64.\r
ac644614 6862\r
6863 @param Value The 64-bit value to write to MM6.\r
6864\r
6865**/\r
6866VOID\r
6867EFIAPI\r
6868AsmWriteMm6 (\r
6869 IN UINT64 Value\r
6870 );\r
6871\r
6872\r
6873/**\r
6874 Writes the current value of 64-bit MMX Register #7 (MM7).\r
6875\r
6876 Writes the current value of MM7. This function is only available on IA32 and\r
030cd1a2 6877 x64.\r
ac644614 6878\r
6879 @param Value The 64-bit value to write to MM7.\r
6880\r
6881**/\r
6882VOID\r
6883EFIAPI\r
6884AsmWriteMm7 (\r
6885 IN UINT64 Value\r
6886 );\r
6887\r
6888\r
6889/**\r
6890 Reads the current value of Time Stamp Counter (TSC).\r
6891\r
6892 Reads and returns the current value of TSC. This function is only available\r
030cd1a2 6893 on IA-32 and x64.\r
ac644614 6894\r
6895 @return The current value of TSC\r
6896\r
6897**/\r
6898UINT64\r
6899EFIAPI\r
6900AsmReadTsc (\r
6901 VOID\r
6902 );\r
6903\r
6904\r
6905/**\r
6906 Reads the current value of a Performance Counter (PMC).\r
6907\r
6908 Reads and returns the current value of performance counter specified by\r
030cd1a2 6909 Index. This function is only available on IA-32 and x64.\r
ac644614 6910\r
6911 @param Index The 32-bit Performance Counter index to read.\r
6912\r
6913 @return The value of the PMC specified by Index.\r
6914\r
6915**/\r
6916UINT64\r
6917EFIAPI\r
6918AsmReadPmc (\r
6919 IN UINT32 Index\r
6920 );\r
6921\r
6922\r
6923/**\r
6924 Sets up a monitor buffer that is used by AsmMwait().\r
6925\r
6926 Executes a MONITOR instruction with the register state specified by Eax, Ecx\r
030cd1a2 6927 and Edx. Returns Eax. This function is only available on IA-32 and x64.\r
ac644614 6928\r
6929 @param Eax The value to load into EAX or RAX before executing the MONITOR\r
6930 instruction.\r
6931 @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
6932 instruction.\r
6933 @param Edx The value to load into EDX or RDX before executing the MONITOR\r
6934 instruction.\r
6935\r
6936 @return Eax\r
6937\r
6938**/\r
6939UINTN\r
6940EFIAPI\r
6941AsmMonitor (\r
6942 IN UINTN Eax,\r
6943 IN UINTN Ecx,\r
6944 IN UINTN Edx\r
6945 );\r
6946\r
6947\r
6948/**\r
6949 Executes an MWAIT instruction.\r
6950\r
6951 Executes an MWAIT instruction with the register state specified by Eax and\r
030cd1a2 6952 Ecx. Returns Eax. This function is only available on IA-32 and x64.\r
ac644614 6953\r
6954 @param Eax The value to load into EAX or RAX before executing the MONITOR\r
6955 instruction.\r
6956 @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
6957 instruction.\r
6958\r
6959 @return Eax\r
6960\r
6961**/\r
6962UINTN\r
6963EFIAPI\r
6964AsmMwait (\r
6965 IN UINTN Eax,\r
6966 IN UINTN Ecx\r
6967 );\r
6968\r
6969\r
6970/**\r
6971 Executes a WBINVD instruction.\r
6972\r
6973 Executes a WBINVD instruction. This function is only available on IA-32 and\r
030cd1a2 6974 x64.\r
ac644614 6975\r
6976**/\r
6977VOID\r
6978EFIAPI\r
6979AsmWbinvd (\r
6980 VOID\r
6981 );\r
6982\r
6983\r
6984/**\r
6985 Executes a INVD instruction.\r
6986\r
6987 Executes a INVD instruction. This function is only available on IA-32 and\r
030cd1a2 6988 x64.\r
ac644614 6989\r
6990**/\r
6991VOID\r
6992EFIAPI\r
6993AsmInvd (\r
6994 VOID\r
6995 );\r
6996\r
6997\r
6998/**\r
6999 Flushes a cache line from all the instruction and data caches within the\r
7000 coherency domain of the CPU.\r
7001\r
7002 Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
030cd1a2 7003 This function is only available on IA-32 and x64.\r
ac644614 7004\r
7005 @param LinearAddress The address of the cache line to flush. If the CPU is\r
7006 in a physical addressing mode, then LinearAddress is a\r
7007 physical address. If the CPU is in a virtual\r
7008 addressing mode, then LinearAddress is a virtual\r
7009 address.\r
7010\r
7011 @return LinearAddress\r
7012**/\r
7013VOID *\r
7014EFIAPI\r
7015AsmFlushCacheLine (\r
7016 IN VOID *LinearAddress\r
7017 );\r
7018\r
7019\r
7020/**\r
7021 Enables the 32-bit paging mode on the CPU.\r
7022\r
7023 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
7024 must be properly initialized prior to calling this service. This function\r
7025 assumes the current execution mode is 32-bit protected mode. This function is\r
7026 only available on IA-32. After the 32-bit paging mode is enabled, control is\r
7027 transferred to the function specified by EntryPoint using the new stack\r
7028 specified by NewStack and passing in the parameters specified by Context1 and\r
7029 Context2. Context1 and Context2 are optional and may be NULL. The function\r
7030 EntryPoint must never return.\r
7031\r
7032 If the current execution mode is not 32-bit protected mode, then ASSERT().\r
7033 If EntryPoint is NULL, then ASSERT().\r
7034 If NewStack is NULL, then ASSERT().\r
7035\r
7036 There are a number of constraints that must be followed before calling this\r
7037 function:\r
7038 1) Interrupts must be disabled.\r
7039 2) The caller must be in 32-bit protected mode with flat descriptors. This\r
7040 means all descriptors must have a base of 0 and a limit of 4GB.\r
7041 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
7042 descriptors.\r
7043 4) CR3 must point to valid page tables that will be used once the transition\r
7044 is complete, and those page tables must guarantee that the pages for this\r
7045 function and the stack are identity mapped.\r
7046\r
7047 @param EntryPoint A pointer to function to call with the new stack after\r
7048 paging is enabled.\r
7049 @param Context1 A pointer to the context to pass into the EntryPoint\r
7050 function as the first parameter after paging is enabled.\r
7051 @param Context2 A pointer to the context to pass into the EntryPoint\r
7052 function as the second parameter after paging is enabled.\r
7053 @param NewStack A pointer to the new stack to use for the EntryPoint\r
7054 function after paging is enabled.\r
7055\r
7056**/\r
7057VOID\r
7058EFIAPI\r
7059AsmEnablePaging32 (\r
7060 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
7061 IN VOID *Context1, OPTIONAL\r
7062 IN VOID *Context2, OPTIONAL\r
7063 IN VOID *NewStack\r
7064 );\r
7065\r
7066\r
7067/**\r
7068 Disables the 32-bit paging mode on the CPU.\r
7069\r
7070 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
7071 mode. This function assumes the current execution mode is 32-paged protected\r
7072 mode. This function is only available on IA-32. After the 32-bit paging mode\r
7073 is disabled, control is transferred to the function specified by EntryPoint\r
7074 using the new stack specified by NewStack and passing in the parameters\r
7075 specified by Context1 and Context2. Context1 and Context2 are optional and\r
7076 may be NULL. The function EntryPoint must never return.\r
7077\r
7078 If the current execution mode is not 32-bit paged mode, then ASSERT().\r
7079 If EntryPoint is NULL, then ASSERT().\r
7080 If NewStack is NULL, then ASSERT().\r
7081\r
7082 There are a number of constraints that must be followed before calling this\r
7083 function:\r
7084 1) Interrupts must be disabled.\r
7085 2) The caller must be in 32-bit paged mode.\r
7086 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
7087 4) CR3 must point to valid page tables that guarantee that the pages for\r
7088 this function and the stack are identity mapped.\r
7089\r
7090 @param EntryPoint A pointer to function to call with the new stack after\r
7091 paging is disabled.\r
7092 @param Context1 A pointer to the context to pass into the EntryPoint\r
7093 function as the first parameter after paging is disabled.\r
7094 @param Context2 A pointer to the context to pass into the EntryPoint\r
7095 function as the second parameter after paging is\r
7096 disabled.\r
7097 @param NewStack A pointer to the new stack to use for the EntryPoint\r
7098 function after paging is disabled.\r
7099\r
7100**/\r
7101VOID\r
7102EFIAPI\r
7103AsmDisablePaging32 (\r
7104 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
7105 IN VOID *Context1, OPTIONAL\r
7106 IN VOID *Context2, OPTIONAL\r
7107 IN VOID *NewStack\r
7108 );\r
7109\r
7110\r
7111/**\r
7112 Enables the 64-bit paging mode on the CPU.\r
7113\r
7114 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
7115 must be properly initialized prior to calling this service. This function\r
7116 assumes the current execution mode is 32-bit protected mode with flat\r
7117 descriptors. This function is only available on IA-32. After the 64-bit\r
7118 paging mode is enabled, control is transferred to the function specified by\r
7119 EntryPoint using the new stack specified by NewStack and passing in the\r
7120 parameters specified by Context1 and Context2. Context1 and Context2 are\r
7121 optional and may be 0. The function EntryPoint must never return.\r
7122\r
7123 If the current execution mode is not 32-bit protected mode with flat\r
7124 descriptors, then ASSERT().\r
7125 If EntryPoint is 0, then ASSERT().\r
7126 If NewStack is 0, then ASSERT().\r
7127\r
17f695ed 7128 @param Cs The 16-bit selector to load in the CS before EntryPoint\r
ac644614 7129 is called. The descriptor in the GDT that this selector\r
7130 references must be setup for long mode.\r
7131 @param EntryPoint The 64-bit virtual address of the function to call with\r
7132 the new stack after paging is enabled.\r
7133 @param Context1 The 64-bit virtual address of the context to pass into\r
7134 the EntryPoint function as the first parameter after\r
7135 paging is enabled.\r
7136 @param Context2 The 64-bit virtual address of the context to pass into\r
7137 the EntryPoint function as the second parameter after\r
7138 paging is enabled.\r
7139 @param NewStack The 64-bit virtual address of the new stack to use for\r
7140 the EntryPoint function after paging is enabled.\r
7141\r
7142**/\r
7143VOID\r
7144EFIAPI\r
7145AsmEnablePaging64 (\r
17f695ed 7146 IN UINT16 Cs,\r
ac644614 7147 IN UINT64 EntryPoint,\r
7148 IN UINT64 Context1, OPTIONAL\r
7149 IN UINT64 Context2, OPTIONAL\r
7150 IN UINT64 NewStack\r
7151 );\r
7152\r
7153\r
7154/**\r
7155 Disables the 64-bit paging mode on the CPU.\r
7156\r
7157 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
7158 mode. This function assumes the current execution mode is 64-paging mode.\r
030cd1a2 7159 This function is only available on x64. After the 64-bit paging mode is\r
ac644614 7160 disabled, control is transferred to the function specified by EntryPoint\r
7161 using the new stack specified by NewStack and passing in the parameters\r
7162 specified by Context1 and Context2. Context1 and Context2 are optional and\r
7163 may be 0. The function EntryPoint must never return.\r
7164\r
7165 If the current execution mode is not 64-bit paged mode, then ASSERT().\r
7166 If EntryPoint is 0, then ASSERT().\r
7167 If NewStack is 0, then ASSERT().\r
7168\r
17f695ed 7169 @param Cs The 16-bit selector to load in the CS before EntryPoint\r
ac644614 7170 is called. The descriptor in the GDT that this selector\r
7171 references must be setup for 32-bit protected mode.\r
7172 @param EntryPoint The 64-bit virtual address of the function to call with\r
7173 the new stack after paging is disabled.\r
7174 @param Context1 The 64-bit virtual address of the context to pass into\r
7175 the EntryPoint function as the first parameter after\r
7176 paging is disabled.\r
7177 @param Context2 The 64-bit virtual address of the context to pass into\r
7178 the EntryPoint function as the second parameter after\r
7179 paging is disabled.\r
7180 @param NewStack The 64-bit virtual address of the new stack to use for\r
7181 the EntryPoint function after paging is disabled.\r
7182\r
7183**/\r
7184VOID\r
7185EFIAPI\r
7186AsmDisablePaging64 (\r
17f695ed 7187 IN UINT16 Cs,\r
ac644614 7188 IN UINT32 EntryPoint,\r
7189 IN UINT32 Context1, OPTIONAL\r
7190 IN UINT32 Context2, OPTIONAL\r
7191 IN UINT32 NewStack\r
7192 );\r
7193\r
7194\r
7195//\r
7196// 16-bit thunking services\r
7197//\r
7198\r
7199/**\r
7200 Retrieves the properties for 16-bit thunk functions.\r
7201\r
7202 Computes the size of the buffer and stack below 1MB required to use the\r
7203 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r
7204 buffer size is returned in RealModeBufferSize, and the stack size is returned\r
7205 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
7206 then the actual minimum stack size is ExtraStackSize plus the maximum number\r
7207 of bytes that need to be passed to the 16-bit real mode code.\r
7208\r
7209 If RealModeBufferSize is NULL, then ASSERT().\r
7210 If ExtraStackSize is NULL, then ASSERT().\r
7211\r
7212 @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r
7213 required to use the 16-bit thunk functions.\r
7214 @param ExtraStackSize A pointer to the extra size of stack below 1MB\r
7215 that the 16-bit thunk functions require for\r
7216 temporary storage in the transition to and from\r
7217 16-bit real mode.\r
7218\r
7219**/\r
7220VOID\r
7221EFIAPI\r
7222AsmGetThunk16Properties (\r
7223 OUT UINT32 *RealModeBufferSize,\r
7224 OUT UINT32 *ExtraStackSize\r
7225 );\r
7226\r
7227\r
7228/**\r
7229 Prepares all structures a code required to use AsmThunk16().\r
7230\r
7231 Prepares all structures and code required to use AsmThunk16().\r
7232\r
7233 If ThunkContext is NULL, then ASSERT().\r
7234\r
7235 @param ThunkContext A pointer to the context structure that describes the\r
7236 16-bit real mode code to call.\r
7237\r
7238**/\r
7239VOID\r
7240EFIAPI\r
7241AsmPrepareThunk16 (\r
7242 OUT THUNK_CONTEXT *ThunkContext\r
7243 );\r
7244\r
7245\r
7246/**\r
7247 Transfers control to a 16-bit real mode entry point and returns the results.\r
7248\r
7249 Transfers control to a 16-bit real mode entry point and returns the results.\r
17f695ed 7250 AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r
7251 This function must be called with interrupts disabled.\r
7252\r
7253 The register state from the RealModeState field of ThunkContext is restored just prior \r
7254 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r
7255 which is used to set the interrupt state when a 16-bit real mode entry point is called.\r
7256 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r
7257 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r
7258 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r
7259 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r
7260 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r
7261 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r
7262 point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r
7263 after the RETF instruction is executed.\r
7264 \r
7265 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
7266 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r
7267 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r
7268 \r
7269 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
7270 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r
7271 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r
7272 \r
7273 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r
7274 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r
7275 \r
7276 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
7277 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r
7278 disable the A20 mask.\r
7279 \r
7280 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r
7281 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r
7282 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
7283 \r
7284 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r
7285 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
7286 \r
ac644614 7287 If ThunkContext is NULL, then ASSERT().\r
7288 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r
17f695ed 7289 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
7290 ThunkAttributes, then ASSERT().\r
ac644614 7291\r
7292 @param ThunkContext A pointer to the context structure that describes the\r
7293 16-bit real mode code to call.\r
7294\r
7295**/\r
7296VOID\r
7297EFIAPI\r
7298AsmThunk16 (\r
7299 IN OUT THUNK_CONTEXT *ThunkContext\r
7300 );\r
7301\r
7302\r
7303/**\r
7304 Prepares all structures and code for a 16-bit real mode thunk, transfers\r
7305 control to a 16-bit real mode entry point, and returns the results.\r
7306\r
7307 Prepares all structures and code for a 16-bit real mode thunk, transfers\r
7308 control to a 16-bit real mode entry point, and returns the results. If the\r
7309 caller only need to perform a single 16-bit real mode thunk, then this\r
7310 service should be used. If the caller intends to make more than one 16-bit\r
7311 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r
7312 once and AsmThunk16() can be called for each 16-bit real mode thunk.\r
7313\r
17f695ed 7314 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r
ac644614 7315\r
7316 @param ThunkContext A pointer to the context structure that describes the\r
7317 16-bit real mode code to call.\r
7318\r
7319**/\r
7320VOID\r
7321EFIAPI\r
7322AsmPrepareAndThunk16 (\r
7323 IN OUT THUNK_CONTEXT *ThunkContext\r
7324 );\r
7325\r
ac644614 7326#endif\r
e3a7917f 7327#endif\r
ac644614 7328\r
7329\r