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UefiCpuPkg: Change OPTIONAL keyword usage style
[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h
CommitLineData
3e8ad6bd
JF		 1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
8c61f193 4 Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
4c0f6e34
LD		 5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
3e8ad6bd
JF		 8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
01acb06c
RN		 18#include <Register/Intel/Msr.h>\r
19#include <Register/Intel/LocalApic.h>\r
20#include <Register/Intel/Microcode.h>\r
3e8ad6bd
JF		 21\r
22#include <Library/MpInitLib.h>\r
23#include <Library/BaseLib.h>\r
24#include <Library/BaseMemoryLib.h>\r
25#include <Library/MemoryAllocationLib.h>\r
26#include <Library/DebugLib.h>\r
27#include <Library/LocalApicLib.h>\r
28#include <Library/CpuLib.h>\r
29#include <Library/UefiCpuLib.h>\r
30#include <Library/TimerLib.h>\r
31#include <Library/SynchronizationLib.h>\r
32#include <Library/MtrrLib.h>\r
33#include <Library/HobLib.h>\r
d5339c04 34#include <Library/PcdLib.h>\r
bce03284 35#include <Library/MicrocodeLib.h>\r
3e8ad6bd 36\r
348a34d9
HW		 37#include <Guid/MicrocodePatchHob.h>\r
38\r
b8b04307
JF		 39#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
40\r
93ca4c0f
JF		 41#define CPU_INIT_MP_LIB_HOB_GUID \\r
42 { \\r
43 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
44 }\r
45\r
41be0da5
JF		 46//\r
47// The MP data for switch BSP\r
48//\r
49#define CPU_SWITCH_STATE_IDLE 0\r
50#define CPU_SWITCH_STATE_STORED 1\r
51#define CPU_SWITCH_STATE_LOADED 2\r
52\r
d786a172
HW		 53//\r
54// Default maximum number of entries to store the microcode patches information\r
55//\r
56#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
57\r
58//\r
59// Data structure for microcode patch information\r
60//\r
61typedef struct {\r
62 UINTN Address;\r
63 UINTN Size;\r
d786a172
HW		 64} MICROCODE_PATCH_INFO;\r
65\r
41be0da5
JF		 66//\r
67// CPU exchange information for switch BSP\r
68//\r
69typedef struct {\r
70 UINT8 State; // offset 0\r
71 UINTN StackPointer; // offset 4 / 8\r
72 IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
73 IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
74} CPU_EXCHANGE_ROLE_INFO;\r
75\r
9ebcf0f4
JF		 76//\r
77// AP loop state when APs are in idle state\r
78// It's value is the same with PcdCpuApLoopMode\r
79//\r
80typedef enum {\r
81 ApInHltLoop = 1,\r
82 ApInMwaitLoop = 2,\r
83 ApInRunLoop = 3\r
84} AP_LOOP_MODE;\r
85\r
e59f8f6b
JF		 86//\r
87// AP initialization state during APs wakeup\r
88//\r
89typedef enum {\r
90 ApInitConfig = 1,\r
91 ApInitReconfig = 2,\r
92 ApInitDone = 3\r
93} AP_INIT_STATE;\r
94\r
03a1a925
JF		 95//\r
96// AP state\r
97//\r
2a5997f8
ED		 98// The state transitions for an AP when it process a procedure are:\r
99// Idle ----> Ready ----> Busy ----> Idle\r
100// [BSP] [AP] [AP]\r
101//\r
03a1a925
JF		 102typedef enum {\r
103 CpuStateIdle,\r
104 CpuStateReady,\r
105 CpuStateBusy,\r
e048ce88 106 CpuStateFinished,\r
03a1a925
JF		 107 CpuStateDisabled\r
108} CPU_STATE;\r
109\r
68cb9330
JF		 110//\r
111// CPU volatile registers around INIT-SIPI-SIPI\r
112//\r
113typedef struct {\r
114 UINTN Cr0;\r
115 UINTN Cr3;\r
116 UINTN Cr4;\r
117 UINTN Dr0;\r
118 UINTN Dr1;\r
119 UINTN Dr2;\r
120 UINTN Dr3;\r
121 UINTN Dr6;\r
122 UINTN Dr7;\r
e9415e48
JW		 123 IA32_DESCRIPTOR Gdtr;\r
124 IA32_DESCRIPTOR Idtr;\r
125 UINT16 Tr;\r
68cb9330
JF		 126} CPU_VOLATILE_REGISTERS;\r
127\r
e59f8f6b
JF		 128//\r
129// AP related data\r
130//\r
131typedef struct {\r
132 SPIN_LOCK ApLock;\r
133 volatile UINT32 *StartupApSignal;\r
134 volatile UINTN ApFunction;\r
135 volatile UINTN ApFunctionArgument;\r
e59f8f6b 136 BOOLEAN CpuHealthy;\r
03a1a925 137 volatile CPU_STATE State;\r
68cb9330 138 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
e59f8f6b
JF		 139 BOOLEAN Waiting;\r
140 BOOLEAN *Finished;\r
141 UINT64 ExpectedTime;\r
142 UINT64 CurrentTime;\r
143 UINT64 TotalTime;\r
144 EFI_EVENT WaitEvent;\r
999463c8
HW		 145 UINT32 ProcessorSignature;\r
146 UINT8 PlatformId;\r
e1ed5573 147 UINT64 MicrocodeEntryAddr;\r
030ba309 148 UINT32 MicrocodeRevision;\r
e59f8f6b
JF		 149} CPU_AP_DATA;\r
150\r
151//\r
152// Basic CPU information saved in Guided HOB.\r
153// Because the contents will be shard between PEI and DXE,\r
154// we need to make sure the each fields offset same in different\r
155// architecture.\r
156//\r
dd3fa0cd 157#pragma pack (1)\r
e59f8f6b
JF		 158typedef struct {\r
159 UINT32 InitialApicId;\r
160 UINT32 ApicId;\r
161 UINT32 Health;\r
dd3fa0cd 162 UINT64 ApTopOfStack;\r
e59f8f6b 163} CPU_INFO_IN_HOB;\r
dd3fa0cd 164#pragma pack ()\r
e59f8f6b 165\r
f7f85d83
JF		 166//\r
167// AP reset code information including code address and size,\r
168// this structure will be shared be C code and assembly code.\r
169// It is natural aligned by design.\r
170//\r
171typedef struct {\r
172 UINT8 *RendezvousFunnelAddress;\r
173 UINTN ModeEntryOffset;\r
174 UINTN RendezvousFunnelSize;\r
175 UINT8 *RelocateApLoopFuncAddress;\r
176 UINTN RelocateApLoopFuncSize;\r
f32bfe6d 177 UINTN ModeTransitionOffset;\r
7b7508ad
TL		 178 UINTN SwitchToRealSize;\r
179 UINTN SwitchToRealOffset;\r
180 UINTN SwitchToRealNoNxOffset;\r
181 UINTN SwitchToRealPM16ModeOffset;\r
182 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 183} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 184\r
e59f8f6b
JF		 185typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
186\r
d94e5f67
JF		 187#pragma pack(1)\r
188\r
189//\r
190// MP CPU exchange information for AP reset code\r
191// This structure is required to be packed because fixed field offsets\r
192// into this structure are used in assembly code in this module\r
193//\r
194typedef struct {\r
d94e5f67
JF		 195 UINTN StackStart;\r
196 UINTN StackSize;\r
197 UINTN CFunction;\r
198 IA32_DESCRIPTOR GdtrProfile;\r
199 IA32_DESCRIPTOR IdtrProfile;\r
200 UINTN BufferStart;\r
201 UINTN ModeOffset;\r
37676b9f 202 UINTN ApIndex;\r
d94e5f67
JF		 203 UINTN CodeSegment;\r
204 UINTN DataSegment;\r
5c66d125 205 UINTN EnableExecuteDisable;\r
d94e5f67 206 UINTN Cr3;\r
46d4b885
JF		 207 UINTN InitFlag;\r
208 CPU_INFO_IN_HOB *CpuInfo;\r
0594ec41 209 UINTN NumApsExecuting;\r
e59f8f6b 210 CPU_MP_DATA *CpuMpData;\r
3b2928b4 211 UINTN InitializeFloatingPointUnitsAddress;\r
f32bfe6d
JW		 212 UINT32 ModeTransitionMemory;\r
213 UINT16 ModeTransitionSegment;\r
214 UINT32 ModeHighMemory;\r
215 UINT16 ModeHighSegment;\r
09f69a87
RN		 216 //\r
217 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
218 //\r
219 BOOLEAN Enable5LevelPaging;\r
7b7508ad
TL		 220 BOOLEAN SevEsIsEnabled;\r
221 UINTN GhcbBase;\r
d94e5f67
JF		 222} MP_CPU_EXCHANGE_INFO;\r
223\r
224#pragma pack()\r
e59f8f6b
JF		 225\r
226//\r
227// CPU MP Data save in memory\r
228//\r
229struct _CPU_MP_DATA {\r
230 UINT64 CpuInfoInHob;\r
231 UINT32 CpuCount;\r
232 UINT32 BspNumber;\r
233 //\r
234 // The above fields data will be passed from PEI to DXE\r
235 // Please make sure the fields offset same in the different\r
236 // architecture.\r
237 //\r
238 SPIN_LOCK MpLock;\r
239 UINTN Buffer;\r
240 UINTN CpuApStackSize;\r
241 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
242 UINTN WakeupBuffer;\r
66833b2a 243 UINTN WakeupBufferHigh;\r
e59f8f6b
JF		 244 UINTN BackupBuffer;\r
245 UINTN BackupBufferSize;\r
e59f8f6b 246\r
e59f8f6b 247 volatile UINT32 FinishedCount;\r
2da3e96c 248 UINT32 RunningCount;\r
e59f8f6b
JF		 249 BOOLEAN SingleThread;\r
250 EFI_AP_PROCEDURE Procedure;\r
251 VOID *ProcArguments;\r
252 BOOLEAN *Finished;\r
253 UINT64 ExpectedTime;\r
254 UINT64 CurrentTime;\r
255 UINT64 TotalTime;\r
256 EFI_EVENT WaitEvent;\r
257 UINTN **FailedCpuList;\r
258\r
259 AP_INIT_STATE InitFlag;\r
41be0da5 260 BOOLEAN SwitchBspFlag;\r
b3775af2 261 UINTN NewBspNumber;\r
41be0da5
JF		 262 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
263 CPU_EXCHANGE_ROLE_INFO APInfo;\r
e59f8f6b
JF		 264 MTRR_SETTINGS MtrrTable;\r
265 UINT8 ApLoopMode;\r
266 UINT8 ApTargetCState;\r
267 UINT16 PmCodeSegment;\r
7b7508ad 268 UINT16 Pm16CodeSegment;\r
e59f8f6b
JF		 269 CPU_AP_DATA *CpuData;\r
270 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
ffab2442
JF		 271\r
272 UINT32 CurrentTimerCount;\r
273 UINTN DivideValue;\r
274 UINT8 Vector;\r
275 BOOLEAN PeriodicMode;\r
276 BOOLEAN TimerInterruptState;\r
d148a178
HW		 277 UINT64 MicrocodePatchAddress;\r
278 UINT64 MicrocodePatchRegionSize;\r
2a089134 279\r
58942277
ED		 280 //\r
281 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
282 // Two cases need to set this value to TRUE. One is in HLT\r
283 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 284 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
58942277
ED		 285 // driver.\r
286 //\r
287 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98
TL		 288\r
289 BOOLEAN SevEsIsEnabled;\r
7b7508ad
TL		 290 UINTN SevEsAPBuffer;\r
291 UINTN SevEsAPResetStackStart;\r
292 CPU_MP_DATA *NewCpuMpData;\r
293\r
294 UINT64 GhcbBase;\r
e59f8f6b 295};\r
93ca4c0f 296\r
20da7ca4
TL		 297#define AP_SAFE_STACK_SIZE 128\r
298#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
7b7508ad
TL		 299\r
300#pragma pack(1)\r
301\r
302typedef struct {\r
303 UINT8 InsnBuffer[8];\r
304 UINT16 Rip;\r
305 UINT16 Segment;\r
306} SEV_ES_AP_JMP_FAR;\r
307\r
308#pragma pack()\r
309\r
310/**\r
311 Assembly code to move an AP from long mode to real mode.\r
312\r
313 Move an AP from long mode to real mode in preparation to invoking\r
314 the reset vector. This is used for SEV-ES guests where a hypervisor\r
315 is not allowed to set the CS and RIP to point to the reset vector.\r
316\r
317 @param[in] BufferStart The reset vector target.\r
318 @param[in] Code16 16-bit protected mode code segment value.\r
319 @param[in] Code32 32-bit protected mode code segment value.\r
320 @param[in] StackStart The start of a stack to be used for transitioning\r
321 from long mode to real mode.\r
322**/\r
323typedef\r
324VOID\r
325(EFIAPI AP_RESET) (\r
326 IN UINTN BufferStart,\r
327 IN UINT16 Code16,\r
328 IN UINT16 Code32,\r
329 IN UINTN StackStart\r
330 );\r
331\r
93ca4c0f
JF		 332extern EFI_GUID mCpuInitMpLibHobGuid;\r
333\r
76157021
JF		 334/**\r
335 Assembly code to place AP into safe loop mode.\r
336\r
337 Place AP into targeted C-State if MONITOR is supported, otherwise\r
338 place AP into hlt state.\r
339 Place AP in protected mode if the current is long mode. Due to AP maybe\r
340 wakeup by some hardware event. It could avoid accessing page table that\r
341 may not available during booting to OS.\r
342\r
343 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
344 FALSE indicates MONITOR is not supported.\r
345 @param[in] ApTargetCState Target C-State value.\r
346 @param[in] PmCodeSegment Protected mode code segment value.\r
347**/\r
348typedef\r
349VOID\r
350(EFIAPI * ASM_RELOCATE_AP_LOOP) (\r
351 IN BOOLEAN MwaitSupport,\r
352 IN UINTN ApTargetCState,\r
bf2786dc 353 IN UINTN PmCodeSegment,\r
9f91cb01 354 IN UINTN TopOfApStack,\r
20da7ca4
TL		 355 IN UINTN NumberToFinish,\r
356 IN UINTN Pm16CodeSegment,\r
357 IN UINTN SevEsAPJumpTable,\r
358 IN UINTN WakeupBuffer\r
76157021 359 );\r
f7f85d83
JF		 360\r
361/**\r
362 Assembly code to get starting address and size of the rendezvous entry for APs.\r
363 Information for fixing a jump instruction in the code is also returned.\r
364\r
365 @param[out] AddressMap Output buffer for address map information.\r
366**/\r
367VOID\r
368EFIAPI\r
369AsmGetAddressMap (\r
370 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
371 );\r
372\r
41be0da5
JF		 373/**\r
374 This function is called by both the BSP and the AP which is to become the BSP to\r
375 Exchange execution context including stack between them. After return from this\r
376 function, the BSP becomes AP and the AP becomes the BSP.\r
377\r
378 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
379 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
380\r
381**/\r
382VOID\r
383EFIAPI\r
384AsmExchangeRole (\r
385 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
386 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
387 );\r
388\r
93ca4c0f
JF		 389/**\r
390 Get the pointer to CPU MP Data structure.\r
391\r
392 @return The pointer to CPU MP Data structure.\r
393**/\r
394CPU_MP_DATA *\r
395GetCpuMpData (\r
396 VOID\r
397 );\r
398\r
399/**\r
400 Save the pointer to CPU MP Data structure.\r
401\r
402 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
403**/\r
404VOID\r
405SaveCpuMpData (\r
406 IN CPU_MP_DATA *CpuMpData\r
407 );\r
408\r
ed66e0e3
JF		 409\r
410/**\r
a6b3d753 411 Get available system memory below 1MB by specified size.\r
ed66e0e3 412\r
a6b3d753
SZ		 413 @param[in] WakeupBufferSize Wakeup buffer size required\r
414\r
415 @retval other Return wakeup buffer address below 1MB.\r
416 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 417**/\r
a6b3d753
SZ		 418UINTN\r
419GetWakeupBuffer (\r
420 IN UINTN WakeupBufferSize\r
ed66e0e3
JF		 421 );\r
422\r
f32bfe6d
JW		 423/**\r
424 Get available EfiBootServicesCode memory below 4GB by specified size.\r
425\r
426 This buffer is required to safely transfer AP from real address mode to\r
427 protected mode or long mode, due to the fact that the buffer returned by\r
428 GetWakeupBuffer() may be marked as non-executable.\r
429\r
430 @param[in] BufferSize Wakeup transition buffer size.\r
431\r
432 @retval other Return wakeup transition buffer address below 4GB.\r
433 @retval 0 Cannot find free memory below 4GB.\r
434**/\r
435UINTN\r
436GetModeTransitionBuffer (\r
437 IN UINTN BufferSize\r
438 );\r
439\r
7b7508ad
TL		 440/**\r
441 Return the address of the SEV-ES AP jump table.\r
442\r
443 This buffer is required in order for an SEV-ES guest to transition from\r
444 UEFI into an OS.\r
445\r
446 @return Return SEV-ES AP jump table buffer\r
447**/\r
448UINTN\r
449GetSevEsAPMemory (\r
450 VOID\r
451 );\r
452\r
96f5920d
JF		 453/**\r
454 This function will be called by BSP to wakeup AP.\r
455\r
456 @param[in] CpuMpData Pointer to CPU MP Data\r
457 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
458 FALSE: Send IPI to AP by ApicId\r
459 @param[in] ProcessorNumber The handle number of specified processor\r
460 @param[in] Procedure The function to be invoked by AP\r
461 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 462 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
96f5920d
JF		 463**/\r
464VOID\r
465WakeUpAP (\r
466 IN CPU_MP_DATA *CpuMpData,\r
467 IN BOOLEAN Broadcast,\r
468 IN UINTN ProcessorNumber,\r
4ec586b9
MK		 469 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
470 IN VOID *ProcedureArgument OPTIONAL,\r
cf4e79e4 471 IN BOOLEAN WakeUpDisabledAps OPTIONAL\r
96f5920d
JF		 472 );\r
473\r
93ca4c0f
JF		 474/**\r
475 Initialize global data for MP support.\r
476\r
477 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
478**/\r
479VOID\r
480InitMpGlobalData (\r
481 IN CPU_MP_DATA *CpuMpData\r
482 );\r
483\r
86efe976
JF		 484/**\r
485 Worker function to execute a caller provided function on all enabled APs.\r
486\r
487 @param[in] Procedure A pointer to the function to be run on\r
488 enabled APs of the system.\r
489 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
490 the function specified by Procedure one by\r
491 one, in ascending order of processor handle\r
492 number. If FALSE, then all the enabled APs\r
493 execute the function specified by Procedure\r
494 simultaneously.\r
ee0c39fa 495 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
86efe976
JF		 496 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
497 service.\r
367284e7 498 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
86efe976
JF		 499 APs to return from Procedure, either for\r
500 blocking or non-blocking mode.\r
501 @param[in] ProcedureArgument The parameter passed into Procedure for\r
502 all APs.\r
503 @param[out] FailedCpuList If all APs finish successfully, then its\r
504 content is set to NULL. If not all APs\r
505 finish before timeout expires, then its\r
506 content is set to address of the buffer\r
507 holding handle numbers of the failed APs.\r
508\r
509 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
510 the timeout expired.\r
511 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
512 to all enabled APs.\r
513 @retval others Failed to Startup all APs.\r
514\r
515**/\r
516EFI_STATUS\r
ee0c39fa 517StartupAllCPUsWorker (\r
86efe976
JF		 518 IN EFI_AP_PROCEDURE Procedure,\r
519 IN BOOLEAN SingleThread,\r
ee0c39fa 520 IN BOOLEAN ExcludeBsp,\r
86efe976
JF		 521 IN EFI_EVENT WaitEvent OPTIONAL,\r
522 IN UINTN TimeoutInMicroseconds,\r
523 IN VOID *ProcedureArgument OPTIONAL,\r
524 OUT UINTN **FailedCpuList OPTIONAL\r
525 );\r
526\r
20ae5774
JF		 527/**\r
528 Worker function to let the caller get one enabled AP to execute a caller-provided\r
529 function.\r
530\r
531 @param[in] Procedure A pointer to the function to be run on\r
532 enabled APs of the system.\r
533 @param[in] ProcessorNumber The handle number of the AP.\r
534 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
535 service.\r
367284e7 536 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
20ae5774
JF		 537 APs to return from Procedure, either for\r
538 blocking or non-blocking mode.\r
539 @param[in] ProcedureArgument The parameter passed into Procedure for\r
540 all APs.\r
541 @param[out] Finished If AP returns from Procedure before the\r
542 timeout expires, its content is set to TRUE.\r
543 Otherwise, the value is set to FALSE.\r
544\r
545 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
546 the timeout expires.\r
547 @retval others Failed to Startup AP.\r
548\r
549**/\r
550EFI_STATUS\r
551StartupThisAPWorker (\r
552 IN EFI_AP_PROCEDURE Procedure,\r
553 IN UINTN ProcessorNumber,\r
554 IN EFI_EVENT WaitEvent OPTIONAL,\r
555 IN UINTN TimeoutInMicroseconds,\r
556 IN VOID *ProcedureArgument OPTIONAL,\r
557 OUT BOOLEAN *Finished OPTIONAL\r
558 );\r
559\r
41be0da5
JF		 560/**\r
561 Worker function to switch the requested AP to be the BSP from that point onward.\r
562\r
563 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
564 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
565 enabled AP. Otherwise, it will be disabled.\r
566\r
567 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 568 @retval others Failed to switch BSP.\r
41be0da5
JF		 569\r
570**/\r
571EFI_STATUS\r
572SwitchBSPWorker (\r
573 IN UINTN ProcessorNumber,\r
574 IN BOOLEAN EnableOldBSP\r
575 );\r
576\r
e37109bc
JF		 577/**\r
578 Worker function to let the caller enable or disable an AP from this point onward.\r
579 This service may only be called from the BSP.\r
580\r
581 @param[in] ProcessorNumber The handle number of AP.\r
582 @param[in] EnableAP Specifies the new state for the processor for\r
583 enabled, FALSE for disabled.\r
584 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
585 the new health status of the AP.\r
586\r
587 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
588 @retval others Failed to Enable/Disable AP.\r
589\r
590**/\r
591EFI_STATUS\r
592EnableDisableApWorker (\r
593 IN UINTN ProcessorNumber,\r
594 IN BOOLEAN EnableAP,\r
595 IN UINT32 *HealthFlag OPTIONAL\r
596 );\r
597\r
93ca4c0f
JF		 598/**\r
599 Get pointer to CPU MP Data structure from GUIDed HOB.\r
600\r
601 @return The pointer to CPU MP Data structure.\r
602**/\r
603CPU_MP_DATA *\r
604GetCpuMpDataFromGuidedHob (\r
605 VOID\r
606 );\r
08085f08
JF		 607\r
608/** Checks status of specified AP.\r
609\r
610 This function checks whether the specified AP has finished the task assigned\r
611 by StartupThisAP(), and whether timeout expires.\r
612\r
613 @param[in] ProcessorNumber The handle number of processor.\r
614\r
615 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
616 @retval EFI_TIMEOUT The timeout expires.\r
617 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
618**/\r
619EFI_STATUS\r
620CheckThisAP (\r
621 IN UINTN ProcessorNumber\r
622 );\r
623\r
624/**\r
625 Checks status of all APs.\r
626\r
627 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
628 and whether timeout expires.\r
629\r
630 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
631 @retval EFI_TIMEOUT The timeout expires.\r
632 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
633**/\r
634EFI_STATUS\r
635CheckAllAPs (\r
636 VOID\r
637 );\r
638\r
639/**\r
640 Checks APs status and updates APs status if needed.\r
641\r
642**/\r
643VOID\r
644CheckAndUpdateApsStatus (\r
645 VOID\r
646 );\r
647\r
94f63c76
JF		 648/**\r
649 Detect whether specified processor can find matching microcode patch and load it.\r
650\r
e1ed5573
HW		 651 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
652 @param[in] ProcessorNumber The handle number of the processor. The range is\r
653 from 0 to the total number of logical processors\r
654 minus 1.\r
94f63c76
JF		 655**/\r
656VOID\r
657MicrocodeDetect (\r
2a089134 658 IN CPU_MP_DATA *CpuMpData,\r
e1ed5573 659 IN UINTN ProcessorNumber\r
94f63c76
JF		 660 );\r
661\r
d786a172 662/**\r
dd017041 663 Shadow the required microcode patches data into memory.\r
d786a172
HW		 664\r
665 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
666**/\r
667VOID\r
dd017041 668ShadowMicrocodeUpdatePatch (\r
d786a172
HW		 669 IN OUT CPU_MP_DATA *CpuMpData\r
670 );\r
671\r
348a34d9
HW		 672/**\r
673 Get the cached microcode patch base address and size from the microcode patch\r
674 information cache HOB.\r
675\r
676 @param[out] Address Base address of the microcode patches data.\r
677 It will be updated if the microcode patch\r
678 information cache HOB is found.\r
679 @param[out] RegionSize Size of the microcode patches data.\r
680 It will be updated if the microcode patch\r
681 information cache HOB is found.\r
682\r
683 @retval TRUE The microcode patch information cache HOB is found.\r
684 @retval FALSE The microcode patch information cache HOB is not found.\r
685\r
686**/\r
687BOOLEAN\r
688GetMicrocodePatchInfoFromHob (\r
689 UINT64 *Address,\r
690 UINT64 *RegionSize\r
691 );\r
692\r
4d3314f6
JF		 693/**\r
694 Detect whether Mwait-monitor feature is supported.\r
695\r
696 @retval TRUE Mwait-monitor feature is supported.\r
697 @retval FALSE Mwait-monitor feature is not supported.\r
698**/\r
699BOOLEAN\r
700IsMwaitSupport (\r
701 VOID\r
702 );\r
703\r
43c9fdcc
JF		 704/**\r
705 Enable Debug Agent to support source debugging on AP function.\r
706\r
707**/\r
708VOID\r
709EnableDebugAgent (\r
710 VOID\r
711 );\r
712\r
e1ed5573
HW		 713/**\r
714 Find the current Processor number by APIC ID.\r
715\r
716 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
717 @param[out] ProcessorNumber Return the pocessor number found\r
718\r
719 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
720 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
721**/\r
722EFI_STATUS\r
723GetProcessorNumber (\r
724 IN CPU_MP_DATA *CpuMpData,\r
725 OUT UINTN *ProcessorNumber\r
726 );\r
727\r
c788c2b1
SF		 728/**\r
729 This funtion will try to invoke platform specific microcode shadow logic to\r
730 relocate microcode update patches into memory.\r
731\r
4ac82ea1 732 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF		 733\r
734 @retval EFI_SUCCESS Shadow microcode success.\r
735 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
736 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
737 PPI/Protocol.\r
738**/\r
739EFI_STATUS\r
740PlatformShadowMicrocode (\r
741 IN OUT CPU_MP_DATA *CpuMpData\r
742 );\r
743\r
3e8ad6bd 744#endif\r
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