]>
Commit | Line | Data |
---|---|---|
529a5a86 MK |
1 | /** @file\r |
2 | Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.\r | |
3 | \r | |
4a68176c | 4 | Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>\r |
241f9149 LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
0acd8697 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
529a5a86 MK |
8 | \r |
9 | **/\r | |
10 | \r | |
11 | #ifndef _CPU_PISMMCPUDXESMM_H_\r | |
12 | #define _CPU_PISMMCPUDXESMM_H_\r | |
13 | \r | |
14 | #include <PiSmm.h>\r | |
15 | \r | |
16 | #include <Protocol/MpService.h>\r | |
17 | #include <Protocol/SmmConfiguration.h>\r | |
18 | #include <Protocol/SmmCpu.h>\r | |
19 | #include <Protocol/SmmAccess2.h>\r | |
529a5a86 MK |
20 | #include <Protocol/SmmReadyToLock.h>\r |
21 | #include <Protocol/SmmCpuService.h>\r | |
827330cc | 22 | #include <Protocol/SmmMemoryAttribute.h>\r |
51dd408a | 23 | #include <Protocol/MmMp.h>\r |
529a5a86 MK |
24 | \r |
25 | #include <Guid/AcpiS3Context.h>\r | |
8a2e1a9d | 26 | #include <Guid/MemoryAttributesTable.h>\r |
717fb604 | 27 | #include <Guid/PiSmmMemoryAttributesTable.h>\r |
529a5a86 MK |
28 | \r |
29 | #include <Library/BaseLib.h>\r | |
30 | #include <Library/IoLib.h>\r | |
31 | #include <Library/TimerLib.h>\r | |
529a5a86 MK |
32 | #include <Library/SynchronizationLib.h>\r |
33 | #include <Library/DebugLib.h>\r | |
34 | #include <Library/BaseMemoryLib.h>\r | |
35 | #include <Library/PcdLib.h>\r | |
529a5a86 MK |
36 | #include <Library/MtrrLib.h>\r |
37 | #include <Library/SmmCpuPlatformHookLib.h>\r | |
38 | #include <Library/SmmServicesTableLib.h>\r | |
39 | #include <Library/MemoryAllocationLib.h>\r | |
40 | #include <Library/UefiBootServicesTableLib.h>\r | |
41 | #include <Library/UefiRuntimeServicesTableLib.h>\r | |
42 | #include <Library/DebugAgentLib.h>\r | |
8a2e1a9d | 43 | #include <Library/UefiLib.h>\r |
529a5a86 MK |
44 | #include <Library/HobLib.h>\r |
45 | #include <Library/LocalApicLib.h>\r | |
86d41c07 | 46 | #include <Library/CpuLib.h>\r |
529a5a86 MK |
47 | #include <Library/UefiCpuLib.h>\r |
48 | #include <Library/CpuExceptionHandlerLib.h>\r | |
49 | #include <Library/ReportStatusCodeLib.h>\r | |
50 | #include <Library/SmmCpuFeaturesLib.h>\r | |
51 | #include <Library/PeCoffGetEntryPointLib.h>\r | |
93324390 | 52 | #include <Library/RegisterCpuFeaturesLib.h>\r |
529a5a86 MK |
53 | \r |
54 | #include <AcpiCpuData.h>\r | |
55 | #include <CpuHotPlugData.h>\r | |
56 | \r | |
01acb06c RN |
57 | #include <Register/Intel/Cpuid.h>\r |
58 | #include <Register/Intel/Msr.h>\r | |
529a5a86 MK |
59 | \r |
60 | #include "CpuService.h"\r | |
61 | #include "SmmProfile.h"\r | |
62 | \r | |
3eb69b08 JY |
63 | //\r |
64 | // CET definition\r | |
65 | //\r | |
66 | #define CPUID_CET_SS BIT7\r | |
67 | #define CPUID_CET_IBT BIT20\r | |
68 | \r | |
69 | #define CR4_CET_ENABLE BIT23\r | |
70 | \r | |
71 | #define MSR_IA32_S_CET 0x6A2\r | |
72 | #define MSR_IA32_PL0_SSP 0x6A4\r | |
73 | #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8\r | |
74 | \r | |
75 | typedef union {\r | |
76 | struct {\r | |
77 | // enable shadow stacks\r | |
053e878b | 78 | UINT32 SH_STK_ENP : 1;\r |
3eb69b08 | 79 | // enable the WRSS{D,Q}W instructions.\r |
053e878b | 80 | UINT32 WR_SHSTK_EN : 1;\r |
3eb69b08 | 81 | // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.\r |
053e878b | 82 | UINT32 ENDBR_EN : 1;\r |
3eb69b08 | 83 | // enable legacy compatibility treatment for indirect call/jmp tracking.\r |
053e878b | 84 | UINT32 LEG_IW_EN : 1;\r |
3eb69b08 | 85 | // enable use of no-track prefix on indirect call/jmp.\r |
053e878b | 86 | UINT32 NO_TRACK_EN : 1;\r |
3eb69b08 | 87 | // disable suppression of CET indirect branch tracking on legacy compatibility.\r |
053e878b MK |
88 | UINT32 SUPPRESS_DIS : 1;\r |
89 | UINT32 RSVD : 4;\r | |
3eb69b08 JY |
90 | // indirect branch tracking is suppressed.\r |
91 | // This bit can be written to 1 only if TRACKER is written as IDLE.\r | |
053e878b | 92 | UINT32 SUPPRESS : 1;\r |
3eb69b08 JY |
93 | // Value of the endbranch state machine\r |
94 | // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).\r | |
053e878b | 95 | UINT32 TRACKER : 1;\r |
3eb69b08 JY |
96 | // linear address of a bitmap in memory indicating valid\r |
97 | // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled\r | |
98 | // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on\r | |
99 | // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are\r | |
100 | // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address\r | |
101 | // (this automatically aligns the address on a 4-Kbyte boundary).\r | |
053e878b MK |
102 | UINT32 EB_LEG_BITMAP_BASE_low : 12;\r |
103 | UINT32 EB_LEG_BITMAP_BASE_high : 32;\r | |
3eb69b08 | 104 | } Bits;\r |
053e878b | 105 | UINT64 Uint64;\r |
3eb69b08 JY |
106 | } MSR_IA32_CET;\r |
107 | \r | |
529a5a86 MK |
108 | //\r |
109 | // MSRs required for configuration of SMM Code Access Check\r | |
110 | //\r | |
053e878b MK |
111 | #define EFI_MSR_SMM_MCA_CAP 0x17D\r |
112 | #define SMM_CODE_ACCESS_CHK_BIT BIT58\r | |
529a5a86 | 113 | \r |
053e878b MK |
114 | #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0\r |
115 | #define SMM_CODE_CHK_EN_BIT BIT2\r | |
529a5a86 MK |
116 | \r |
117 | ///\r | |
118 | /// Page Table Entry\r | |
119 | ///\r | |
053e878b MK |
120 | #define IA32_PG_P BIT0\r |
121 | #define IA32_PG_RW BIT1\r | |
122 | #define IA32_PG_U BIT2\r | |
123 | #define IA32_PG_WT BIT3\r | |
124 | #define IA32_PG_CD BIT4\r | |
125 | #define IA32_PG_A BIT5\r | |
126 | #define IA32_PG_D BIT6\r | |
127 | #define IA32_PG_PS BIT7\r | |
128 | #define IA32_PG_PAT_2M BIT12\r | |
129 | #define IA32_PG_PAT_4K IA32_PG_PS\r | |
130 | #define IA32_PG_PMNT BIT62\r | |
131 | #define IA32_PG_NX BIT63\r | |
132 | \r | |
133 | #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)\r | |
881520ea JY |
134 | //\r |
135 | // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE\r | |
136 | // X64 PAE PDPTE does not have such restriction\r | |
137 | //\r | |
053e878b | 138 | #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)\r |
881520ea | 139 | \r |
053e878b | 140 | #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)\r |
717fb604 JY |
141 | \r |
142 | #define PAGING_4K_MASK 0xFFF\r | |
143 | #define PAGING_2M_MASK 0x1FFFFF\r | |
144 | #define PAGING_1G_MASK 0x3FFFFFFF\r | |
145 | \r | |
146 | #define PAGING_PAE_INDEX_MASK 0x1FF\r | |
147 | \r | |
053e878b MK |
148 | #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull\r |
149 | #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull\r | |
150 | #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r | |
717fb604 | 151 | \r |
053e878b | 152 | #define SMRR_MAX_ADDRESS BASE_4GB\r |
7ed6f781 | 153 | \r |
717fb604 JY |
154 | typedef enum {\r |
155 | PageNone,\r | |
156 | Page4K,\r | |
157 | Page2M,\r | |
158 | Page1G,\r | |
159 | } PAGE_ATTRIBUTE;\r | |
160 | \r | |
161 | typedef struct {\r | |
053e878b MK |
162 | PAGE_ATTRIBUTE Attribute;\r |
163 | UINT64 Length;\r | |
164 | UINT64 AddressMask;\r | |
717fb604 JY |
165 | } PAGE_ATTRIBUTE_TABLE;\r |
166 | \r | |
529a5a86 MK |
167 | //\r |
168 | // Size of Task-State Segment defined in IA32 Manual\r | |
169 | //\r | |
053e878b MK |
170 | #define TSS_SIZE 104\r |
171 | #define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP\r | |
172 | #define TSS_X64_IST1_OFFSET 36\r | |
173 | #define TSS_IA32_CR3_OFFSET 28\r | |
174 | #define TSS_IA32_ESP_OFFSET 56\r | |
175 | #define TSS_IA32_SSP_OFFSET 104\r | |
529a5a86 | 176 | \r |
053e878b | 177 | #define CR0_WP BIT16\r |
717fb604 | 178 | \r |
529a5a86 MK |
179 | //\r |
180 | // Code select value\r | |
181 | //\r | |
053e878b MK |
182 | #define PROTECT_MODE_CODE_SEGMENT 0x08\r |
183 | #define LONG_MODE_CODE_SEGMENT 0x38\r | |
529a5a86 MK |
184 | \r |
185 | //\r | |
186 | // The size 0x20 must be bigger than\r | |
187 | // the size of template code of SmmInit. Currently,\r | |
188 | // the size of SmmInit requires the 0x16 Bytes buffer\r | |
189 | // at least.\r | |
190 | //\r | |
191 | #define BACK_BUF_SIZE 0x20\r | |
192 | \r | |
053e878b | 193 | #define EXCEPTION_VECTOR_NUMBER 0x20\r |
529a5a86 | 194 | \r |
053e878b | 195 | #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL\r |
529a5a86 | 196 | \r |
51dd408a ED |
197 | //\r |
198 | // Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.\r | |
199 | //\r | |
200 | typedef struct {\r | |
053e878b MK |
201 | EFI_AP_PROCEDURE Procedure;\r |
202 | VOID *ProcedureArgument;\r | |
51dd408a ED |
203 | } PROCEDURE_WRAPPER;\r |
204 | \r | |
205 | #define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')\r | |
206 | \r | |
207 | typedef struct {\r | |
053e878b MK |
208 | UINTN Signature;\r |
209 | LIST_ENTRY Link;\r | |
51dd408a | 210 | \r |
053e878b MK |
211 | SPIN_LOCK *SpinLock;\r |
212 | volatile UINT32 RunningApCount;\r | |
51dd408a ED |
213 | } PROCEDURE_TOKEN;\r |
214 | \r | |
215 | #define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)\r | |
216 | \r | |
9caaa79d ED |
217 | #define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')\r |
218 | \r | |
219 | typedef struct {\r | |
053e878b MK |
220 | UINTN Signature;\r |
221 | LIST_ENTRY Link;\r | |
9caaa79d | 222 | \r |
053e878b | 223 | UINT8 *Buffer;\r |
9caaa79d ED |
224 | } TOKEN_BUFFER;\r |
225 | \r | |
226 | #define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)\r | |
227 | \r | |
529a5a86 MK |
228 | //\r |
229 | // Private structure for the SMM CPU module that is stored in DXE Runtime memory\r | |
230 | // Contains the SMM Configuration Protocols that is produced.\r | |
231 | // Contains a mix of DXE and SMM contents. All the fields must be used properly.\r | |
232 | //\r | |
233 | #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')\r | |
234 | \r | |
235 | typedef struct {\r | |
053e878b | 236 | UINTN Signature;\r |
529a5a86 | 237 | \r |
053e878b | 238 | EFI_HANDLE SmmCpuHandle;\r |
529a5a86 | 239 | \r |
053e878b MK |
240 | EFI_PROCESSOR_INFORMATION *ProcessorInfo;\r |
241 | SMM_CPU_OPERATION *Operation;\r | |
242 | UINTN *CpuSaveStateSize;\r | |
243 | VOID **CpuSaveState;\r | |
529a5a86 | 244 | \r |
053e878b MK |
245 | EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];\r |
246 | EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;\r | |
247 | EFI_SMM_ENTRY_POINT SmmCoreEntry;\r | |
529a5a86 | 248 | \r |
053e878b | 249 | EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;\r |
51dd408a | 250 | \r |
053e878b MK |
251 | PROCEDURE_WRAPPER *ApWrapperFunc;\r |
252 | LIST_ENTRY TokenList;\r | |
253 | LIST_ENTRY *FirstFreeToken;\r | |
529a5a86 MK |
254 | } SMM_CPU_PRIVATE_DATA;\r |
255 | \r | |
256 | extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;\r | |
053e878b MK |
257 | extern CPU_HOT_PLUG_DATA mCpuHotPlugData;\r |
258 | extern UINTN mMaxNumberOfCpus;\r | |
259 | extern UINTN mNumberOfCpus;\r | |
260 | extern EFI_SMM_CPU_PROTOCOL mSmmCpu;\r | |
261 | extern EFI_MM_MP_PROTOCOL mSmmMp;\r | |
7b475490 | 262 | extern BOOLEAN m5LevelPagingNeeded;\r |
529a5a86 MK |
263 | \r |
264 | ///\r | |
265 | /// The mode of the CPU at the time an SMI occurs\r | |
266 | ///\r | |
267 | extern UINT8 mSmmSaveStateRegisterLma;\r | |
268 | \r | |
529a5a86 MK |
269 | //\r |
270 | // SMM CPU Protocol function prototypes.\r | |
271 | //\r | |
272 | \r | |
273 | /**\r | |
274 | Read information from the CPU save state.\r | |
275 | \r | |
276 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
277 | @param Width The number of bytes to read from the CPU save state.\r | |
278 | @param Register Specifies the CPU register to read form the save state.\r | |
279 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
280 | @param Buffer Upon return, this holds the CPU register value read from the save state.\r | |
281 | \r | |
282 | @retval EFI_SUCCESS The register was read from Save State\r | |
283 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
ef62da4f | 284 | @retval EFI_INVALID_PARAMETER This or Buffer is NULL.\r |
529a5a86 MK |
285 | \r |
286 | **/\r | |
287 | EFI_STATUS\r | |
288 | EFIAPI\r | |
289 | SmmReadSaveState (\r | |
053e878b MK |
290 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r |
291 | IN UINTN Width,\r | |
292 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
293 | IN UINTN CpuIndex,\r | |
294 | OUT VOID *Buffer\r | |
529a5a86 MK |
295 | );\r |
296 | \r | |
297 | /**\r | |
298 | Write data to the CPU save state.\r | |
299 | \r | |
300 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
301 | @param Width The number of bytes to read from the CPU save state.\r | |
302 | @param Register Specifies the CPU register to write to the save state.\r | |
303 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
304 | @param Buffer Upon entry, this holds the new CPU register value.\r | |
305 | \r | |
306 | @retval EFI_SUCCESS The register was written from Save State\r | |
307 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
ef62da4f | 308 | @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct\r |
529a5a86 MK |
309 | \r |
310 | **/\r | |
311 | EFI_STATUS\r | |
312 | EFIAPI\r | |
313 | SmmWriteSaveState (\r | |
053e878b MK |
314 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r |
315 | IN UINTN Width,\r | |
316 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
317 | IN UINTN CpuIndex,\r | |
318 | IN CONST VOID *Buffer\r | |
529a5a86 MK |
319 | );\r |
320 | \r | |
321 | /**\r | |
322 | Read a CPU Save State register on the target processor.\r | |
323 | \r | |
324 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
325 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
326 | \r | |
327 | This function supports reading a CPU Save State register in SMBase relocation handler.\r | |
328 | \r | |
329 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
330 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
331 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
332 | @param[out] Buffer Upon return, this holds the CPU register value read from the save state.\r | |
333 | \r | |
334 | @retval EFI_SUCCESS The register was read from Save State.\r | |
335 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
a7d8e28b | 336 | @retval EFI_INVALID_PARAMETER Buffer is NULL, or Width does not meet requirement per Register type.\r |
529a5a86 MK |
337 | \r |
338 | **/\r | |
339 | EFI_STATUS\r | |
340 | EFIAPI\r | |
341 | ReadSaveStateRegister (\r | |
342 | IN UINTN CpuIndex,\r | |
343 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
344 | IN UINTN Width,\r | |
345 | OUT VOID *Buffer\r | |
346 | );\r | |
347 | \r | |
348 | /**\r | |
349 | Write value to a CPU Save State register on the target processor.\r | |
350 | \r | |
351 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
352 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
353 | \r | |
354 | This function supports writing a CPU Save State register in SMBase relocation handler.\r | |
355 | \r | |
356 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
357 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
358 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
359 | @param[in] Buffer Upon entry, this holds the new CPU register value.\r | |
360 | \r | |
361 | @retval EFI_SUCCESS The register was written to Save State.\r | |
362 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
ef62da4f | 363 | @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.\r |
529a5a86 MK |
364 | \r |
365 | **/\r | |
366 | EFI_STATUS\r | |
367 | EFIAPI\r | |
368 | WriteSaveStateRegister (\r | |
369 | IN UINTN CpuIndex,\r | |
370 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
371 | IN UINTN Width,\r | |
372 | IN CONST VOID *Buffer\r | |
373 | );\r | |
374 | \r | |
053e878b MK |
375 | extern CONST UINT8 gcSmmInitTemplate[];\r |
376 | extern CONST UINT16 gcSmmInitSize;\r | |
377 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;\r | |
378 | extern UINT32 mSmmCr0;\r | |
379 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;\r | |
380 | extern UINT32 mSmmCr4;\r | |
381 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;\r | |
382 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;\r | |
383 | X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;\r | |
384 | extern BOOLEAN mCetSupported;\r | |
529a5a86 MK |
385 | \r |
386 | /**\r | |
387 | Semaphore operation for all processor relocate SMMBase.\r | |
388 | **/\r | |
389 | VOID\r | |
390 | EFIAPI\r | |
391 | SmmRelocationSemaphoreComplete (\r | |
392 | VOID\r | |
393 | );\r | |
394 | \r | |
395 | ///\r | |
396 | /// The type of SMM CPU Information\r | |
397 | ///\r | |
398 | typedef struct {\r | |
053e878b MK |
399 | SPIN_LOCK *Busy;\r |
400 | volatile EFI_AP_PROCEDURE2 Procedure;\r | |
401 | volatile VOID *Parameter;\r | |
402 | volatile UINT32 *Run;\r | |
403 | volatile BOOLEAN *Present;\r | |
404 | PROCEDURE_TOKEN *Token;\r | |
405 | EFI_STATUS *Status;\r | |
529a5a86 MK |
406 | } SMM_CPU_DATA_BLOCK;\r |
407 | \r | |
408 | typedef enum {\r | |
409 | SmmCpuSyncModeTradition,\r | |
410 | SmmCpuSyncModeRelaxedAp,\r | |
411 | SmmCpuSyncModeMax\r | |
412 | } SMM_CPU_SYNC_MODE;\r | |
413 | \r | |
414 | typedef struct {\r | |
415 | //\r | |
416 | // Pointer to an array. The array should be located immediately after this structure\r | |
417 | // so that UC cache-ability can be set together.\r | |
418 | //\r | |
419 | SMM_CPU_DATA_BLOCK *CpuData;\r | |
fe3a75bc | 420 | volatile UINT32 *Counter;\r |
529a5a86 | 421 | volatile UINT32 BspIndex;\r |
fe3a75bc JF |
422 | volatile BOOLEAN *InsideSmm;\r |
423 | volatile BOOLEAN *AllCpusInSync;\r | |
529a5a86 MK |
424 | volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;\r |
425 | volatile BOOLEAN SwitchBsp;\r | |
426 | volatile BOOLEAN *CandidateBsp;\r | |
4a68176c | 427 | volatile BOOLEAN AllApArrivedWithException;\r |
51dd408a ED |
428 | EFI_AP_PROCEDURE StartupProcedure;\r |
429 | VOID *StartupProcArgs;\r | |
529a5a86 MK |
430 | } SMM_DISPATCHER_MP_SYNC_DATA;\r |
431 | \r | |
053e878b | 432 | #define SMM_PSD_OFFSET 0xfb00\r |
529a5a86 | 433 | \r |
1d648531 JF |
434 | ///\r |
435 | /// All global semaphores' pointer\r | |
436 | ///\r | |
437 | typedef struct {\r | |
053e878b MK |
438 | volatile UINT32 *Counter;\r |
439 | volatile BOOLEAN *InsideSmm;\r | |
440 | volatile BOOLEAN *AllCpusInSync;\r | |
441 | SPIN_LOCK *PFLock;\r | |
442 | SPIN_LOCK *CodeAccessCheckLock;\r | |
1d648531 JF |
443 | } SMM_CPU_SEMAPHORE_GLOBAL;\r |
444 | \r | |
4e920581 JF |
445 | ///\r |
446 | /// All semaphores for each processor\r | |
447 | ///\r | |
448 | typedef struct {\r | |
053e878b MK |
449 | SPIN_LOCK *Busy;\r |
450 | volatile UINT32 *Run;\r | |
451 | volatile BOOLEAN *Present;\r | |
452 | SPIN_LOCK *Token;\r | |
4e920581 JF |
453 | } SMM_CPU_SEMAPHORE_CPU;\r |
454 | \r | |
1d648531 JF |
455 | ///\r |
456 | /// All semaphores' information\r | |
457 | ///\r | |
458 | typedef struct {\r | |
053e878b MK |
459 | SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;\r |
460 | SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;\r | |
1d648531 JF |
461 | } SMM_CPU_SEMAPHORES;\r |
462 | \r | |
053e878b MK |
463 | extern IA32_DESCRIPTOR gcSmiGdtr;\r |
464 | extern EFI_PHYSICAL_ADDRESS mGdtBuffer;\r | |
465 | extern UINTN mGdtBufferSize;\r | |
466 | extern IA32_DESCRIPTOR gcSmiIdtr;\r | |
467 | extern VOID *gcSmiIdtrPtr;\r | |
468 | extern UINT64 gPhyMask;\r | |
469 | extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;\r | |
470 | extern UINTN mSmmStackArrayBase;\r | |
471 | extern UINTN mSmmStackArrayEnd;\r | |
472 | extern UINTN mSmmStackSize;\r | |
473 | extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;\r | |
474 | extern IA32_DESCRIPTOR gcSmiInitGdtr;\r | |
475 | extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;\r | |
476 | extern UINTN mSemaphoreSize;\r | |
477 | extern SPIN_LOCK *mPFLock;\r | |
478 | extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;\r | |
479 | extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;\r | |
480 | extern UINTN mSmmCpuSmramRangeCount;\r | |
481 | extern UINT8 mPhysicalAddressBits;\r | |
529a5a86 | 482 | \r |
241f9149 LD |
483 | //\r |
484 | // Copy of the PcdPteMemoryEncryptionAddressOrMask\r | |
485 | //\r | |
486 | extern UINT64 mAddressEncMask;\r | |
487 | \r | |
529a5a86 MK |
488 | /**\r |
489 | Create 4G PageTable in SMRAM.\r | |
490 | \r | |
717fb604 | 491 | @param[in] Is32BitPageTable Whether the page table is 32-bit PAE\r |
529a5a86 MK |
492 | @return PageTable Address\r |
493 | \r | |
494 | **/\r | |
495 | UINT32\r | |
496 | Gen4GPageTable (\r | |
053e878b | 497 | IN BOOLEAN Is32BitPageTable\r |
529a5a86 MK |
498 | );\r |
499 | \r | |
529a5a86 MK |
500 | /**\r |
501 | Initialize global data for MP synchronization.\r | |
502 | \r | |
3eb69b08 JY |
503 | @param Stacks Base address of SMI stack buffer for all processors.\r |
504 | @param StackSize Stack size for each processor in SMM.\r | |
505 | @param ShadowStackSize Shadow Stack size for each processor in SMM.\r | |
529a5a86 MK |
506 | \r |
507 | **/\r | |
508 | UINT32\r | |
509 | InitializeMpServiceData (\r | |
053e878b MK |
510 | IN VOID *Stacks,\r |
511 | IN UINTN StackSize,\r | |
512 | IN UINTN ShadowStackSize\r | |
529a5a86 MK |
513 | );\r |
514 | \r | |
515 | /**\r | |
516 | Initialize Timer for SMM AP Sync.\r | |
517 | \r | |
518 | **/\r | |
519 | VOID\r | |
520 | InitializeSmmTimer (\r | |
521 | VOID\r | |
522 | );\r | |
523 | \r | |
524 | /**\r | |
525 | Start Timer for SMM AP Sync.\r | |
526 | \r | |
527 | **/\r | |
528 | UINT64\r | |
529 | EFIAPI\r | |
530 | StartSyncTimer (\r | |
531 | VOID\r | |
532 | );\r | |
533 | \r | |
534 | /**\r | |
535 | Check if the SMM AP Sync timer is timeout.\r | |
536 | \r | |
537 | @param Timer The start timer from the begin.\r | |
538 | \r | |
539 | **/\r | |
540 | BOOLEAN\r | |
541 | EFIAPI\r | |
542 | IsSyncTimerTimeout (\r | |
053e878b | 543 | IN UINT64 Timer\r |
529a5a86 MK |
544 | );\r |
545 | \r | |
546 | /**\r | |
547 | Initialize IDT for SMM Stack Guard.\r | |
548 | \r | |
549 | **/\r | |
550 | VOID\r | |
551 | EFIAPI\r | |
552 | InitializeIDTSmmStackGuard (\r | |
553 | VOID\r | |
554 | );\r | |
555 | \r | |
455b0347 S |
556 | /**\r |
557 | Initialize IDT IST Field.\r | |
558 | \r | |
559 | @param[in] ExceptionType Exception type.\r | |
560 | @param[in] Ist IST value.\r | |
561 | \r | |
562 | **/\r | |
563 | VOID\r | |
564 | EFIAPI\r | |
565 | InitializeIdtIst (\r | |
053e878b MK |
566 | IN EFI_EXCEPTION_TYPE ExceptionType,\r |
567 | IN UINT8 Ist\r | |
455b0347 S |
568 | );\r |
569 | \r | |
fe5f1949 JY |
570 | /**\r |
571 | Initialize Gdt for all processors.\r | |
717fb604 | 572 | \r |
fe5f1949 JY |
573 | @param[in] Cr3 CR3 value.\r |
574 | @param[out] GdtStepSize The step size for GDT table.\r | |
575 | \r | |
576 | @return GdtBase for processor 0.\r | |
577 | GdtBase for processor X is: GdtBase + (GdtStepSize * X)\r | |
578 | **/\r | |
579 | VOID *\r | |
580 | InitGdt (\r | |
581 | IN UINTN Cr3,\r | |
582 | OUT UINTN *GdtStepSize\r | |
583 | );\r | |
584 | \r | |
529a5a86 MK |
585 | /**\r |
586 | \r | |
587 | Register the SMM Foundation entry point.\r | |
588 | \r | |
589 | @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance\r | |
590 | @param SmmEntryPoint SMM Foundation EntryPoint\r | |
591 | \r | |
592 | @retval EFI_SUCCESS Successfully to register SMM foundation entry point\r | |
593 | \r | |
594 | **/\r | |
595 | EFI_STATUS\r | |
596 | EFIAPI\r | |
597 | RegisterSmmEntry (\r | |
598 | IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,\r | |
599 | IN EFI_SMM_ENTRY_POINT SmmEntryPoint\r | |
600 | );\r | |
601 | \r | |
602 | /**\r | |
603 | Create PageTable for SMM use.\r | |
604 | \r | |
605 | @return PageTable Address\r | |
606 | \r | |
607 | **/\r | |
608 | UINT32\r | |
609 | SmmInitPageTable (\r | |
610 | VOID\r | |
611 | );\r | |
612 | \r | |
613 | /**\r | |
614 | Schedule a procedure to run on the specified CPU.\r | |
615 | \r | |
616 | @param Procedure The address of the procedure to run\r | |
617 | @param CpuIndex Target CPU number\r | |
618 | @param ProcArguments The parameter to pass to the procedure\r | |
619 | \r | |
620 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
621 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
622 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
623 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
624 | @retval EFI_SUCCESS - The procedure has been successfully scheduled\r | |
625 | \r | |
626 | **/\r | |
627 | EFI_STATUS\r | |
628 | EFIAPI\r | |
629 | SmmStartupThisAp (\r | |
053e878b MK |
630 | IN EFI_AP_PROCEDURE Procedure,\r |
631 | IN UINTN CpuIndex,\r | |
632 | IN OUT VOID *ProcArguments OPTIONAL\r | |
529a5a86 MK |
633 | );\r |
634 | \r | |
635 | /**\r | |
636 | Schedule a procedure to run on the specified CPU in a blocking fashion.\r | |
637 | \r | |
638 | @param Procedure The address of the procedure to run\r | |
639 | @param CpuIndex Target CPU Index\r | |
640 | @param ProcArguments The parameter to pass to the procedure\r | |
641 | \r | |
642 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
643 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
644 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
645 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
646 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
647 | \r | |
648 | **/\r | |
649 | EFI_STATUS\r | |
650 | EFIAPI\r | |
651 | SmmBlockingStartupThisAp (\r | |
053e878b MK |
652 | IN EFI_AP_PROCEDURE Procedure,\r |
653 | IN UINTN CpuIndex,\r | |
654 | IN OUT VOID *ProcArguments OPTIONAL\r | |
529a5a86 MK |
655 | );\r |
656 | \r | |
e4435f71 JY |
657 | /**\r |
658 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
659 | Length from their current attributes to the attributes specified by Attributes.\r | |
660 | \r | |
661 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
662 | @param[in] Length The size in bytes of the memory region.\r | |
663 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
664 | \r | |
665 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
666 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
667 | BaseAddress and Length cannot be modified.\r | |
668 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
669 | Attributes specified an illegal combination of attributes that\r | |
670 | cannot be set together.\r | |
671 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
672 | the memory resource range.\r | |
673 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
674 | resource range specified by BaseAddress and Length.\r | |
675 | The bit mask of attributes is not support for the memory resource\r | |
676 | range specified by BaseAddress and Length.\r | |
677 | \r | |
678 | **/\r | |
679 | EFI_STATUS\r | |
e4435f71 | 680 | SmmSetMemoryAttributes (\r |
053e878b MK |
681 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
682 | IN UINT64 Length,\r | |
683 | IN UINT64 Attributes\r | |
e4435f71 JY |
684 | );\r |
685 | \r | |
686 | /**\r | |
687 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
688 | Length from their current attributes to the attributes specified by Attributes.\r | |
689 | \r | |
690 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
691 | @param[in] Length The size in bytes of the memory region.\r | |
692 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
693 | \r | |
694 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
695 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
696 | BaseAddress and Length cannot be modified.\r | |
697 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
698 | Attributes specified an illegal combination of attributes that\r | |
699 | cannot be set together.\r | |
700 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
701 | the memory resource range.\r | |
702 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
703 | resource range specified by BaseAddress and Length.\r | |
704 | The bit mask of attributes is not support for the memory resource\r | |
705 | range specified by BaseAddress and Length.\r | |
706 | \r | |
707 | **/\r | |
708 | EFI_STATUS\r | |
e4435f71 | 709 | SmmClearMemoryAttributes (\r |
053e878b MK |
710 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
711 | IN UINT64 Length,\r | |
712 | IN UINT64 Attributes\r | |
e4435f71 JY |
713 | );\r |
714 | \r | |
529a5a86 MK |
715 | /**\r |
716 | Initialize MP synchronization data.\r | |
717 | \r | |
718 | **/\r | |
719 | VOID\r | |
720 | EFIAPI\r | |
721 | InitializeMpSyncData (\r | |
722 | VOID\r | |
723 | );\r | |
724 | \r | |
725 | /**\r | |
726 | \r | |
727 | Find out SMRAM information including SMRR base and SMRR size.\r | |
728 | \r | |
729 | @param SmrrBase SMRR base\r | |
730 | @param SmrrSize SMRR size\r | |
731 | \r | |
732 | **/\r | |
733 | VOID\r | |
734 | FindSmramInfo (\r | |
053e878b MK |
735 | OUT UINT32 *SmrrBase,\r |
736 | OUT UINT32 *SmrrSize\r | |
529a5a86 MK |
737 | );\r |
738 | \r | |
739 | /**\r | |
0bdc9e75 | 740 | Relocate SmmBases for each processor.\r |
529a5a86 | 741 | \r |
0bdc9e75 | 742 | Execute on first boot and all S3 resumes\r |
529a5a86 MK |
743 | \r |
744 | **/\r | |
745 | VOID\r | |
0bdc9e75 SZ |
746 | EFIAPI\r |
747 | SmmRelocateBases (\r | |
529a5a86 MK |
748 | VOID\r |
749 | );\r | |
750 | \r | |
751 | /**\r | |
752 | Page Fault handler for SMM use.\r | |
753 | \r | |
754 | @param InterruptType Defines the type of interrupt or exception that\r | |
755 | occurred on the processor.This parameter is processor architecture specific.\r | |
756 | @param SystemContext A pointer to the processor context when\r | |
757 | the interrupt occurred on the processor.\r | |
758 | **/\r | |
759 | VOID\r | |
760 | EFIAPI\r | |
761 | SmiPFHandler (\r | |
053e878b MK |
762 | IN EFI_EXCEPTION_TYPE InterruptType,\r |
763 | IN EFI_SYSTEM_CONTEXT SystemContext\r | |
529a5a86 MK |
764 | );\r |
765 | \r | |
766 | /**\r | |
767 | Perform the remaining tasks.\r | |
768 | \r | |
769 | **/\r | |
770 | VOID\r | |
771 | PerformRemainingTasks (\r | |
772 | VOID\r | |
773 | );\r | |
774 | \r | |
9f419739 JY |
775 | /**\r |
776 | Perform the pre tasks.\r | |
777 | \r | |
778 | **/\r | |
779 | VOID\r | |
780 | PerformPreTasks (\r | |
781 | VOID\r | |
782 | );\r | |
783 | \r | |
529a5a86 MK |
784 | /**\r |
785 | Initialize MSR spin lock by MSR index.\r | |
786 | \r | |
787 | @param MsrIndex MSR index value.\r | |
788 | \r | |
789 | **/\r | |
790 | VOID\r | |
791 | InitMsrSpinLockByIndex (\r | |
053e878b | 792 | IN UINT32 MsrIndex\r |
529a5a86 MK |
793 | );\r |
794 | \r | |
795 | /**\r | |
796 | Hook return address of SMM Save State so that semaphore code\r | |
797 | can be executed immediately after AP exits SMM to indicate to\r | |
798 | the BSP that an AP has exited SMM after SMBASE relocation.\r | |
799 | \r | |
800 | @param[in] CpuIndex The processor index.\r | |
801 | @param[in] RebasedFlag A pointer to a flag that is set to TRUE\r | |
802 | immediately after AP exits SMM.\r | |
803 | \r | |
804 | **/\r | |
805 | VOID\r | |
806 | SemaphoreHook (\r | |
807 | IN UINTN CpuIndex,\r | |
808 | IN volatile BOOLEAN *RebasedFlag\r | |
809 | );\r | |
810 | \r | |
811 | /**\r | |
812 | Configure SMM Code Access Check feature for all processors.\r | |
813 | SMM Feature Control MSR will be locked after configuration.\r | |
814 | **/\r | |
815 | VOID\r | |
816 | ConfigSmmCodeAccessCheck (\r | |
817 | VOID\r | |
818 | );\r | |
819 | \r | |
820 | /**\r | |
821 | Hook the code executed immediately after an RSM instruction on the currently\r | |
822 | executing CPU. The mode of code executed immediately after RSM must be\r | |
823 | detected, and the appropriate hook must be selected. Always clear the auto\r | |
824 | HALT restart flag if it is set.\r | |
825 | \r | |
826 | @param[in] CpuIndex The processor index for the currently\r | |
827 | executing CPU.\r | |
828 | @param[in] CpuState Pointer to SMRAM Save State Map for the\r | |
829 | currently executing CPU.\r | |
830 | @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to\r | |
831 | 32-bit mode from 64-bit SMM.\r | |
832 | @param[in] NewInstructionPointer Instruction pointer to use if resuming to\r | |
833 | same mode as SMM.\r | |
834 | \r | |
835 | @retval The value of the original instruction pointer before it was hooked.\r | |
836 | \r | |
837 | **/\r | |
838 | UINT64\r | |
839 | EFIAPI\r | |
840 | HookReturnFromSmm (\r | |
841 | IN UINTN CpuIndex,\r | |
842 | SMRAM_SAVE_STATE_MAP *CpuState,\r | |
843 | UINT64 NewInstructionPointer32,\r | |
844 | UINT64 NewInstructionPointer\r | |
845 | );\r | |
846 | \r | |
847 | /**\r | |
848 | Get the size of the SMI Handler in bytes.\r | |
849 | \r | |
850 | @retval The size, in bytes, of the SMI Handler.\r | |
851 | \r | |
852 | **/\r | |
853 | UINTN\r | |
854 | EFIAPI\r | |
855 | GetSmiHandlerSize (\r | |
856 | VOID\r | |
857 | );\r | |
858 | \r | |
859 | /**\r | |
860 | Install the SMI handler for the CPU specified by CpuIndex. This function\r | |
861 | is called by the CPU that was elected as monarch during System Management\r | |
862 | Mode initialization.\r | |
863 | \r | |
864 | @param[in] CpuIndex The index of the CPU to install the custom SMI handler.\r | |
865 | The value must be between 0 and the NumberOfCpus field\r | |
866 | in the System Management System Table (SMST).\r | |
867 | @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.\r | |
868 | @param[in] SmiStack The stack to use when an SMI is processed by the\r | |
869 | the CPU specified by CpuIndex.\r | |
870 | @param[in] StackSize The size, in bytes, if the stack used when an SMI is\r | |
871 | processed by the CPU specified by CpuIndex.\r | |
872 | @param[in] GdtBase The base address of the GDT to use when an SMI is\r | |
873 | processed by the CPU specified by CpuIndex.\r | |
874 | @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is\r | |
875 | processed by the CPU specified by CpuIndex.\r | |
876 | @param[in] IdtBase The base address of the IDT to use when an SMI is\r | |
877 | processed by the CPU specified by CpuIndex.\r | |
878 | @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is\r | |
879 | processed by the CPU specified by CpuIndex.\r | |
880 | @param[in] Cr3 The base address of the page tables to use when an SMI\r | |
881 | is processed by the CPU specified by CpuIndex.\r | |
882 | **/\r | |
883 | VOID\r | |
884 | EFIAPI\r | |
885 | InstallSmiHandler (\r | |
886 | IN UINTN CpuIndex,\r | |
887 | IN UINT32 SmBase,\r | |
888 | IN VOID *SmiStack,\r | |
889 | IN UINTN StackSize,\r | |
890 | IN UINTN GdtBase,\r | |
891 | IN UINTN GdtSize,\r | |
892 | IN UINTN IdtBase,\r | |
893 | IN UINTN IdtSize,\r | |
894 | IN UINT32 Cr3\r | |
895 | );\r | |
896 | \r | |
897 | /**\r | |
898 | Search module name by input IP address and output it.\r | |
899 | \r | |
900 | @param CallerIpAddress Caller instruction pointer.\r | |
901 | \r | |
902 | **/\r | |
903 | VOID\r | |
904 | DumpModuleInfoByIp (\r | |
053e878b | 905 | IN UINTN CallerIpAddress\r |
529a5a86 | 906 | );\r |
21c17193 | 907 | \r |
717fb604 JY |
908 | /**\r |
909 | This function sets memory attribute according to MemoryAttributesTable.\r | |
910 | **/\r | |
911 | VOID\r | |
912 | SetMemMapAttributes (\r | |
913 | VOID\r | |
914 | );\r | |
915 | \r | |
d2fc7711 JY |
916 | /**\r |
917 | This function sets UEFI memory attribute according to UEFI memory map.\r | |
918 | **/\r | |
919 | VOID\r | |
920 | SetUefiMemMapAttributes (\r | |
921 | VOID\r | |
922 | );\r | |
923 | \r | |
924 | /**\r | |
925 | Return if the Address is forbidden as SMM communication buffer.\r | |
926 | \r | |
927 | @param[in] Address the address to be checked\r | |
928 | \r | |
929 | @return TRUE The address is forbidden as SMM communication buffer.\r | |
930 | @return FALSE The address is allowed as SMM communication buffer.\r | |
931 | **/\r | |
932 | BOOLEAN\r | |
933 | IsSmmCommBufferForbiddenAddress (\r | |
934 | IN UINT64 Address\r | |
935 | );\r | |
936 | \r | |
937 | /**\r | |
938 | This function caches the UEFI memory map information.\r | |
939 | **/\r | |
940 | VOID\r | |
941 | GetUefiMemoryMap (\r | |
942 | VOID\r | |
943 | );\r | |
944 | \r | |
717fb604 JY |
945 | /**\r |
946 | This function sets memory attribute for page table.\r | |
947 | **/\r | |
948 | VOID\r | |
949 | SetPageTableAttributes (\r | |
950 | VOID\r | |
951 | );\r | |
952 | \r | |
717fb604 JY |
953 | /**\r |
954 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
955 | Length from their current attributes to the attributes specified by Attributes.\r | |
956 | \r | |
7b475490 DT |
957 | @param[in] PageTableBase The page table base.\r |
958 | @param[in] EnablePML5Paging If PML5 paging is enabled.\r | |
717fb604 JY |
959 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r |
960 | @param[in] Length The size in bytes of the memory region.\r | |
961 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
962 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
963 | \r | |
964 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
965 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
966 | BaseAddress and Length cannot be modified.\r | |
967 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
968 | Attributes specified an illegal combination of attributes that\r | |
969 | cannot be set together.\r | |
970 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
971 | the memory resource range.\r | |
972 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
973 | resource range specified by BaseAddress and Length.\r | |
974 | The bit mask of attributes is not support for the memory resource\r | |
975 | range specified by BaseAddress and Length.\r | |
976 | \r | |
977 | **/\r | |
978 | EFI_STATUS\r | |
717fb604 | 979 | SmmSetMemoryAttributesEx (\r |
7b475490 DT |
980 | IN UINTN PageTableBase,\r |
981 | IN BOOLEAN EnablePML5Paging,\r | |
053e878b MK |
982 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
983 | IN UINT64 Length,\r | |
984 | IN UINT64 Attributes,\r | |
985 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
717fb604 JY |
986 | );\r |
987 | \r | |
988 | /**\r | |
989 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
990 | Length from their current attributes to the attributes specified by Attributes.\r | |
991 | \r | |
7b475490 DT |
992 | @param[in] PageTableBase The page table base.\r |
993 | @param[in] EnablePML5Paging If PML5 paging is enabled.\r | |
717fb604 JY |
994 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r |
995 | @param[in] Length The size in bytes of the memory region.\r | |
996 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
997 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
998 | \r | |
999 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
1000 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
1001 | BaseAddress and Length cannot be modified.\r | |
1002 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
1003 | Attributes specified an illegal combination of attributes that\r | |
1004 | cannot be set together.\r | |
1005 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
1006 | the memory resource range.\r | |
1007 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
1008 | resource range specified by BaseAddress and Length.\r | |
1009 | The bit mask of attributes is not support for the memory resource\r | |
1010 | range specified by BaseAddress and Length.\r | |
1011 | \r | |
1012 | **/\r | |
1013 | EFI_STATUS\r | |
717fb604 | 1014 | SmmClearMemoryAttributesEx (\r |
7b475490 DT |
1015 | IN UINTN PageTableBase,\r |
1016 | IN BOOLEAN EnablePML5Paging,\r | |
053e878b MK |
1017 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r |
1018 | IN UINT64 Length,\r | |
1019 | IN UINT64 Attributes,\r | |
1020 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
717fb604 JY |
1021 | );\r |
1022 | \r | |
21c17193 JY |
1023 | /**\r |
1024 | This API provides a way to allocate memory for page table.\r | |
1025 | \r | |
1026 | This API can be called more once to allocate memory for page tables.\r | |
1027 | \r | |
1028 | Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r | |
1029 | allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r | |
1030 | is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r | |
1031 | returned.\r | |
1032 | \r | |
1033 | @param Pages The number of 4 KB pages to allocate.\r | |
1034 | \r | |
1035 | @return A pointer to the allocated buffer or NULL if allocation fails.\r | |
1036 | \r | |
1037 | **/\r | |
1038 | VOID *\r | |
1039 | AllocatePageTableMemory (\r | |
053e878b | 1040 | IN UINTN Pages\r |
21c17193 JY |
1041 | );\r |
1042 | \r | |
717fb604 JY |
1043 | /**\r |
1044 | Allocate pages for code.\r | |
1045 | \r | |
1046 | @param[in] Pages Number of pages to be allocated.\r | |
1047 | \r | |
1048 | @return Allocated memory.\r | |
1049 | **/\r | |
1050 | VOID *\r | |
1051 | AllocateCodePages (\r | |
053e878b | 1052 | IN UINTN Pages\r |
717fb604 JY |
1053 | );\r |
1054 | \r | |
1055 | /**\r | |
1056 | Allocate aligned pages for code.\r | |
1057 | \r | |
1058 | @param[in] Pages Number of pages to be allocated.\r | |
1059 | @param[in] Alignment The requested alignment of the allocation.\r | |
1060 | Must be a power of two.\r | |
1061 | If Alignment is zero, then byte alignment is used.\r | |
1062 | \r | |
1063 | @return Allocated memory.\r | |
1064 | **/\r | |
1065 | VOID *\r | |
1066 | AllocateAlignedCodePages (\r | |
053e878b MK |
1067 | IN UINTN Pages,\r |
1068 | IN UINTN Alignment\r | |
717fb604 JY |
1069 | );\r |
1070 | \r | |
0bdc9e75 SZ |
1071 | //\r |
1072 | // S3 related global variable and function prototype.\r | |
1073 | //\r | |
1074 | \r | |
053e878b | 1075 | extern BOOLEAN mSmmS3Flag;\r |
0bdc9e75 SZ |
1076 | \r |
1077 | /**\r | |
1078 | Initialize SMM S3 resume state structure used during S3 Resume.\r | |
1079 | \r | |
1080 | @param[in] Cr3 The base address of the page tables to use in SMM.\r | |
1081 | \r | |
1082 | **/\r | |
1083 | VOID\r | |
1084 | InitSmmS3ResumeState (\r | |
1085 | IN UINT32 Cr3\r | |
1086 | );\r | |
1087 | \r | |
1088 | /**\r | |
1089 | Get ACPI CPU data.\r | |
1090 | \r | |
1091 | **/\r | |
1092 | VOID\r | |
1093 | GetAcpiCpuData (\r | |
1094 | VOID\r | |
1095 | );\r | |
1096 | \r | |
1097 | /**\r | |
1098 | Restore SMM Configuration in S3 boot path.\r | |
1099 | \r | |
1100 | **/\r | |
1101 | VOID\r | |
1102 | RestoreSmmConfigurationInS3 (\r | |
1103 | VOID\r | |
1104 | );\r | |
1105 | \r | |
b10d5ddc SZ |
1106 | /**\r |
1107 | Get ACPI S3 enable flag.\r | |
1108 | \r | |
1109 | **/\r | |
1110 | VOID\r | |
1111 | GetAcpiS3EnableFlag (\r | |
1112 | VOID\r | |
1113 | );\r | |
1114 | \r | |
4a0f88dd JF |
1115 | /**\r |
1116 | Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.\r | |
1117 | \r | |
672b80c8 MK |
1118 | @param[in] ApHltLoopCode The address of the safe hlt-loop function.\r |
1119 | @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.\r | |
1120 | @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.\r | |
4a0f88dd JF |
1121 | \r |
1122 | **/\r | |
1123 | VOID\r | |
1124 | TransferApToSafeState (\r | |
672b80c8 MK |
1125 | IN UINTN ApHltLoopCode,\r |
1126 | IN UINTN TopOfStack,\r | |
1127 | IN UINTN NumberToFinishAddress\r | |
4a0f88dd JF |
1128 | );\r |
1129 | \r | |
3eb69b08 JY |
1130 | /**\r |
1131 | Set ShadowStack memory.\r | |
1132 | \r | |
1133 | @param[in] Cr3 The page table base address.\r | |
1134 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
1135 | @param[in] Length The size in bytes of the memory region.\r | |
1136 | \r | |
1137 | @retval EFI_SUCCESS The shadow stack memory is set.\r | |
1138 | **/\r | |
1139 | EFI_STATUS\r | |
1140 | SetShadowStack (\r | |
053e878b MK |
1141 | IN UINTN Cr3,\r |
1142 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1143 | IN UINT64 Length\r | |
3eb69b08 JY |
1144 | );\r |
1145 | \r | |
1146 | /**\r | |
1147 | Set not present memory.\r | |
1148 | \r | |
1149 | @param[in] Cr3 The page table base address.\r | |
1150 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
1151 | @param[in] Length The size in bytes of the memory region.\r | |
1152 | \r | |
1153 | @retval EFI_SUCCESS The not present memory is set.\r | |
1154 | **/\r | |
1155 | EFI_STATUS\r | |
1156 | SetNotPresentPage (\r | |
053e878b MK |
1157 | IN UINTN Cr3,\r |
1158 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1159 | IN UINT64 Length\r | |
3eb69b08 JY |
1160 | );\r |
1161 | \r | |
1162 | /**\r | |
1163 | Initialize the shadow stack related data structure.\r | |
1164 | \r | |
1165 | @param CpuIndex The index of CPU.\r | |
1166 | @param ShadowStack The bottom of the shadow stack for this CPU.\r | |
1167 | **/\r | |
1168 | VOID\r | |
1169 | InitShadowStack (\r | |
1170 | IN UINTN CpuIndex,\r | |
1171 | IN VOID *ShadowStack\r | |
1172 | );\r | |
1173 | \r | |
827330cc JW |
1174 | /**\r |
1175 | This function set given attributes of the memory region specified by\r | |
1176 | BaseAddress and Length.\r | |
1177 | \r | |
1178 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
1179 | @param BaseAddress The physical address that is the start address of\r | |
1180 | a memory region.\r | |
1181 | @param Length The size in bytes of the memory region.\r | |
1182 | @param Attributes The bit mask of attributes to set for the memory\r | |
1183 | region.\r | |
1184 | \r | |
1185 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
1186 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
1187 | Attributes specified an illegal combination of\r | |
1188 | attributes that cannot be set together.\r | |
1189 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
1190 | bytes of the memory resource range specified\r | |
1191 | by BaseAddress and Length.\r | |
aae02dcc | 1192 | The bit mask of attributes is not supported for\r |
827330cc JW |
1193 | the memory resource range specified by\r |
1194 | BaseAddress and Length.\r | |
1195 | \r | |
1196 | **/\r | |
1197 | EFI_STATUS\r | |
1198 | EFIAPI\r | |
1199 | EdkiiSmmSetMemoryAttributes (\r | |
053e878b MK |
1200 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r |
1201 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1202 | IN UINT64 Length,\r | |
1203 | IN UINT64 Attributes\r | |
827330cc JW |
1204 | );\r |
1205 | \r | |
1206 | /**\r | |
1207 | This function clears given attributes of the memory region specified by\r | |
1208 | BaseAddress and Length.\r | |
1209 | \r | |
1210 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
1211 | @param BaseAddress The physical address that is the start address of\r | |
1212 | a memory region.\r | |
1213 | @param Length The size in bytes of the memory region.\r | |
aae02dcc | 1214 | @param Attributes The bit mask of attributes to clear for the memory\r |
827330cc JW |
1215 | region.\r |
1216 | \r | |
aae02dcc | 1217 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r |
827330cc JW |
1218 | @retval EFI_INVALID_PARAMETER Length is zero.\r |
1219 | Attributes specified an illegal combination of\r | |
aae02dcc | 1220 | attributes that cannot be cleared together.\r |
827330cc JW |
1221 | @retval EFI_UNSUPPORTED The processor does not support one or more\r |
1222 | bytes of the memory resource range specified\r | |
1223 | by BaseAddress and Length.\r | |
aae02dcc | 1224 | The bit mask of attributes is not supported for\r |
827330cc JW |
1225 | the memory resource range specified by\r |
1226 | BaseAddress and Length.\r | |
1227 | \r | |
1228 | **/\r | |
1229 | EFI_STATUS\r | |
1230 | EFIAPI\r | |
1231 | EdkiiSmmClearMemoryAttributes (\r | |
053e878b MK |
1232 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r |
1233 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1234 | IN UINT64 Length,\r | |
1235 | IN UINT64 Attributes\r | |
827330cc JW |
1236 | );\r |
1237 | \r | |
1238 | /**\r | |
aae02dcc | 1239 | This function retrieves the attributes of the memory region specified by\r |
827330cc JW |
1240 | BaseAddress and Length. If different attributes are got from different part\r |
1241 | of the memory region, EFI_NO_MAPPING will be returned.\r | |
1242 | \r | |
1243 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
1244 | @param BaseAddress The physical address that is the start address of\r | |
1245 | a memory region.\r | |
1246 | @param Length The size in bytes of the memory region.\r | |
1247 | @param Attributes Pointer to attributes returned.\r | |
1248 | \r | |
1249 | @retval EFI_SUCCESS The attributes got for the memory region.\r | |
1250 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
1251 | Attributes is NULL.\r | |
1252 | @retval EFI_NO_MAPPING Attributes are not consistent cross the memory\r | |
1253 | region.\r | |
1254 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
1255 | bytes of the memory resource range specified\r | |
1256 | by BaseAddress and Length.\r | |
827330cc JW |
1257 | \r |
1258 | **/\r | |
1259 | EFI_STATUS\r | |
1260 | EFIAPI\r | |
1261 | EdkiiSmmGetMemoryAttributes (\r | |
053e878b MK |
1262 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r |
1263 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1264 | IN UINT64 Length,\r | |
1265 | IN UINT64 *Attributes\r | |
827330cc JW |
1266 | );\r |
1267 | \r | |
e21e355e LG |
1268 | /**\r |
1269 | This function fixes up the address of the global variable or function\r | |
ef62da4f | 1270 | referred in SmmInit assembly files to be the absolute address.\r |
e21e355e LG |
1271 | **/\r |
1272 | VOID\r | |
1273 | EFIAPI\r | |
1274 | PiSmmCpuSmmInitFixupAddress (\r | |
053e878b | 1275 | );\r |
e21e355e LG |
1276 | \r |
1277 | /**\r | |
1278 | This function fixes up the address of the global variable or function\r | |
ef62da4f | 1279 | referred in SmiEntry assembly files to be the absolute address.\r |
e21e355e LG |
1280 | **/\r |
1281 | VOID\r | |
1282 | EFIAPI\r | |
1283 | PiSmmCpuSmiEntryFixupAddress (\r | |
053e878b | 1284 | );\r |
e21e355e | 1285 | \r |
37f9fea5 VN |
1286 | /**\r |
1287 | This function reads CR2 register when on-demand paging is enabled\r | |
1288 | for 64 bit and no action for 32 bit.\r | |
1289 | \r | |
1290 | @param[out] *Cr2 Pointer to variable to hold CR2 register value.\r | |
1291 | **/\r | |
1292 | VOID\r | |
1293 | SaveCr2 (\r | |
1294 | OUT UINTN *Cr2\r | |
1295 | );\r | |
1296 | \r | |
1297 | /**\r | |
1298 | This function writes into CR2 register when on-demand paging is enabled\r | |
1299 | for 64 bit and no action for 32 bit.\r | |
1300 | \r | |
1301 | @param[in] Cr2 Value to write into CR2 register.\r | |
1302 | **/\r | |
1303 | VOID\r | |
1304 | RestoreCr2 (\r | |
1305 | IN UINTN Cr2\r | |
1306 | );\r | |
1307 | \r | |
51dd408a ED |
1308 | /**\r |
1309 | Schedule a procedure to run on the specified CPU.\r | |
1310 | \r | |
1311 | @param[in] Procedure The address of the procedure to run\r | |
1312 | @param[in] CpuIndex Target CPU Index\r | |
1313 | @param[in,out] ProcArguments The parameter to pass to the procedure\r | |
1314 | @param[in,out] Token This is an optional parameter that allows the caller to execute the\r | |
1315 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
1316 | call is blocking, and the call will not return until the AP has\r | |
1317 | completed the procedure. If the token is not NULL, the call will\r | |
1318 | return immediately. The caller can check whether the procedure has\r | |
1319 | completed with CheckOnProcedure or WaitForProcedure.\r | |
1320 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish\r | |
1321 | execution of Procedure, either for blocking or non-blocking mode.\r | |
1322 | Zero means infinity. If the timeout expires before all APs return\r | |
1323 | from Procedure, then Procedure on the failed APs is terminated. If\r | |
1324 | the timeout expires in blocking mode, the call returns EFI_TIMEOUT.\r | |
1325 | If the timeout expires in non-blocking mode, the timeout determined\r | |
1326 | can be through CheckOnProcedure or WaitForProcedure.\r | |
1327 | Note that timeout support is optional. Whether an implementation\r | |
1328 | supports this feature can be determined via the Attributes data\r | |
1329 | member.\r | |
073f2ced | 1330 | @param[in,out] CpuStatus This optional pointer may be used to get the status code returned\r |
51dd408a ED |
1331 | by Procedure when it completes execution on the target AP, or with\r |
1332 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
1333 | timeout. The implementation will update this variable with\r | |
1334 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
1335 | \r | |
1336 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
1337 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
1338 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
1339 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
1340 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
1341 | \r | |
1342 | **/\r | |
1343 | EFI_STATUS\r | |
1344 | InternalSmmStartupThisAp (\r | |
053e878b MK |
1345 | IN EFI_AP_PROCEDURE2 Procedure,\r |
1346 | IN UINTN CpuIndex,\r | |
1347 | IN OUT VOID *ProcArguments OPTIONAL,\r | |
1348 | IN OUT MM_COMPLETION *Token,\r | |
1349 | IN UINTN TimeoutInMicroseconds,\r | |
1350 | IN OUT EFI_STATUS *CpuStatus\r | |
51dd408a ED |
1351 | );\r |
1352 | \r | |
1353 | /**\r | |
1354 | Checks whether the input token is the current used token.\r | |
1355 | \r | |
1356 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
1357 | BroadcastProcedure.\r | |
1358 | \r | |
1359 | @retval TRUE The input token is the current used token.\r | |
1360 | @retval FALSE The input token is not the current used token.\r | |
1361 | **/\r | |
1362 | BOOLEAN\r | |
1363 | IsTokenInUse (\r | |
053e878b | 1364 | IN SPIN_LOCK *Token\r |
51dd408a ED |
1365 | );\r |
1366 | \r | |
1367 | /**\r | |
1368 | Checks status of specified AP.\r | |
1369 | \r | |
1370 | This function checks whether the specified AP has finished the task assigned\r | |
1371 | by StartupThisAP(), and whether timeout expires.\r | |
1372 | \r | |
1373 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
1374 | BroadcastProcedure.\r | |
1375 | \r | |
1376 | @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r | |
1377 | @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r | |
1378 | **/\r | |
1379 | EFI_STATUS\r | |
1380 | IsApReady (\r | |
1381 | IN SPIN_LOCK *Token\r | |
1382 | );\r | |
1383 | \r | |
1384 | /**\r | |
1385 | Check whether it is an present AP.\r | |
1386 | \r | |
1387 | @param CpuIndex The AP index which calls this function.\r | |
1388 | \r | |
1389 | @retval TRUE It's a present AP.\r | |
1390 | @retval TRUE This is not an AP or it is not present.\r | |
1391 | \r | |
1392 | **/\r | |
1393 | BOOLEAN\r | |
1394 | IsPresentAp (\r | |
053e878b | 1395 | IN UINTN CpuIndex\r |
51dd408a ED |
1396 | );\r |
1397 | \r | |
1398 | /**\r | |
1399 | Worker function to execute a caller provided function on all enabled APs.\r | |
1400 | \r | |
1401 | @param[in] Procedure A pointer to the function to be run on\r | |
1402 | enabled APs of the system.\r | |
1403 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r | |
1404 | APs to return from Procedure, either for\r | |
1405 | blocking or non-blocking mode.\r | |
5ed4c46f | 1406 | @param[in,out] ProcedureArguments The parameter passed into Procedure for\r |
51dd408a ED |
1407 | all APs.\r |
1408 | @param[in,out] Token This is an optional parameter that allows the caller to execute the\r | |
1409 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
1410 | call is blocking, and the call will not return until the AP has\r | |
1411 | completed the procedure. If the token is not NULL, the call will\r | |
1412 | return immediately. The caller can check whether the procedure has\r | |
1413 | completed with CheckOnProcedure or WaitForProcedure.\r | |
1414 | @param[in,out] CPUStatus This optional pointer may be used to get the status code returned\r | |
1415 | by Procedure when it completes execution on the target AP, or with\r | |
1416 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
1417 | timeout. The implementation will update this variable with\r | |
1418 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
1419 | \r | |
1420 | @retval EFI_SUCCESS In blocking mode, all APs have finished before\r | |
1421 | the timeout expired.\r | |
1422 | @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r | |
1423 | to all enabled APs.\r | |
1424 | @retval others Failed to Startup all APs.\r | |
1425 | \r | |
1426 | **/\r | |
1427 | EFI_STATUS\r | |
1428 | InternalSmmStartupAllAPs (\r | |
053e878b MK |
1429 | IN EFI_AP_PROCEDURE2 Procedure,\r |
1430 | IN UINTN TimeoutInMicroseconds,\r | |
1431 | IN OUT VOID *ProcedureArguments OPTIONAL,\r | |
1432 | IN OUT MM_COMPLETION *Token,\r | |
1433 | IN OUT EFI_STATUS *CPUStatus\r | |
51dd408a ED |
1434 | );\r |
1435 | \r | |
1436 | /**\r | |
1437 | \r | |
1438 | Register the SMM Foundation entry point.\r | |
1439 | \r | |
1440 | @param[in] Procedure A pointer to the code stream to be run on the designated target AP\r | |
1441 | of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2\r | |
1442 | with the related definitions of\r | |
1443 | EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.\r | |
1444 | If caller may pass a value of NULL to deregister any existing\r | |
1445 | startup procedure.\r | |
1446 | @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is\r | |
1447 | run by the AP. It is an optional common mailbox between APs and\r | |
1448 | the caller to share information\r | |
1449 | \r | |
1450 | @retval EFI_SUCCESS The Procedure has been set successfully.\r | |
1451 | @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.\r | |
1452 | \r | |
1453 | **/\r | |
1454 | EFI_STATUS\r | |
1455 | RegisterStartupProcedure (\r | |
053e878b MK |
1456 | IN EFI_AP_PROCEDURE Procedure,\r |
1457 | IN OUT VOID *ProcedureArguments OPTIONAL\r | |
51dd408a ED |
1458 | );\r |
1459 | \r | |
c14c4719 WJ |
1460 | /**\r |
1461 | Initialize PackageBsp Info. Processor specified by mPackageFirstThreadIndex[PackageIndex]\r | |
1462 | will do the package-scope register programming. Set default CpuIndex to (UINT32)-1, which\r | |
1463 | means not specified yet.\r | |
1464 | \r | |
1465 | **/\r | |
1466 | VOID\r | |
1467 | InitPackageFirstThreadIndexInfo (\r | |
1468 | VOID\r | |
1469 | );\r | |
1470 | \r | |
51dd408a ED |
1471 | /**\r |
1472 | Allocate buffer for SpinLock and Wrapper function buffer.\r | |
1473 | \r | |
1474 | **/\r | |
1475 | VOID\r | |
1476 | InitializeDataForMmMp (\r | |
1477 | VOID\r | |
1478 | );\r | |
1479 | \r | |
79186ddc RN |
1480 | /**\r |
1481 | Return whether access to non-SMRAM is restricted.\r | |
1482 | \r | |
1483 | @retval TRUE Access to non-SMRAM is restricted.\r | |
1484 | @retval FALSE Access to non-SMRAM is not restricted.\r | |
9c33f16f | 1485 | **/\r |
79186ddc RN |
1486 | BOOLEAN\r |
1487 | IsRestrictedMemoryAccess (\r | |
1488 | VOID\r | |
1489 | );\r | |
1490 | \r | |
4a68176c LZ |
1491 | /**\r |
1492 | Choose blocking or non-blocking mode to Wait for all APs.\r | |
1493 | \r | |
1494 | @param[in] This A pointer to the EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL instance.\r | |
1495 | @param[in] BlockingMode Blocking or non-blocking mode.\r | |
1496 | \r | |
1497 | @retval EFI_SUCCESS All APs have arrived SMM mode except SMI disabled APs.\r | |
1498 | @retval EFI_TIMEOUT There are APs not in SMM mode in given timeout constraint.\r | |
1499 | \r | |
1500 | **/\r | |
1501 | EFI_STATUS\r | |
1502 | EFIAPI\r | |
1503 | SmmCpuRendezvous (\r | |
1504 | IN EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL *This,\r | |
1505 | IN BOOLEAN BlockingMode\r | |
1506 | );\r | |
1507 | \r | |
1508 | /**\r | |
1509 | Insure when this function returns, no AP will execute normal mode code before entering SMM, except SMI disabled APs.\r | |
1510 | \r | |
1511 | **/\r | |
1512 | VOID\r | |
1513 | SmmWaitForApArrival (\r | |
1514 | VOID\r | |
1515 | );\r | |
1516 | \r | |
529a5a86 | 1517 | #endif\r |