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UefiCpuPkg/PiSmmCpuDxeSmm: Add volatile to mNumberToFinish
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
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5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
4# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>\r
5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License that accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php.\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14#\r
15#**/\r
16\r
17[Defines]\r
18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
23DEFINE FLASH_AREA_SIZE = 0x00800000\r
24\r
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
28\r
988715a3 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
31\r
988715a3 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
34\r
35\r
988715a3 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
38\r
39!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 43\r
988715a3 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 47\r
48!endif\r
49\r
988715a3 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000\r
5e752084 52\r
988715a3 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000\r
54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000\r
5e752084 55\r
988715a3 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 58\r
59################################################################################\r
60#\r
61# FD Section\r
62# The [FD] Section is made up of the definition statements and a\r
63# description of what goes into the Flash Device Image. Each FD section\r
64# defines one flash "device" image. A flash device image may be one of\r
65# the following: Removable media bootable image (like a boot floppy\r
66# image,) an Option ROM image (that would be "flashed" into an add-in\r
67# card,) a System "Flash" image (that would be burned into a system's\r
68# flash) or an Update ("Capsule") image that will be used to update and\r
69# existing system flash.\r
70#\r
71################################################################################\r
72[FD.Vlv]\r
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
75ErasePolarity = 1\r
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
78\r
79#\r
80#Flash location override based on actual flash map\r
81#\r
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
84\r
c5a59080
JY		 85SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
86SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
87\r
5e752084 88!if $(MINNOW2_FSP_BUILD) == TRUE\r
89# put below PCD value setting into dsc file\r
90#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
91#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
92#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
93#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
94#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
95#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
96#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
97\r
98!endif\r
99################################################################################\r
100#\r
101# Following are lists of FD Region layout which correspond to the locations of different\r
102# images within the flash device.\r
103#\r
104# Regions must be defined in ascending order and may not overlap.\r
105#\r
106# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
107# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
108# "0x" characters. Like:\r
109# Offset|Size\r
110# PcdOffsetCName|PcdSizeCName\r
111# RegionType <FV, DATA, or FILE>\r
112# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
113#\r
114################################################################################\r
115# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,\r
116# so we hardcode the default value of variable here.\r
117# Please note that we MUST update the binary once the default value is changed.\r
118\r
119#\r
120 # CPU Microcodes\r
121 #\r
122\r
123$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
124gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
125FV = MICROCODE_FV\r
126\r
127$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
128gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
129FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r
130\r
131$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
132gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
133FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin\r
134\r
135$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
136gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
137FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin\r
138\r
139!if $(MINNOW2_FSP_BUILD) == TRUE\r
140\r
141 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
142 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
143 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r
144\r
145\r
146 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
147 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
148\r
149!endif\r
150\r
151 #\r
152 # Main Block\r
153 #\r
154$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
155gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
156FV = FVMAIN_COMPACT\r
157\r
158 #\r
159 # FV Recovery#2\r
160 #\r
161$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
162gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
163FV = FVRECOVERY2\r
164\r
165 #\r
166 # FV Recovery\r
167 #\r
168$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
169gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
170FV = FVRECOVERY\r
171\r
172################################################################################\r
173#\r
174# FV Section\r
175#\r
176# [FV] section is used to define what components or modules are placed within a flash\r
177# device file. This section also defines order the components and modules are positioned\r
178# within the image. The [FV] section consists of define statements, set statements and\r
179# module statements.\r
180#\r
181################################################################################\r
182[FV.MICROCODE_FV]\r
183BlockSize = $(FLASH_BLOCK_SIZE)\r
184FvAlignment = 16\r
185ERASE_POLARITY = 1\r
186MEMORY_MAPPED = TRUE\r
187STICKY_WRITE = TRUE\r
188LOCK_CAP = TRUE\r
189LOCK_STATUS = FALSE\r
190WRITE_DISABLED_CAP = TRUE\r
191WRITE_ENABLED_CAP = TRUE\r
192WRITE_STATUS = TRUE\r
193WRITE_LOCK_CAP = TRUE\r
194WRITE_LOCK_STATUS = TRUE\r
195READ_DISABLED_CAP = TRUE\r
196READ_ENABLED_CAP = TRUE\r
197READ_STATUS = TRUE\r
198READ_LOCK_CAP = TRUE\r
199READ_LOCK_STATUS = TRUE\r
200\r
201FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
202 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r
203}\r
204\r
c5a59080
JY		 205!if $(RECOVERY_ENABLE)\r
206[FV.FVRECOVERY_COMPONENTS]\r
207FvAlignment = 16 #FV alignment and FV attributes setting.\r
208ERASE_POLARITY = 1\r
209MEMORY_MAPPED = TRUE\r
210STICKY_WRITE = TRUE\r
211LOCK_CAP = TRUE\r
212LOCK_STATUS = TRUE\r
213WRITE_DISABLED_CAP = TRUE\r
214WRITE_ENABLED_CAP = TRUE\r
215WRITE_STATUS = TRUE\r
216WRITE_LOCK_CAP = TRUE\r
217WRITE_LOCK_STATUS = TRUE\r
218READ_DISABLED_CAP = TRUE\r
219READ_ENABLED_CAP = TRUE\r
220READ_STATUS = TRUE\r
221READ_LOCK_CAP = TRUE\r
222READ_LOCK_STATUS = TRUE\r
223\r
224INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
225INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
226INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
227INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
228INF FatPkg/FatPei/FatPei.inf\r
229INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
230INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
231!endif\r
232\r
5e752084 233################################################################################\r
234#\r
235# FV Section\r
236#\r
237# [FV] section is used to define what components or modules are placed within a flash\r
238# device file. This section also defines order the components and modules are positioned\r
239# within the image. The [FV] section consists of define statements, set statements and\r
240# module statements.\r
241#\r
242################################################################################\r
243[FV.FVRECOVERY2]\r
244BlockSize = $(FLASH_BLOCK_SIZE)\r
245FvAlignment = 16 #FV alignment and FV attributes setting.\r
246ERASE_POLARITY = 1\r
247MEMORY_MAPPED = TRUE\r
248STICKY_WRITE = TRUE\r
249LOCK_CAP = TRUE\r
250LOCK_STATUS = TRUE\r
251WRITE_DISABLED_CAP = TRUE\r
252WRITE_ENABLED_CAP = TRUE\r
253WRITE_STATUS = TRUE\r
254WRITE_LOCK_CAP = TRUE\r
255WRITE_LOCK_STATUS = TRUE\r
256READ_DISABLED_CAP = TRUE\r
257READ_ENABLED_CAP = TRUE\r
258READ_STATUS = TRUE\r
259READ_LOCK_CAP = TRUE\r
260READ_LOCK_STATUS = TRUE\r
261FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
262\r
263\r
264\r
265INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
266\r
267!if $(MINNOW2_FSP_BUILD) == FALSE\r
268INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
269INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
270INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
271INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
272INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
273INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
274INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
275INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
276INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf\r
277!endif\r
278\r
279INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
280!if $(TPM_ENABLED) == TRUE\r
281INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf\r
282INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
283INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
284!endif\r
285!if $(FTPM_ENABLE) == TRUE\r
286INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config\r
287!endif\r
288INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
289\r
290!if $(ACPI50_ENABLE) == TRUE\r
291 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
292!endif\r
293!if $(PERFORMANCE_ENABLE) == TRUE\r
294INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
295!endif\r
296\r
c5a59080
JY		 297!if $(RECOVERY_ENABLE)\r
298FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
299 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
300 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
301 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
302 }\r
303}\r
304!endif\r
305\r
5e752084 306[FV.FVRECOVERY]\r
307BlockSize = $(FLASH_BLOCK_SIZE)\r
308FvAlignment = 16 #FV alignment and FV attributes setting.\r
309ERASE_POLARITY = 1\r
310MEMORY_MAPPED = TRUE\r
311STICKY_WRITE = TRUE\r
312LOCK_CAP = TRUE\r
313LOCK_STATUS = TRUE\r
314WRITE_DISABLED_CAP = TRUE\r
315WRITE_ENABLED_CAP = TRUE\r
316WRITE_STATUS = TRUE\r
317WRITE_LOCK_CAP = TRUE\r
318WRITE_LOCK_STATUS = TRUE\r
319READ_DISABLED_CAP = TRUE\r
320READ_ENABLED_CAP = TRUE\r
321READ_STATUS = TRUE\r
322READ_LOCK_CAP = TRUE\r
323READ_LOCK_STATUS = TRUE\r
324FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
325\r
326\r
327!if $(MINNOW2_FSP_BUILD) == TRUE\r
328INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
329!else\r
330INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
331!endif\r
332\r
333INF MdeModulePkg/Core/Pei/PeiMain.inf\r
334!if $(MINNOW2_FSP_BUILD) == TRUE\r
335INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
336INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
337!endif\r
338INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
339INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
340INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
341\r
342INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
343\r
344!if $(MINNOW2_FSP_BUILD) == FALSE\r
345INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
346!endif\r
347\r
348!if $(FTPM_ENABLE) == TRUE\r
349INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
350!endif\r
351\r
352!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
353 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
354!endif\r
355\r
356\r
357!if $(CAPSULE_ENABLE) == TRUE\r
358INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
359!if $(DXE_ARCHITECTURE) == "X64"\r
360INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
361!endif\r
362!endif\r
363\r
364!if $(MINNOW2_FSP_BUILD) == FALSE\r
365!if $(PCIESC_ENABLE) == TRUE\r
366INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
367!endif\r
368INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
369!endif\r
370\r
371INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
372\r
c5a59080
JY		 373!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
374 # FMP image decriptor\r
375INF RuleOverride = FMP_IMAGE_DESC Vlv2TbltDevicePkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf\r
376!endif\r
377\r
5e752084 378[FV.FVMAIN]\r
379BlockSize = $(FLASH_BLOCK_SIZE)\r
380FvAlignment = 16\r
381ERASE_POLARITY = 1\r
382MEMORY_MAPPED = TRUE\r
383STICKY_WRITE = TRUE\r
384LOCK_CAP = TRUE\r
385LOCK_STATUS = TRUE\r
386WRITE_DISABLED_CAP = TRUE\r
387WRITE_ENABLED_CAP = TRUE\r
388WRITE_STATUS = TRUE\r
389WRITE_LOCK_CAP = TRUE\r
390WRITE_LOCK_STATUS = TRUE\r
391READ_DISABLED_CAP = TRUE\r
392READ_ENABLED_CAP = TRUE\r
393READ_STATUS = TRUE\r
394READ_LOCK_CAP = TRUE\r
395READ_LOCK_STATUS = TRUE\r
396FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
397\r
398APRIORI DXE {\r
399 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
400 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
401 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
402 }\r
403\r
404FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
405 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
406 }\r
407\r
408 #\r
409 # EDK II Related Platform codes\r
410 #\r
411\r
412 !if $(MINNOW2_FSP_BUILD) == TRUE\r
413 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
414 !endif\r
415\r
416INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
417INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
418!if $(ACPI50_ENABLE) == TRUE\r
419INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
420INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
421!endif\r
422\r
423\r
424INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
425INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
426INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
427INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
428INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
429INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
430INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
431INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
432INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
433INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
434INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
435INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
436INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
437\r
438INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
439INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
440INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
441INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
442INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
443!if $(SECURE_BOOT_ENABLE)\r
444INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
445!endif\r
446\r
447INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
448\r
449INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
450INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
451INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
452INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
453\r
454\r
455INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
456\r
457!if $(DATAHUB_ENABLE) == TRUE\r
458INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
459!endif\r
460INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
461INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
462\r
463INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
464\r
465 #\r
466 # EDK II Related Silicon codes\r
467 #\r
468INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
469\r
470!if $(USE_HPET_TIMER) == TRUE\r
471INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
472!else\r
473INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
474!endif\r
475INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
476\r
477INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
478\r
479INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
480INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
481\r
482!if $(MINNOW2_FSP_BUILD) == FALSE\r
483INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
484!endif\r
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
486!if $(PCIESC_ENABLE) == TRUE\r
487INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
488!endif\r
489\r
490INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
491INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
492INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
493INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
494INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
495!if $(MINNOW2_FSP_BUILD) == FALSE\r
496INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
497!else\r
498INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
499INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
500!endif\r
501!if $(MINNOW2_FSP_BUILD) == FALSE\r
502 !if $(SEC_ENABLE) == TRUE\r
503 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
504 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
505 !endif\r
506!endif\r
507!if $(TPM_ENABLED) == TRUE\r
508INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
509INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
510INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
511!endif\r
512!if $(FTPM_ENABLE) == TRUE\r
513INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
514INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
515INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
516INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf\r
517INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
518!endif\r
519\r
520#\r
521# EDK II Related Platform codes\r
522#\r
523INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
524INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
525INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
526INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
527INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
528INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
529INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
530INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
531INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
532!if $(GOP_DRIVER_ENABLE) == TRUE\r
533 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
534 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
535 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
536 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
537 SECTION UI = "IntelGopDriver"\r
538}\r
539!endif\r
540\r
541INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
542 #\r
543 # SMM\r
544 #\r
545INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
546INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 547INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 548\r
549INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
550INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 551INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 552INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
553INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
5e752084 554INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
555 #\r
556 # ACPI\r
557 #\r
558INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
559INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
560INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
561INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
562\r
563INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
564\r
565INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
566\r
567 #\r
568 # PCI\r
569 #\r
570INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
571\r
572INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
573\r
574\r
575#\r
576# ISA\r
577#\r
578INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
579INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
580INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
581!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
582INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
583!endif\r
584#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
585#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
586\r
587#\r
588# SDIO\r
589#\r
590INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
591INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
592#\r
593# IDE/SCSI/AHCI\r
594#\r
595INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
596\r
597INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
598\r
599INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
600!if $(SATA_ENABLE) == TRUE\r
601INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
602#\r
603\r
604#\r
605INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
606INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
607!if $(SCSI_ENABLE) == TRUE\r
608INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
609INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
610!endif\r
611#\r
612!endif\r
613# Console\r
614#\r
615INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
616INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
617INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
618INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
619INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
620INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
621INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
622INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
623 #\r
624 # USB\r
625 #\r
626!if $(USB_ENABLE) == TRUE\r
627INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
628INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
629INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
630INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
631INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
632INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
633INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
634!endif\r
635\r
636 #\r
637 # ECP\r
638 #\r
639INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf\r
640INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf\r
641INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf\r
642INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf\r
643INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf\r
644INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf\r
645 #\r
646 # SMBIOS\r
647 #\r
648INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
649INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
650\r
651INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
652\r
653 #\r
654 # Legacy Modules\r
655 #\r
656INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
657\r
658#\r
659# FAT file system\r
660#\r
661INF FatPkg/EnhancedFatDxe/Fat.inf\r
662\r
663#\r
664# UEFI Shell\r
665#\r
666FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {\r
667# SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi\r
668 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi\r
669 }\r
670\r
671\r
672\r
673!if $(GOP_DRIVER_ENABLE) == TRUE\r
674FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
675 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
676 SECTION UI = "IntelGopVbt"\r
677}\r
678!endif\r
679\r
680#\r
681# Network Modules\r
682#\r
683!if $(NETWORK_ENABLE) == TRUE\r
684 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
685 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
686 SECTION UI = "UNDI"\r
687 }\r
688 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
689 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
690 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
691 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
692 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
693 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
694 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
695 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
696 !if $(NETWORK_IP6_ENABLE) == TRUE\r
697 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
698 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
699 INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r
700 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
701 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
702 !endif\r
703 !if $(NETWORK_IP6_ENABLE) == TRUE\r
704 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
705 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
706 !else\r
707 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
708 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
709 !endif\r
710 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
711 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
712 !endif\r
713 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
714 !if $(NETWORK_IP6_ENABLE) == TRUE\r
715 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
716 !else\r
717 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
718 !endif\r
719 !endif\r
720!endif\r
721\r
c5a59080
JY		 722!if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE)\r
723INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf\r
724!endif\r
725!if $(CAPSULE_ENABLE)\r
726INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf\r
727!endif\r
728!if $(MICOCODE_CAPSULE_ENABLE)\r
729INF UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
730!endif\r
731\r
732!if $(RECOVERY_ENABLE)\r
733FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
734 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
735 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
736 }\r
737!endif\r
738 \r
739!if $(CAPSULE_ENABLE)\r
740FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {\r
741 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer\r
742 SECTION UI = "Pkcs7TestRoot"\r
743 }\r
744!endif\r
745\r
5e752084 746[FV.FVMAIN_COMPACT]\r
747BlockSize = $(FLASH_BLOCK_SIZE)\r
748FvAlignment = 16\r
749ERASE_POLARITY = 1\r
750MEMORY_MAPPED = TRUE\r
751STICKY_WRITE = TRUE\r
752LOCK_CAP = TRUE\r
753LOCK_STATUS = TRUE\r
754WRITE_DISABLED_CAP = TRUE\r
755WRITE_ENABLED_CAP = TRUE\r
756WRITE_STATUS = TRUE\r
757WRITE_LOCK_CAP = TRUE\r
758WRITE_LOCK_STATUS = TRUE\r
759READ_DISABLED_CAP = TRUE\r
760READ_ENABLED_CAP = TRUE\r
761READ_STATUS = TRUE\r
762READ_LOCK_CAP = TRUE\r
763READ_LOCK_STATUS = TRUE\r
764\r
765\r
766\r
767FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
768!if $(LZMA_ENABLE) == TRUE\r
769# LZMA Compress\r
770 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
771 SECTION FV_IMAGE = FVMAIN\r
772 }\r
773!else\r
774!if $(DXE_COMPRESS_ENABLE) == TRUE\r
775# Tiano Compress\r
776 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
777 SECTION FV_IMAGE = FVMAIN\r
778 }\r
779!else\r
780# No Compress\r
781 SECTION COMPRESS PI_NONE {\r
782 SECTION FV_IMAGE = FVMAIN\r
783 }\r
784!endif\r
785!endif\r
786 }\r
787\r
788[FV.SETUP_DATA]\r
789BlockSize = $(FLASH_BLOCK_SIZE)\r
790#NumBlocks = 0x10\r
791FvAlignment = 16\r
792ERASE_POLARITY = 1\r
793MEMORY_MAPPED = TRUE\r
794STICKY_WRITE = TRUE\r
795LOCK_CAP = TRUE\r
796LOCK_STATUS = TRUE\r
797WRITE_DISABLED_CAP = TRUE\r
798WRITE_ENABLED_CAP = TRUE\r
799WRITE_STATUS = TRUE\r
800WRITE_LOCK_CAP = TRUE\r
801WRITE_LOCK_STATUS = TRUE\r
802READ_DISABLED_CAP = TRUE\r
803READ_ENABLED_CAP = TRUE\r
804READ_STATUS = TRUE\r
805READ_LOCK_CAP = TRUE\r
806READ_LOCK_STATUS = TRUE\r
807\r
808\r
c5a59080
JY		 809!if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)\r
810[FV.CapsuleDispatchFv]\r
5e752084 811FvAlignment = 16\r
812ERASE_POLARITY = 1\r
813MEMORY_MAPPED = TRUE\r
814STICKY_WRITE = TRUE\r
815LOCK_CAP = TRUE\r
816LOCK_STATUS = TRUE\r
817WRITE_DISABLED_CAP = TRUE\r
818WRITE_ENABLED_CAP = TRUE\r
819WRITE_STATUS = TRUE\r
820WRITE_LOCK_CAP = TRUE\r
821WRITE_LOCK_STATUS = TRUE\r
822READ_DISABLED_CAP = TRUE\r
823READ_ENABLED_CAP = TRUE\r
824READ_STATUS = TRUE\r
825READ_LOCK_CAP = TRUE\r
826READ_LOCK_STATUS = TRUE\r
827\r
c5a59080
JY		 828!if $(CAPSULE_ENABLE)\r
829INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf\r
830!endif\r
5e752084 831\r
c5a59080 832!endif\r
5e752084 833\r
834################################################################################\r
835#\r
836# Rules are use with the [FV] section's module INF type to define\r
837# how an FFS file is created for a given INF file. The following Rule are the default\r
838# rules for the different module type. User can add the customized rules to define the\r
839# content of the FFS file.\r
840#\r
841################################################################################\r
842[Rule.Common.SEC]\r
843 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
844 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
845 RAW BIN Align = 16 |.com\r
846 }\r
847\r
848[Rule.Common.SEC.BINARY]\r
849 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
850 PE32 PE32 Align = 8 |.efi\r
584fcb7d
WD		 851!if $(MINNOW2_FSP_BUILD) == TRUE\r
852 RAW RAW |.raw\r
853!else\r
854 RAW BIN Align = 16 |.com\r
855!endif\r
5e752084 856 }\r
857\r
858[Rule.Common.PEI_CORE]\r
859 FILE PEI_CORE = $(NAMED_GUID) {\r
860 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
861 UI STRING="$(MODULE_NAME)" Optional\r
862 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
863 }\r
864\r
865[Rule.Common.PEIM]\r
866 FILE PEIM = $(NAMED_GUID) {\r
867 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
868 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
869 UI STRING="$(MODULE_NAME)" Optional\r
870 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
871 }\r
872\r
873[Rule.Common.PEIM.BINARY]\r
874 FILE PEIM = $(NAMED_GUID) {\r
875 PEI_DEPEX PEI_DEPEX Optional |.depex\r
876 PE32 PE32 Align = Auto |.efi\r
877 UI STRING="$(MODULE_NAME)" Optional\r
878 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
879 }\r
880\r
881[Rule.Common.PEIM.BIOSID]\r
882 FILE PEIM = $(NAMED_GUID) {\r
883 RAW BIN BiosId.bin\r
884 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
885 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
886 UI STRING="$(MODULE_NAME)" Optional\r
887 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
888 }\r
889\r
890[Rule.Common.USER_DEFINED.APINIT]\r
891 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
892 RAW SEC_BIN |.com\r
893 }\r
894#cjia 2011-07-21\r
895[Rule.Common.USER_DEFINED.LEGACY16]\r
896 FILE FREEFORM = $(NAMED_GUID) {\r
897 UI STRING="$(MODULE_NAME)" Optional\r
898 RAW BIN |.bin\r
899 }\r
900#cjia\r
901\r
902[Rule.Common.USER_DEFINED.ASM16]\r
903 FILE FREEFORM = $(NAMED_GUID) {\r
904 UI STRING="$(MODULE_NAME)" Optional\r
905 RAW BIN |.com\r
906 }\r
907\r
908[Rule.Common.DXE_CORE]\r
909 FILE DXE_CORE = $(NAMED_GUID) {\r
910 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
911 UI STRING="$(MODULE_NAME)" Optional\r
912 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
913 }\r
914\r
915[Rule.Common.UEFI_DRIVER]\r
916 FILE DRIVER = $(NAMED_GUID) {\r
917 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
918 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
919 UI STRING="$(MODULE_NAME)" Optional\r
920 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
921 }\r
922\r
923[Rule.Common.UEFI_DRIVER.BINARY]\r
924 FILE DRIVER = $(NAMED_GUID) {\r
925 DXE_DEPEX DXE_DEPEX Optional |.depex\r
926 PE32 PE32 |.efi\r
927 UI STRING="$(MODULE_NAME)" Optional\r
928 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
929 }\r
930\r
931[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
932 FILE DRIVER = $(NAMED_GUID) {\r
933 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
934 PE32 PE32 |.efi\r
935 UI STRING="$(MODULE_NAME)" Optional\r
936 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
937 }\r
938\r
939[Rule.Common.DXE_DRIVER]\r
940 FILE DRIVER = $(NAMED_GUID) {\r
941 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
942 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
943 UI STRING="$(MODULE_NAME)" Optional\r
944 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
945 }\r
946\r
947[Rule.Common.DXE_DRIVER.BINARY]\r
948 FILE DRIVER = $(NAMED_GUID) {\r
949 DXE_DEPEX DXE_DEPEX Optional |.depex\r
950 PE32 PE32 |.efi\r
951 UI STRING="$(MODULE_NAME)" Optional\r
952 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
953 }\r
954\r
955[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
956 FILE DRIVER = $(NAMED_GUID) {\r
957 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
958 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
959 UI STRING="$(MODULE_NAME)" Optional\r
960 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
961 RAW ACPI Optional |.acpi\r
962 RAW ASL Optional |.aml\r
963 }\r
964\r
965[Rule.Common.DXE_RUNTIME_DRIVER]\r
966 FILE DRIVER = $(NAMED_GUID) {\r
967 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
968 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
969 UI STRING="$(MODULE_NAME)" Optional\r
970 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
971 }\r
972\r
973[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
974 FILE DRIVER = $(NAMED_GUID) {\r
975 DXE_DEPEX DXE_DEPEX Optional |.depex\r
976 PE32 PE32 |.efi\r
977 UI STRING="$(MODULE_NAME)" Optional\r
978 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
979 }\r
980\r
981[Rule.Common.DXE_SMM_DRIVER]\r
982 FILE SMM = $(NAMED_GUID) {\r
983 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
984 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
985 UI STRING="$(MODULE_NAME)" Optional\r
986 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
987 }\r
988\r
989[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
990 FILE SMM = $(NAMED_GUID) {\r
991 SMM_DEPEX SMM_DEPEX |.depex\r
992 PE32 PE32 |.efi\r
993 RAW BIN Optional |.aml\r
994 UI STRING="$(MODULE_NAME)" Optional\r
995 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
996 }\r
997\r
998[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
999 FILE SMM = $(NAMED_GUID) {\r
1000 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1001 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1002 UI STRING="$(MODULE_NAME)" Optional\r
1003 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1004 RAW ACPI Optional |.acpi\r
1005 RAW ASL Optional |.aml\r
1006 }\r
1007\r
1008[Rule.Common.SMM_CORE]\r
1009 FILE SMM_CORE = $(NAMED_GUID) {\r
1010 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1011 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1012 UI STRING="$(MODULE_NAME)" Optional\r
1013 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1014 }\r
1015\r
1016[Rule.Common.SMM_CORE.BINARY]\r
1017 FILE SMM_CORE = $(NAMED_GUID) {\r
1018 DXE_DEPEX DXE_DEPEX Optional |.depex\r
1019 PE32 PE32 |.efi\r
1020 UI STRING="$(MODULE_NAME)" Optional\r
1021 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1022 }\r
1023\r
1024[Rule.Common.UEFI_APPLICATION]\r
1025 FILE APPLICATION = $(NAMED_GUID) {\r
1026 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1027 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1028 UI STRING="$(MODULE_NAME)" Optional\r
1029 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1030 }\r
1031\r
1032[Rule.Common.UEFI_APPLICATION.UI]\r
1033 FILE APPLICATION = $(NAMED_GUID) {\r
1034 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1035 UI STRING="Enter Setup"\r
1036 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1037 }\r
1038\r
1039[Rule.Common.USER_DEFINED]\r
1040 FILE FREEFORM = $(NAMED_GUID) {\r
1041 UI STRING="$(MODULE_NAME)" Optional\r
1042 RAW BIN |.bin\r
1043 }\r
1044\r
1045[Rule.Common.USER_DEFINED.ACPITABLE]\r
1046 FILE FREEFORM = $(NAMED_GUID) {\r
1047 RAW ACPI Optional |.acpi\r
1048 RAW ASL Optional |.aml\r
1049 }\r
1050\r
1051[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1052 FILE FREEFORM = $(NAMED_GUID) {\r
1053 RAW ASL Optional |.aml\r
1054 }\r
1055\r
1056[Rule.Common.ACPITABLE]\r
1057 FILE FREEFORM = $(NAMED_GUID) {\r
1058 RAW ACPI Optional |.acpi\r
1059 RAW ASL Optional |.aml\r
1060 }\r
1061\r
c5a59080
JY		 1062[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
1063 FILE PEIM = $(NAMED_GUID) {\r
1064 RAW BIN |.acpi\r
1065 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1066 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1067 UI STRING="$(MODULE_NAME)" Optional\r
1068 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1069 }\r
1070\r
EFI Development Kit II mirror for PVE