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NetworkPkg: Replace BSD License with BSD+Patent License
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
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5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
54024039 4# Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
5e752084 5#\r
6# This program and the accompanying materials are licensed and made available under\r
7# the terms and conditions of the BSD License that accompanies this distribution.\r
8# The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php.\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14#\r
15#**/\r
16\r
17[Defines]\r
18DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
19DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
20DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
21DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
22DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
23DEFINE FLASH_AREA_SIZE = 0x00800000\r
24\r
25DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
26DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
27DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
28\r
988715a3 29DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 30DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
31\r
988715a3 32DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 33DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
34\r
35\r
988715a3 36DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 37DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
38\r
39!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 40DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 41DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 42DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 43\r
988715a3 44DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 45DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 46DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 47\r
48!endif\r
49\r
988715a3 50DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
51DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000\r
5e752084 52\r
988715a3 53DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000\r
54DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000\r
5e752084 55\r
988715a3 56DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
57DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 58\r
59################################################################################\r
60#\r
61# FD Section\r
62# The [FD] Section is made up of the definition statements and a\r
63# description of what goes into the Flash Device Image. Each FD section\r
64# defines one flash "device" image. A flash device image may be one of\r
65# the following: Removable media bootable image (like a boot floppy\r
66# image,) an Option ROM image (that would be "flashed" into an add-in\r
67# card,) a System "Flash" image (that would be burned into a system's\r
68# flash) or an Update ("Capsule") image that will be used to update and\r
69# existing system flash.\r
70#\r
71################################################################################\r
72[FD.Vlv]\r
73BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
74Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
75ErasePolarity = 1\r
76BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
77NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
78\r
79#\r
80#Flash location override based on actual flash map\r
81#\r
82SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
83SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
84\r
c5a59080
JY		 85SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
86SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
87\r
5e752084 88!if $(MINNOW2_FSP_BUILD) == TRUE\r
89# put below PCD value setting into dsc file\r
90#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
91#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
92#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
93#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
94#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
95#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
96#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
97\r
98!endif\r
99################################################################################\r
100#\r
101# Following are lists of FD Region layout which correspond to the locations of different\r
102# images within the flash device.\r
103#\r
104# Regions must be defined in ascending order and may not overlap.\r
105#\r
106# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
107# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
108# "0x" characters. Like:\r
109# Offset|Size\r
110# PcdOffsetCName|PcdSizeCName\r
111# RegionType <FV, DATA, or FILE>\r
112# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
113#\r
114################################################################################\r
115# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,\r
116# so we hardcode the default value of variable here.\r
117# Please note that we MUST update the binary once the default value is changed.\r
118\r
119#\r
120 # CPU Microcodes\r
121 #\r
122\r
123$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
124gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
125FV = MICROCODE_FV\r
5e752084 126$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
127gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
128FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r
129\r
130$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
131gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
132FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin\r
133\r
134$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
135gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
136FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin\r
137\r
138!if $(MINNOW2_FSP_BUILD) == TRUE\r
139\r
140 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
141 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
142 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin\r
143\r
144\r
145 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
146 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
147\r
148!endif\r
149\r
150 #\r
151 # Main Block\r
152 #\r
153$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
154gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
155FV = FVMAIN_COMPACT\r
156\r
157 #\r
158 # FV Recovery#2\r
159 #\r
160$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
161gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
162FV = FVRECOVERY2\r
163\r
164 #\r
165 # FV Recovery\r
166 #\r
167$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
168gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
169FV = FVRECOVERY\r
170\r
171################################################################################\r
172#\r
173# FV Section\r
174#\r
175# [FV] section is used to define what components or modules are placed within a flash\r
176# device file. This section also defines order the components and modules are positioned\r
177# within the image. The [FV] section consists of define statements, set statements and\r
178# module statements.\r
179#\r
180################################################################################\r
181[FV.MICROCODE_FV]\r
182BlockSize = $(FLASH_BLOCK_SIZE)\r
183FvAlignment = 16\r
184ERASE_POLARITY = 1\r
185MEMORY_MAPPED = TRUE\r
186STICKY_WRITE = TRUE\r
187LOCK_CAP = TRUE\r
188LOCK_STATUS = FALSE\r
189WRITE_DISABLED_CAP = TRUE\r
190WRITE_ENABLED_CAP = TRUE\r
191WRITE_STATUS = TRUE\r
192WRITE_LOCK_CAP = TRUE\r
193WRITE_LOCK_STATUS = TRUE\r
194READ_DISABLED_CAP = TRUE\r
195READ_ENABLED_CAP = TRUE\r
196READ_STATUS = TRUE\r
197READ_LOCK_CAP = TRUE\r
198READ_LOCK_STATUS = TRUE\r
199\r
200FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
201 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r
202}\r
203\r
c5a59080
JY		 204!if $(RECOVERY_ENABLE)\r
205[FV.FVRECOVERY_COMPONENTS]\r
206FvAlignment = 16 #FV alignment and FV attributes setting.\r
207ERASE_POLARITY = 1\r
208MEMORY_MAPPED = TRUE\r
209STICKY_WRITE = TRUE\r
210LOCK_CAP = TRUE\r
211LOCK_STATUS = TRUE\r
212WRITE_DISABLED_CAP = TRUE\r
213WRITE_ENABLED_CAP = TRUE\r
214WRITE_STATUS = TRUE\r
215WRITE_LOCK_CAP = TRUE\r
216WRITE_LOCK_STATUS = TRUE\r
217READ_DISABLED_CAP = TRUE\r
218READ_ENABLED_CAP = TRUE\r
219READ_STATUS = TRUE\r
220READ_LOCK_CAP = TRUE\r
221READ_LOCK_STATUS = TRUE\r
222\r
223INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
224INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
225INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
226INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
227INF FatPkg/FatPei/FatPei.inf\r
228INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
229INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
230!endif\r
231\r
5e752084 232################################################################################\r
233#\r
234# FV Section\r
235#\r
236# [FV] section is used to define what components or modules are placed within a flash\r
237# device file. This section also defines order the components and modules are positioned\r
238# within the image. The [FV] section consists of define statements, set statements and\r
239# module statements.\r
240#\r
241################################################################################\r
242[FV.FVRECOVERY2]\r
243BlockSize = $(FLASH_BLOCK_SIZE)\r
244FvAlignment = 16 #FV alignment and FV attributes setting.\r
245ERASE_POLARITY = 1\r
246MEMORY_MAPPED = TRUE\r
247STICKY_WRITE = TRUE\r
248LOCK_CAP = TRUE\r
249LOCK_STATUS = TRUE\r
250WRITE_DISABLED_CAP = TRUE\r
251WRITE_ENABLED_CAP = TRUE\r
252WRITE_STATUS = TRUE\r
253WRITE_LOCK_CAP = TRUE\r
254WRITE_LOCK_STATUS = TRUE\r
255READ_DISABLED_CAP = TRUE\r
256READ_ENABLED_CAP = TRUE\r
257READ_STATUS = TRUE\r
258READ_LOCK_CAP = TRUE\r
259READ_LOCK_STATUS = TRUE\r
260FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
261\r
262\r
263\r
264INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
265\r
266!if $(MINNOW2_FSP_BUILD) == FALSE\r
267INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
268INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
269INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
270INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
271INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
272INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
273INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
274INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
5e752084 275!endif\r
276\r
98a88a76 277# INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
5e752084 278!if $(TPM_ENABLED) == TRUE\r
2e886a2e 279INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
5e752084 280INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
281INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
282!endif\r
283!if $(FTPM_ENABLE) == TRUE\r
2e886a2e 284INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config\r
5e752084 285!endif\r
286INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
287\r
288!if $(ACPI50_ENABLE) == TRUE\r
289 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
290!endif\r
291!if $(PERFORMANCE_ENABLE) == TRUE\r
292INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
293!endif\r
294\r
c5a59080
JY		 295!if $(RECOVERY_ENABLE)\r
296FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
297 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
298 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
299 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
300 }\r
301}\r
302!endif\r
303\r
5e752084 304[FV.FVRECOVERY]\r
305BlockSize = $(FLASH_BLOCK_SIZE)\r
306FvAlignment = 16 #FV alignment and FV attributes setting.\r
307ERASE_POLARITY = 1\r
308MEMORY_MAPPED = TRUE\r
309STICKY_WRITE = TRUE\r
310LOCK_CAP = TRUE\r
311LOCK_STATUS = TRUE\r
312WRITE_DISABLED_CAP = TRUE\r
313WRITE_ENABLED_CAP = TRUE\r
314WRITE_STATUS = TRUE\r
315WRITE_LOCK_CAP = TRUE\r
316WRITE_LOCK_STATUS = TRUE\r
317READ_DISABLED_CAP = TRUE\r
318READ_ENABLED_CAP = TRUE\r
319READ_STATUS = TRUE\r
320READ_LOCK_CAP = TRUE\r
321READ_LOCK_STATUS = TRUE\r
322FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
323\r
324\r
325!if $(MINNOW2_FSP_BUILD) == TRUE\r
326INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
327!else\r
328INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
329!endif\r
330\r
331INF MdeModulePkg/Core/Pei/PeiMain.inf\r
332!if $(MINNOW2_FSP_BUILD) == TRUE\r
333INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
334INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
335!endif\r
336INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
337INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
338INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
339\r
340INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
341\r
342!if $(MINNOW2_FSP_BUILD) == FALSE\r
343INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
344!endif\r
345\r
346!if $(FTPM_ENABLE) == TRUE\r
347INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
348!endif\r
349\r
350!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
351 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
352!endif\r
353\r
354\r
355!if $(CAPSULE_ENABLE) == TRUE\r
356INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
357!if $(DXE_ARCHITECTURE) == "X64"\r
358INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
359!endif\r
360!endif\r
361\r
362!if $(MINNOW2_FSP_BUILD) == FALSE\r
363!if $(PCIESC_ENABLE) == TRUE\r
364INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
365!endif\r
366INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
367!endif\r
368\r
369INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
370\r
371[FV.FVMAIN]\r
372BlockSize = $(FLASH_BLOCK_SIZE)\r
373FvAlignment = 16\r
374ERASE_POLARITY = 1\r
375MEMORY_MAPPED = TRUE\r
376STICKY_WRITE = TRUE\r
377LOCK_CAP = TRUE\r
378LOCK_STATUS = TRUE\r
379WRITE_DISABLED_CAP = TRUE\r
380WRITE_ENABLED_CAP = TRUE\r
381WRITE_STATUS = TRUE\r
382WRITE_LOCK_CAP = TRUE\r
383WRITE_LOCK_STATUS = TRUE\r
384READ_DISABLED_CAP = TRUE\r
385READ_ENABLED_CAP = TRUE\r
386READ_STATUS = TRUE\r
387READ_LOCK_CAP = TRUE\r
388READ_LOCK_STATUS = TRUE\r
389FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
390\r
391APRIORI DXE {\r
392 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
393 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
394 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
395 }\r
396\r
397FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
398 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
399 }\r
400\r
401 #\r
402 # EDK II Related Platform codes\r
403 #\r
404\r
405 !if $(MINNOW2_FSP_BUILD) == TRUE\r
406 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
407 !endif\r
408\r
409INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
410INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
411!if $(ACPI50_ENABLE) == TRUE\r
412INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
413INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
414!endif\r
415\r
416\r
417INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
418INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
419INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
420INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
421INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
422INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
423INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
424INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
425INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
98a88a76 426INF USE=X64 MdeModulePkg/Logo/Logo.inf\r
5e752084 427INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
428INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
429INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
430INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
431\r
432INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
433INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
434INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
435INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
436INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
437!if $(SECURE_BOOT_ENABLE)\r
438INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
439!endif\r
440\r
441INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
442\r
443INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
444INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
445INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
446INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
447\r
448\r
449INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
450\r
451!if $(DATAHUB_ENABLE) == TRUE\r
452INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
453!endif\r
454INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
455INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
456\r
457INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
458\r
459 #\r
460 # EDK II Related Silicon codes\r
461 #\r
462INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
463\r
464!if $(USE_HPET_TIMER) == TRUE\r
465INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
466!else\r
467INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
468!endif\r
469INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
470\r
471INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
472\r
473INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
474INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
475\r
476!if $(MINNOW2_FSP_BUILD) == FALSE\r
477INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
478!endif\r
479INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
480!if $(PCIESC_ENABLE) == TRUE\r
481INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
482!endif\r
483\r
484INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
486INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
487INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
488INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
489!if $(MINNOW2_FSP_BUILD) == FALSE\r
490INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
491!else\r
492INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
493INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
494!endif\r
495!if $(MINNOW2_FSP_BUILD) == FALSE\r
496 !if $(SEC_ENABLE) == TRUE\r
497 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
498 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
499 !endif\r
500!endif\r
501!if $(TPM_ENABLED) == TRUE\r
502INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
503INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
504INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
505!endif\r
506!if $(FTPM_ENABLE) == TRUE\r
507INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
508INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
509INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
2e886a2e 510INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf\r
5e752084 511INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
512!endif\r
513\r
514#\r
515# EDK II Related Platform codes\r
516#\r
517INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
518INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
519INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
520INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
521INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
522INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
523INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
524INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
525INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
526!if $(GOP_DRIVER_ENABLE) == TRUE\r
527 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
528 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
529 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
530 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
531 SECTION UI = "IntelGopDriver"\r
532}\r
533!endif\r
534\r
535INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
536 #\r
537 # SMM\r
538 #\r
539INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
540INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 541INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 542\r
543INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
544INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 545INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 546INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
97e862bb
MK		 547\r
548#\r
549# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell\r
550#\r
551#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
552#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
553\r
5e752084 554 #\r
555 # ACPI\r
556 #\r
557INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
558INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
559INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
560INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
561\r
562INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
563\r
564INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
565\r
98a88a76
KM		 566INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf\r
567\r
5e752084 568 #\r
569 # PCI\r
570 #\r
571INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
572\r
573INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
574\r
575\r
576#\r
577# ISA\r
578#\r
579INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
580INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
581INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
582!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
583INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
584!endif\r
585#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
586#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
587\r
588#\r
589# SDIO\r
590#\r
98a88a76
KM		 591#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
592#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
5e752084 593#\r
594# IDE/SCSI/AHCI\r
595#\r
596INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
597\r
598INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
599\r
600INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
601!if $(SATA_ENABLE) == TRUE\r
602INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
603#\r
604\r
605#\r
606INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
607INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
608!if $(SCSI_ENABLE) == TRUE\r
609INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
610INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
611!endif\r
612#\r
613!endif\r
614# Console\r
615#\r
616INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
617INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
618INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
619INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
620INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
621INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
622INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
623INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
624 #\r
625 # USB\r
626 #\r
627!if $(USB_ENABLE) == TRUE\r
628INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
629INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
630INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
631INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
632INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
633INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
634INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
635!endif\r
636\r
5e752084 637 #\r
638 # SMBIOS\r
639 #\r
640INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
641INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
642\r
643INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
644\r
645 #\r
646 # Legacy Modules\r
647 #\r
648INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
649\r
650#\r
651# FAT file system\r
652#\r
653INF FatPkg/EnhancedFatDxe/Fat.inf\r
654\r
655#\r
656# UEFI Shell\r
657#\r
2840bb51 658INF ShellPkg/Application/Shell/Shell.inf\r
5e752084 659\r
7a0e4f8e
RN		 660#\r
661# dp command\r
662#\r
663!if $(PERFORMANCE_ENABLE) == TRUE\r
664INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
665!endif\r
5e752084 666\r
667!if $(GOP_DRIVER_ENABLE) == TRUE\r
668FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
669 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
670 SECTION UI = "IntelGopVbt"\r
671}\r
672!endif\r
673\r
674#\r
675# Network Modules\r
676#\r
677!if $(NETWORK_ENABLE) == TRUE\r
678 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
679 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
680 SECTION UI = "UNDI"\r
681 }\r
682 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
683 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
684 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
685 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
686 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
687 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
688 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
689 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
5f137127
FS		 690 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
691 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
5e752084 692 !if $(NETWORK_IP6_ENABLE) == TRUE\r
693 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
694 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
695 INF NetworkPkg/IpSecDxe/IpSecDxe.inf\r
696 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
697 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
698 !endif\r
5e752084 699 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
700 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
701 !endif\r
702 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
5e752084 703 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
5e752084 704 !endif\r
705!endif\r
706\r
c5a59080 707!if $(CAPSULE_ENABLE)\r
1aa9314e
MK		 708INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
709\r
710#\r
711# Minnow Max System Firmware FMP\r
712#\r
713INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
714\r
715#\r
716# Sample Device FMP\r
717#\r
718INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
719INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
720INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
721\r
c5a59080 722!endif\r
1aa9314e 723\r
c5a59080 724!if $(MICOCODE_CAPSULE_ENABLE)\r
1aa9314e 725INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
c5a59080
JY		 726!endif\r
727\r
728!if $(RECOVERY_ENABLE)\r
729FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
730 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
731 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
732 }\r
733!endif\r
c5a59080 734\r
5e752084 735[FV.FVMAIN_COMPACT]\r
736BlockSize = $(FLASH_BLOCK_SIZE)\r
737FvAlignment = 16\r
738ERASE_POLARITY = 1\r
739MEMORY_MAPPED = TRUE\r
740STICKY_WRITE = TRUE\r
741LOCK_CAP = TRUE\r
742LOCK_STATUS = TRUE\r
743WRITE_DISABLED_CAP = TRUE\r
744WRITE_ENABLED_CAP = TRUE\r
745WRITE_STATUS = TRUE\r
746WRITE_LOCK_CAP = TRUE\r
747WRITE_LOCK_STATUS = TRUE\r
748READ_DISABLED_CAP = TRUE\r
749READ_ENABLED_CAP = TRUE\r
750READ_STATUS = TRUE\r
751READ_LOCK_CAP = TRUE\r
752READ_LOCK_STATUS = TRUE\r
753\r
754\r
755\r
756FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
757!if $(LZMA_ENABLE) == TRUE\r
758# LZMA Compress\r
759 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
760 SECTION FV_IMAGE = FVMAIN\r
761 }\r
762!else\r
763!if $(DXE_COMPRESS_ENABLE) == TRUE\r
764# Tiano Compress\r
765 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
766 SECTION FV_IMAGE = FVMAIN\r
767 }\r
768!else\r
769# No Compress\r
770 SECTION COMPRESS PI_NONE {\r
771 SECTION FV_IMAGE = FVMAIN\r
772 }\r
773!endif\r
774!endif\r
775 }\r
776\r
777[FV.SETUP_DATA]\r
778BlockSize = $(FLASH_BLOCK_SIZE)\r
779#NumBlocks = 0x10\r
780FvAlignment = 16\r
781ERASE_POLARITY = 1\r
782MEMORY_MAPPED = TRUE\r
783STICKY_WRITE = TRUE\r
784LOCK_CAP = TRUE\r
785LOCK_STATUS = TRUE\r
786WRITE_DISABLED_CAP = TRUE\r
787WRITE_ENABLED_CAP = TRUE\r
788WRITE_STATUS = TRUE\r
789WRITE_LOCK_CAP = TRUE\r
790WRITE_LOCK_STATUS = TRUE\r
791READ_DISABLED_CAP = TRUE\r
792READ_ENABLED_CAP = TRUE\r
793READ_STATUS = TRUE\r
794READ_LOCK_CAP = TRUE\r
795READ_LOCK_STATUS = TRUE\r
796\r
5e752084 797################################################################################\r
798#\r
799# Rules are use with the [FV] section's module INF type to define\r
800# how an FFS file is created for a given INF file. The following Rule are the default\r
801# rules for the different module type. User can add the customized rules to define the\r
802# content of the FFS file.\r
803#\r
804################################################################################\r
805[Rule.Common.SEC]\r
806 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
807 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
808 RAW BIN Align = 16 |.com\r
809 }\r
810\r
811[Rule.Common.SEC.BINARY]\r
812 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
813 PE32 PE32 Align = 8 |.efi\r
584fcb7d
WD		 814!if $(MINNOW2_FSP_BUILD) == TRUE\r
815 RAW RAW |.raw\r
816!else\r
817 RAW BIN Align = 16 |.com\r
818!endif\r
5e752084 819 }\r
820\r
821[Rule.Common.PEI_CORE]\r
822 FILE PEI_CORE = $(NAMED_GUID) {\r
823 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
824 UI STRING="$(MODULE_NAME)" Optional\r
825 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
826 }\r
827\r
828[Rule.Common.PEIM]\r
829 FILE PEIM = $(NAMED_GUID) {\r
830 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
831 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
832 UI STRING="$(MODULE_NAME)" Optional\r
833 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
834 }\r
835\r
836[Rule.Common.PEIM.BINARY]\r
837 FILE PEIM = $(NAMED_GUID) {\r
838 PEI_DEPEX PEI_DEPEX Optional |.depex\r
839 PE32 PE32 Align = Auto |.efi\r
840 UI STRING="$(MODULE_NAME)" Optional\r
841 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
842 }\r
843\r
844[Rule.Common.PEIM.BIOSID]\r
845 FILE PEIM = $(NAMED_GUID) {\r
846 RAW BIN BiosId.bin\r
847 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
848 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
849 UI STRING="$(MODULE_NAME)" Optional\r
850 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
851 }\r
852\r
853[Rule.Common.USER_DEFINED.APINIT]\r
854 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
855 RAW SEC_BIN |.com\r
856 }\r
857#cjia 2011-07-21\r
858[Rule.Common.USER_DEFINED.LEGACY16]\r
859 FILE FREEFORM = $(NAMED_GUID) {\r
860 UI STRING="$(MODULE_NAME)" Optional\r
861 RAW BIN |.bin\r
862 }\r
863#cjia\r
864\r
865[Rule.Common.USER_DEFINED.ASM16]\r
866 FILE FREEFORM = $(NAMED_GUID) {\r
867 UI STRING="$(MODULE_NAME)" Optional\r
868 RAW BIN |.com\r
869 }\r
870\r
871[Rule.Common.DXE_CORE]\r
872 FILE DXE_CORE = $(NAMED_GUID) {\r
873 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
874 UI STRING="$(MODULE_NAME)" Optional\r
875 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
876 }\r
877\r
878[Rule.Common.UEFI_DRIVER]\r
879 FILE DRIVER = $(NAMED_GUID) {\r
880 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
881 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
882 UI STRING="$(MODULE_NAME)" Optional\r
883 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
884 }\r
885\r
886[Rule.Common.UEFI_DRIVER.BINARY]\r
887 FILE DRIVER = $(NAMED_GUID) {\r
888 DXE_DEPEX DXE_DEPEX Optional |.depex\r
889 PE32 PE32 |.efi\r
890 UI STRING="$(MODULE_NAME)" Optional\r
891 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
892 }\r
893\r
894[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
895 FILE DRIVER = $(NAMED_GUID) {\r
896 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
897 PE32 PE32 |.efi\r
898 UI STRING="$(MODULE_NAME)" Optional\r
899 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
900 }\r
901\r
902[Rule.Common.DXE_DRIVER]\r
903 FILE DRIVER = $(NAMED_GUID) {\r
904 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
905 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
906 UI STRING="$(MODULE_NAME)" Optional\r
907 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
908 }\r
909\r
910[Rule.Common.DXE_DRIVER.BINARY]\r
911 FILE DRIVER = $(NAMED_GUID) {\r
912 DXE_DEPEX DXE_DEPEX Optional |.depex\r
913 PE32 PE32 |.efi\r
914 UI STRING="$(MODULE_NAME)" Optional\r
915 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
916 }\r
917\r
918[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
919 FILE DRIVER = $(NAMED_GUID) {\r
920 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
921 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
922 UI STRING="$(MODULE_NAME)" Optional\r
923 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
924 RAW ACPI Optional |.acpi\r
925 RAW ASL Optional |.aml\r
926 }\r
927\r
928[Rule.Common.DXE_RUNTIME_DRIVER]\r
929 FILE DRIVER = $(NAMED_GUID) {\r
930 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
931 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
932 UI STRING="$(MODULE_NAME)" Optional\r
933 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
934 }\r
935\r
936[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
937 FILE DRIVER = $(NAMED_GUID) {\r
938 DXE_DEPEX DXE_DEPEX Optional |.depex\r
939 PE32 PE32 |.efi\r
940 UI STRING="$(MODULE_NAME)" Optional\r
941 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
942 }\r
943\r
944[Rule.Common.DXE_SMM_DRIVER]\r
945 FILE SMM = $(NAMED_GUID) {\r
946 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
947 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
948 UI STRING="$(MODULE_NAME)" Optional\r
949 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
950 }\r
951\r
952[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
953 FILE SMM = $(NAMED_GUID) {\r
954 SMM_DEPEX SMM_DEPEX |.depex\r
955 PE32 PE32 |.efi\r
956 RAW BIN Optional |.aml\r
957 UI STRING="$(MODULE_NAME)" Optional\r
958 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
959 }\r
960\r
961[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
962 FILE SMM = $(NAMED_GUID) {\r
963 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
964 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
965 UI STRING="$(MODULE_NAME)" Optional\r
966 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
967 RAW ACPI Optional |.acpi\r
968 RAW ASL Optional |.aml\r
969 }\r
970\r
971[Rule.Common.SMM_CORE]\r
972 FILE SMM_CORE = $(NAMED_GUID) {\r
973 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
974 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
975 UI STRING="$(MODULE_NAME)" Optional\r
976 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
977 }\r
978\r
979[Rule.Common.SMM_CORE.BINARY]\r
980 FILE SMM_CORE = $(NAMED_GUID) {\r
981 DXE_DEPEX DXE_DEPEX Optional |.depex\r
982 PE32 PE32 |.efi\r
983 UI STRING="$(MODULE_NAME)" Optional\r
984 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
985 }\r
986\r
987[Rule.Common.UEFI_APPLICATION]\r
988 FILE APPLICATION = $(NAMED_GUID) {\r
989 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
990 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
991 UI STRING="$(MODULE_NAME)" Optional\r
992 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
993 }\r
994\r
995[Rule.Common.UEFI_APPLICATION.UI]\r
996 FILE APPLICATION = $(NAMED_GUID) {\r
997 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
998 UI STRING="Enter Setup"\r
999 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1000 }\r
1001\r
1002[Rule.Common.USER_DEFINED]\r
1003 FILE FREEFORM = $(NAMED_GUID) {\r
1004 UI STRING="$(MODULE_NAME)" Optional\r
1005 RAW BIN |.bin\r
1006 }\r
1007\r
98a88a76
KM		 1008[Rule.Common.USER_DEFINED.BINARY]\r
1009 FILE FREEFORM = $(NAMED_GUID) {\r
1010 UI STRING="$(MODULE_NAME)" Optional\r
1011 RAW BIN |.bin\r
1012 }\r
1013\r
5e752084 1014[Rule.Common.USER_DEFINED.ACPITABLE]\r
1015 FILE FREEFORM = $(NAMED_GUID) {\r
1016 RAW ACPI Optional |.acpi\r
1017 RAW ASL Optional |.aml\r
1018 }\r
1019\r
1020[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1021 FILE FREEFORM = $(NAMED_GUID) {\r
1022 RAW ASL Optional |.aml\r
1023 }\r
1024\r
1025[Rule.Common.ACPITABLE]\r
1026 FILE FREEFORM = $(NAMED_GUID) {\r
1027 RAW ACPI Optional |.acpi\r
1028 RAW ASL Optional |.aml\r
1029 }\r
1030\r
c5a59080
JY		 1031[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
1032 FILE PEIM = $(NAMED_GUID) {\r
1033 RAW BIN |.acpi\r
1034 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1035 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1036 UI STRING="$(MODULE_NAME)" Optional\r
1037 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1038 }\r
EFI Development Kit II mirror for PVE