]> git.proxmox.com Git - mirror_edk2.git/blame - Vlv2TbltDevicePkg/PlatformPkgGcc.fdf
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Vlv2TbltDevicePkg: Build full UEFI Shell from sources
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
CommitLineData
5e752084 1#/** @file\r
2# FDF file of Platform.\r
3#\r
d0274122 4# Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
5e752084 5#\r
9dc8036d 6# SPDX-License-Identifier: BSD-2-Clause-Patent\r
5e752084 7#\r
8#\r
9#**/\r
10\r
11[Defines]\r
12DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.\r
13DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.\r
14DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.\r
15DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.\r
16DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000\r
17DEFINE FLASH_AREA_SIZE = 0x00800000\r
18\r
19DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000\r
20DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000\r
21DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000\r
22\r
988715a3 23DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000\r
5e752084 24DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000\r
25\r
988715a3 26DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000\r
5e752084 27DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000\r
28\r
29\r
988715a3 30DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000\r
5e752084 31DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000\r
32\r
33!if $(MINNOW2_FSP_BUILD) == TRUE\r
988715a3 34DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000\r
5e752084 35DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000\r
988715a3 36DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000\r
5e752084 37\r
988715a3 38DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000\r
5e752084 39DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000\r
988715a3 40DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000\r
5e752084 41\r
42!endif\r
43\r
988715a3 44DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000\r
45DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000\r
5e752084 46\r
988715a3 47DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000\r
48DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000\r
5e752084 49\r
988715a3 50DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000\r
51DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000\r
5e752084 52\r
53################################################################################\r
54#\r
55# FD Section\r
56# The [FD] Section is made up of the definition statements and a\r
57# description of what goes into the Flash Device Image. Each FD section\r
58# defines one flash "device" image. A flash device image may be one of\r
59# the following: Removable media bootable image (like a boot floppy\r
60# image,) an Option ROM image (that would be "flashed" into an add-in\r
61# card,) a System "Flash" image (that would be burned into a system's\r
62# flash) or an Update ("Capsule") image that will be used to update and\r
63# existing system flash.\r
64#\r
65################################################################################\r
66[FD.Vlv]\r
67BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.\r
68Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.\r
69ErasePolarity = 1\r
70BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.\r
71NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.\r
72\r
73#\r
74#Flash location override based on actual flash map\r
75#\r
76SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)\r
77SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)\r
78\r
c5a59080
JY		 79SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60\r
80SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60\r
81\r
5e752084 82!if $(MINNOW2_FSP_BUILD) == TRUE\r
83# put below PCD value setting into dsc file\r
84#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)\r
85#SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)\r
86#SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60\r
87#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)\r
88#SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)\r
89#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)\r
90#SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)\r
91\r
92!endif\r
93################################################################################\r
94#\r
95# Following are lists of FD Region layout which correspond to the locations of different\r
96# images within the flash device.\r
97#\r
98# Regions must be defined in ascending order and may not overlap.\r
99#\r
100# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
101# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
102# "0x" characters. Like:\r
103# Offset|Size\r
104# PcdOffsetCName|PcdSizeCName\r
105# RegionType <FV, DATA, or FILE>\r
106# Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000\r
107#\r
108################################################################################\r
109# Since the Fce tool don't have gcc version, we can't handle default variable in Linux,\r
110# so we hardcode the default value of variable here.\r
111# Please note that we MUST update the binary once the default value is changed.\r
112\r
113#\r
114 # CPU Microcodes\r
115 #\r
116\r
117$(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)\r
118gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize\r
119FV = MICROCODE_FV\r
5e752084 120$(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)\r
121gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
122FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin\r
123\r
124$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)\r
125gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
126FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin\r
127\r
128$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)\r
129gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
130FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin\r
131\r
132!if $(MINNOW2_FSP_BUILD) == TRUE\r
133\r
134 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)\r
135 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize\r
07accfe3 136 FILE = Vlv2SocBinPkg/FspBinary/FvFsp.bin\r
5e752084 137\r
138\r
139 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)\r
140 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin\r
141\r
142!endif\r
143\r
144 #\r
145 # Main Block\r
146 #\r
147$(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)\r
148gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize\r
149FV = FVMAIN_COMPACT\r
150\r
151 #\r
152 # FV Recovery#2\r
153 #\r
154$(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)\r
155gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size\r
156FV = FVRECOVERY2\r
157\r
158 #\r
159 # FV Recovery\r
160 #\r
161$(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)\r
162gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize\r
163FV = FVRECOVERY\r
164\r
165################################################################################\r
166#\r
167# FV Section\r
168#\r
169# [FV] section is used to define what components or modules are placed within a flash\r
170# device file. This section also defines order the components and modules are positioned\r
171# within the image. The [FV] section consists of define statements, set statements and\r
172# module statements.\r
173#\r
174################################################################################\r
175[FV.MICROCODE_FV]\r
176BlockSize = $(FLASH_BLOCK_SIZE)\r
177FvAlignment = 16\r
178ERASE_POLARITY = 1\r
179MEMORY_MAPPED = TRUE\r
180STICKY_WRITE = TRUE\r
181LOCK_CAP = TRUE\r
182LOCK_STATUS = FALSE\r
183WRITE_DISABLED_CAP = TRUE\r
184WRITE_ENABLED_CAP = TRUE\r
185WRITE_STATUS = TRUE\r
186WRITE_LOCK_CAP = TRUE\r
187WRITE_LOCK_STATUS = TRUE\r
188READ_DISABLED_CAP = TRUE\r
189READ_ENABLED_CAP = TRUE\r
190READ_STATUS = TRUE\r
191READ_LOCK_CAP = TRUE\r
192READ_LOCK_STATUS = TRUE\r
193\r
194FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {\r
195 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin\r
196}\r
197\r
c5a59080
JY		 198!if $(RECOVERY_ENABLE)\r
199[FV.FVRECOVERY_COMPONENTS]\r
200FvAlignment = 16 #FV alignment and FV attributes setting.\r
201ERASE_POLARITY = 1\r
202MEMORY_MAPPED = TRUE\r
203STICKY_WRITE = TRUE\r
204LOCK_CAP = TRUE\r
205LOCK_STATUS = TRUE\r
206WRITE_DISABLED_CAP = TRUE\r
207WRITE_ENABLED_CAP = TRUE\r
208WRITE_STATUS = TRUE\r
209WRITE_LOCK_CAP = TRUE\r
210WRITE_LOCK_STATUS = TRUE\r
211READ_DISABLED_CAP = TRUE\r
212READ_ENABLED_CAP = TRUE\r
213READ_STATUS = TRUE\r
214READ_LOCK_CAP = TRUE\r
215READ_LOCK_STATUS = TRUE\r
216\r
217INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf\r
218INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
219INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
220INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
221INF FatPkg/FatPei/FatPei.inf\r
222INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
223INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf\r
224!endif\r
225\r
5e752084 226################################################################################\r
227#\r
228# FV Section\r
229#\r
230# [FV] section is used to define what components or modules are placed within a flash\r
231# device file. This section also defines order the components and modules are positioned\r
232# within the image. The [FV] section consists of define statements, set statements and\r
233# module statements.\r
234#\r
235################################################################################\r
236[FV.FVRECOVERY2]\r
237BlockSize = $(FLASH_BLOCK_SIZE)\r
238FvAlignment = 16 #FV alignment and FV attributes setting.\r
239ERASE_POLARITY = 1\r
240MEMORY_MAPPED = TRUE\r
241STICKY_WRITE = TRUE\r
242LOCK_CAP = TRUE\r
243LOCK_STATUS = TRUE\r
244WRITE_DISABLED_CAP = TRUE\r
245WRITE_ENABLED_CAP = TRUE\r
246WRITE_STATUS = TRUE\r
247WRITE_LOCK_CAP = TRUE\r
248WRITE_LOCK_STATUS = TRUE\r
249READ_DISABLED_CAP = TRUE\r
250READ_ENABLED_CAP = TRUE\r
251READ_STATUS = TRUE\r
252READ_LOCK_CAP = TRUE\r
253READ_LOCK_STATUS = TRUE\r
254FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092\r
255\r
256\r
257\r
258INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf\r
259\r
260!if $(MINNOW2_FSP_BUILD) == FALSE\r
261INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf\r
262INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf\r
263INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf\r
264INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf\r
265INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf\r
266INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf\r
267INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
268INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf\r
5e752084 269!endif\r
270\r
98a88a76 271# INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf\r
5e752084 272!if $(TPM_ENABLED) == TRUE\r
2e886a2e 273INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf\r
5e752084 274INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
275INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf\r
276!endif\r
277!if $(FTPM_ENABLE) == TRUE\r
2e886a2e 278INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config\r
5e752084 279!endif\r
280INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
281\r
282!if $(ACPI50_ENABLE) == TRUE\r
283 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf\r
284!endif\r
285!if $(PERFORMANCE_ENABLE) == TRUE\r
286INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
287!endif\r
288\r
c5a59080
JY		 289!if $(RECOVERY_ENABLE)\r
290FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
291 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
292 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID\r
293 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
294 }\r
295}\r
296!endif\r
297\r
5e752084 298[FV.FVRECOVERY]\r
299BlockSize = $(FLASH_BLOCK_SIZE)\r
300FvAlignment = 16 #FV alignment and FV attributes setting.\r
301ERASE_POLARITY = 1\r
302MEMORY_MAPPED = TRUE\r
303STICKY_WRITE = TRUE\r
304LOCK_CAP = TRUE\r
305LOCK_STATUS = TRUE\r
306WRITE_DISABLED_CAP = TRUE\r
307WRITE_ENABLED_CAP = TRUE\r
308WRITE_STATUS = TRUE\r
309WRITE_LOCK_CAP = TRUE\r
310WRITE_LOCK_STATUS = TRUE\r
311READ_DISABLED_CAP = TRUE\r
312READ_ENABLED_CAP = TRUE\r
313READ_STATUS = TRUE\r
314READ_LOCK_CAP = TRUE\r
315READ_LOCK_STATUS = TRUE\r
316FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091\r
317\r
318\r
319!if $(MINNOW2_FSP_BUILD) == TRUE\r
320INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf\r
321!else\r
322INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf\r
323!endif\r
324\r
325INF MdeModulePkg/Core/Pei/PeiMain.inf\r
326!if $(MINNOW2_FSP_BUILD) == TRUE\r
327INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf\r
328INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf\r
329!endif\r
330INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf\r
331INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
332INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
333\r
334INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf\r
335\r
336!if $(MINNOW2_FSP_BUILD) == FALSE\r
337INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf\r
338!endif\r
339\r
340!if $(FTPM_ENABLE) == TRUE\r
341INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf\r
342!endif\r
343\r
344!if $(SOURCE_DEBUG_ENABLE) == TRUE\r
345 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf\r
346!endif\r
347\r
348\r
349!if $(CAPSULE_ENABLE) == TRUE\r
350INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
351!if $(DXE_ARCHITECTURE) == "X64"\r
352INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf\r
353!endif\r
354!endif\r
355\r
356!if $(MINNOW2_FSP_BUILD) == FALSE\r
357!if $(PCIESC_ENABLE) == TRUE\r
358INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf\r
359!endif\r
360INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf\r
361!endif\r
362\r
363INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
364\r
365[FV.FVMAIN]\r
366BlockSize = $(FLASH_BLOCK_SIZE)\r
367FvAlignment = 16\r
368ERASE_POLARITY = 1\r
369MEMORY_MAPPED = TRUE\r
370STICKY_WRITE = TRUE\r
371LOCK_CAP = TRUE\r
372LOCK_STATUS = TRUE\r
373WRITE_DISABLED_CAP = TRUE\r
374WRITE_ENABLED_CAP = TRUE\r
375WRITE_STATUS = TRUE\r
376WRITE_LOCK_CAP = TRUE\r
377WRITE_LOCK_STATUS = TRUE\r
378READ_DISABLED_CAP = TRUE\r
379READ_ENABLED_CAP = TRUE\r
380READ_STATUS = TRUE\r
381READ_LOCK_CAP = TRUE\r
382READ_LOCK_STATUS = TRUE\r
383FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5\r
384\r
385APRIORI DXE {\r
386 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
387 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
388 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
389 }\r
390\r
391FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {\r
392 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin\r
393 }\r
394\r
395 #\r
396 # EDK II Related Platform codes\r
397 #\r
398\r
399 !if $(MINNOW2_FSP_BUILD) == TRUE\r
400 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf\r
401 !endif\r
402\r
403INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
404INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
405!if $(ACPI50_ENABLE) == TRUE\r
406INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf\r
407INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf\r
408!endif\r
409\r
410\r
411INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf\r
412INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
413INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
414INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
415INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
416INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
417INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf\r
418INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf\r
419INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
07accfe3
ZS		 420!if $(ARCH) == IA32\r
421INF USE=IA32 MdeModulePkg/Logo/Logo.inf\r
422!else\r
98a88a76 423INF USE=X64 MdeModulePkg/Logo/Logo.inf\r
07accfe3 424!endif\r
5e752084 425INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
426INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
427INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
428INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
429\r
430INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
431INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
432INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf\r
433INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
434INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf\r
435!if $(SECURE_BOOT_ENABLE)\r
436INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
437!endif\r
438\r
439INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
440\r
441INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
442INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
443INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
444INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf\r
445\r
446\r
447INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf\r
448\r
449!if $(DATAHUB_ENABLE) == TRUE\r
450INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf\r
451!endif\r
452INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf\r
453INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
454\r
455INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf\r
456\r
457 #\r
458 # EDK II Related Silicon codes\r
459 #\r
460INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf\r
461\r
462!if $(USE_HPET_TIMER) == TRUE\r
463INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
464!else\r
465INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf\r
466!endif\r
467INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf\r
468\r
469INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf\r
470\r
471INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf\r
472INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf\r
473\r
474!if $(MINNOW2_FSP_BUILD) == FALSE\r
475INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf\r
476!endif\r
477INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf\r
478!if $(PCIESC_ENABLE) == TRUE\r
479INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf\r
480!endif\r
481\r
482INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf\r
483INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf\r
484INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf\r
485INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf\r
486INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf\r
487!if $(MINNOW2_FSP_BUILD) == FALSE\r
488INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf\r
489!else\r
490INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf\r
491INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf\r
492!endif\r
493!if $(MINNOW2_FSP_BUILD) == FALSE\r
494 !if $(SEC_ENABLE) == TRUE\r
495 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf\r
496 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf\r
497 !endif\r
498!endif\r
499!if $(TPM_ENABLED) == TRUE\r
500INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf\r
501INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
502INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
503!endif\r
504!if $(FTPM_ENABLE) == TRUE\r
505INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf\r
506INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf\r
507INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
2e886a2e 508INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf\r
5e752084 509INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf\r
510!endif\r
511\r
512#\r
513# EDK II Related Platform codes\r
514#\r
515INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf\r
516INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf\r
517INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf\r
518INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf\r
519INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf\r
520INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf\r
521INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf\r
522INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf\r
523INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf\r
524!if $(GOP_DRIVER_ENABLE) == TRUE\r
525 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf\r
526 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {\r
527 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}\r
07accfe3 528 SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi\r
5e752084 529 SECTION UI = "IntelGopDriver"\r
530}\r
531!endif\r
532\r
533INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf\r
534 #\r
535 # SMM\r
536 #\r
537INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
538INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
f2ae1ef7 539INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
5e752084 540\r
541INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
542INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
f2ae1ef7 543INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
5e752084 544INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf\r
97e862bb
MK		 545\r
546#\r
547# Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell\r
548#\r
549#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf\r
550#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf\r
551\r
5e752084 552 #\r
553 # ACPI\r
554 #\r
555INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
556INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf\r
557INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf\r
558INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf\r
559\r
560INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf\r
561\r
562INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf\r
563\r
98a88a76
KM		 564INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf\r
565\r
5e752084 566 #\r
567 # PCI\r
568 #\r
569INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
570\r
571INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf\r
572\r
573\r
574#\r
575# ISA\r
576#\r
577INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf\r
578INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
579INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf\r
580!if $(SOURCE_DEBUG_ENABLE) != TRUE\r
581INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
582!endif\r
583#INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf\r
584#INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
585\r
586#\r
587# SDIO\r
588#\r
98a88a76
KM		 589#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf\r
590#INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf\r
5e752084 591#\r
592# IDE/SCSI/AHCI\r
593#\r
594INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
595\r
596INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
597\r
598INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
599!if $(SATA_ENABLE) == TRUE\r
600INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf\r
601#\r
602\r
603#\r
604INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf\r
605INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf\r
606!if $(SCSI_ENABLE) == TRUE\r
607INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
608INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
609!endif\r
610#\r
611!endif\r
612# Console\r
613#\r
614INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
615INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
616INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
617INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf\r
618INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
619INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
620INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
621INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
622 #\r
623 # USB\r
624 #\r
625!if $(USB_ENABLE) == TRUE\r
626INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
627INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf\r
628INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
629INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
630INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
631INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
632INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf\r
633!endif\r
634\r
5e752084 635 #\r
636 # SMBIOS\r
637 #\r
638INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
639INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf\r
640\r
641INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf\r
642\r
5e752084 643\r
644#\r
645# FAT file system\r
646#\r
647INF FatPkg/EnhancedFatDxe/Fat.inf\r
648\r
649#\r
650# UEFI Shell\r
651#\r
2840bb51 652INF ShellPkg/Application/Shell/Shell.inf\r
5e752084 653\r
7a0e4f8e
RN		 654#\r
655# dp command\r
656#\r
657!if $(PERFORMANCE_ENABLE) == TRUE\r
658INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf\r
659!endif\r
5e752084 660\r
661!if $(GOP_DRIVER_ENABLE) == TRUE\r
662FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {\r
07accfe3 663 SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin\r
5e752084 664 SECTION UI = "IntelGopVbt"\r
665}\r
666!endif\r
667\r
668#\r
669# Network Modules\r
670#\r
671!if $(NETWORK_ENABLE) == TRUE\r
672 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {\r
07accfe3 673 SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi\r
5e752084 674 SECTION UI = "UNDI"\r
675 }\r
676 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
677 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
678 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
679 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
680 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
681 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
682 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
683 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
5f137127
FS		 684 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
685 INF NetworkPkg/TcpDxe/TcpDxe.inf\r
5e752084 686 !if $(NETWORK_IP6_ENABLE) == TRUE\r
687 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf\r
688 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf\r
5e752084 689 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf\r
690 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf\r
691 !endif\r
5e752084 692 !if $(NETWORK_VLAN_ENABLE) == TRUE\r
693 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
694 !endif\r
695 !if $(NETWORK_ISCSI_ENABLE) == TRUE\r
5e752084 696 INF NetworkPkg/IScsiDxe/IScsiDxe.inf\r
5e752084 697 !endif\r
698!endif\r
699\r
c5a59080 700!if $(CAPSULE_ENABLE)\r
1aa9314e
MK		 701INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf\r
702\r
703#\r
704# Minnow Max System Firmware FMP\r
705#\r
706INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
707\r
708#\r
709# Sample Device FMP\r
710#\r
711INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
712INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
713INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf\r
714\r
c5a59080 715!endif\r
1aa9314e 716\r
c5a59080 717!if $(MICOCODE_CAPSULE_ENABLE)\r
1aa9314e 718INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf\r
c5a59080
JY		 719!endif\r
720\r
721!if $(RECOVERY_ENABLE)\r
722FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {\r
723 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin\r
724 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"\r
725 }\r
726!endif\r
c5a59080 727\r
5e752084 728[FV.FVMAIN_COMPACT]\r
729BlockSize = $(FLASH_BLOCK_SIZE)\r
730FvAlignment = 16\r
731ERASE_POLARITY = 1\r
732MEMORY_MAPPED = TRUE\r
733STICKY_WRITE = TRUE\r
734LOCK_CAP = TRUE\r
735LOCK_STATUS = TRUE\r
736WRITE_DISABLED_CAP = TRUE\r
737WRITE_ENABLED_CAP = TRUE\r
738WRITE_STATUS = TRUE\r
739WRITE_LOCK_CAP = TRUE\r
740WRITE_LOCK_STATUS = TRUE\r
741READ_DISABLED_CAP = TRUE\r
742READ_ENABLED_CAP = TRUE\r
743READ_STATUS = TRUE\r
744READ_LOCK_CAP = TRUE\r
745READ_LOCK_STATUS = TRUE\r
746\r
747\r
748\r
749FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
750!if $(LZMA_ENABLE) == TRUE\r
751# LZMA Compress\r
752 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
753 SECTION FV_IMAGE = FVMAIN\r
754 }\r
755!else\r
756!if $(DXE_COMPRESS_ENABLE) == TRUE\r
757# Tiano Compress\r
758 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
759 SECTION FV_IMAGE = FVMAIN\r
760 }\r
761!else\r
762# No Compress\r
763 SECTION COMPRESS PI_NONE {\r
764 SECTION FV_IMAGE = FVMAIN\r
765 }\r
766!endif\r
767!endif\r
768 }\r
769\r
770[FV.SETUP_DATA]\r
771BlockSize = $(FLASH_BLOCK_SIZE)\r
772#NumBlocks = 0x10\r
773FvAlignment = 16\r
774ERASE_POLARITY = 1\r
775MEMORY_MAPPED = TRUE\r
776STICKY_WRITE = TRUE\r
777LOCK_CAP = TRUE\r
778LOCK_STATUS = TRUE\r
779WRITE_DISABLED_CAP = TRUE\r
780WRITE_ENABLED_CAP = TRUE\r
781WRITE_STATUS = TRUE\r
782WRITE_LOCK_CAP = TRUE\r
783WRITE_LOCK_STATUS = TRUE\r
784READ_DISABLED_CAP = TRUE\r
785READ_ENABLED_CAP = TRUE\r
786READ_STATUS = TRUE\r
787READ_LOCK_CAP = TRUE\r
788READ_LOCK_STATUS = TRUE\r
789\r
5e752084 790################################################################################\r
791#\r
792# Rules are use with the [FV] section's module INF type to define\r
793# how an FFS file is created for a given INF file. The following Rule are the default\r
794# rules for the different module type. User can add the customized rules to define the\r
795# content of the FFS file.\r
796#\r
797################################################################################\r
798[Rule.Common.SEC]\r
799 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
800 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
801 RAW BIN Align = 16 |.com\r
802 }\r
803\r
804[Rule.Common.SEC.BINARY]\r
805 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
806 PE32 PE32 Align = 8 |.efi\r
584fcb7d
WD		 807!if $(MINNOW2_FSP_BUILD) == TRUE\r
808 RAW RAW |.raw\r
809!else\r
810 RAW BIN Align = 16 |.com\r
811!endif\r
5e752084 812 }\r
813\r
814[Rule.Common.PEI_CORE]\r
815 FILE PEI_CORE = $(NAMED_GUID) {\r
816 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
817 UI STRING="$(MODULE_NAME)" Optional\r
818 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
819 }\r
820\r
821[Rule.Common.PEIM]\r
822 FILE PEIM = $(NAMED_GUID) {\r
823 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
824 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
825 UI STRING="$(MODULE_NAME)" Optional\r
826 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
827 }\r
828\r
829[Rule.Common.PEIM.BINARY]\r
830 FILE PEIM = $(NAMED_GUID) {\r
831 PEI_DEPEX PEI_DEPEX Optional |.depex\r
832 PE32 PE32 Align = Auto |.efi\r
833 UI STRING="$(MODULE_NAME)" Optional\r
834 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
835 }\r
836\r
837[Rule.Common.PEIM.BIOSID]\r
838 FILE PEIM = $(NAMED_GUID) {\r
839 RAW BIN BiosId.bin\r
840 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
841 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi\r
842 UI STRING="$(MODULE_NAME)" Optional\r
843 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
844 }\r
845\r
846[Rule.Common.USER_DEFINED.APINIT]\r
847 FILE RAW = $(NAMED_GUID) Fixed Align=4K {\r
848 RAW SEC_BIN |.com\r
849 }\r
850#cjia 2011-07-21\r
851[Rule.Common.USER_DEFINED.LEGACY16]\r
852 FILE FREEFORM = $(NAMED_GUID) {\r
853 UI STRING="$(MODULE_NAME)" Optional\r
854 RAW BIN |.bin\r
855 }\r
856#cjia\r
857\r
858[Rule.Common.USER_DEFINED.ASM16]\r
859 FILE FREEFORM = $(NAMED_GUID) {\r
860 UI STRING="$(MODULE_NAME)" Optional\r
861 RAW BIN |.com\r
862 }\r
863\r
864[Rule.Common.DXE_CORE]\r
865 FILE DXE_CORE = $(NAMED_GUID) {\r
866 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
867 UI STRING="$(MODULE_NAME)" Optional\r
868 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
869 }\r
870\r
871[Rule.Common.UEFI_DRIVER]\r
872 FILE DRIVER = $(NAMED_GUID) {\r
873 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
874 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
875 UI STRING="$(MODULE_NAME)" Optional\r
876 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
877 }\r
878\r
879[Rule.Common.UEFI_DRIVER.BINARY]\r
880 FILE DRIVER = $(NAMED_GUID) {\r
881 DXE_DEPEX DXE_DEPEX Optional |.depex\r
882 PE32 PE32 |.efi\r
883 UI STRING="$(MODULE_NAME)" Optional\r
884 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
885 }\r
886\r
887[Rule.Common.UEFI_DRIVER.NATIVE_BINARY]\r
888 FILE DRIVER = $(NAMED_GUID) {\r
889 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex\r
890 PE32 PE32 |.efi\r
891 UI STRING="$(MODULE_NAME)" Optional\r
892 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
893 }\r
894\r
895[Rule.Common.DXE_DRIVER]\r
896 FILE DRIVER = $(NAMED_GUID) {\r
897 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
898 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
899 UI STRING="$(MODULE_NAME)" Optional\r
900 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
901 }\r
902\r
903[Rule.Common.DXE_DRIVER.BINARY]\r
904 FILE DRIVER = $(NAMED_GUID) {\r
905 DXE_DEPEX DXE_DEPEX Optional |.depex\r
906 PE32 PE32 |.efi\r
907 UI STRING="$(MODULE_NAME)" Optional\r
908 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
909 }\r
910\r
911[Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]\r
912 FILE DRIVER = $(NAMED_GUID) {\r
913 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
914 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
915 UI STRING="$(MODULE_NAME)" Optional\r
916 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
917 RAW ACPI Optional |.acpi\r
918 RAW ASL Optional |.aml\r
919 }\r
920\r
921[Rule.Common.DXE_RUNTIME_DRIVER]\r
922 FILE DRIVER = $(NAMED_GUID) {\r
923 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
924 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
925 UI STRING="$(MODULE_NAME)" Optional\r
926 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
927 }\r
928\r
929[Rule.Common.DXE_RUNTIME_DRIVER.BINARY]\r
930 FILE DRIVER = $(NAMED_GUID) {\r
931 DXE_DEPEX DXE_DEPEX Optional |.depex\r
932 PE32 PE32 |.efi\r
933 UI STRING="$(MODULE_NAME)" Optional\r
934 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
935 }\r
936\r
937[Rule.Common.DXE_SMM_DRIVER]\r
938 FILE SMM = $(NAMED_GUID) {\r
939 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
940 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
941 UI STRING="$(MODULE_NAME)" Optional\r
942 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
943 }\r
944\r
945[Rule.Common.DXE_SMM_DRIVER.BINARY]\r
946 FILE SMM = $(NAMED_GUID) {\r
947 SMM_DEPEX SMM_DEPEX |.depex\r
948 PE32 PE32 |.efi\r
949 RAW BIN Optional |.aml\r
950 UI STRING="$(MODULE_NAME)" Optional\r
951 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
952 }\r
953\r
954[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
955 FILE SMM = $(NAMED_GUID) {\r
956 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
957 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
958 UI STRING="$(MODULE_NAME)" Optional\r
959 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
960 RAW ACPI Optional |.acpi\r
961 RAW ASL Optional |.aml\r
962 }\r
963\r
964[Rule.Common.SMM_CORE]\r
965 FILE SMM_CORE = $(NAMED_GUID) {\r
966 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
967 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
968 UI STRING="$(MODULE_NAME)" Optional\r
969 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
970 }\r
971\r
972[Rule.Common.SMM_CORE.BINARY]\r
973 FILE SMM_CORE = $(NAMED_GUID) {\r
974 DXE_DEPEX DXE_DEPEX Optional |.depex\r
975 PE32 PE32 |.efi\r
976 UI STRING="$(MODULE_NAME)" Optional\r
977 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
978 }\r
979\r
980[Rule.Common.UEFI_APPLICATION]\r
981 FILE APPLICATION = $(NAMED_GUID) {\r
982 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
983 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
984 UI STRING="$(MODULE_NAME)" Optional\r
985 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
986 }\r
987\r
988[Rule.Common.UEFI_APPLICATION.UI]\r
989 FILE APPLICATION = $(NAMED_GUID) {\r
990 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
991 UI STRING="Enter Setup"\r
992 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
993 }\r
994\r
995[Rule.Common.USER_DEFINED]\r
996 FILE FREEFORM = $(NAMED_GUID) {\r
997 UI STRING="$(MODULE_NAME)" Optional\r
998 RAW BIN |.bin\r
999 }\r
1000\r
98a88a76
KM		 1001[Rule.Common.USER_DEFINED.BINARY]\r
1002 FILE FREEFORM = $(NAMED_GUID) {\r
1003 UI STRING="$(MODULE_NAME)" Optional\r
1004 RAW BIN |.bin\r
1005 }\r
1006\r
5e752084 1007[Rule.Common.USER_DEFINED.ACPITABLE]\r
1008 FILE FREEFORM = $(NAMED_GUID) {\r
1009 RAW ACPI Optional |.acpi\r
1010 RAW ASL Optional |.aml\r
1011 }\r
1012\r
1013[Rule.Common.USER_DEFINED.ACPITABLE2]\r
1014 FILE FREEFORM = $(NAMED_GUID) {\r
1015 RAW ASL Optional |.aml\r
1016 }\r
1017\r
1018[Rule.Common.ACPITABLE]\r
1019 FILE FREEFORM = $(NAMED_GUID) {\r
1020 RAW ACPI Optional |.acpi\r
1021 RAW ASL Optional |.aml\r
1022 }\r
1023\r
c5a59080
JY		 1024[Rule.Common.PEIM.FMP_IMAGE_DESC]\r
1025 FILE PEIM = $(NAMED_GUID) {\r
1026 RAW BIN |.acpi\r
1027 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
1028 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi\r
1029 UI STRING="$(MODULE_NAME)" Optional\r
1030 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
1031 }\r
EFI Development Kit II mirror for PVE