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ArmPkg/ArmLib: add support for reading the max physical address space size
[mirror_edk2.git] / ArmPkg / Library / ArmLib / Arm / ArmV7ArchTimerSupport.S
1 #------------------------------------------------------------------------------
2 #
3 # Copyright (c) 2011, ARM Limited. All rights reserved.
4 # Copyright (c) 2016, Linaro Limited. All rights reserved.
5 #
6 # This program and the accompanying materials
7 # are licensed and made available under the terms and conditions of the BSD License
8 # which accompanies this distribution. The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #------------------------------------------------------------------------------
15
16 #include <AsmMacroIoLib.h>
17
18 ASM_FUNC(ArmReadCntFrq)
19 mrc p15, 0, r0, c14, c0, 0 @ Read CNTFRQ
20 bx lr
21
22 ASM_FUNC(ArmWriteCntFrq)
23 mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ
24 bx lr
25
26 ASM_FUNC(ArmReadCntPct)
27 mrrc p15, 0, r0, r1, c14 @ Read CNTPT (Physical counter register)
28 bx lr
29
30 ASM_FUNC(ArmReadCntkCtl)
31 mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register)
32 bx lr
33
34 ASM_FUNC(ArmWriteCntkCtl)
35 mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)
36 bx lr
37
38 ASM_FUNC(ArmReadCntpTval)
39 mrc p15, 0, r0, c14, c2, 0 @ Read CNTP_TVAL (PL1 physical timer value register)
40 bx lr
41
42 ASM_FUNC(ArmWriteCntpTval)
43 mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)
44 bx lr
45
46 ASM_FUNC(ArmReadCntpCtl)
47 mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register)
48 bx lr
49
50 ASM_FUNC(ArmWriteCntpCtl)
51 mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)
52 bx lr
53
54 ASM_FUNC(ArmReadCntvTval)
55 mrc p15, 0, r0, c14, c3, 0 @ Read CNTV_TVAL (Virtual Timer Value register)
56 bx lr
57
58 ASM_FUNC(ArmWriteCntvTval)
59 mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)
60 bx lr
61
62 ASM_FUNC(ArmReadCntvCtl)
63 mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register)
64 bx lr
65
66 ASM_FUNC(ArmWriteCntvCtl)
67 mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)
68 bx lr
69
70 ASM_FUNC(ArmReadCntvCt)
71 mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register)
72 bx lr
73
74 ASM_FUNC(ArmReadCntpCval)
75 mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register)
76 bx lr
77
78 ASM_FUNC(ArmWriteCntpCval)
79 mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
80 bx lr
81
82 ASM_FUNC(ArmReadCntvCval)
83 mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)
84 bx lr
85
86 ASM_FUNC(ArmWriteCntvCval)
87 mcrr p15, 3, r0, r1, c14 @ write to CNTV_CTVAL (Virtual Timer Compare Value Register)
88 bx lr
89
90 ASM_FUNC(ArmReadCntvOff)
91 mrrc p15, 4, r0, r1, c14 @ Read CNTVOFF (virtual Offset register)
92 bx lr
93
94 ASM_FUNC(ArmWriteCntvOff)
95 mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)
96 bx lr
97
98 ASM_FUNCTION_REMOVE_IF_UNREFERENCED