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1 ## @file
2 # Provides driver and definitions to build fsp in EDKII bios.
3 #
4 # Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
5 # This program and the accompanying materials are licensed and made available under
6 # the terms and conditions of the BSD License that accompanies this distribution.
7 # The full text of the license may be found at
8 # http://opensource.org/licenses/bsd-license.php.
9 #
10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 #
13 ##
14
15 [Defines]
16 DEC_SPECIFICATION = 0x00010005
17 PACKAGE_NAME = IntelFsp2Pkg
18 PACKAGE_GUID = A8C53B5E-D556-4F3E-874D-0D6FA2CDC7BF
19 PACKAGE_VERSION = 0.1
20
21 [Includes]
22 Include
23
24 [LibraryClasses]
25 ## @libraryclass Provides cache-as-ram support.
26 CacheAsRamLib|Include/Library/CacheAsRamLib.h
27
28 ## @libraryclass Provides cache setting on MTRR.
29 CacheLib|Include/Library/CacheLib.h
30
31 ## @libraryclass Provides debug device abstraction.
32 DebugDeviceLib|Include/Library/DebugDeviceLib.h
33
34 ## @libraryclass Provides FSP related services.
35 FspCommonLib|Include/Library/FspCommonLib.h
36
37 ## @libraryclass Provides FSP platform related actions.
38 FspPlatformLib|Include/Library/FspPlatformLib.h
39
40 ## @libraryclass Provides FSP switch stack function.
41 FspSwitchStackLib|Include/Library/FspSwitchStackLib.h
42
43 ## @libraryclass Provides FSP platform sec related actions.
44 FspSecPlatformLib|Include/Library/FspSecPlatformLib.h
45
46 [Ppis]
47 #
48 # PPI to indicate FSP is ready to enter notify phase
49 # This provides flexibility for any late initialization that must be done right before entering notify phase.
50 #
51 gFspReadyForNotifyPhasePpiGuid = { 0xcd167c1e, 0x6e0b, 0x42b3, { 0x82, 0xf6, 0xe3, 0xe9, 0x6, 0x19, 0x98, 0x10}}
52
53 #
54 # PPI as dependency on some modules which only required for API mode
55 #
56 gFspInApiModePpiGuid = { 0xa1eeab87, 0xc859, 0x479d, {0x89, 0xb5, 0x14, 0x61, 0xf4, 0x06, 0x1a, 0x3e}}
57
58 [Guids]
59 #
60 # GUID defined in package
61 #
62 gIntelFsp2PkgTokenSpaceGuid = { 0xed6e0531, 0xf715, 0x4a3d, { 0x9b, 0x12, 0xc1, 0xca, 0x5e, 0xf6, 0x98, 0xa2 } }
63
64 # Guid define in FSP EAS
65 gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }
66 gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }
67 gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }
68 gFspBootLoaderTolumHobGuid = { 0x73ff4f56, 0xaa8e, 0x4451, { 0xb3, 0x16, 0x36, 0x35, 0x36, 0x67, 0xad, 0x44 } } # FSP EAS v1.1
69
70 gFspPerformanceDataGuid = { 0x56ed21b6, 0xba23, 0x429e, { 0x89, 0x32, 0x37, 0x6d, 0x8e, 0x18, 0x2e, 0xe3 } }
71 gFspEventEndOfFirmwareGuid = { 0xbd44f629, 0xeae7, 0x4198, { 0x87, 0xf1, 0x39, 0xfa, 0xb0, 0xfd, 0x71, 0x7e } }
72
73 [PcdsFixedAtBuild]
74 gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress |0xFED00108|UINT32|0x00000001
75 gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase |0xFEF00000|UINT32|0x10001001
76 gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize | 0x2000|UINT32|0x10001002
77 gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | 0x1000|UINT32|0x10001003
78 gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize | 0x100|UINT32|0x10001004
79 gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPerfEntry | 32|UINT32|0x00002001
80 gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxPatchEntry | 6|UINT32|0x00002002
81 gIntelFsp2PkgTokenSpaceGuid.PcdFspAreaBaseAddress |0xFFF80000|UINT32|0x10000001
82 gIntelFsp2PkgTokenSpaceGuid.PcdFspAreaSize |0x00040000|UINT32|0x10000002
83 gIntelFsp2PkgTokenSpaceGuid.PcdFspBootFirmwareVolumeBase|0xFFF80000|UINT32|0x10000003
84 gIntelFsp2PkgTokenSpaceGuid.PcdFspHeaderSpecVersion | 0x20| UINT8|0x00000002
85
86 # x % of FSP temporary memory will be used for heap
87 # (100 - x) % of FSP temporary memory will be used for stack
88 gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage | 50| UINT8|0x10000004
89 #
90 # Maximal Interrupt supported in IDT table.
91 #
92 gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported | 34| UINT8|0x10000005
93
94 [PcdsFixedAtBuild,PcdsDynamic,PcdsDynamicEx]
95 gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength |0x00100000|UINT32|0x46530000
96 gIntelFsp2PkgTokenSpaceGuid.PcdBootLoaderEntry |0xFFFFFFE4|UINT32|0x46530100