2 Private Header file for Usb Host Controller PEIM
4 Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions
8 of the BSD License which accompanies this distribution. The
9 full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #ifndef _RECOVERY_XHC_H_
18 #define _RECOVERY_XHC_H_
22 #include <Ppi/UsbController.h>
23 #include <Ppi/Usb2HostController.h>
24 #include <Ppi/IoMmu.h>
25 #include <Ppi/EndOfPeiPhase.h>
27 #include <Library/DebugLib.h>
28 #include <Library/PeimEntryPoint.h>
29 #include <Library/PeiServicesLib.h>
30 #include <Library/BaseMemoryLib.h>
31 #include <Library/TimerLib.h>
32 #include <Library/IoLib.h>
33 #include <Library/MemoryAllocationLib.h>
35 typedef struct _PEI_XHC_DEV PEI_XHC_DEV
;
36 typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT
;
40 #include "XhciSched.h"
42 #define CMD_RING_TRB_NUMBER 0x100
43 #define TR_RING_TRB_NUMBER 0x100
44 #define ERST_NUMBER 0x01
45 #define EVENT_RING_TRB_NUMBER 0x200
47 #define XHC_1_MICROSECOND 1
48 #define XHC_1_MILLISECOND (1000 * XHC_1_MICROSECOND)
49 #define XHC_1_SECOND (1000 * XHC_1_MILLISECOND)
52 // XHC reset timeout experience values.
53 // The unit is millisecond, setting it as 1s.
55 #define XHC_RESET_TIMEOUT (1000)
58 // TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.
59 // The unit is microsecond, setting it as 10ms.
61 #define XHC_RESET_RECOVERY_DELAY (10 * 1000)
64 // Wait for root port state stable.
66 #define XHC_ROOT_PORT_STATE_STABLE (200 * XHC_1_MILLISECOND)
69 // XHC generic timeout experience values.
70 // The unit is millisecond, setting it as 10s.
72 #define XHC_GENERIC_TIMEOUT (10 * 1000)
74 #define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
75 #define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
76 #define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
78 #define XHC_REG_BIT_IS_SET(XHC, Offset, Bit) \
79 (XHC_BIT_IS_SET(XhcPeiReadOpReg ((XHC), (Offset)), (Bit)))
81 #define USB_DESC_TYPE_HUB 0x29
82 #define USB_DESC_TYPE_HUB_SUPER_SPEED 0x2a
85 // The RequestType in EFI_USB_DEVICE_REQUEST is composed of
86 // three fields: One bit direction, 2 bit type, and 5 bit
89 #define USB_REQUEST_TYPE(Dir, Type, Target) \
90 ((UINT8)((((Dir) == EfiUsbDataIn ? 0x01 : 0) << 7) | (Type) | (Target)))
92 struct _USB_DEV_CONTEXT
{
94 // Whether this entry in UsbDevContext array is used or not.
98 // The slot id assigned to the new device through XHCI's Enable_Slot cmd.
102 // The route string presented an attached usb device.
104 USB_DEV_ROUTE RouteString
;
106 // The route string of parent device if it exists. Otherwise it's zero.
108 USB_DEV_ROUTE ParentRouteString
;
110 // The actual device address assigned by XHCI through Address_Device command.
114 // The requested device address from UsbBus driver through Set_Address standard usb request.
115 // As XHCI spec replaces this request with Address_Device command, we have to record the
116 // requested device address and establish a mapping relationship with the actual device address.
117 // Then UsbBus driver just need to be aware of the requested device address to access usb device
118 // through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual
119 // device address and access the actual device.
123 // The pointer to the input device context.
127 // The pointer to the output device context.
131 // The transfer queue for every endpoint.
133 VOID
*EndpointTransferRing
[31];
135 // The device descriptor which is stored to support XHCI's Evaluate_Context cmd.
137 EFI_USB_DEVICE_DESCRIPTOR DevDesc
;
139 // As a usb device may include multiple configuration descriptors, we dynamically allocate an array
141 // Note that every configuration descriptor stored here includes those lower level descriptors,
142 // such as Interface descriptor, Endpoint descriptor, and so on.
143 // These information is used to support XHCI's Config_Endpoint cmd.
145 EFI_USB_CONFIG_DESCRIPTOR
**ConfDesc
;
148 #define USB_XHC_DEV_SIGNATURE SIGNATURE_32 ('x', 'h', 'c', 'i')
150 struct _PEI_XHC_DEV
{
152 PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi
;
153 EFI_PEI_PPI_DESCRIPTOR PpiDescriptor
;
154 UINT32 UsbHostControllerBaseAddress
;
155 USBHC_MEM_POOL
*MemPool
;
158 // EndOfPei callback is used to stop the XHC DMA operation
159 // after exit PEI phase.
161 EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList
;
164 // XHCI configuration data
166 UINT8 CapLength
; ///< Capability Register Length
167 XHC_HCSPARAMS1 HcSParams1
; ///< Structural Parameters 1
168 XHC_HCSPARAMS2 HcSParams2
; ///< Structural Parameters 2
169 XHC_HCCPARAMS HcCParams
; ///< Capability Parameters
170 UINT32 DBOff
; ///< Doorbell Offset
171 UINT32 RTSOff
; ///< Runtime Register Space Offset
173 UINT32 MaxScratchpadBufs
;
176 UINT64
*ScratchEntry
;
177 UINTN
*ScratchEntryMap
;
183 TRANSFER_RING CmdRing
;
187 EVENT_RING EventRing
;
190 // Store device contexts managed by XHCI device
191 // The array supports up to 255 devices, entry 0 is reserved and should not be used.
193 USB_DEV_CONTEXT UsbDevContext
[256];
196 #define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS(a) CR (a, PEI_XHC_DEV, Usb2HostControllerPpi, USB_XHC_DEV_SIGNATURE)
197 #define PEI_RECOVERY_USB_XHC_DEV_FROM_THIS_NOTIFY(a) CR (a, PEI_XHC_DEV, EndOfPeiNotifyList, USB_XHC_DEV_SIGNATURE)
200 Initialize the memory management pool for the host controller.
202 @return Pointer to the allocated memory pool or NULL if failed.
212 Release the memory management pool.
214 @param Pool The USB memory pool to free.
219 IN USBHC_MEM_POOL
*Pool
224 Allocate some memory from the host controller's memory pool
225 which can be used to communicate with host controller.
227 @param Pool The host controller's memory pool.
228 @param Size Size of the memory to allocate.
230 @return The allocated memory or NULL.
235 IN USBHC_MEM_POOL
*Pool
,
241 Free the allocated memory back to the memory pool.
243 @param Pool The memory pool of the host controller.
244 @param Mem The memory to free.
245 @param Size The size of the memory to free.
250 IN USBHC_MEM_POOL
*Pool
,
266 Provides the controller-specific addresses required to access system memory from a
269 @param Operation Indicates if the bus master is going to read or write to system memory.
270 @param HostAddress The system memory address to map to the PCI controller.
271 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
273 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
274 access the hosts HostAddress.
275 @param Mapping A resulting value to pass to Unmap().
277 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
278 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
279 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
280 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
281 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
286 IN EDKII_IOMMU_OPERATION Operation
,
287 IN VOID
*HostAddress
,
288 IN OUT UINTN
*NumberOfBytes
,
289 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
294 Completes the Map() operation and releases any corresponding resources.
296 @param Mapping The mapping value returned from Map().
298 @retval EFI_SUCCESS The range was unmapped.
299 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
300 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
308 Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
309 OperationBusMasterCommonBuffer64 mapping.
311 @param Pages The number of pages to allocate.
312 @param HostAddress A pointer to store the base system memory address of the
314 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
315 access the hosts HostAddress.
316 @param Mapping A resulting value to pass to Unmap().
318 @retval EFI_SUCCESS The requested memory pages were allocated.
319 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
320 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
321 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
322 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
326 IoMmuAllocateBuffer (
328 OUT VOID
**HostAddress
,
329 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
334 Frees memory that was allocated with AllocateBuffer().
336 @param Pages The number of pages to free.
337 @param HostAddress The base system memory address of the allocated range.
338 @param Mapping The mapping value returned from Map().
340 @retval EFI_SUCCESS The requested memory pages were freed.
341 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
342 was not allocated with AllocateBuffer().
348 IN VOID
*HostAddress
,