2 Private Header file for Usb Host Controller PEIM
4 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions
8 of the BSD License which accompanies this distribution. The
9 full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #ifndef _EFI_PEI_XHCI_SCHED_H_
18 #define _EFI_PEI_XHCI_SCHED_H_
21 // Transfer types, used in URB to identify the transfer type
23 #define XHC_CTRL_TRANSFER 0x01
24 #define XHC_BULK_TRANSFER 0x02
29 #define TRB_TYPE_NORMAL 1
30 #define TRB_TYPE_SETUP_STAGE 2
31 #define TRB_TYPE_DATA_STAGE 3
32 #define TRB_TYPE_STATUS_STAGE 4
33 #define TRB_TYPE_ISOCH 5
34 #define TRB_TYPE_LINK 6
35 #define TRB_TYPE_EVENT_DATA 7
36 #define TRB_TYPE_NO_OP 8
37 #define TRB_TYPE_EN_SLOT 9
38 #define TRB_TYPE_DIS_SLOT 10
39 #define TRB_TYPE_ADDRESS_DEV 11
40 #define TRB_TYPE_CON_ENDPOINT 12
41 #define TRB_TYPE_EVALU_CONTXT 13
42 #define TRB_TYPE_RESET_ENDPOINT 14
43 #define TRB_TYPE_STOP_ENDPOINT 15
44 #define TRB_TYPE_SET_TR_DEQUE 16
45 #define TRB_TYPE_RESET_DEV 17
46 #define TRB_TYPE_GET_PORT_BANW 21
47 #define TRB_TYPE_FORCE_HEADER 22
48 #define TRB_TYPE_NO_OP_COMMAND 23
49 #define TRB_TYPE_TRANS_EVENT 32
50 #define TRB_TYPE_COMMAND_COMPLT_EVENT 33
51 #define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
52 #define TRB_TYPE_HOST_CONTROLLER_EVENT 37
53 #define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
54 #define TRB_TYPE_MFINDEX_WRAP_EVENT 39
57 // Endpoint Type (EP Type).
59 #define ED_NOT_VALID 0
60 #define ED_ISOCH_OUT 1
62 #define ED_INTERRUPT_OUT 3
63 #define ED_CONTROL_BIDIR 4
66 #define ED_INTERRUPT_IN 7
69 // 6.4.5 TRB Completion Codes
71 #define TRB_COMPLETION_INVALID 0
72 #define TRB_COMPLETION_SUCCESS 1
73 #define TRB_COMPLETION_DATA_BUFFER_ERROR 2
74 #define TRB_COMPLETION_BABBLE_ERROR 3
75 #define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
76 #define TRB_COMPLETION_TRB_ERROR 5
77 #define TRB_COMPLETION_STALL_ERROR 6
78 #define TRB_COMPLETION_SHORT_PACKET 13
81 // The topology string used to present usb device location
83 typedef struct _USB_DEV_TOPOLOGY
{
85 // The tier concatenation of down stream port.
87 UINT32 RouteString
:20;
89 // The root port number of the chain.
93 // The Tier the device reside.
99 // USB Device's RouteChart
101 typedef union _USB_DEV_ROUTE
{
103 USB_DEV_TOPOLOGY Route
;
107 // Endpoint address and its capabilities
109 typedef struct _USB_ENDPOINT
{
111 // Store logical device address assigned by UsbBus
112 // It's because some XHCI host controllers may assign the same physcial device
113 // address for those devices inserted at different root port.
118 EFI_USB_DATA_DIRECTION Direction
;
127 typedef struct _TRB_TEMPLATE
{
140 typedef struct _TRANSFER_RING
{
143 TRB_TEMPLATE
*RingEnqueue
;
144 TRB_TEMPLATE
*RingDequeue
;
148 typedef struct _EVENT_RING
{
152 TRB_TEMPLATE
*EventRingEnqueue
;
153 TRB_TEMPLATE
*EventRingDequeue
;
157 #define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
160 // URB (Usb Request Block) contains information for all kinds of
163 typedef struct _URB
{
166 // Usb Device URB related information
169 EFI_USB_DEVICE_REQUEST
*Request
;
174 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
181 // completed data length
185 // Command/Tranfer Ring info
188 TRB_TEMPLATE
*TrbStart
;
189 TRB_TEMPLATE
*TrbEnd
;
195 TRB_TEMPLATE
*EvtTrb
;
199 // 6.5 Event Ring Segment Table
200 // The Event Ring Segment Table is used to define multi-segment Event Rings and to enable runtime
201 // expansion and shrinking of the Event Ring. The location of the Event Ring Segment Table is defined by the
202 // Event Ring Segment Table Base Address Register (5.5.2.3.2). The size of the Event Ring Segment Table
203 // is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
205 typedef struct _EVENT_RING_SEG_TABLE_ENTRY
{
208 UINT32 RingTrbSize
:16;
211 } EVENT_RING_SEG_TABLE_ENTRY
;
214 // 6.4.1.1 Normal TRB
215 // A Normal TRB is used in several ways; exclusively on Bulk and Interrupt Transfer Rings for normal and
216 // Scatter/Gather operations, to define additional data buffers for Scatter/Gather operations on Isoch Transfer
217 // Rings, and to define the Data stage information for Control Transfer Rings.
219 typedef struct _TRANSFER_TRB_NORMAL
{
239 } TRANSFER_TRB_NORMAL
;
242 // 6.4.1.2.1 Setup Stage TRB
243 // A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
245 typedef struct _TRANSFER_TRB_CONTROL_SETUP
{
246 UINT32 bmRequestType
:8;
265 } TRANSFER_TRB_CONTROL_SETUP
;
268 // 6.4.1.2.2 Data Stage TRB
269 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
271 typedef struct _TRANSFER_TRB_CONTROL_DATA
{
291 } TRANSFER_TRB_CONTROL_DATA
;
294 // 6.4.1.2.2 Data Stage TRB
295 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
297 typedef struct _TRANSFER_TRB_CONTROL_STATUS
{
313 } TRANSFER_TRB_CONTROL_STATUS
;
316 // 6.4.2.1 Transfer Event TRB
317 // A Transfer Event provides the completion status associated with a Transfer TRB. Refer to section 4.11.3.1
318 // for more information on the use and operation of Transfer Events.
320 typedef struct _EVT_TRB_TRANSFER
{
326 UINT32 Completecode
:8;
339 // 6.4.2.2 Command Completion Event TRB
340 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
341 // Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
343 typedef struct _EVT_TRB_COMMAND_COMPLETION
{
349 UINT32 Completecode
:8;
356 } EVT_TRB_COMMAND_COMPLETION
;
359 TRB_TEMPLATE TrbTemplate
;
360 TRANSFER_TRB_NORMAL TrbNormal
;
361 TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup
;
362 TRANSFER_TRB_CONTROL_DATA TrbCtrData
;
363 TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus
;
367 // 6.4.3.1 No Op Command TRB
368 // The No Op Command TRB provides a simple means for verifying the operation of the Command Ring
369 // mechanisms offered by the xHCI.
371 typedef struct _CMD_TRB_NO_OP
{
383 // 6.4.3.2 Enable Slot Command TRB
384 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
385 // selected slot to the host in a Command Completion Event.
387 typedef struct _CMD_TRB_ENABLE_SLOT
{
396 } CMD_TRB_ENABLE_SLOT
;
399 // 6.4.3.3 Disable Slot Command TRB
400 // The Disable Slot Command TRB releases any bandwidth assigned to the disabled slot and frees any
401 // internal xHC resources assigned to the slot.
403 typedef struct _CMD_TRB_DISABLE_SLOT
{
413 } CMD_TRB_DISABLE_SLOT
;
416 // 6.4.3.4 Address Device Command TRB
417 // The Address Device Command TRB transitions the selected Device Context from the Default to the
418 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
419 // issue a SET_ADDRESS request to the USB device.
421 typedef struct _CMD_TRB_ADDRESS_DEVICE
{
434 } CMD_TRB_ADDRESS_DEVICE
;
437 // 6.4.3.5 Configure Endpoint Command TRB
438 // The Configure Endpoint Command TRB evaluates the bandwidth and resource requirements of the
439 // endpoints selected by the command.
441 typedef struct _CMD_TRB_CONFIG_ENDPOINT
{
454 } CMD_TRB_CONFIG_ENDPOINT
;
457 // 6.4.3.6 Evaluate Context Command TRB
458 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
459 // Context data structures in the Device Context have been modified by system software and that the xHC
460 // shall evaluate any changes
462 typedef struct _CMD_TRB_EVALUATE_CONTEXT
{
474 } CMD_TRB_EVALUATE_CONTEXT
;
477 // 6.4.3.7 Reset Endpoint Command TRB
478 // The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
480 typedef struct _CMD_TRB_RESET_ENDPOINT
{
492 } CMD_TRB_RESET_ENDPOINT
;
495 // 6.4.3.8 Stop Endpoint Command TRB
496 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
497 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
499 typedef struct _CMD_TRB_STOP_ENDPOINT
{
511 } CMD_TRB_STOP_ENDPOINT
;
514 // 6.4.3.9 Set TR Dequeue Pointer Command TRB
515 // The Set TR Dequeue Pointer Command TRB is used by system software to modify the TR Dequeue
516 // Pointer and DCS fields of an Endpoint or Stream Context.
518 typedef struct _CMD_SET_TR_DEQ_POINTER
{
532 } CMD_SET_TR_DEQ_POINTER
;
536 // A Link TRB provides support for non-contiguous TRB Rings.
538 typedef struct _LINK_TRB
{
544 UINT32 InterTarget
:10;
557 // 6.2.2 Slot Context
559 typedef struct _SLOT_CONTEXT
{
560 UINT32 RouteString
:20;
565 UINT32 ContextEntries
:5;
567 UINT32 MaxExitLatency
:16;
568 UINT32 RootHubPortNum
:8;
571 UINT32 TTHubSlotId
:8;
575 UINT32 InterTarget
:10;
577 UINT32 DeviceAddress
:8;
587 typedef struct _SLOT_CONTEXT_64
{
588 UINT32 RouteString
:20;
593 UINT32 ContextEntries
:5;
595 UINT32 MaxExitLatency
:16;
596 UINT32 RootHubPortNum
:8;
599 UINT32 TTHubSlotId
:8;
603 UINT32 InterTarget
:10;
605 UINT32 DeviceAddress
:8;
628 // 6.2.3 Endpoint Context
630 typedef struct _ENDPOINT_CONTEXT
{
634 UINT32 MaxPStreams
:5;
644 UINT32 MaxBurstSize
:8;
645 UINT32 MaxPacketSize
:16;
651 UINT32 AverageTRBLength
:16;
652 UINT32 MaxESITPayload
:16;
659 typedef struct _ENDPOINT_CONTEXT_64
{
663 UINT32 MaxPStreams
:5;
673 UINT32 MaxBurstSize
:8;
674 UINT32 MaxPacketSize
:16;
680 UINT32 AverageTRBLength
:16;
681 UINT32 MaxESITPayload
:16;
697 } ENDPOINT_CONTEXT_64
;
701 // 6.2.5.1 Input Control Context
703 typedef struct _INPUT_CONTRL_CONTEXT
{
712 } INPUT_CONTRL_CONTEXT
;
714 typedef struct _INPUT_CONTRL_CONTEXT_64
{
731 } INPUT_CONTRL_CONTEXT_64
;
734 // 6.2.1 Device Context
736 typedef struct _DEVICE_CONTEXT
{
738 ENDPOINT_CONTEXT EP
[31];
741 typedef struct _DEVICE_CONTEXT_64
{
742 SLOT_CONTEXT_64 Slot
;
743 ENDPOINT_CONTEXT_64 EP
[31];
747 // 6.2.5 Input Context
749 typedef struct _INPUT_CONTEXT
{
750 INPUT_CONTRL_CONTEXT InputControlContext
;
752 ENDPOINT_CONTEXT EP
[31];
755 typedef struct _INPUT_CONTEXT_64
{
756 INPUT_CONTRL_CONTEXT_64 InputControlContext
;
757 SLOT_CONTEXT_64 Slot
;
758 ENDPOINT_CONTEXT_64 EP
[31];
762 Execute the transfer by polling the URB. This is a synchronous operation.
764 @param Xhc The XHCI device.
765 @param CmdTransfer The executed URB is for cmd transfer or not.
766 @param Urb The URB to execute.
767 @param Timeout The time to wait before abort, in millisecond.
769 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
770 @return EFI_TIMEOUT The transfer failed due to time out.
771 @return EFI_SUCCESS The transfer finished OK.
777 IN BOOLEAN CmdTransfer
,
783 Find out the actual device address according to the requested device address from UsbBus.
785 @param Xhc The XHCI device.
786 @param BusDevAddr The requested device address by UsbBus upper driver.
788 @return The actual device address assigned to the device.
792 XhcPeiBusDevAddrToSlotId (
798 Find out the slot id according to the device's route string.
800 @param Xhc The XHCI device.
801 @param RouteString The route string described the device location.
803 @return The slot id used by the device.
807 XhcPeiRouteStringToSlotId (
809 IN USB_DEV_ROUTE RouteString
813 Calculate the device context index by endpoint address and direction.
815 @param EpAddr The target endpoint number.
816 @param Direction The direction of the target endpoint.
818 @return The device context index of endpoint.
822 XhcPeiEndpointToDci (
824 IN EFI_USB_DATA_DIRECTION Direction
828 Ring the door bell to notify XHCI there is a transaction to be executed.
830 @param Xhc The XHCI device.
831 @param SlotId The slot id of the target device.
832 @param Dci The device context index of the target slot or endpoint.
843 Monitor the port status change. Enable/Disable device slot if there is a device attached/detached.
845 @param Xhc The XHCI device.
846 @param ParentRouteChart The route string pointed to the parent device if it exists.
847 @param Port The port to be polled.
848 @param PortState The port state.
850 @retval EFI_SUCCESS Successfully enable/disable device slot according to port state.
851 @retval Others Should not appear.
855 XhcPeiPollPortStatusChange (
857 IN USB_DEV_ROUTE ParentRouteChart
,
859 IN EFI_USB_PORT_STATUS
*PortState
863 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
865 @param Xhc The XHCI device.
866 @param SlotId The slot id to be configured.
867 @param PortNum The total number of downstream port supported by the hub.
868 @param TTT The TT think time of the hub device.
869 @param MTT The multi-TT of the hub device.
871 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
875 XhcPeiConfigHubContext (
884 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
886 @param Xhc The XHCI device.
887 @param SlotId The slot id to be configured.
888 @param PortNum The total number of downstream port supported by the hub.
889 @param TTT The TT think time of the hub device.
890 @param MTT The multi-TT of the hub device.
892 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
896 XhcPeiConfigHubContext64 (
905 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
907 @param Xhc The XHCI device.
908 @param SlotId The slot id to be configured.
909 @param DeviceSpeed The device's speed.
910 @param ConfigDesc The pointer to the usb device configuration descriptor.
912 @retval EFI_SUCCESS Successfully configure all the device endpoints.
919 IN UINT8 DeviceSpeed
,
920 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
924 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
926 @param Xhc The XHCI device.
927 @param SlotId The slot id to be configured.
928 @param DeviceSpeed The device's speed.
929 @param ConfigDesc The pointer to the usb device configuration descriptor.
931 @retval EFI_SUCCESS Successfully configure all the device endpoints.
935 XhcPeiSetConfigCmd64 (
938 IN UINT8 DeviceSpeed
,
939 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
943 Stop endpoint through XHCI's Stop_Endpoint cmd.
945 @param Xhc The XHCI device.
946 @param SlotId The slot id of the target device.
947 @param Dci The device context index of the target slot or endpoint.
949 @retval EFI_SUCCESS Stop endpoint successfully.
950 @retval Others Failed to stop endpoint.
962 Reset endpoint through XHCI's Reset_Endpoint cmd.
964 @param Xhc The XHCI device.
965 @param SlotId The slot id of the target device.
966 @param Dci The device context index of the target slot or endpoint.
968 @retval EFI_SUCCESS Reset endpoint successfully.
969 @retval Others Failed to reset endpoint.
974 XhcPeiResetEndpoint (
981 Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.
983 @param Xhc The XHCI device.
984 @param SlotId The slot id of the target device.
985 @param Dci The device context index of the target slot or endpoint.
986 @param Urb The dequeue pointer of the transfer ring specified
987 by the urb to be updated.
989 @retval EFI_SUCCESS Set transfer ring dequeue pointer succeeds.
990 @retval Others Failed to set transfer ring dequeue pointer.
995 XhcPeiSetTrDequeuePointer (
1003 Assign and initialize the device slot for a new device.
1005 @param Xhc The XHCI device.
1006 @param ParentRouteChart The route string pointed to the parent device.
1007 @param ParentPort The port at which the device is located.
1008 @param RouteChart The route string pointed to the device.
1009 @param DeviceSpeed The device speed.
1011 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1012 @retval Others Fail to initialize device slot.
1016 XhcPeiInitializeDeviceSlot (
1017 IN PEI_XHC_DEV
*Xhc
,
1018 IN USB_DEV_ROUTE ParentRouteChart
,
1019 IN UINT16 ParentPort
,
1020 IN USB_DEV_ROUTE RouteChart
,
1021 IN UINT8 DeviceSpeed
1025 Assign and initialize the device slot for a new device.
1027 @param Xhc The XHCI device.
1028 @param ParentRouteChart The route string pointed to the parent device.
1029 @param ParentPort The port at which the device is located.
1030 @param RouteChart The route string pointed to the device.
1031 @param DeviceSpeed The device speed.
1033 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1034 @retval Others Fail to initialize device slot.
1038 XhcPeiInitializeDeviceSlot64 (
1039 IN PEI_XHC_DEV
*Xhc
,
1040 IN USB_DEV_ROUTE ParentRouteChart
,
1041 IN UINT16 ParentPort
,
1042 IN USB_DEV_ROUTE RouteChart
,
1043 IN UINT8 DeviceSpeed
1047 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1049 @param Xhc The XHCI device.
1050 @param SlotId The slot id to be evaluated.
1051 @param MaxPacketSize The max packet size supported by the device control transfer.
1053 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1057 XhcPeiEvaluateContext (
1058 IN PEI_XHC_DEV
*Xhc
,
1060 IN UINT32 MaxPacketSize
1064 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1066 @param Xhc The XHCI device.
1067 @param SlotId The slot id to be evaluated.
1068 @param MaxPacketSize The max packet size supported by the device control transfer.
1070 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1074 XhcPeiEvaluateContext64 (
1075 IN PEI_XHC_DEV
*Xhc
,
1077 IN UINT32 MaxPacketSize
1081 Disable the specified device slot.
1083 @param Xhc The XHCI device.
1084 @param SlotId The slot id to be disabled.
1086 @retval EFI_SUCCESS Successfully disable the device slot.
1090 XhcPeiDisableSlotCmd (
1091 IN PEI_XHC_DEV
*Xhc
,
1096 Disable the specified device slot.
1098 @param Xhc The XHCI device.
1099 @param SlotId The slot id to be disabled.
1101 @retval EFI_SUCCESS Successfully disable the device slot.
1105 XhcPeiDisableSlotCmd64 (
1106 IN PEI_XHC_DEV
*Xhc
,
1111 System software shall use a Reset Endpoint Command (section 4.11.4.7) to remove the Halted
1112 condition in the xHC. After the successful completion of the Reset Endpoint Command, the Endpoint
1113 Context is transitioned from the Halted to the Stopped state and the Transfer Ring of the endpoint is
1114 reenabled. The next write to the Doorbell of the Endpoint will transition the Endpoint Context from the
1115 Stopped to the Running state.
1117 @param Xhc The XHCI device.
1118 @param Urb The urb which makes the endpoint halted.
1120 @retval EFI_SUCCESS The recovery is successful.
1121 @retval Others Failed to recovery halted endpoint.
1125 XhcPeiRecoverHaltedEndpoint (
1126 IN PEI_XHC_DEV
*Xhc
,
1131 System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer
1132 Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to
1133 the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running
1136 @param Xhc The XHCI device.
1137 @param Urb The urb which doesn't get completed in a specified timeout range.
1139 @retval EFI_SUCCESS The dequeuing of the TDs is successful.
1140 @retval Others Failed to stop the endpoint and dequeue the TDs.
1144 XhcPeiDequeueTrbFromEndpoint (
1145 IN PEI_XHC_DEV
*Xhc
,
1150 Create a new URB for a new transaction.
1152 @param Xhc The XHCI device
1153 @param DevAddr The device address
1154 @param EpAddr Endpoint addrress
1155 @param DevSpeed The device speed
1156 @param MaxPacket The max packet length of the endpoint
1157 @param Type The transaction type
1158 @param Request The standard USB request for control transfer
1159 @param Data The user data to transfer
1160 @param DataLen The length of data buffer
1161 @param Callback The function to call when data is transferred
1162 @param Context The context to the callback
1164 @return Created URB or NULL
1169 IN PEI_XHC_DEV
*Xhc
,
1175 IN EFI_USB_DEVICE_REQUEST
*Request
,
1178 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
1183 Free an allocated URB.
1185 @param Xhc The XHCI device.
1186 @param Urb The URB to free.
1191 IN PEI_XHC_DEV
*Xhc
,
1196 Create a transfer TRB.
1198 @param Xhc The XHCI device
1199 @param Urb The urb used to construct the transfer TRB.
1201 @return Created TRB or NULL
1205 XhcPeiCreateTransferTrb (
1206 IN PEI_XHC_DEV
*Xhc
,
1211 Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
1213 @param Xhc The XHCI device.
1214 @param TrsRing The transfer ring to sync.
1216 @retval EFI_SUCCESS The transfer ring is synchronized successfully.
1221 IN PEI_XHC_DEV
*Xhc
,
1222 IN TRANSFER_RING
*TrsRing
1226 Create XHCI transfer ring.
1228 @param Xhc The XHCI Device.
1229 @param TrbNum The number of TRB in the ring.
1230 @param TransferRing The created transfer ring.
1234 XhcPeiCreateTransferRing (
1235 IN PEI_XHC_DEV
*Xhc
,
1237 OUT TRANSFER_RING
*TransferRing
1241 Check if there is a new generated event.
1243 @param Xhc The XHCI device.
1244 @param EvtRing The event ring to check.
1245 @param NewEvtTrb The new event TRB found.
1247 @retval EFI_SUCCESS Found a new event TRB at the event ring.
1248 @retval EFI_NOT_READY The event ring has no new event.
1252 XhcPeiCheckNewEvent (
1253 IN PEI_XHC_DEV
*Xhc
,
1254 IN EVENT_RING
*EvtRing
,
1255 OUT TRB_TEMPLATE
**NewEvtTrb
1259 Synchronize the specified event ring to update the enqueue and dequeue pointer.
1261 @param Xhc The XHCI device.
1262 @param EvtRing The event ring to sync.
1264 @retval EFI_SUCCESS The event ring is synchronized successfully.
1268 XhcPeiSyncEventRing (
1269 IN PEI_XHC_DEV
*Xhc
,
1270 IN EVENT_RING
*EvtRing
1274 Create XHCI event ring.
1276 @param Xhc The XHCI device.
1277 @param EventRing The created event ring.
1281 XhcPeiCreateEventRing (
1282 IN PEI_XHC_DEV
*Xhc
,
1283 OUT EVENT_RING
*EventRing
1287 Initialize the XHCI host controller for schedule.
1289 @param Xhc The XHCI device to be initialized.
1298 Free the resouce allocated at initializing schedule.
1300 @param Xhc The XHCI device.