MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h

   1 /** @file
   2   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   3   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
   4
   5   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14   @par Revision Reference:
  15     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
  16       Specification v2.4, Dated June 2016.
  17       http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf
  18
  19   @par Glossary:
  20     - HPET - High Precision Event Timer
  21     - NUMA - Non-uniform Memory Access
  22 **/
  23 #ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
  24 #define _DMA_REMAPPING_REPORTING_TABLE_H_
  25
  26 #include <IndustryStandard/Acpi.h>
  27
  28 #pragma pack(1)
  29
  30 ///
  31 /// DMA-Remapping Reporting Structure definitions from section 8.1
  32 ///@{
  33 #define EFI_ACPI_DMAR_REVISION                    0x01
  34
  35 #define EFI_ACPI_DMAR_FLAGS_INTR_REMAP            BIT0
  36 #define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT        BIT1
  37 ///@}
  38
  39 ///
  40 /// Remapping Structure Types definitions from section 8.2
  41 ///@{
  42 #define EFI_ACPI_DMAR_TYPE_DRHD                   0x00
  43 #define EFI_ACPI_DMAR_TYPE_RMRR                   0x01
  44 #define EFI_ACPI_DMAR_TYPE_ATSR                   0x02
  45 #define EFI_ACPI_DMAR_TYPE_RHSA                   0x03
  46 #define EFI_ACPI_DMAR_TYPE_ANDD                   0x04
  47 ///@}
  48
  49 ///
  50 /// DMA-Remapping Hardware Unit definitions from section 8.3
  51 ///
  52 #define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
  53
  54 ///
  55 /// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
  56 ///@{
  57 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
  58 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
  59 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
  60 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
  61 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
  62 ///@}
  63
  64 ///
  65 /// Root Port ATS Capability Reporting Structure definitions from section 8.5
  66 ///
  67 #define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS                      BIT0
  68
  69 ///
  70 /// Definition for DMA Remapping Structure Header
  71 ///
  72 typedef struct {
  73   UINT16        Type;
  74   UINT16        Length;
  75 } EFI_ACPI_DMAR_STRUCTURE_HEADER;
  76
  77 ///
  78 /// Definition for DMA-Remapping PCI Path
  79 ///
  80 typedef struct {
  81   UINT8         Device;
  82   UINT8         Function;
  83 } EFI_ACPI_DMAR_PCI_PATH;
  84
  85 ///
  86 /// Device Scope Structure is defined in section 8.3.1
  87 ///
  88 typedef struct {
  89   UINT8         Type;
  90   UINT8         Length;
  91   UINT16        Reserved2;
  92   UINT8         EnumerationId;
  93   UINT8         StartBusNumber;
  94 } EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
  95
  96 /**
  97   DMA-remapping hardware unit definition (DRHD) structure is defined in
  98   section 8.3. This uniquely represents a remapping hardware unit present
  99   in the platform. There must be at least one instance of this structure
 100   for each PCI segment in the platform.
 101 **/
 102 typedef struct {
 103   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 104   /**
 105     - Bit[0]: INCLUDE_PCI_ALL
 106               - If Set, this remapping hardware unit has under its scope all
 107                 PCI compatible devices in the specified Segment, except devices
 108                 reported under the scope of other remapping hardware units for
 109                 the same Segment.
 110               - If Clear, this remapping hardware unit has under its scope only
 111                 devices in the specified Segment that are explicitly identified
 112                 through the DeviceScope field.
 113     - Bits[7:1] Reserved.
 114   **/
 115   UINT8                           Flags;
 116   UINT8                           Reserved;
 117   ///
 118   /// The PCI Segment associated with this unit.
 119   ///
 120   UINT16                          SegmentNumber;
 121   ///
 122   /// Base address of remapping hardware register-set for this unit.
 123   ///
 124   UINT64                          RegisterBaseAddress;
 125 } EFI_ACPI_DMAR_DRHD_HEADER;
 126
 127 /**
 128   Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
 129   Reserved memory ranges that may be DMA targets may be reported through the
 130   RMRR structures, along with the devices that requires access to the specified
 131   reserved memory region.
 132 **/
 133 typedef struct {
 134   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 135   UINT8                           Reserved[2];
 136   ///
 137   /// PCI Segment Number associated with devices identified through
 138   /// the Device Scope field.
 139   ///
 140   UINT16                          SegmentNumber;
 141   ///
 142   /// Base address of 4KB-aligned reserved memory region
 143   ///
 144   UINT64                          ReservedMemoryRegionBaseAddress;
 145   /**
 146     Last address of the reserved memory region. Value in this field must be
 147     greater than the value in Reserved Memory Region Base Address field.
 148     The reserved memory region size (Limit - Base + 1) must be an integer
 149     multiple of 4KB.
 150   **/
 151   UINT64                          ReservedMemoryRegionLimitAddress;
 152 } EFI_ACPI_DMAR_RMRR_HEADER;
 153
 154 /**
 155   Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
 156   This structure is applicable only for platforms supporting Device-TLBs as
 157   reported through the Extended Capability Register. For each PCI Segment in
 158   the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
 159   ATSR structures identifies PCI-Express Root-Ports supporting Address
 160   Translation Services (ATS) transactions. Software must enable ATS on endpoint
 161   devices behind a Root Port only if the Root Port is reported as supporting
 162   ATS transactions.
 163 **/
 164 typedef struct {
 165   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 166   /**
 167     - Bit[0]: ALL_PORTS:
 168               - If Set, indicates all PCI Express Root Ports in the specified
 169                 PCI Segment supports ATS transactions.
 170               - If Clear, indicates ATS transactions are supported only on
 171                 Root Ports identified through the Device Scope field.
 172     - Bits[7:1] Reserved.
 173   **/
 174   UINT8                           Flags;
 175   UINT8                           Reserved;
 176   ///
 177   /// The PCI Segment associated with this ATSR structure
 178   ///
 179   UINT16                          SegmentNumber;
 180 } EFI_ACPI_DMAR_ATSR_HEADER;
 181
 182 /**
 183   Remapping Hardware Static Affinity (RHSA) is an optional structure defined
 184   in section 8.6. This is intended to be used only on NUMA platforms with
 185   Remapping hardware units and memory spanned across multiple nodes.
 186   When used, there must be a RHSA structure for each Remapping hardware unit
 187   reported through DRHD structure.
 188 **/
 189 typedef struct {
 190   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 191   UINT8                           Reserved[4];
 192   ///
 193   /// Register Base Address of this Remap hardware unit reported in the
 194   /// corresponding DRHD structure.
 195   ///
 196   UINT64                          RegisterBaseAddress;
 197   ///
 198   /// Proximity Domain to which the Remap hardware unit identified by the
 199   /// Register Base Address field belongs.
 200   ///
 201   UINT32                          ProximityDomain;
 202 } EFI_ACPI_DMAR_RHSA_HEADER;
 203
 204 /**
 205   An ACPI Name-space Device Declaration (ANDD) structure is defined in section
 206   8.7 and uniquely represents an ACPI name-space enumerated device capable of
 207   issuing DMA requests in the platform. ANDD structures are used in conjunction
 208   with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
 209 **/
 210 typedef struct {
 211   EFI_ACPI_DMAR_STRUCTURE_HEADER  Header;
 212   UINT8                           Reserved[3];
 213   /**
 214     Each ACPI device enumerated through an ANDD structure must have a unique
 215     value for this field. To report an ACPI device with ACPI Device Number
 216     value of X, under the scope of a DRHD unit, a Device-Scope entry of type
 217     ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
 218     The Start Bus Number and Path fields in the Device-Scope together
 219     provides the 16-bit source-id allocated by platform for the ACPI device.
 220   **/
 221   UINT8                           AcpiDeviceNumber;
 222 } EFI_ACPI_DMAR_ANDD_HEADER;
 223
 224 /**
 225   DMA Remapping Reporting Structure Header as defined in section 8.1
 226   This header will be followed by list of Remapping Structures listed below
 227     - DMA Remapping Hardware Unit Definition (DRHD)
 228     - Reserved Memory Region Reporting (RMRR)
 229     - Root Port ATS Capability Reporting (ATSR)
 230     - Remapping Hardware Static Affinity (RHSA)
 231     - ACPI Name-space Device Declaration (ANDD)
 232   These structure types must by reported in numerical order.
 233   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
 234   structures of type 1 (RMRR), and so forth.
 235 **/
 236 typedef struct {
 237   EFI_ACPI_DESCRIPTION_HEADER     Header;
 238   /**
 239     This field indicates the maximum DMA physical addressability supported by
 240     this platform. The system address map reported by the BIOS indicates what
 241     portions of this addresses are populated. The Host Address Width (HAW) of
 242     the platform is computed as (N+1), where N is the value reported in this
 243     field.
 244     For example, for a platform supporting 40 bits of physical addressability,
 245     the value of 100111b is reported in this field.
 246   **/
 247   UINT8                           HostAddressWidth;
 248   /**
 249     - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
 250                 remapping. If Set, the platform supports interrupt remapping.
 251     - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
 252                 firmware may Set this field to request system software to opt
 253                 out of enabling Extended xAPIC (X2APIC) mode. This field is
 254                 valid only when the INTR_REMAP field (bit 0) is Set.
 255     - Bits[7:2] Reserved.
 256   **/
 257   UINT8                           Flags;
 258   UINT8                           Reserved[10];
 259 } EFI_ACPI_DMAR_HEADER;
 260
 261 #pragma pack()
 262
 263 #endif