MdePkg/Include/IndustryStandard/PciExpress21.h

   1 /** @file
   2   Support for the latest PCI standard.
   3
   4   Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
   5   (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef _PCIEXPRESS21_H_
  17 #define _PCIEXPRESS21_H_
  18
  19 #define EFI_PCIE_CAPABILITY_BASE_OFFSET                             0x100
  20 #define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL_ARI_HIERARCHY          0x10
  21 #define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_OFFSET            0x24
  22 #define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING    0x20
  23 #define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET                 0x28
  24 #define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_ARI_FORWARDING         0x20
  25
  26 //
  27 // for SR-IOV
  28 //
  29 #define EFI_PCIE_CAPABILITY_ID_ARI        0x0E
  30 #define EFI_PCIE_CAPABILITY_ID_ATS        0x0F
  31 #define EFI_PCIE_CAPABILITY_ID_SRIOV      0x10
  32 #define EFI_PCIE_CAPABILITY_ID_MRIOV      0x11
  33
  34 typedef struct {
  35   UINT32  CapabilityHeader;
  36   UINT32  Capability;
  37   UINT16  Control;
  38   UINT16  Status;
  39   UINT16  InitialVFs;
  40   UINT16  TotalVFs;
  41   UINT16  NumVFs;
  42   UINT8   FunctionDependencyLink;
  43   UINT8   Reserved0;
  44   UINT16  FirstVFOffset;
  45   UINT16  VFStride;
  46   UINT16  Reserved1;
  47   UINT16  VFDeviceID;
  48   UINT32  SupportedPageSize;
  49   UINT32  SystemPageSize;
  50   UINT32  VFBar[6];
  51   UINT32  VFMigrationStateArrayOffset;
  52 } SR_IOV_CAPABILITY_REGISTER;
  53
  54 #define EFI_PCIE_CAPABILITY_ID_SRIOV_CAPABILITIES               0x04
  55 #define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL                    0x08
  56 #define EFI_PCIE_CAPABILITY_ID_SRIOV_STATUS                     0x0A
  57 #define EFI_PCIE_CAPABILITY_ID_SRIOV_INITIALVFS                 0x0C
  58 #define EFI_PCIE_CAPABILITY_ID_SRIOV_TOTALVFS                   0x0E
  59 #define EFI_PCIE_CAPABILITY_ID_SRIOV_NUMVFS                     0x10
  60 #define EFI_PCIE_CAPABILITY_ID_SRIOV_FUNCTION_DEPENDENCY_LINK   0x12
  61 #define EFI_PCIE_CAPABILITY_ID_SRIOV_FIRSTVF                    0x14
  62 #define EFI_PCIE_CAPABILITY_ID_SRIOV_VFSTRIDE                   0x16
  63 #define EFI_PCIE_CAPABILITY_ID_SRIOV_VFDEVICEID                 0x1A
  64 #define EFI_PCIE_CAPABILITY_ID_SRIOV_SUPPORTED_PAGE_SIZE        0x1C
  65 #define EFI_PCIE_CAPABILITY_ID_SRIOV_SYSTEM_PAGE_SIZE           0x20
  66 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR0                       0x24
  67 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR1                       0x28
  68 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR2                       0x2C
  69 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR3                       0x30
  70 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR4                       0x34
  71 #define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR5                       0x38
  72 #define EFI_PCIE_CAPABILITY_ID_SRIOV_VF_MIGRATION_STATE         0x3C
  73
  74 typedef struct {
  75   UINT32 CapabilityId:16;
  76   UINT32 CapabilityVersion:4;
  77   UINT32 NextCapabilityOffset:12;
  78 } PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER;
  79
  80 #define PCI_EXP_EXT_HDR PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER
  81
  82 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_ID   0x0001
  83 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_VER1 0x1
  84 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_VER2 0x2
  85
  86 typedef struct {
  87   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
  88   UINT32                                    UncorrectableErrorStatus;
  89   UINT32                                    UncorrectableErrorMask;
  90   UINT32                                    UncorrectableErrorSeverity;
  91   UINT32                                    CorrectableErrorStatus;
  92   UINT32                                    CorrectableErrorMask;
  93   UINT32                                    AdvancedErrorCapabilitiesAndControl;
  94   UINT32                                    HeaderLog[4];
  95   UINT32                                    RootErrorCommand;
  96   UINT32                                    RootErrorStatus;
  97   UINT16                                    ErrorSourceIdentification;
  98   UINT16                                    CorrectableErrorSourceIdentification;
  99   UINT32                                    TlpPrefixLog[4];
 100 } PCI_EXPRESS_EXTENDED_CAPABILITIES_ADVANCED_ERROR_REPORTING;
 101
 102 #define PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_ID    0x0002
 103 #define PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_MFVC  0x0009
 104 #define PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_VER1  0x1
 105
 106 typedef struct {
 107   UINT32                                    VcResourceCapability:24;
 108   UINT32                                    PortArbTableOffset:8;
 109   UINT32                                    VcResourceControl;
 110   UINT16                                    Reserved1;
 111   UINT16                                    VcResourceStatus;
 112 } PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC;
 113
 114 typedef struct {
 115   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER              Header;
 116   UINT32                                                ExtendedVcCount:3;
 117   UINT32                                                PortVcCapability1:29;
 118   UINT32                                                PortVcCapability2:24;
 119   UINT32                                                VcArbTableOffset:8;
 120   UINT16                                                PortVcControl;
 121   UINT16                                                PortVcStatus;
 122   PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC  Capability[1];
 123 } PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY;
 124
 125 #define PCI_EXPRESS_EXTENDED_CAPABILITY_SERIAL_NUMBER_ID    0x0003
 126 #define PCI_EXPRESS_EXTENDED_CAPABILITY_SERIAL_NUMBER_VER1  0x1
 127
 128 typedef struct {
 129   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 130   UINT64                                    SerialNumber;
 131 } PCI_EXPRESS_EXTENDED_CAPABILITIES_SERIAL_NUMBER;
 132
 133 #define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_ID   0x0005
 134 #define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_VER1 0x1
 135
 136 typedef struct {
 137   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 138   UINT32                                    ElementSelfDescription;
 139   UINT32                                    Reserved;
 140   UINT32                                    LinkEntry[1];
 141 } PCI_EXPRESS_EXTENDED_CAPABILITIES_LINK_DECLARATION;
 142
 143 #define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_GET_LINK_COUNT(LINK_DECLARATION) (UINT8)(((LINK_DECLARATION->ElementSelfDescription)&0x0000ff00)>>8)
 144
 145 #define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_CONTROL_ID   0x0006
 146 #define PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_CONTROL_VER1 0x1
 147
 148 typedef struct {
 149   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 150   UINT32                                    RootComplexLinkCapabilities;
 151   UINT16                                    RootComplexLinkControl;
 152   UINT16                                    RootComplexLinkStatus;
 153 } PCI_EXPRESS_EXTENDED_CAPABILITIES_INTERNAL_LINK_CONTROL;
 154
 155 #define PCI_EXPRESS_EXTENDED_CAPABILITY_POWER_BUDGETING_ID   0x0004
 156 #define PCI_EXPRESS_EXTENDED_CAPABILITY_POWER_BUDGETING_VER1 0x1
 157
 158 typedef struct {
 159   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 160   UINT32                                    DataSelect:8;
 161   UINT32                                    Reserved:24;
 162   UINT32                                    Data;
 163   UINT32                                    PowerBudgetCapability:1;
 164   UINT32                                    Reserved2:7;
 165   UINT32                                    Reserved3:24;
 166 } PCI_EXPRESS_EXTENDED_CAPABILITIES_POWER_BUDGETING;
 167
 168 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_ID   0x000D
 169 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_VER1 0x1
 170
 171 typedef struct {
 172   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 173   UINT16                                    AcsCapability;
 174   UINT16                                    AcsControl;
 175   UINT8                                     EgressControlVectorArray[1];
 176 } PCI_EXPRESS_EXTENDED_CAPABILITIES_ACS_EXTENDED;
 177
 178 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_CONTROL(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x00000020))
 179 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_VECTOR_SIZE(ACS_EXTENDED) (UINT8)(((ACS_EXTENDED->AcsCapability)&0x0000FF00))
 180
 181 #define PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_ID   0x0007
 182 #define PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_VER1 0x1
 183
 184 typedef struct {
 185   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 186   UINT32                                    AssociationBitmap;
 187 } PCI_EXPRESS_EXTENDED_CAPABILITIES_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION;
 188
 189 #define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_ID    0x0008
 190 #define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_VER1  0x1
 191
 192 typedef PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTI_FUNCTION_VIRTUAL_CHANNEL_CAPABILITY;
 193
 194 #define PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_ID   0x000B
 195 #define PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_VER1 0x1
 196
 197 typedef struct {
 198   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 199   UINT32                                    VendorSpecificHeader;
 200   UINT8                                     VendorSpecific[1];
 201 } PCI_EXPRESS_EXTENDED_CAPABILITIES_VENDOR_SPECIFIC;
 202
 203 #define PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_GET_SIZE(VENDOR) (UINT16)(((VENDOR->VendorSpecificHeader)&0xFFF00000)>>20)
 204
 205 #define PCI_EXPRESS_EXTENDED_CAPABILITY_RCRB_HEADER_ID   0x000A
 206 #define PCI_EXPRESS_EXTENDED_CAPABILITY_RCRB_HEADER_VER1 0x1
 207
 208 typedef struct {
 209   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 210   UINT16                                    VendorId;
 211   UINT16                                    DeviceId;
 212   UINT32                                    RcrbCapabilities;
 213   UINT32                                    RcrbControl;
 214   UINT32                                    Reserved;
 215 } PCI_EXPRESS_EXTENDED_CAPABILITIES_RCRB_HEADER;
 216
 217 #define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_ID   0x0012
 218 #define PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_VER1 0x1
 219
 220 typedef struct {
 221   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER  Header;
 222   UINT16                                    MultiCastCapability;
 223   UINT16                                    MulticastControl;
 224   UINT64                                    McBaseAddress;
 225   UINT64                                    McReceiveAddress;
 226   UINT64                                    McBlockAll;
 227   UINT64                                    McBlockUntranslated;
 228   UINT64                                    McOverlayBar;
 229 } PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST;
 230
 231 #define PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_ID    0x0015
 232 #define PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_VER1  0x1
 233
 234 typedef struct {
 235   UINT32                                                 ResizableBarCapability;
 236   UINT16                                                 ResizableBarControl;
 237   UINT16                                                 Reserved;
 238 } PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY;
 239
 240 typedef struct {
 241   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER               Header;
 242   PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY  Capability[1];
 243 } PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR;
 244
 245 #define GET_NUMBER_RESIZABLE_BARS(x) (((x->Capability[0].ResizableBarControl) & 0xE0) >> 5)
 246
 247 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ARI_CAPABILITY_ID    0x000E
 248 #define PCI_EXPRESS_EXTENDED_CAPABILITY_ARI_CAPABILITY_VER1  0x1
 249
 250 typedef struct {
 251   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER                Header;
 252   UINT16                                                  AriCapability;
 253   UINT16                                                  AriControl;
 254 } PCI_EXPRESS_EXTENDED_CAPABILITIES_ARI_CAPABILITY;
 255
 256 #define PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_ID    0x0016
 257 #define PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_VER1  0x1
 258
 259 typedef struct {
 260   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER                Header;
 261   UINT32                                                  DpaCapability;
 262   UINT32                                                  DpaLatencyIndicator;
 263   UINT16                                                  DpaStatus;
 264   UINT16                                                  DpaControl;
 265   UINT8                                                   DpaPowerAllocationArray[1];
 266 } PCI_EXPRESS_EXTENDED_CAPABILITIES_DYNAMIC_POWER_ALLOCATION;
 267
 268 #define PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_GET_SUBSTATE_MAX(POWER) (UINT16)(((POWER->DpaCapability)&0x0000000F))
 269
 270
 271 #define PCI_EXPRESS_EXTENDED_CAPABILITY_LATENCE_TOLERANCE_REPORTING_ID    0x0018
 272 #define PCI_EXPRESS_EXTENDED_CAPABILITY_LATENCE_TOLERANCE_REPORTING_VER1  0x1
 273
 274 typedef struct {
 275   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER                Header;
 276   UINT16                                                  MaxSnoopLatency;
 277   UINT16                                                  MaxNoSnoopLatency;
 278 } PCI_EXPRESS_EXTENDED_CAPABILITIES_LATENCE_TOLERANCE_REPORTING;
 279
 280 #define PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_ID    0x0017
 281 #define PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_VER1  0x1
 282
 283 typedef struct {
 284   PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER                Header;
 285   UINT32                                                  TphRequesterCapability;
 286   UINT32                                                  TphRequesterControl;
 287   UINT16                                                  TphStTable[1];
 288 } PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH;
 289
 290 #define GET_TPH_TABLE_SIZE(x) ((x->TphRequesterCapability & 0x7FF0000)>>16) * sizeof(UINT16)
 291
 292 #endif