1 #------------------------------------------------------------------------------
3 #* Copyright (c) 2009 - 2010, Intel Corporation. All rights reserved.<BR>
4 #* This program and the accompanying materials
5 #* are licensed and made available under the terms and conditions of the BSD License
6 #* which accompanies this distribution. The full text of the license may be found at
7 #* http://opensource.org/licenses/bsd-license.php
9 #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #------------------------------------------------------------------------------
16 # Float control word initial value:
17 # all exceptions masked, double-precision, round-to-nearest
19 ASM_PFX(mFpuControlWord): .word 0x027F
21 # Multimedia-extensions control word:
22 # all exceptions masked, round-to-nearest, flush to zero for masked underflow
24 ASM_PFX(mMmxControlWord): .long 0x01F80
27 # Initializes floating point units for requirement of UEFI specification.
29 # This function initializes floating-point control word to 0x027F (all exceptions
30 # masked,double-precision, round-to-nearest) and multimedia-extensions control word
31 # (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
32 # for masked underflow).
34 ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits)
35 ASM_PFX(InitializeFloatingPointUnits):
40 # Initialize floating point units
43 fldcw ASM_PFX(mFpuControlWord)
46 # Use CpuId instructuion (CPUID.01H:EDX.SSE[bit 25] = 1) to test
47 # whether the processor supports SSE instruction.
55 # Set OSFXSR bit 9 in CR4
62 # The processor should support SSE instruction and we can use
65 ldmxcsr ASM_PFX(mMmxControlWord)