NASM has replaced ASM and S files.
1. Remove ASM from all modules.
2. Remove S files from the drivers only.
3. https://bugzilla.tianocore.org/show_bug.cgi?id=881
After NASM is updated, S files can be removed from Library.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; AsmFuncs.asm\r
-;\r
-; Abstract:\r
-;\r
-; Debug interrupt handle functions.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-#include "DebugException.h"\r
-\r
-.686p\r
-.xmm\r
-.model flat,c\r
-\r
-;\r
-; InterruptProcess()\r
-;\r
-InterruptProcess PROTO C\r
-\r
-public Exception0Handle, TimerInterruptHandle, ExceptionStubHeaderSize\r
-\r
-AGENT_HANDLER_SIGNATURE MACRO\r
- db 41h, 47h, 54h, 48h ; SIGNATURE_32('A','G','T','H')\r
-ENDM\r
-\r
-.data\r
-\r
-ExceptionStubHeaderSize DD Exception1Handle - Exception0Handle\r
-CommonEntryAddr DD CommonEntry\r
-\r
-.code\r
-\r
-AGENT_HANDLER_SIGNATURE\r
-Exception0Handle:\r
- cli\r
- push eax\r
- mov eax, 0\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception1Handle:\r
- cli\r
- push eax\r
- mov eax, 1\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception2Handle:\r
- cli\r
- push eax\r
- mov eax, 2\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception3Handle:\r
- cli\r
- push eax\r
- mov eax, 3\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception4Handle:\r
- cli\r
- push eax\r
- mov eax, 4\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception5Handle:\r
- cli\r
- push eax\r
- mov eax, 5\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception6Handle:\r
- cli\r
- push eax\r
- mov eax, 6\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception7Handle:\r
- cli\r
- push eax\r
- mov eax, 7\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception8Handle:\r
- cli\r
- push eax\r
- mov eax, 8\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception9Handle:\r
- cli\r
- push eax\r
- mov eax, 9\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception10Handle:\r
- cli\r
- push eax\r
- mov eax, 10\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception11Handle:\r
- cli\r
- push eax\r
- mov eax, 11\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception12Handle:\r
- cli\r
- push eax\r
- mov eax, 12\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception13Handle:\r
- cli\r
- push eax\r
- mov eax, 13\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception14Handle:\r
- cli\r
- push eax\r
- mov eax, 14\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception15Handle:\r
- cli\r
- push eax\r
- mov eax, 15\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception16Handle:\r
- cli\r
- push eax\r
- mov eax, 16\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception17Handle:\r
- cli\r
- push eax\r
- mov eax, 17\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception18Handle:\r
- cli\r
- push eax\r
- mov eax, 18\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception19Handle:\r
- cli\r
- push eax\r
- mov eax, 19\r
- jmp dword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-TimerInterruptHandle:\r
- cli\r
- push eax\r
- mov eax, 32\r
- jmp dword ptr [CommonEntryAddr]\r
-\r
-CommonEntry:\r
-;\r
-; +---------------------+\r
-; + EFlags +\r
-; +---------------------+\r
-; + CS +\r
-; +---------------------+\r
-; + EIP +\r
-; +---------------------+\r
-; + Error Code +\r
-; +---------------------+\r
-; + EAX / Vector Number +\r
-; +---------------------+\r
-; + EBP +\r
-; +---------------------+ <-- EBP\r
-;\r
- cmp eax, DEBUG_EXCEPT_DOUBLE_FAULT\r
- je NoExtrPush\r
- cmp eax, DEBUG_EXCEPT_INVALID_TSS\r
- je NoExtrPush\r
- cmp eax, DEBUG_EXCEPT_SEG_NOT_PRESENT\r
- je NoExtrPush\r
- cmp eax, DEBUG_EXCEPT_STACK_FAULT\r
- je NoExtrPush\r
- cmp eax, DEBUG_EXCEPT_GP_FAULT\r
- je NoExtrPush\r
- cmp eax, DEBUG_EXCEPT_PAGE_FAULT\r
- je NoExtrPush\r
- cmp eax, DEBUG_EXCEPT_ALIGNMENT_CHECK\r
- je NoExtrPush\r
-\r
- push [esp]\r
- mov dword ptr [esp + 4], 0\r
-\r
-NoExtrPush:\r
-\r
- push ebp\r
- mov ebp, esp ; save esp in ebp\r
- ;\r
- ; Make stack 16-byte alignment to make sure save fxrstor later\r
- ;\r
- and esp, 0fffffff0h\r
- sub esp, 12\r
-\r
- ; store UINT32 Edi, Esi, Ebp, Ebx, Edx, Ecx, Eax;\r
- push dword ptr [ebp + 4] ; original eax\r
- push ebx\r
- push ecx\r
- push edx\r
- mov ebx, eax ; save vector in ebx\r
- mov eax, ebp\r
- add eax, 4 * 6\r
- push eax ; original ESP\r
- push dword ptr [ebp] ; EBP\r
- push esi\r
- push edi\r
-\r
- ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
- ;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
- ;; ... while we're at it, make sure DE is also enabled...\r
- mov eax, 1\r
- push ebx ; temporarily save value of ebx on stack \r
- cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and\r
- ; DE are supported\r
- pop ebx ; retore value of ebx that was overwritten by CPUID \r
- mov eax, cr4\r
- push eax ; push cr4 firstly\r
- test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r
- jz @F\r
- or eax, BIT9 ; Set CR4.OSFXSR\r
-@@: \r
- test edx, BIT2 ; Test for Debugging Extensions support\r
- jz @F\r
- or eax, BIT3 ; Set CR4.DE\r
-@@: \r
- mov cr4, eax\r
- mov eax, cr3\r
- push eax\r
- mov eax, cr2\r
- push eax\r
- push 0 ; cr0 will not saved???\r
- mov eax, cr0\r
- push eax\r
-\r
- xor ecx, ecx\r
- mov ecx, Ss\r
- push ecx\r
- mov ecx, Cs\r
- push ecx\r
- mov ecx, Ds\r
- push ecx\r
- mov ecx, Es\r
- push ecx\r
- mov ecx, Fs\r
- push ecx\r
- mov ecx, Gs\r
- push ecx\r
-\r
- ;; EIP\r
- mov ecx, [ebp + 4 * 3] ; EIP\r
- push ecx\r
-\r
- ;; UINT32 Gdtr[2], Idtr[2];\r
- sub esp, 8\r
- sidt fword ptr [esp]\r
- sub esp, 8\r
- sgdt fword ptr [esp]\r
-\r
- ;; UINT32 Ldtr, Tr;\r
- xor eax, eax\r
- str ax\r
- push eax\r
- sldt ax\r
- push eax\r
-\r
- ;; EFlags\r
- mov ecx, [ebp + 4 * 5]\r
- push ecx\r
-\r
- ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- mov eax, dr7\r
- push eax\r
-\r
- ;; clear Dr7 while executing debugger itself\r
- xor eax, eax\r
- mov dr7, eax\r
-\r
- ;; Dr6\r
- mov eax, dr6\r
- push eax\r
-\r
- ;; insure all status bits in dr6 are clear...\r
- xor eax, eax\r
- mov dr6, eax\r
-\r
- mov eax, dr3\r
- push eax\r
- mov eax, dr2\r
- push eax\r
- mov eax, dr1\r
- push eax\r
- mov eax, dr0\r
- push eax\r
-\r
- ;; Clear Direction Flag\r
- cld\r
-\r
- ;; FX_SAVE_STATE_IA32 FxSaveState;\r
- sub esp, 512\r
- mov edi, esp\r
- ;; Clear the buffer\r
- xor eax, eax\r
- mov ecx, 128 ;= 512 / 4\r
- rep stosd\r
- mov edi, esp\r
-\r
- test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.\r
- ; edx still contains result from CPUID above\r
- jz @F\r
- db 0fh, 0aeh, 00000111y ;fxsave [edi]\r
-@@: \r
-\r
- ;; save the exception data\r
- push dword ptr [ebp + 8]\r
-\r
- ; call the C interrupt process function\r
- push esp ; Structure\r
- push ebx ; vector\r
- call InterruptProcess\r
- add esp, 8\r
-\r
- ; skip the exception data\r
- add esp, 4\r
-\r
- ;; FX_SAVE_STATE_IA32 FxSaveState;\r
- mov esi, esp\r
- mov eax, 1\r
- cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported\r
- test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r
- jz @F\r
- db 0fh, 0aeh, 00001110y ; fxrstor [esi]\r
-@@: \r
- add esp, 512\r
-\r
- ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- pop eax\r
- mov dr0, eax\r
- pop eax\r
- mov dr1, eax\r
- pop eax\r
- mov dr2, eax\r
- pop eax\r
- mov dr3, eax\r
- ;; skip restore of dr6. We cleared dr6 during the context save.\r
- add esp, 4\r
- pop eax\r
- mov dr7, eax\r
-\r
- ;; set EFlags\r
- pop dword ptr [ebp + 4 * 5] ; set EFLAGS in stack\r
-\r
- ;; UINT32 Ldtr, Tr;\r
- ;; UINT32 Gdtr[2], Idtr[2];\r
- ;; Best not let anyone mess with these particular registers...\r
- add esp, 24\r
-\r
- ;; UINT32 Eip;\r
- pop dword ptr [ebp + 4 * 3] ; set EIP in stack\r
-\r
- ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
- ;; NOTE - modified segment registers could hang the debugger... We\r
- ;; could attempt to insulate ourselves against this possibility,\r
- ;; but that poses risks as well.\r
- ;;\r
- pop gs\r
- pop fs\r
- pop es\r
- pop ds\r
- pop dword ptr [ebp + 4 * 4] ; set CS in stack\r
- pop ss\r
-\r
- ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
- pop eax\r
- mov cr0, eax\r
- add esp, 4 ; skip for Cr1\r
- pop eax\r
- mov cr2, eax\r
- pop eax\r
- mov cr3, eax\r
- pop eax\r
- mov cr4, eax\r
-\r
- ;; restore general register\r
- pop edi\r
- pop esi\r
- pop dword ptr [ebp] ; save updated ebp\r
- pop dword ptr [ebp + 4] ; save updated esp\r
- pop edx\r
- pop ecx\r
- pop ebx\r
- pop eax\r
-\r
- mov esp, ebp\r
- pop ebp ; restore ebp maybe updated\r
- pop esp ; restore esp maybe updated\r
- sub esp, 4 * 3 ; restore interupt pushced stack\r
-\r
- iretd\r
-\r
-END\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; AsmFuncs.asm\r
-;\r
-; Abstract:\r
-;\r
-; Debug interrupt handle functions.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-#include "DebugException.h"\r
-\r
-\r
-externdef InterruptProcess:near\r
-\r
-data SEGMENT\r
-\r
-public Exception0Handle, TimerInterruptHandle, ExceptionStubHeaderSize\r
-\r
-AGENT_HANDLER_SIGNATURE MACRO\r
- db 41h, 47h, 54h, 48h ; SIGNATURE_32('A','G','T','H')\r
-ENDM\r
-\r
-ExceptionStubHeaderSize dd Exception1Handle - Exception0Handle ;\r
-CommonEntryAddr dq CommonEntry ;\r
-\r
-.code\r
-\r
-AGENT_HANDLER_SIGNATURE\r
-Exception0Handle:\r
- cli\r
- push rcx\r
- mov rcx, 0\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE \r
-Exception1Handle:\r
- cli\r
- push rcx\r
- mov rcx, 1\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception2Handle:\r
- cli\r
- push rcx\r
- mov rcx, 2\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception3Handle:\r
- cli\r
- push rcx\r
- mov rcx, 3\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception4Handle:\r
- cli\r
- push rcx\r
- mov rcx, 4\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception5Handle:\r
- cli\r
- push rcx\r
- mov rcx, 5\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception6Handle:\r
- cli\r
- push rcx\r
- mov rcx, 6\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception7Handle:\r
- cli\r
- push rcx\r
- mov rcx, 7\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception8Handle:\r
- cli\r
- push rcx\r
- mov rcx, 8\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception9Handle:\r
- cli\r
- push rcx\r
- mov rcx, 9\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception10Handle:\r
- cli\r
- push rcx\r
- mov rcx, 10\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception11Handle:\r
- cli\r
- push rcx\r
- mov rcx, 11\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception12Handle:\r
- cli\r
- push rcx\r
- mov rcx, 12\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception13Handle:\r
- cli\r
- push rcx\r
- mov rcx, 13\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception14Handle:\r
- cli\r
- push rcx\r
- mov rcx, 14\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception15Handle:\r
- cli\r
- push rcx\r
- mov rcx, 15\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception16Handle:\r
- cli\r
- push rcx\r
- mov rcx, 16\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception17Handle:\r
- cli\r
- push rcx\r
- mov rcx, 17\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception18Handle:\r
- cli\r
- push rcx\r
- mov rcx, 18\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-Exception19Handle:\r
- cli\r
- push rcx\r
- mov rcx, 19\r
- jmp qword ptr [CommonEntryAddr]\r
-AGENT_HANDLER_SIGNATURE\r
-TimerInterruptHandle:\r
- cli\r
- push rcx\r
- mov rcx, 32\r
- jmp qword ptr [CommonEntryAddr]\r
-\r
-CommonEntry:\r
- ; We need to determine if any extra data was pushed by the exception\r
- cmp rcx, DEBUG_EXCEPT_DOUBLE_FAULT\r
- je NoExtrPush\r
- cmp rcx, DEBUG_EXCEPT_INVALID_TSS\r
- je NoExtrPush\r
- cmp rcx, DEBUG_EXCEPT_SEG_NOT_PRESENT\r
- je NoExtrPush\r
- cmp rcx, DEBUG_EXCEPT_STACK_FAULT\r
- je NoExtrPush\r
- cmp rcx, DEBUG_EXCEPT_GP_FAULT\r
- je NoExtrPush\r
- cmp rcx, DEBUG_EXCEPT_PAGE_FAULT\r
- je NoExtrPush\r
- cmp rcx, DEBUG_EXCEPT_ALIGNMENT_CHECK\r
- je NoExtrPush\r
-\r
- push [rsp]\r
- mov qword ptr [rsp + 8], 0\r
-\r
-NoExtrPush:\r
- push rbp\r
- mov rbp, rsp\r
-\r
- ; store UINT64 r8, r9, r10, r11, r12, r13, r14, r15;\r
- push r15\r
- push r14\r
- push r13\r
- push r12\r
- push r11\r
- push r10\r
- push r9\r
- push r8\r
-\r
- mov r8, cr8\r
- push r8\r
-\r
- ; store UINT64 Rdi, Rsi, Rbp, Rsp, Rdx, Rcx, Rbx, Rax;\r
- push rax\r
- push rbx\r
- push qword ptr [rbp + 8] ; original rcx\r
- push rdx\r
- push qword ptr [rbp + 6 * 8] ; original rsp\r
- push qword ptr [rbp] ; original rbp\r
- push rsi\r
- push rdi\r
-\r
- ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
- ;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
- ;; ... while we're at it, make sure DE is also enabled...\r
- mov rax, cr4\r
- or rax, 208h\r
- mov cr4, rax\r
- push rax\r
- mov rax, cr3\r
- push rax\r
- mov rax, cr2\r
- push rax\r
- push 0\r
- mov rax, cr0\r
- push rax\r
-\r
- xor rax, rax\r
- mov rax, Ss\r
- push rax\r
- mov rax, Cs\r
- push rax\r
- mov rax, Ds\r
- push rax\r
- mov rax, Es\r
- push rax\r
- mov rax, Fs\r
- push rax\r
- mov rax, Gs\r
- push rax\r
-\r
- ;; EIP\r
- mov rax, [rbp + 8 * 3] ; EIP\r
- push rax\r
-\r
- ;; UINT64 Gdtr[2], Idtr[2];\r
- sub rsp, 16\r
- sidt fword ptr [rsp]\r
- sub rsp, 16\r
- sgdt fword ptr [rsp]\r
-\r
- ;; UINT64 Ldtr, Tr;\r
- xor rax, rax\r
- str ax\r
- push rax\r
- sldt ax\r
- push rax\r
-\r
- ;; EFlags\r
- mov rax, [rbp + 8 * 5]\r
- push rax\r
-\r
- ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- mov rax, dr7\r
- push rax\r
-\r
- ;; clear Dr7 while executing debugger itself\r
- xor rax, rax\r
- mov dr7, rax\r
-\r
- ;; Dr6\r
- mov rax, dr6\r
- push rax\r
-\r
- ;; insure all status bits in dr6 are clear...\r
- xor rax, rax\r
- mov dr6, rax\r
-\r
- mov rax, dr3\r
- push rax\r
- mov rax, dr2\r
- push rax\r
- mov rax, dr1\r
- push rax\r
- mov rax, dr0\r
- push rax\r
-\r
- ;; Clear Direction Flag\r
- cld\r
-\r
- sub rsp, 512\r
- mov rdi, rsp\r
- ;; Clear the buffer\r
- xor rax, rax\r
- push rcx\r
- mov rcx, 64 ;= 512 / 8\r
- rep stosq\r
- pop rcx\r
- mov rdi, rsp\r
- db 0fh, 0aeh, 00000111y ;fxsave [rdi]\r
-\r
- ;; save the exception data\r
- push qword ptr [rbp + 16]\r
-\r
- ; call the C interrupt process function\r
- mov rdx, rsp ; Structure\r
- mov r15, rcx ; save vector in r15\r
- \r
- ;\r
- ; Per X64 calling convention, allocate maximum parameter stack space\r
- ; and make sure RSP is 16-byte aligned\r
- ;\r
- sub rsp, 32 + 8\r
- call InterruptProcess\r
- add rsp, 32 + 8\r
-\r
- ;; skip the exception data\r
- add rsp, 8\r
- \r
- mov rsi, rsp\r
- db 0fh, 0aeh, 00001110y ; fxrstor [rsi]\r
- add rsp, 512\r
-\r
- ;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
- pop rax\r
- mov dr0, rax\r
- pop rax\r
- mov dr1, rax\r
- pop rax\r
- mov dr2, rax\r
- pop rax\r
- mov dr3, rax\r
- ;; skip restore of dr6. We cleared dr6 during the context save.\r
- add rsp, 8\r
- pop rax\r
- mov dr7, rax\r
-\r
- ;; set EFlags\r
- pop qword ptr [rbp + 8 * 5]\r
-\r
- ;; UINT64 Ldtr, Tr;\r
- ;; UINT64 Gdtr[2], Idtr[2];\r
- ;; Best not let anyone mess with these particular registers...\r
- add rsp, 24 * 2\r
-\r
- ;; UINT64 Eip;\r
- pop qword ptr [rbp + 8 * 3] ; set EIP in stack\r
-\r
- ;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
- ;; NOTE - modified segment registers could hang the debugger... We\r
- ;; could attempt to insulate ourselves against this possibility,\r
- ;; but that poses risks as well.\r
- ;;\r
- pop rax\r
- pop rax\r
- pop rax\r
- mov es, rax\r
- pop rax\r
- mov ds, rax\r
- pop qword ptr [rbp + 8 * 4] ; Set CS in stack\r
- pop rax\r
- mov ss, rax\r
-\r
- ;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4;\r
- pop rax\r
- mov cr0, rax\r
- add rsp, 8 ; skip for Cr1\r
- pop rax\r
- mov cr2, rax\r
- pop rax\r
- mov cr3, rax\r
- pop rax\r
- mov cr4, rax\r
-\r
- ;; restore general register\r
- pop rdi\r
- pop rsi\r
- add rsp, 8 ; skip rbp\r
- add rsp, 8 ; skip rsp\r
- pop rdx\r
- pop rcx\r
- pop rbx\r
- pop rax\r
-\r
- pop r8\r
- mov cr8, r8\r
-\r
- ; store UINT64 r8, r9, r10, r11, r12, r13, r14, r15;\r
- pop r8\r
- pop r9\r
- pop r10\r
- pop r11\r
- pop r12\r
- pop r13\r
- pop r14\r
- pop r15\r
-\r
- mov rsp, rbp\r
- pop rbp\r
- add rsp, 16 ; skip rcx and error code\r
-\r
- iretq\r
-\r
-END\r
## @file\r
# Debug Agent library instance for Dxe Core and Dxe modules.\r
#\r
-# Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
\r
[Sources.Ia32]\r
DebugAgentCommon/Ia32/AsmFuncs.S\r
- DebugAgentCommon/Ia32/AsmFuncs.asm\r
DebugAgentCommon/Ia32/AsmFuncs.nasm\r
DebugAgentCommon/Ia32/ArchDebugSupport.h\r
DebugAgentCommon/Ia32/ArchDebugSupport.c\r
\r
[Sources.X64]\r
DebugAgentCommon/X64/AsmFuncs.S\r
- DebugAgentCommon/X64/AsmFuncs.asm\r
DebugAgentCommon/X64/AsmFuncs.nasm\r
DebugAgentCommon/X64/ArchDebugSupport.h\r
DebugAgentCommon/X64/ArchDebugSupport.c\r
## @file\r
# Debug Agent library instance for SEC Core and PEI modules.\r
#\r
-# Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
\r
[Sources.Ia32]\r
DebugAgentCommon/Ia32/AsmFuncs.S\r
- DebugAgentCommon/Ia32/AsmFuncs.asm\r
DebugAgentCommon/Ia32/AsmFuncs.nasm\r
DebugAgentCommon/Ia32/ArchDebugSupport.h\r
DebugAgentCommon/Ia32/ArchDebugSupport.c\r
\r
[Sources.X64]\r
DebugAgentCommon/X64/AsmFuncs.S\r
- DebugAgentCommon/X64/AsmFuncs.asm\r
DebugAgentCommon/X64/AsmFuncs.nasm\r
DebugAgentCommon/X64/ArchDebugSupport.h\r
DebugAgentCommon/X64/ArchDebugSupport.c\r
## @file\r
# Debug Agent library instance for SMM modules.\r
#\r
-# Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
\r
[Sources.Ia32]\r
DebugAgentCommon/Ia32/AsmFuncs.S\r
- DebugAgentCommon/Ia32/AsmFuncs.asm\r
DebugAgentCommon/Ia32/AsmFuncs.nasm\r
DebugAgentCommon/Ia32/ArchDebugSupport.h\r
DebugAgentCommon/Ia32/ArchDebugSupport.c\r
\r
[Sources.X64]\r
DebugAgentCommon/X64/AsmFuncs.S\r
- DebugAgentCommon/X64/AsmFuncs.asm\r
DebugAgentCommon/X64/AsmFuncs.nasm\r
DebugAgentCommon/X64/ArchDebugSupport.h\r
DebugAgentCommon/X64/ArchDebugSupport.c\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; IntHandler.asm\r
-;\r
-; Abstract:\r
-;\r
-; Assembly interrupt handler function.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-\r
-.686p\r
-.model flat,c\r
-\r
-public AsmInterruptHandle\r
-\r
-.code\r
-AsmInterruptHandle:\r
- cli\r
- mov al, 1\r
- iretd\r
-END\r
## @file\r
# PeCoffExtraAction Library to support source level debug.\r
#\r
-# Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
\r
[Sources.IA32]\r
Ia32/IntHandlerFuncs.c\r
- Ia32/IntHandler.asm\r
Ia32/IntHandler.nasm\r
Ia32/IntHandler.S\r
\r
[Sources.X64]\r
X64/IntHandlerFuncs.c\r
- X64/IntHandler.asm\r
X64/IntHandler.nasm\r
X64/IntHandler.S\r
\r
+++ /dev/null
-;------------------------------------------------------------------------------\r
-;\r
-; Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution. The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-;\r
-; Module Name:\r
-;\r
-; IntHandler.asm\r
-;\r
-; Abstract:\r
-;\r
-; Assembly interrupt handler function.\r
-;\r
-;------------------------------------------------------------------------------\r
-\r
-public AsmInterruptHandle\r
-\r
-.code\r
-AsmInterruptHandle:\r
- cli\r
- mov al, 1\r
- iretq\r
-END\r