MdeModulePkg/XhciDxe/Xhci: Don't check for invalid PSIV

PSID matching relies on comparing the PSIV against the PortSpeed
value. This patch stops edk2 from checking for a PSIV of 0, as it
is not valid; this reduces the number of register access by
approximately 6 per second.

Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 15fb49f28fa04adb3978f7a93ccbdd37c9f87172..8dd7a8fbb7baa95d25fea56259e48c4132775202 100644 (file)
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -371,6 +371,7 @@ XhcGetRootHubPortStatus (
   UINT32             TotalPort;\r
   UINTN              Index;\r
   UINTN              MapSize;\r
+  UINT8              PortSpeed;\r
   EFI_STATUS         Status;\r
   USB_DEV_ROUTE      ParentRouteChart;\r
   EFI_TPL            OldTpl;\r
@@ -397,32 +398,37 @@ XhcGetRootHubPortStatus (
 \r
   State = XhcReadOpReg (Xhc, Offset);\r
 \r
+  PortSpeed = (State & XHC_PORTSC_PS) >> 10;\r
+\r
   //\r
   // According to XHCI 1.1 spec November 2017,\r
   // Section 7.2 xHCI Support Protocol Capability\r
   //\r
-  PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & XHC_PORTSC_PS) >> 10));\r
-  if (PortStatus->PortStatus == 0) {\r
-    //\r
-    // According to XHCI 1.1 spec November 2017,\r
-    // bit 10~13 of the root port status register identifies the speed of the attached device.\r
-    //\r
-    switch ((State & XHC_PORTSC_PS) >> 10) {\r
-      case 2:\r
-        PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;\r
-        break;\r
+  if (PortSpeed > 0) {\r
+    PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, PortSpeed);\r
+    // If no match found in ext cap reg, fall back to PORTSC\r
+    if (PortStatus->PortStatus == 0) {\r
+      //\r
+      // According to XHCI 1.1 spec November 2017,\r
+      // bit 10~13 of the root port status register identifies the speed of the attached device.\r
+      //\r
+      switch (PortSpeed) {\r
+        case 2:\r
+          PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;\r
+          break;\r
 \r
-      case 3:\r
-        PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;\r
-        break;\r
+        case 3:\r
+          PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;\r
+          break;\r
 \r
-      case 4:\r
-      case 5:\r
-        PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;\r
-        break;\r
+        case 4:\r
+        case 5:\r
+          PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;\r
+          break;\r
 \r
-      default:\r
-        break;\r
+        default:\r
+          break;\r
+      }\r
     }\r
   }\r
 \r