1. Do not use tab characters
2. No trailing white space in one line
3. All files must end with CRLF
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
48 files changed:
## @file\r
# 8254 timer driver that provides Timer Arch protocol.\r
#\r
## @file\r
# 8254 timer driver that provides Timer Arch protocol.\r
#\r
-# Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials \r
-# are licensed and made available under the terms and conditions of the BSD License \r
-# which accompanies this distribution. The full text of the license may be found at \r
-# http://opensource.org/licenses/bsd-license.php \r
-# \r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
[Packages]\r
MdePkg/MdePkg.dec\r
IntelFrameworkPkg/IntelFrameworkPkg.dec\r
[Packages]\r
MdePkg/MdePkg.dec\r
IntelFrameworkPkg/IntelFrameworkPkg.dec\r
[LibraryClasses]\r
UefiBootServicesTableLib\r
BaseLib\r
[LibraryClasses]\r
UefiBootServicesTableLib\r
BaseLib\r
Timer.c\r
\r
[Protocols]\r
Timer.c\r
\r
[Protocols]\r
- gEfiCpuArchProtocolGuid ## CONSUMES \r
+ gEfiCpuArchProtocolGuid ## CONSUMES\r
gEfiLegacy8259ProtocolGuid ## CONSUMES\r
gEfiTimerArchProtocolGuid ## PRODUCES\r
\r
gEfiLegacy8259ProtocolGuid ## CONSUMES\r
gEfiTimerArchProtocolGuid ## PRODUCES\r
\r
/** @file\r
Timer Architectural Protocol as defined in the DXE CIS\r
\r
/** @file\r
Timer Architectural Protocol as defined in the DXE CIS\r
\r
-Copyright (c) 2005 - 2016, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
EFI_STATUS Status;\r
UINT16 IRQMask;\r
EFI_TPL OriginalTPL;\r
EFI_STATUS Status;\r
UINT16 IRQMask;\r
EFI_TPL OriginalTPL;\r
//\r
// If the timer interrupt is enabled, then the registered handler will be invoked.\r
//\r
//\r
// If the timer interrupt is enabled, then the registered handler will be invoked.\r
//\r
//\r
mTimerNotifyFunction (mTimerPeriod);\r
}\r
//\r
mTimerNotifyFunction (mTimerPeriod);\r
}\r
gBS->RestoreTPL (OriginalTPL);\r
} else {\r
return EFI_UNSUPPORTED;\r
gBS->RestoreTPL (OriginalTPL);\r
} else {\r
return EFI_UNSUPPORTED;\r
/** @file\r
Private data structures\r
\r
/** @file\r
Private data structures\r
\r
-Copyright (c) 2005 - 2016, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
**/\r
\r
#ifndef _TIMER_H_\r
**/\r
\r
#ifndef _TIMER_H_\r
//\r
// 8254 timer driver that provides Timer Arch protocol.\r
//\r
//\r
// 8254 timer driver that provides Timer Arch protocol.\r
//\r
-// Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// /** @file\r
// Timer Localized Strings and Content\r
//\r
// /** @file\r
// Timer Localized Strings and Content\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
-#string STR_PROPERTIES_MODULE_NAME \r
-#language en-US \r
+#string STR_PROPERTIES_MODULE_NAME\r
+#language en-US\r
"8254 Timer DXE Driver"\r
\r
\r
"8254 Timer DXE Driver"\r
\r
\r
/** @file\r
This contains the installation function for the driver.\r
\r
/** @file\r
This contains the installation function for the driver.\r
\r
-Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);\r
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);\r
\r
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);\r
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);\r
gBS->RestoreTPL (OriginalTpl);\r
\r
return EFI_SUCCESS;\r
gBS->RestoreTPL (OriginalTpl);\r
\r
return EFI_SUCCESS;\r
## @file\r
# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.\r
#\r
## @file\r
# 8259 Interrupt Controller driver that provides Legacy 8259 protocol.\r
#\r
-# Copyright (c) 2005 - 2015, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials \r
-# are licensed and made available under the terms and conditions of the BSD License \r
-# which accompanies this distribution. The full text of the license may be found at \r
-# http://opensource.org/licenses/bsd-license.php \r
-# \r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+# Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
MdePkg/MdePkg.dec\r
IntelFrameworkPkg/IntelFrameworkPkg.dec\r
PcAtChipsetPkg/PcAtChipsetPkg.dec\r
MdePkg/MdePkg.dec\r
IntelFrameworkPkg/IntelFrameworkPkg.dec\r
PcAtChipsetPkg/PcAtChipsetPkg.dec\r
[LibraryClasses]\r
UefiBootServicesTableLib\r
DebugLib\r
UefiDriverEntryPoint\r
IoLib\r
PcdLib\r
[LibraryClasses]\r
UefiBootServicesTableLib\r
DebugLib\r
UefiDriverEntryPoint\r
IoLib\r
PcdLib\r
[Protocols]\r
gEfiLegacy8259ProtocolGuid ## PRODUCES\r
gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES\r
[Protocols]\r
gEfiLegacy8259ProtocolGuid ## PRODUCES\r
gEfiPciIoProtocolGuid ## SOMETIMES_CONSUMES\r
[Pcd]\r
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES\r
[Pcd]\r
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel ## CONSUMES\r
//\r
// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.\r
//\r
//\r
// 8259 Interrupt Controller driver that provides Legacy 8259 protocol.\r
//\r
-// Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// /** @file\r
// Legacy8259 Localized Strings and Content\r
//\r
// /** @file\r
// Legacy8259 Localized Strings and Content\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
-#string STR_PROPERTIES_MODULE_NAME \r
-#language en-US \r
+#string STR_PROPERTIES_MODULE_NAME\r
+#language en-US\r
"Legacy 8259 Interrupt Controller DXE Driver"\r
\r
\r
"Legacy 8259 Interrupt Controller DXE Driver"\r
\r
\r
This portion is to register the IDE Controller Driver name:\r
"IDE Controller Init Driver"\r
\r
This portion is to register the IDE Controller Driver name:\r
"IDE Controller Init Driver"\r
\r
- Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
@param DriverName A pointer to the Unicode string to return. This Unicode string\r
is the name of the driver specified by This in the language\r
specified by Language.\r
@param DriverName A pointer to the Unicode string to return. This Unicode string\r
is the name of the driver specified by This in the language\r
specified by Language.\r
@retval EFI_SUCCESS The Unicode string for the Driver specified by This\r
and the language specified by Language was returned\r
in DriverName.\r
@retval EFI_SUCCESS The Unicode string for the Driver specified by This\r
and the language specified by Language was returned\r
in DriverName.\r
\r
/**\r
Retrieves a Unicode string that is the user readable name of the controller\r
\r
/**\r
Retrieves a Unicode string that is the user readable name of the controller\r
- that is being managed by an EFI Driver. \r
+ that is being managed by an EFI Driver.\r
\r
@param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.\r
@param ControllerHandle The handle of a controller that the driver specified by\r
\r
@param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.\r
@param ControllerHandle The handle of a controller that the driver specified by\r
ControllerHandle and ChildHandle in the language\r
specified by Language from the point of view of the\r
driver specified by This.\r
ControllerHandle and ChildHandle in the language\r
specified by Language from the point of view of the\r
driver specified by This.\r
@retval EFI_SUCCESS The Unicode string for the user readable name in the\r
language specified by Language for the driver\r
specified by This was returned in DriverName.\r
@retval EFI_SUCCESS The Unicode string for the user readable name in the\r
language specified by Language for the driver\r
specified by This was returned in DriverName.\r
IDE Bus driver to support platform dependent timing information. This driver\r
is responsible for early initialization of IDE controller.\r
\r
IDE Bus driver to support platform dependent timing information. This driver\r
is responsible for early initialization of IDE controller.\r
\r
- Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
/**\r
Returns the information about the specified IDE channel.\r
//\r
/**\r
Returns the information about the specified IDE channel.\r
This function can be used to obtain information about a particular IDE channel.\r
This function can be used to obtain information about a particular IDE channel.\r
- The driver entity uses this information during the enumeration process. \r
- \r
- If Enabled is set to FALSE, the driver entity will not scan the channel. Note \r
+ The driver entity uses this information during the enumeration process.\r
+\r
+ If Enabled is set to FALSE, the driver entity will not scan the channel. Note\r
that it will not prevent an operating system driver from scanning the channel.\r
that it will not prevent an operating system driver from scanning the channel.\r
- \r
- For most of today's controllers, MaxDevices will either be 1 or 2. For SATA \r
- controllers, this value will always be 1. SATA configurations can contain SATA \r
+\r
+ For most of today's controllers, MaxDevices will either be 1 or 2. For SATA\r
+ controllers, this value will always be 1. SATA configurations can contain SATA\r
port multipliers. SATA port multipliers behave like SATA bridges and can support\r
port multipliers. SATA port multipliers behave like SATA bridges and can support\r
- up to 16 devices on the other side. If a SATA port out of the IDE controller \r
- is connected to a port multiplier, MaxDevices will be set to the number of SATA \r
- devices that the port multiplier supports. Because today's port multipliers \r
- support up to fifteen SATA devices, this number can be as large as fifteen. The IDE \r
- bus driver is required to scan for the presence of port multipliers behind an SATA \r
- controller and enumerate up to MaxDevices number of devices behind the port \r
- multiplier. \r
- \r
- In this context, the devices behind a port multiplier constitute a channel. \r
- \r
+ up to 16 devices on the other side. If a SATA port out of the IDE controller\r
+ is connected to a port multiplier, MaxDevices will be set to the number of SATA\r
+ devices that the port multiplier supports. Because today's port multipliers\r
+ support up to fifteen SATA devices, this number can be as large as fifteen. The IDE\r
+ bus driver is required to scan for the presence of port multipliers behind an SATA\r
+ controller and enumerate up to MaxDevices number of devices behind the port\r
+ multiplier.\r
+\r
+ In this context, the devices behind a port multiplier constitute a channel.\r
+\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
- @param[out] Enabled TRUE if this channel is enabled. Disabled channels \r
+ @param[out] Enabled TRUE if this channel is enabled. Disabled channels\r
are not scanned to see if any devices are present.\r
@param[out] MaxDevices The maximum number of IDE devices that the bus driver\r
are not scanned to see if any devices are present.\r
@param[out] MaxDevices The maximum number of IDE devices that the bus driver\r
- can expect on this channel. For the ATA/ATAPI \r
- specification, version 6, this number will either be \r
- one or two. For Serial ATA (SATA) configurations with a \r
+ can expect on this channel. For the ATA/ATAPI\r
+ specification, version 6, this number will either be\r
+ one or two. For Serial ATA (SATA) configurations with a\r
port multiplier, this number can be as large as fifteen.\r
\r
@retval EFI_SUCCESS Information was returned without any errors.\r
port multiplier, this number can be as large as fifteen.\r
\r
@retval EFI_SUCCESS Information was returned without any errors.\r
/**\r
The notifications from the driver entity that it is about to enter a certain\r
phase of the IDE channel enumeration process.\r
/**\r
The notifications from the driver entity that it is about to enter a certain\r
phase of the IDE channel enumeration process.\r
- \r
- This function can be used to notify the IDE controller driver to perform \r
- specific actions, including any chipset-specific initialization, so that the \r
- chipset is ready to enter the next phase. Seven notification points are defined \r
- at this time. \r
- \r
- More synchronization points may be added as required in the future. \r
+\r
+ This function can be used to notify the IDE controller driver to perform\r
+ specific actions, including any chipset-specific initialization, so that the\r
+ chipset is ready to enter the next phase. Seven notification points are defined\r
+ at this time.\r
+\r
+ More synchronization points may be added as required in the future.\r
\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Phase The phase during enumeration.\r
\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Phase The phase during enumeration.\r
@retval EFI_SUCCESS The notification was accepted without any errors.\r
@retval EFI_UNSUPPORTED Phase is not supported.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
@retval EFI_SUCCESS The notification was accepted without any errors.\r
@retval EFI_UNSUPPORTED Phase is not supported.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
- @retval EFI_NOT_READY This phase cannot be entered at this time; for \r
- example, an attempt was made to enter a Phase \r
- without having entered one or more previous \r
+ @retval EFI_NOT_READY This phase cannot be entered at this time; for\r
+ example, an attempt was made to enter a Phase\r
+ without having entered one or more previous\r
/**\r
Submits the device information to the IDE controller driver.\r
\r
/**\r
Submits the device information to the IDE controller driver.\r
\r
- This function is used by the driver entity to pass detailed information about \r
- a particular device to the IDE controller driver. The driver entity obtains \r
+ This function is used by the driver entity to pass detailed information about\r
+ a particular device to the IDE controller driver. The driver entity obtains\r
this information by issuing an ATA or ATAPI IDENTIFY_DEVICE command. IdentifyData\r
this information by issuing an ATA or ATAPI IDENTIFY_DEVICE command. IdentifyData\r
- is the pointer to the response data buffer. The IdentifyData buffer is owned \r
- by the driver entity, and the IDE controller driver must make a local copy \r
- of the entire buffer or parts of the buffer as needed. The original IdentifyData \r
+ is the pointer to the response data buffer. The IdentifyData buffer is owned\r
+ by the driver entity, and the IDE controller driver must make a local copy\r
+ of the entire buffer or parts of the buffer as needed. The original IdentifyData\r
buffer pointer may not be valid when\r
buffer pointer may not be valid when\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() or\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() is called at a later point.\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() or\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() is called at a later point.\r
- \r
- The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to \r
- compute the optimum mode for the device. These fields are not limited to the \r
- timing information. For example, an implementation of the IDE controller driver \r
- may examine the vendor and type/mode field to match known bad drives. \r
- \r
- The driver entity may submit drive information in any order, as long as it \r
- submits information for all the devices belonging to the enumeration group \r
+\r
+ The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to\r
+ compute the optimum mode for the device. These fields are not limited to the\r
+ timing information. For example, an implementation of the IDE controller driver\r
+ may examine the vendor and type/mode field to match known bad drives.\r
+\r
+ The driver entity may submit drive information in any order, as long as it\r
+ submits information for all the devices belonging to the enumeration group\r
before EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() is called for any device\r
in that enumeration group. If a device is absent, EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
before EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() is called for any device\r
in that enumeration group. If a device is absent, EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
- should be called with IdentifyData set to NULL. The IDE controller driver may \r
- not have any other mechanism to know whether a device is present or not. Therefore, \r
- setting IdentifyData to NULL does not constitute an error condition. \r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a \r
- given (Channel, Device) pair. \r
- \r
+ should be called with IdentifyData set to NULL. The IDE controller driver may\r
+ not have any other mechanism to know whether a device is present or not. Therefore,\r
+ setting IdentifyData to NULL does not constitute an error condition.\r
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a\r
+ given (Channel, Device) pair.\r
+\r
@param[in] This A pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
@param[in] Device Zero-based device number on the Channel.\r
@param[in] This A pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
@param[in] Device Zero-based device number on the Channel.\r
/**\r
Disqualifies specific modes for an IDE device.\r
\r
/**\r
Disqualifies specific modes for an IDE device.\r
\r
- This function allows the driver entity or other drivers (such as platform \r
+ This function allows the driver entity or other drivers (such as platform\r
drivers) to reject certain timing modes and request the IDE controller driver\r
drivers) to reject certain timing modes and request the IDE controller driver\r
- to recalculate modes. This function allows the driver entity and the IDE \r
- controller driver to negotiate the timings on a per-device basis. This function \r
- is useful in the case of drives that lie about their capabilities. An example \r
- is when the IDE device fails to accept the timing modes that are calculated \r
+ to recalculate modes. This function allows the driver entity and the IDE\r
+ controller driver to negotiate the timings on a per-device basis. This function\r
+ is useful in the case of drives that lie about their capabilities. An example\r
+ is when the IDE device fails to accept the timing modes that are calculated\r
by the IDE controller driver based on the response to the Identify Drive command.\r
\r
by the IDE controller driver based on the response to the Identify Drive command.\r
\r
- If the driver entity does not want to limit the ATA timing modes and leave that \r
- decision to the IDE controller driver, it can either not call this function for \r
- the given device or call this function and set the Valid flag to FALSE for all \r
+ If the driver entity does not want to limit the ATA timing modes and leave that\r
+ decision to the IDE controller driver, it can either not call this function for\r
+ the given device or call this function and set the Valid flag to FALSE for all\r
modes that are listed in EFI_ATA_COLLECTIVE_MODE.\r
modes that are listed in EFI_ATA_COLLECTIVE_MODE.\r
- \r
- The driver entity may disqualify modes for a device in any order and any number \r
+\r
+ The driver entity may disqualify modes for a device in any order and any number\r
- \r
- This function can be called multiple times to invalidate multiple modes of the \r
- same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI \r
- specification for more information on PIO modes. \r
- \r
+\r
+ This function can be called multiple times to invalidate multiple modes of the\r
+ same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI\r
+ specification for more information on PIO modes.\r
+\r
For Serial ATA (SATA) controllers, this member function can be used to disqualify\r
a higher transfer rate mode on a given channel. For example, a platform driver\r
For Serial ATA (SATA) controllers, this member function can be used to disqualify\r
a higher transfer rate mode on a given channel. For example, a platform driver\r
- may inform the IDE controller driver to not use second-generation (Gen2) speeds \r
+ may inform the IDE controller driver to not use second-generation (Gen2) speeds\r
for a certain SATA drive.\r
for a certain SATA drive.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel The zero-based channel number.\r
@param[in] Device The zero-based device number on the Channel.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel The zero-based channel number.\r
@param[in] Device The zero-based device number on the Channel.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
@retval EFI_INVALID_PARAMETER Device is invalid.\r
@retval EFI_INVALID_PARAMETER IdentifyData is NULL.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
@retval EFI_INVALID_PARAMETER Device is invalid.\r
@retval EFI_INVALID_PARAMETER IdentifyData is NULL.\r
**/\r
EFI_STATUS\r
EFIAPI\r
**/\r
EFI_STATUS\r
EFIAPI\r
Returns the information about the optimum modes for the specified IDE device.\r
\r
This function is used by the driver entity to obtain the optimum ATA modes for\r
Returns the information about the optimum modes for the specified IDE device.\r
\r
This function is used by the driver entity to obtain the optimum ATA modes for\r
- a specific device. The IDE controller driver takes into account the following \r
+ a specific device. The IDE controller driver takes into account the following\r
while calculating the mode:\r
- The IdentifyData inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
- The BadModes inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()\r
\r
while calculating the mode:\r
- The IdentifyData inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
- The BadModes inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()\r
\r
- The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() \r
- for all the devices that belong to an enumeration group before calling \r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group. \r
- \r
- The IDE controller driver will use controller- and possibly platform-specific \r
- algorithms to arrive at SupportedModes. The IDE controller may base its \r
- decision on user preferences and other considerations as well. This function \r
- may be called multiple times because the driver entity may renegotiate the mode \r
+ The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
+ for all the devices that belong to an enumeration group before calling\r
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group.\r
+\r
+ The IDE controller driver will use controller- and possibly platform-specific\r
+ algorithms to arrive at SupportedModes. The IDE controller may base its\r
+ decision on user preferences and other considerations as well. This function\r
+ may be called multiple times because the driver entity may renegotiate the mode\r
with the IDE controller driver using EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode().\r
with the IDE controller driver using EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode().\r
- \r
- The driver entity may collect timing information for various devices in any \r
+\r
+ The driver entity may collect timing information for various devices in any\r
order. The driver entity is responsible for making sure that all the dependencies\r
order. The driver entity is responsible for making sure that all the dependencies\r
- are satisfied. For example, the SupportedModes information for device A that \r
- was previously returned may become stale after a call to \r
+ are satisfied. For example, the SupportedModes information for device A that\r
+ was previously returned may become stale after a call to\r
EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() for device B.\r
EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() for device B.\r
- \r
- The buffer SupportedModes is allocated by the callee because the caller does \r
- not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE \r
- is defined in a way that allows for future extensibility and can be of variable \r
- length. This memory pool should be deallocated by the caller when it is no \r
- longer necessary. \r
- \r
- The IDE controller driver for a Serial ATA (SATA) controller can use this \r
- member function to force a lower speed (first-generation [Gen1] speeds on a \r
- second-generation [Gen2]-capable hardware). The IDE controller driver can \r
- also allow the driver entity to stay with the speed that has been negotiated \r
+\r
+ The buffer SupportedModes is allocated by the callee because the caller does\r
+ not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE\r
+ is defined in a way that allows for future extensibility and can be of variable\r
+ length. This memory pool should be deallocated by the caller when it is no\r
+ longer necessary.\r
+\r
+ The IDE controller driver for a Serial ATA (SATA) controller can use this\r
+ member function to force a lower speed (first-generation [Gen1] speeds on a\r
+ second-generation [Gen2]-capable hardware). The IDE controller driver can\r
+ also allow the driver entity to stay with the speed that has been negotiated\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel A zero-based channel number.\r
@param[in] Device A zero-based device number on the Channel.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel A zero-based channel number.\r
@param[in] Device A zero-based device number on the Channel.\r
\r
@retval EFI_SUCCESS SupportedModes was returned.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
\r
@retval EFI_SUCCESS SupportedModes was returned.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
- @retval EFI_INVALID_PARAMETER Device is invalid. \r
+ @retval EFI_INVALID_PARAMETER Device is invalid.\r
@retval EFI_INVALID_PARAMETER SupportedModes is NULL.\r
@retval EFI_INVALID_PARAMETER SupportedModes is NULL.\r
- @retval EFI_NOT_READY Modes cannot be calculated due to a lack of \r
- data. This error may happen if \r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() \r
- and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData() \r
- were not called for at least one drive in the \r
+ @retval EFI_NOT_READY Modes cannot be calculated due to a lack of\r
+ data. This error may happen if\r
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
+ and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData()\r
+ were not called for at least one drive in the\r
same enumeration group.\r
\r
**/\r
same enumeration group.\r
\r
**/\r
Commands the IDE controller driver to program the IDE controller hardware\r
so that the specified device can operate at the specified mode.\r
\r
Commands the IDE controller driver to program the IDE controller hardware\r
so that the specified device can operate at the specified mode.\r
\r
- This function is used by the driver entity to instruct the IDE controller \r
- driver to program the IDE controller hardware to the specified modes. This \r
- function can be called only once for a particular device. For a Serial ATA \r
+ This function is used by the driver entity to instruct the IDE controller\r
+ driver to program the IDE controller hardware to the specified modes. This\r
+ function can be called only once for a particular device. For a Serial ATA\r
(SATA) Advanced Host Controller Interface (AHCI) controller, no controller-\r
specific programming may be required.\r
\r
(SATA) Advanced Host Controller Interface (AHCI) controller, no controller-\r
specific programming may be required.\r
\r
/** @file\r
Header file for IDE controller driver.\r
\r
/** @file\r
Header file for IDE controller driver.\r
\r
- Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
/**\r
Returns the information about the specified IDE channel.\r
//\r
/**\r
Returns the information about the specified IDE channel.\r
This function can be used to obtain information about a particular IDE channel.\r
This function can be used to obtain information about a particular IDE channel.\r
- The driver entity uses this information during the enumeration process. \r
- \r
- If Enabled is set to FALSE, the driver entity will not scan the channel. Note \r
+ The driver entity uses this information during the enumeration process.\r
+\r
+ If Enabled is set to FALSE, the driver entity will not scan the channel. Note\r
that it will not prevent an operating system driver from scanning the channel.\r
that it will not prevent an operating system driver from scanning the channel.\r
- \r
- For most of today's controllers, MaxDevices will either be 1 or 2. For SATA \r
- controllers, this value will always be 1. SATA configurations can contain SATA \r
+\r
+ For most of today's controllers, MaxDevices will either be 1 or 2. For SATA\r
+ controllers, this value will always be 1. SATA configurations can contain SATA\r
port multipliers. SATA port multipliers behave like SATA bridges and can support\r
port multipliers. SATA port multipliers behave like SATA bridges and can support\r
- up to 16 devices on the other side. If a SATA port out of the IDE controller \r
- is connected to a port multiplier, MaxDevices will be set to the number of SATA \r
- devices that the port multiplier supports. Because today's port multipliers \r
- support up to fifteen SATA devices, this number can be as large as fifteen. The IDE \r
- bus driver is required to scan for the presence of port multipliers behind an SATA \r
- controller and enumerate up to MaxDevices number of devices behind the port \r
- multiplier. \r
- \r
- In this context, the devices behind a port multiplier constitute a channel. \r
- \r
+ up to 16 devices on the other side. If a SATA port out of the IDE controller\r
+ is connected to a port multiplier, MaxDevices will be set to the number of SATA\r
+ devices that the port multiplier supports. Because today's port multipliers\r
+ support up to fifteen SATA devices, this number can be as large as fifteen. The IDE\r
+ bus driver is required to scan for the presence of port multipliers behind an SATA\r
+ controller and enumerate up to MaxDevices number of devices behind the port\r
+ multiplier.\r
+\r
+ In this context, the devices behind a port multiplier constitute a channel.\r
+\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
- @param[out] Enabled TRUE if this channel is enabled. Disabled channels \r
+ @param[out] Enabled TRUE if this channel is enabled. Disabled channels\r
are not scanned to see if any devices are present.\r
@param[out] MaxDevices The maximum number of IDE devices that the bus driver\r
are not scanned to see if any devices are present.\r
@param[out] MaxDevices The maximum number of IDE devices that the bus driver\r
- can expect on this channel. For the ATA/ATAPI \r
- specification, version 6, this number will either be \r
- one or two. For Serial ATA (SATA) configurations with a \r
+ can expect on this channel. For the ATA/ATAPI\r
+ specification, version 6, this number will either be\r
+ one or two. For Serial ATA (SATA) configurations with a\r
port multiplier, this number can be as large as fifteen.\r
\r
@retval EFI_SUCCESS Information was returned without any errors.\r
port multiplier, this number can be as large as fifteen.\r
\r
@retval EFI_SUCCESS Information was returned without any errors.\r
/**\r
The notifications from the driver entity that it is about to enter a certain\r
phase of the IDE channel enumeration process.\r
/**\r
The notifications from the driver entity that it is about to enter a certain\r
phase of the IDE channel enumeration process.\r
- \r
- This function can be used to notify the IDE controller driver to perform \r
- specific actions, including any chipset-specific initialization, so that the \r
- chipset is ready to enter the next phase. Seven notification points are defined \r
- at this time. \r
- \r
- More synchronization points may be added as required in the future. \r
+\r
+ This function can be used to notify the IDE controller driver to perform\r
+ specific actions, including any chipset-specific initialization, so that the\r
+ chipset is ready to enter the next phase. Seven notification points are defined\r
+ at this time.\r
+\r
+ More synchronization points may be added as required in the future.\r
\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Phase The phase during enumeration.\r
\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Phase The phase during enumeration.\r
@retval EFI_SUCCESS The notification was accepted without any errors.\r
@retval EFI_UNSUPPORTED Phase is not supported.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
@retval EFI_SUCCESS The notification was accepted without any errors.\r
@retval EFI_UNSUPPORTED Phase is not supported.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
- @retval EFI_NOT_READY This phase cannot be entered at this time; for \r
- example, an attempt was made to enter a Phase \r
- without having entered one or more previous \r
+ @retval EFI_NOT_READY This phase cannot be entered at this time; for\r
+ example, an attempt was made to enter a Phase\r
+ without having entered one or more previous\r
/**\r
Submits the device information to the IDE controller driver.\r
\r
/**\r
Submits the device information to the IDE controller driver.\r
\r
- This function is used by the driver entity to pass detailed information about \r
- a particular device to the IDE controller driver. The driver entity obtains \r
+ This function is used by the driver entity to pass detailed information about\r
+ a particular device to the IDE controller driver. The driver entity obtains\r
this information by issuing an ATA or ATAPI IDENTIFY_DEVICE command. IdentifyData\r
this information by issuing an ATA or ATAPI IDENTIFY_DEVICE command. IdentifyData\r
- is the pointer to the response data buffer. The IdentifyData buffer is owned \r
- by the driver entity, and the IDE controller driver must make a local copy \r
- of the entire buffer or parts of the buffer as needed. The original IdentifyData \r
+ is the pointer to the response data buffer. The IdentifyData buffer is owned\r
+ by the driver entity, and the IDE controller driver must make a local copy\r
+ of the entire buffer or parts of the buffer as needed. The original IdentifyData\r
buffer pointer may not be valid when\r
buffer pointer may not be valid when\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() or\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() is called at a later point.\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() or\r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() is called at a later point.\r
- \r
- The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to \r
- compute the optimum mode for the device. These fields are not limited to the \r
- timing information. For example, an implementation of the IDE controller driver \r
- may examine the vendor and type/mode field to match known bad drives. \r
- \r
- The driver entity may submit drive information in any order, as long as it \r
- submits information for all the devices belonging to the enumeration group \r
+\r
+ The IDE controller driver may consult various fields of EFI_IDENTIFY_DATA to\r
+ compute the optimum mode for the device. These fields are not limited to the\r
+ timing information. For example, an implementation of the IDE controller driver\r
+ may examine the vendor and type/mode field to match known bad drives.\r
+\r
+ The driver entity may submit drive information in any order, as long as it\r
+ submits information for all the devices belonging to the enumeration group\r
before EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() is called for any device\r
in that enumeration group. If a device is absent, EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
before EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() is called for any device\r
in that enumeration group. If a device is absent, EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
- should be called with IdentifyData set to NULL. The IDE controller driver may \r
- not have any other mechanism to know whether a device is present or not. Therefore, \r
- setting IdentifyData to NULL does not constitute an error condition. \r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a \r
- given (Channel, Device) pair. \r
- \r
+ should be called with IdentifyData set to NULL. The IDE controller driver may\r
+ not have any other mechanism to know whether a device is present or not. Therefore,\r
+ setting IdentifyData to NULL does not constitute an error condition.\r
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() can be called only once for a\r
+ given (Channel, Device) pair.\r
+\r
@param[in] This A pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
@param[in] Device Zero-based device number on the Channel.\r
@param[in] This A pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel Zero-based channel number.\r
@param[in] Device Zero-based device number on the Channel.\r
/**\r
Disqualifies specific modes for an IDE device.\r
\r
/**\r
Disqualifies specific modes for an IDE device.\r
\r
- This function allows the driver entity or other drivers (such as platform \r
+ This function allows the driver entity or other drivers (such as platform\r
drivers) to reject certain timing modes and request the IDE controller driver\r
drivers) to reject certain timing modes and request the IDE controller driver\r
- to recalculate modes. This function allows the driver entity and the IDE \r
- controller driver to negotiate the timings on a per-device basis. This function \r
- is useful in the case of drives that lie about their capabilities. An example \r
- is when the IDE device fails to accept the timing modes that are calculated \r
+ to recalculate modes. This function allows the driver entity and the IDE\r
+ controller driver to negotiate the timings on a per-device basis. This function\r
+ is useful in the case of drives that lie about their capabilities. An example\r
+ is when the IDE device fails to accept the timing modes that are calculated\r
by the IDE controller driver based on the response to the Identify Drive command.\r
\r
by the IDE controller driver based on the response to the Identify Drive command.\r
\r
- If the driver entity does not want to limit the ATA timing modes and leave that \r
- decision to the IDE controller driver, it can either not call this function for \r
- the given device or call this function and set the Valid flag to FALSE for all \r
+ If the driver entity does not want to limit the ATA timing modes and leave that\r
+ decision to the IDE controller driver, it can either not call this function for\r
+ the given device or call this function and set the Valid flag to FALSE for all\r
modes that are listed in EFI_ATA_COLLECTIVE_MODE.\r
modes that are listed in EFI_ATA_COLLECTIVE_MODE.\r
- \r
- The driver entity may disqualify modes for a device in any order and any number \r
+\r
+ The driver entity may disqualify modes for a device in any order and any number\r
- \r
- This function can be called multiple times to invalidate multiple modes of the \r
- same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI \r
- specification for more information on PIO modes. \r
- \r
+\r
+ This function can be called multiple times to invalidate multiple modes of the\r
+ same type (e.g., Programmed Input/Output [PIO] modes 3 and 4). See the ATA/ATAPI\r
+ specification for more information on PIO modes.\r
+\r
For Serial ATA (SATA) controllers, this member function can be used to disqualify\r
a higher transfer rate mode on a given channel. For example, a platform driver\r
For Serial ATA (SATA) controllers, this member function can be used to disqualify\r
a higher transfer rate mode on a given channel. For example, a platform driver\r
- may inform the IDE controller driver to not use second-generation (Gen2) speeds \r
+ may inform the IDE controller driver to not use second-generation (Gen2) speeds\r
for a certain SATA drive.\r
for a certain SATA drive.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel The zero-based channel number.\r
@param[in] Device The zero-based device number on the Channel.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel The zero-based channel number.\r
@param[in] Device The zero-based device number on the Channel.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
@retval EFI_INVALID_PARAMETER Device is invalid.\r
@retval EFI_INVALID_PARAMETER IdentifyData is NULL.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
@retval EFI_INVALID_PARAMETER Device is invalid.\r
@retval EFI_INVALID_PARAMETER IdentifyData is NULL.\r
**/\r
EFI_STATUS\r
EFIAPI\r
**/\r
EFI_STATUS\r
EFIAPI\r
Returns the information about the optimum modes for the specified IDE device.\r
\r
This function is used by the driver entity to obtain the optimum ATA modes for\r
Returns the information about the optimum modes for the specified IDE device.\r
\r
This function is used by the driver entity to obtain the optimum ATA modes for\r
- a specific device. The IDE controller driver takes into account the following \r
+ a specific device. The IDE controller driver takes into account the following\r
while calculating the mode:\r
- The IdentifyData inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
- The BadModes inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()\r
\r
while calculating the mode:\r
- The IdentifyData inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
- The BadModes inputs to EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode()\r
\r
- The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() \r
- for all the devices that belong to an enumeration group before calling \r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group. \r
- \r
- The IDE controller driver will use controller- and possibly platform-specific \r
- algorithms to arrive at SupportedModes. The IDE controller may base its \r
- decision on user preferences and other considerations as well. This function \r
- may be called multiple times because the driver entity may renegotiate the mode \r
+ The driver entity is required to call EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
+ for all the devices that belong to an enumeration group before calling\r
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL.CalculateMode() for any device in the same group.\r
+\r
+ The IDE controller driver will use controller- and possibly platform-specific\r
+ algorithms to arrive at SupportedModes. The IDE controller may base its\r
+ decision on user preferences and other considerations as well. This function\r
+ may be called multiple times because the driver entity may renegotiate the mode\r
with the IDE controller driver using EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode().\r
with the IDE controller driver using EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode().\r
- \r
- The driver entity may collect timing information for various devices in any \r
+\r
+ The driver entity may collect timing information for various devices in any\r
order. The driver entity is responsible for making sure that all the dependencies\r
order. The driver entity is responsible for making sure that all the dependencies\r
- are satisfied. For example, the SupportedModes information for device A that \r
- was previously returned may become stale after a call to \r
+ are satisfied. For example, the SupportedModes information for device A that\r
+ was previously returned may become stale after a call to\r
EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() for device B.\r
EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyMode() for device B.\r
- \r
- The buffer SupportedModes is allocated by the callee because the caller does \r
- not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE \r
- is defined in a way that allows for future extensibility and can be of variable \r
- length. This memory pool should be deallocated by the caller when it is no \r
- longer necessary. \r
- \r
- The IDE controller driver for a Serial ATA (SATA) controller can use this \r
- member function to force a lower speed (first-generation [Gen1] speeds on a \r
- second-generation [Gen2]-capable hardware). The IDE controller driver can \r
- also allow the driver entity to stay with the speed that has been negotiated \r
+\r
+ The buffer SupportedModes is allocated by the callee because the caller does\r
+ not necessarily know the size of the buffer. The type EFI_ATA_COLLECTIVE_MODE\r
+ is defined in a way that allows for future extensibility and can be of variable\r
+ length. This memory pool should be deallocated by the caller when it is no\r
+ longer necessary.\r
+\r
+ The IDE controller driver for a Serial ATA (SATA) controller can use this\r
+ member function to force a lower speed (first-generation [Gen1] speeds on a\r
+ second-generation [Gen2]-capable hardware). The IDE controller driver can\r
+ also allow the driver entity to stay with the speed that has been negotiated\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel A zero-based channel number.\r
@param[in] Device A zero-based device number on the Channel.\r
@param[in] This The pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.\r
@param[in] Channel A zero-based channel number.\r
@param[in] Device A zero-based device number on the Channel.\r
\r
@retval EFI_SUCCESS SupportedModes was returned.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
\r
@retval EFI_SUCCESS SupportedModes was returned.\r
@retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).\r
- @retval EFI_INVALID_PARAMETER Device is invalid. \r
+ @retval EFI_INVALID_PARAMETER Device is invalid.\r
@retval EFI_INVALID_PARAMETER SupportedModes is NULL.\r
@retval EFI_INVALID_PARAMETER SupportedModes is NULL.\r
- @retval EFI_NOT_READY Modes cannot be calculated due to a lack of \r
- data. This error may happen if \r
- EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData() \r
- and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData() \r
- were not called for at least one drive in the \r
+ @retval EFI_NOT_READY Modes cannot be calculated due to a lack of\r
+ data. This error may happen if\r
+ EFI_IDE_CONTROLLER_INIT_PROTOCOL.SubmitData()\r
+ and EFI_IDE_CONTROLLER_INIT_PROTOCOL.DisqualifyData()\r
+ were not called for at least one drive in the\r
same enumeration group.\r
\r
**/\r
same enumeration group.\r
\r
**/\r
Commands the IDE controller driver to program the IDE controller hardware\r
so that the specified device can operate at the specified mode.\r
\r
Commands the IDE controller driver to program the IDE controller hardware\r
so that the specified device can operate at the specified mode.\r
\r
- This function is used by the driver entity to instruct the IDE controller \r
- driver to program the IDE controller hardware to the specified modes. This \r
- function can be called only once for a particular device. For a Serial ATA \r
+ This function is used by the driver entity to instruct the IDE controller\r
+ driver to program the IDE controller hardware to the specified modes. This\r
+ function can be called only once for a particular device. For a Serial ATA\r
(SATA) Advanced Host Controller Interface (AHCI) controller, no controller-\r
specific programming may be required.\r
\r
(SATA) Advanced Host Controller Interface (AHCI) controller, no controller-\r
specific programming may be required.\r
\r
//\r
// Component description file for the IDE Controller Init module.\r
//\r
//\r
// Component description file for the IDE Controller Init module.\r
//\r
-// Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// /** @file\r
// IdeController Localized Strings and Content\r
//\r
// /** @file\r
// IdeController Localized Strings and Content\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
-#string STR_PROPERTIES_MODULE_NAME \r
-#language en-US \r
+#string STR_PROPERTIES_MODULE_NAME\r
+#language en-US\r
"IDE Controller DXE Driver"\r
\r
\r
"IDE Controller DXE Driver"\r
\r
\r
/** @file\r
Timer Architectural Protocol module using High Precesion Event Timer (HPET)\r
\r
/** @file\r
Timer Architectural Protocol module using High Precesion Event Timer (HPET)\r
\r
- Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
is returned.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
is returned.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
- @param NotifyFunction The function to call when a timer interrupt fires. \r
- This function executes at TPL_HIGH_LEVEL. The DXE \r
- Core will register a handler for the timer interrupt, \r
- so it can know how much time has passed. This \r
- information is used to signal timer based events. \r
+ @param NotifyFunction The function to call when a timer interrupt fires.\r
+ This function executes at TPL_HIGH_LEVEL. The DXE\r
+ Core will register a handler for the timer interrupt,\r
+ so it can know how much time has passed. This\r
+ information is used to signal timer based events.\r
NULL will unregister the handler.\r
\r
@retval EFI_SUCCESS The timer handler was registered.\r
NULL will unregister the handler.\r
\r
@retval EFI_SUCCESS The timer handler was registered.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
@param TimerPeriod The rate to program the timer interrupt in 100 nS units.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
@param TimerPeriod The rate to program the timer interrupt in 100 nS units.\r
- If the timer hardware is not programmable, then \r
- EFI_UNSUPPORTED is returned. If the timer is programmable, \r
- then the timer period will be rounded up to the nearest \r
- timer period that is supported by the timer hardware. \r
- If TimerPeriod is set to 0, then the timer interrupts \r
+ If the timer hardware is not programmable, then\r
+ EFI_UNSUPPORTED is returned. If the timer is programmable,\r
+ then the timer period will be rounded up to the nearest\r
+ timer period that is supported by the timer hardware.\r
+ If TimerPeriod is set to 0, then the timer interrupts\r
will be disabled.\r
\r
@retval EFI_SUCCESS The timer period was changed.\r
will be disabled.\r
\r
@retval EFI_SUCCESS The timer period was changed.\r
TimerDriverGenerateSoftInterrupt (\r
IN EFI_TIMER_ARCH_PROTOCOL *This\r
);\r
TimerDriverGenerateSoftInterrupt (\r
IN EFI_TIMER_ARCH_PROTOCOL *This\r
);\r
///\r
/// The handle onto which the Timer Architectural Protocol will be installed.\r
///\r
///\r
/// The handle onto which the Timer Architectural Protocol will be installed.\r
///\r
HPET_GENERAL_CONFIGURATION_REGISTER mHpetGeneralConfiguration;\r
\r
///\r
HPET_GENERAL_CONFIGURATION_REGISTER mHpetGeneralConfiguration;\r
\r
///\r
-/// Cached state of the Configuration register for the HPET Timer managed by \r
+/// Cached state of the Configuration register for the HPET Timer managed by\r
/// this driver. Caching the state reduces the number of times the configuration\r
/// register is read.\r
///\r
/// this driver. Caching the state reduces the number of times the configuration\r
/// register is read.\r
///\r
IN BOOLEAN Enable\r
)\r
{\r
IN BOOLEAN Enable\r
)\r
{\r
- mHpetGeneralConfiguration.Bits.MainCounterEnable = Enable ? 1 : 0; \r
+ mHpetGeneralConfiguration.Bits.MainCounterEnable = Enable ? 1 : 0;\r
HpetWrite (HPET_GENERAL_CONFIGURATION_OFFSET, mHpetGeneralConfiguration.Uint64);\r
}\r
\r
HpetWrite (HPET_GENERAL_CONFIGURATION_OFFSET, mHpetGeneralConfiguration.Uint64);\r
}\r
\r
and computes the amount of time that has passed since the last HPET timer interrupt.\r
If a notification function is registered, then the amount of time since the last\r
HPET interrupt is passed to that notification function in 100 ns units. The HPET\r
and computes the amount of time that has passed since the last HPET timer interrupt.\r
If a notification function is registered, then the amount of time since the last\r
HPET interrupt is passed to that notification function in 100 ns units. The HPET\r
- time is updated to generate another interrupt in the required time period. \r
+ time is updated to generate another interrupt in the required time period.\r
\r
@param InterruptType The type of interrupt that occurred.\r
@param SystemContext A pointer to the system context when the interrupt occurred.\r
\r
@param InterruptType The type of interrupt that occurred.\r
@param SystemContext A pointer to the system context when the interrupt occurred.\r
// Disable HPET timer when adjusting the COMPARATOR value to prevent a missed interrupt\r
//\r
HpetEnable (FALSE);\r
// Disable HPET timer when adjusting the COMPARATOR value to prevent a missed interrupt\r
//\r
HpetEnable (FALSE);\r
//\r
// Capture main counter value\r
//\r
//\r
// Capture main counter value\r
//\r
// Enable the HPET counter once the new COMPARATOR value has been set.\r
//\r
HpetEnable (TRUE);\r
// Enable the HPET counter once the new COMPARATOR value has been set.\r
//\r
HpetEnable (TRUE);\r
//\r
// Check to see if there is a registered notification function\r
//\r
if (mTimerNotifyFunction != NULL) {\r
//\r
//\r
// Check to see if there is a registered notification function\r
//\r
if (mTimerNotifyFunction != NULL) {\r
//\r
- // Compute time since last notification in 100 ns units (10 ^ -7) \r
+ // Compute time since last notification in 100 ns units (10 ^ -7)\r
//\r
if (MainCounter > mPreviousMainCounter) {\r
//\r
//\r
if (MainCounter > mPreviousMainCounter) {\r
//\r
MultU64x32 (\r
Delta & mCounterMask,\r
mHpetGeneralCapabilities.Bits.CounterClockPeriod\r
MultU64x32 (\r
Delta & mCounterMask,\r
mHpetGeneralCapabilities.Bits.CounterClockPeriod\r
//\r
// Call registered notification function passing in the time since the last\r
// interrupt in 100 ns units.\r
//\r
// Call registered notification function passing in the time since the last\r
// interrupt in 100 ns units.\r
mTimerNotifyFunction (TimerPeriod);\r
}\r
mTimerNotifyFunction (TimerPeriod);\r
}\r
//\r
// Save main counter value\r
//\r
//\r
// Save main counter value\r
//\r
is returned.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
is returned.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
- @param NotifyFunction The function to call when a timer interrupt fires. \r
- This function executes at TPL_HIGH_LEVEL. The DXE \r
- Core will register a handler for the timer interrupt, \r
- so it can know how much time has passed. This \r
- information is used to signal timer based events. \r
+ @param NotifyFunction The function to call when a timer interrupt fires.\r
+ This function executes at TPL_HIGH_LEVEL. The DXE\r
+ Core will register a handler for the timer interrupt,\r
+ so it can know how much time has passed. This\r
+ information is used to signal timer based events.\r
NULL will unregister the handler.\r
\r
@retval EFI_SUCCESS The timer handler was registered.\r
NULL will unregister the handler.\r
\r
@retval EFI_SUCCESS The timer handler was registered.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
@param TimerPeriod The rate to program the timer interrupt in 100 nS units.\r
\r
@param This The EFI_TIMER_ARCH_PROTOCOL instance.\r
@param TimerPeriod The rate to program the timer interrupt in 100 nS units.\r
- If the timer hardware is not programmable, then \r
- EFI_UNSUPPORTED is returned. If the timer is programmable, \r
- then the timer period will be rounded up to the nearest \r
- timer period that is supported by the timer hardware. \r
- If TimerPeriod is set to 0, then the timer interrupts \r
+ If the timer hardware is not programmable, then\r
+ EFI_UNSUPPORTED is returned. If the timer is programmable,\r
+ then the timer period will be rounded up to the nearest\r
+ timer period that is supported by the timer hardware.\r
+ If TimerPeriod is set to 0, then the timer interrupts\r
will be disabled.\r
\r
@retval EFI_SUCCESS The timer period was changed.\r
will be disabled.\r
\r
@retval EFI_SUCCESS The timer period was changed.\r
// Disable HPET timer when adjusting the timer period\r
//\r
HpetEnable (FALSE);\r
// Disable HPET timer when adjusting the timer period\r
//\r
HpetEnable (FALSE);\r
if (TimerPeriod == 0) {\r
if (mTimerPeriod != 0) {\r
//\r
if (TimerPeriod == 0) {\r
if (mTimerPeriod != 0) {\r
//\r
MainCounter = HpetRead (HPET_MAIN_COUNTER_OFFSET);\r
if (MainCounter < mPreviousMainCounter) {\r
Delta = (mCounterMask - mPreviousMainCounter) + MainCounter;\r
MainCounter = HpetRead (HPET_MAIN_COUNTER_OFFSET);\r
if (MainCounter < mPreviousMainCounter) {\r
Delta = (mCounterMask - mPreviousMainCounter) + MainCounter;\r
Delta = MainCounter - mPreviousMainCounter;\r
}\r
if ((Delta & mCounterMask) >= mTimerCount) {\r
Delta = MainCounter - mPreviousMainCounter;\r
}\r
if ((Delta & mCounterMask) >= mTimerCount) {\r
//\r
// If TimerPeriod is 0, then mask HPET Timer interrupts\r
//\r
//\r
// If TimerPeriod is 0, then mask HPET Timer interrupts\r
//\r
if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {\r
//\r
// Disable HPET MSI interrupt generation\r
if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {\r
//\r
// Disable HPET MSI interrupt generation\r
//\r
IoApicEnableInterrupt (mTimerIrq, FALSE);\r
}\r
//\r
IoApicEnableInterrupt (mTimerIrq, FALSE);\r
}\r
- // Disable HPET timer interrupt \r
+ // Disable HPET timer interrupt\r
//\r
mTimerConfiguration.Bits.InterruptEnable = 0;\r
HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);\r
} else {\r
//\r
//\r
mTimerConfiguration.Bits.InterruptEnable = 0;\r
HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);\r
} else {\r
//\r
- // Convert TimerPeriod to femtoseconds and divide by the number if femtoseconds \r
+ // Convert TimerPeriod to femtoseconds and divide by the number if femtoseconds\r
// per tick of the HPET counter to determine the number of HPET counter ticks\r
// in TimerPeriod 100 ns units.\r
// per tick of the HPET counter to determine the number of HPET counter ticks\r
// in TimerPeriod 100 ns units.\r
mTimerCount = DivU64x32 (\r
MultU64x32 (TimerPeriod, 100000000),\r
mHpetGeneralCapabilities.Bits.CounterClockPeriod\r
mTimerCount = DivU64x32 (\r
MultU64x32 (TimerPeriod, 100000000),\r
mHpetGeneralCapabilities.Bits.CounterClockPeriod\r
MainCounter = HpetRead (HPET_MAIN_COUNTER_OFFSET);\r
if (MainCounter > mPreviousMainCounter) {\r
Delta = MainCounter - mPreviousMainCounter;\r
MainCounter = HpetRead (HPET_MAIN_COUNTER_OFFSET);\r
if (MainCounter > mPreviousMainCounter) {\r
Delta = MainCounter - mPreviousMainCounter;\r
Delta = (mCounterMask - mPreviousMainCounter) + MainCounter;\r
}\r
if ((Delta & mCounterMask) >= mTimerCount) {\r
HpetWrite (HPET_TIMER_COMPARATOR_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, (MainCounter + 1) & mCounterMask);\r
Delta = (mCounterMask - mPreviousMainCounter) + MainCounter;\r
}\r
if ((Delta & mCounterMask) >= mTimerCount) {\r
HpetWrite (HPET_TIMER_COMPARATOR_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, (MainCounter + 1) & mCounterMask);\r
HpetWrite (HPET_TIMER_COMPARATOR_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, (mPreviousMainCounter + mTimerCount) & mCounterMask);\r
}\r
HpetWrite (HPET_TIMER_COMPARATOR_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, (mPreviousMainCounter + mTimerCount) & mCounterMask);\r
}\r
//\r
// Enable HPET Timer interrupt generation\r
//\r
//\r
// Enable HPET Timer interrupt generation\r
//\r
mTimerConfiguration.Bits.InterruptEnable = 1;\r
HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);\r
}\r
mTimerConfiguration.Bits.InterruptEnable = 1;\r
HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);\r
}\r
//\r
// Save the new timer period\r
//\r
//\r
// Save the new timer period\r
//\r
\r
//\r
// Disable interrupts\r
\r
//\r
// Disable interrupts\r
Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
Tpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
//\r
// Capture main counter value\r
//\r
//\r
// Capture main counter value\r
//\r
//\r
if (mTimerNotifyFunction != NULL) {\r
//\r
//\r
if (mTimerNotifyFunction != NULL) {\r
//\r
- // Compute time since last interrupt in 100 ns units (10 ^ -7) \r
+ // Compute time since last interrupt in 100 ns units (10 ^ -7)\r
//\r
if (MainCounter > mPreviousMainCounter) {\r
//\r
//\r
if (MainCounter > mPreviousMainCounter) {\r
//\r
MultU64x32 (\r
Delta & mCounterMask,\r
mHpetGeneralCapabilities.Bits.CounterClockPeriod\r
MultU64x32 (\r
Delta & mCounterMask,\r
mHpetGeneralCapabilities.Bits.CounterClockPeriod\r
//\r
// Call registered notification function passing in the time since the last\r
// interrupt in 100 ns units.\r
//\r
// Call registered notification function passing in the time since the last\r
// interrupt in 100 ns units.\r
mTimerNotifyFunction (TimerPeriod);\r
}\r
\r
mTimerNotifyFunction (TimerPeriod);\r
}\r
\r
// Save main counter value\r
//\r
mPreviousMainCounter = MainCounter;\r
// Save main counter value\r
//\r
mPreviousMainCounter = MainCounter;\r
//\r
// Restore interrupts\r
//\r
// Restore interrupts\r
return EFI_SUCCESS;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
\r
//\r
// Retrieve HPET Capabilities and Configuration Information\r
\r
//\r
// Retrieve HPET Capabilities and Configuration Information\r
mHpetGeneralCapabilities.Uint64 = HpetRead (HPET_GENERAL_CAPABILITIES_ID_OFFSET);\r
mHpetGeneralConfiguration.Uint64 = HpetRead (HPET_GENERAL_CONFIGURATION_OFFSET);\r
mHpetGeneralCapabilities.Uint64 = HpetRead (HPET_GENERAL_CAPABILITIES_ID_OFFSET);\r
mHpetGeneralConfiguration.Uint64 = HpetRead (HPET_GENERAL_CONFIGURATION_OFFSET);\r
- // If Revision is not valid, then ASSERT() and unload the driver because the HPET \r
+ // If Revision is not valid, then ASSERT() and unload the driver because the HPET\r
// device is not present.\r
// device is not present.\r
ASSERT (mHpetGeneralCapabilities.Uint64 != 0);\r
ASSERT (mHpetGeneralCapabilities.Uint64 != 0xFFFFFFFFFFFFFFFFULL);\r
if (mHpetGeneralCapabilities.Uint64 == 0 || mHpetGeneralCapabilities.Uint64 == 0xFFFFFFFFFFFFFFFFULL) {\r
ASSERT (mHpetGeneralCapabilities.Uint64 != 0);\r
ASSERT (mHpetGeneralCapabilities.Uint64 != 0xFFFFFFFFFFFFFFFFULL);\r
if (mHpetGeneralCapabilities.Uint64 == 0 || mHpetGeneralCapabilities.Uint64 == 0xFFFFFFFFFFFFFFFFULL) {\r
\r
//\r
// Dump HPET Configuration Information\r
\r
//\r
// Dump HPET Configuration Information\r
DEBUG_CODE (\r
DEBUG ((DEBUG_INFO, "HPET Base Address = 0x%08x\n", PcdGet32 (PcdHpetBaseAddress)));\r
DEBUG ((DEBUG_INFO, " HPET_GENERAL_CAPABILITIES_ID = 0x%016lx\n", mHpetGeneralCapabilities));\r
DEBUG_CODE (\r
DEBUG ((DEBUG_INFO, "HPET Base Address = 0x%08x\n", PcdGet32 (PcdHpetBaseAddress)));\r
DEBUG ((DEBUG_INFO, " HPET_GENERAL_CAPABILITIES_ID = 0x%016lx\n", mHpetGeneralCapabilities));\r
DEBUG ((DEBUG_INFO, " HPET_TIMER%d_MSI_ROUTE = 0x%016lx\n", TimerIndex, HpetRead (HPET_TIMER_MSI_ROUTE_OFFSET + TimerIndex * HPET_TIMER_STRIDE)));\r
}\r
);\r
DEBUG ((DEBUG_INFO, " HPET_TIMER%d_MSI_ROUTE = 0x%016lx\n", TimerIndex, HpetRead (HPET_TIMER_MSI_ROUTE_OFFSET + TimerIndex * HPET_TIMER_STRIDE)));\r
}\r
);\r
//\r
// Capture the current HPET main counter value.\r
//\r
mPreviousMainCounter = HpetRead (HPET_MAIN_COUNTER_OFFSET);\r
//\r
// Capture the current HPET main counter value.\r
//\r
mPreviousMainCounter = HpetRead (HPET_MAIN_COUNTER_OFFSET);\r
- // Determine the interrupt mode to use for the HPET Timer. \r
+ // Determine the interrupt mode to use for the HPET Timer.\r
// Look for MSI first, then unused PIC mode interrupt, then I/O APIC mode interrupt\r
// Look for MSI first, then unused PIC mode interrupt, then I/O APIC mode interrupt\r
MsiTimerIndex = HPET_INVALID_TIMER_INDEX;\r
mTimerIndex = HPET_INVALID_TIMER_INDEX;\r
for (TimerIndex = 0; TimerIndex <= mHpetGeneralCapabilities.Bits.NumberOfTimers; TimerIndex++) {\r
MsiTimerIndex = HPET_INVALID_TIMER_INDEX;\r
mTimerIndex = HPET_INVALID_TIMER_INDEX;\r
for (TimerIndex = 0; TimerIndex <= mHpetGeneralCapabilities.Bits.NumberOfTimers; TimerIndex++) {\r
// Read the HPET Timer Capabilities and Configuration register\r
//\r
mTimerConfiguration.Uint64 = HpetRead (HPET_TIMER_CONFIGURATION_OFFSET + TimerIndex * HPET_TIMER_STRIDE);\r
// Read the HPET Timer Capabilities and Configuration register\r
//\r
mTimerConfiguration.Uint64 = HpetRead (HPET_TIMER_CONFIGURATION_OFFSET + TimerIndex * HPET_TIMER_STRIDE);\r
- // Check to see if this HPET Timer supports MSI \r
+ // Check to see if this HPET Timer supports MSI\r
//\r
if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0) {\r
//\r
//\r
if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0) {\r
//\r
MsiTimerIndex = TimerIndex;\r
}\r
}\r
MsiTimerIndex = TimerIndex;\r
}\r
}\r
//\r
// Check to see if this HPET Timer supports I/O APIC interrupts\r
//\r
//\r
// Check to see if this HPET Timer supports I/O APIC interrupts\r
//\r
DEBUG ((DEBUG_ERROR, "No HPET timers support MSI or I/O APIC mode. Unload HPET driver.\n"));\r
return EFI_DEVICE_ERROR;\r
}\r
DEBUG ((DEBUG_ERROR, "No HPET timers support MSI or I/O APIC mode. Unload HPET driver.\n"));\r
return EFI_DEVICE_ERROR;\r
}\r
//\r
// Initialize I/O APIC entry for HPET Timer Interrupt\r
// Fixed Delivery Mode, Level Triggered, Asserted Low\r
//\r
// Initialize I/O APIC entry for HPET Timer Interrupt\r
// Fixed Delivery Mode, Level Triggered, Asserted Low\r
\r
//\r
// Configure the selected HPET Timer with settings common to both MSI mode and I/O APIC mode\r
\r
//\r
// Configure the selected HPET Timer with settings common to both MSI mode and I/O APIC mode\r
- // Clear InterruptEnable to keep interrupts disabled until full init is complete \r
- // Clear PeriodicInterruptEnable to use one-shot mode \r
- // Configure as a 32-bit counter \r
+ // Clear InterruptEnable to keep interrupts disabled until full init is complete\r
+ // Clear PeriodicInterruptEnable to use one-shot mode\r
+ // Configure as a 32-bit counter\r
//\r
mTimerConfiguration.Bits.InterruptEnable = 0;\r
mTimerConfiguration.Bits.PeriodicInterruptEnable = 0;\r
mTimerConfiguration.Bits.CounterSizeEnable = 1;\r
HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);\r
//\r
mTimerConfiguration.Bits.InterruptEnable = 0;\r
mTimerConfiguration.Bits.PeriodicInterruptEnable = 0;\r
mTimerConfiguration.Bits.CounterSizeEnable = 1;\r
HpetWrite (HPET_TIMER_CONFIGURATION_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, mTimerConfiguration.Uint64);\r
//\r
// Read the HPET Timer Capabilities and Configuration register back again.\r
// CounterSizeEnable will be read back as a 0 if it is a 32-bit only timer\r
//\r
// Read the HPET Timer Capabilities and Configuration register back again.\r
// CounterSizeEnable will be read back as a 0 if it is a 32-bit only timer\r
} else {\r
DEBUG ((DEBUG_INFO, "HPET Interrupt Mode I/O APIC\n"));\r
DEBUG ((DEBUG_INFO, "HPET I/O APIC IRQ = 0x%02x\n", mTimerIrq));\r
} else {\r
DEBUG ((DEBUG_INFO, "HPET Interrupt Mode I/O APIC\n"));\r
DEBUG ((DEBUG_INFO, "HPET I/O APIC IRQ = 0x%02x\n", mTimerIrq));\r
DEBUG ((DEBUG_INFO, "HPET Interrupt Vector = 0x%02x\n", PcdGet8 (PcdHpetLocalApicVector)));\r
DEBUG ((DEBUG_INFO, "HPET Counter Mask = 0x%016lx\n", mCounterMask));\r
DEBUG ((DEBUG_INFO, "HPET Timer Period = %d\n", mTimerPeriod));\r
DEBUG ((DEBUG_INFO, "HPET Interrupt Vector = 0x%02x\n", PcdGet8 (PcdHpetLocalApicVector)));\r
DEBUG ((DEBUG_INFO, "HPET Counter Mask = 0x%016lx\n", mCounterMask));\r
DEBUG ((DEBUG_INFO, "HPET Timer Period = %d\n", mTimerPeriod));\r
\r
//\r
// Wait for a few timer interrupts to fire before continuing\r
\r
//\r
// Wait for a few timer interrupts to fire before continuing\r
while (mNumTicks < 10);\r
);\r
while (mNumTicks < 10);\r
);\r
//\r
// Install the Timer Architectural Protocol onto a new handle\r
//\r
//\r
// Install the Timer Architectural Protocol onto a new handle\r
//\r
## @file\r
# Timer Architectural Protocol module using High Precesion Event Timer (HPET).\r
#\r
## @file\r
# Timer Architectural Protocol module using High Precesion Event Timer (HPET).\r
#\r
-# Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>\r
-# This program and the accompanying materials \r
-# are licensed and made available under the terms and conditions of the BSD License \r
-# which accompanies this distribution. The full text of the license may be found at \r
-# http://opensource.org/licenses/bsd-license.php \r
-# \r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
+# This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
[Sources]\r
HpetTimer.c\r
\r
[Sources]\r
HpetTimer.c\r
[Packages]\r
MdePkg/MdePkg.dec\r
UefiCpuPkg/UefiCpuPkg.dec\r
PcAtChipsetPkg/PcAtChipsetPkg.dec\r
[Packages]\r
MdePkg/MdePkg.dec\r
UefiCpuPkg/UefiCpuPkg.dec\r
PcAtChipsetPkg/PcAtChipsetPkg.dec\r
[LibraryClasses]\r
PcdLib\r
IoLib\r
[LibraryClasses]\r
PcdLib\r
IoLib\r
//\r
// Timer Architectural Protocol module using High Precision Event Timer (HPET).\r
//\r
//\r
// Timer Architectural Protocol module using High Precision Event Timer (HPET).\r
//\r
-// Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// /** @file\r
// HpetTimerDxe Localized Strings and Content\r
//\r
// /** @file\r
// HpetTimerDxe Localized Strings and Content\r
//\r
-// Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
-#string STR_PROPERTIES_MODULE_NAME \r
-#language en-US \r
+#string STR_PROPERTIES_MODULE_NAME\r
+#language en-US\r
"High Precision Event Timer DXE Driver"\r
\r
\r
"High Precision Event Timer DXE Driver"\r
\r
\r
I/O APIC library assumes I/O APIC is enabled. It does not\r
handles cases where I/O APIC is disabled.\r
\r
I/O APIC library assumes I/O APIC is enabled. It does not\r
handles cases where I/O APIC is disabled.\r
\r
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Read a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
Read a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
@param Index Specifies the I/O APIC register to read.\r
\r
@return The 32-bit value read from the I/O APIC register specified by Index.\r
@param Index Specifies the I/O APIC register to read.\r
\r
@return The 32-bit value read from the I/O APIC register specified by Index.\r
Write a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
Write a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
@param Index Specifies the I/O APIC register to write.\r
@param Value Specifies the value to write to the I/O APIC register specified by Index.\r
\r
@param Index Specifies the I/O APIC register to write.\r
@param Value Specifies the value to write to the I/O APIC register specified by Index.\r
\r
/**\r
Set the interrupt mask of an I/O APIC interrupt.\r
\r
/**\r
Set the interrupt mask of an I/O APIC interrupt.\r
\r
- If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). \r
- \r
+ If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().\r
+\r
@param Irq Specifies the I/O APIC interrupt to enable or disable.\r
@param Enable If TRUE, then enable the I/O APIC interrupt specified by Irq.\r
If FALSE, then disable the I/O APIC interrupt specified by Irq.\r
@param Irq Specifies the I/O APIC interrupt to enable or disable.\r
@param Enable If TRUE, then enable the I/O APIC interrupt specified by Irq.\r
If FALSE, then disable the I/O APIC interrupt specified by Irq.\r
\r
/**\r
Configures an I/O APIC interrupt.\r
\r
/**\r
Configures an I/O APIC interrupt.\r
Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical\r
Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical\r
- mode to the Local APIC of the currntly executing CPU. The default state of the \r
+ mode to the Local APIC of the currntly executing CPU. The default state of the\r
entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must\r
be used to enable(unmask) the I/O APIC Interrupt.\r
\r
entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must\r
be used to enable(unmask) the I/O APIC Interrupt.\r
\r
- If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). \r
+ If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().\r
If Vector >= 0x100, then ASSERT().\r
If DeliveryMode is not supported, then ASSERT().\r
\r
If Vector >= 0x100, then ASSERT().\r
If DeliveryMode is not supported, then ASSERT().\r
\r
- HPET register definitions from the IA-PC HPET (High Precision Event Timers) \r
+ HPET register definitions from the IA-PC HPET (High Precision Event Timers)\r
Specification, Revision 1.0a, October 2004.\r
\r
Specification, Revision 1.0a, October 2004.\r
\r
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
- I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt \r
+ I/O APIC Register Definitions from 82093AA I/O Advanced Programmable Interrupt\r
Controller (IOAPIC), 1996.\r
Controller (IOAPIC), 1996.\r
- \r
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>\r
+\r
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
/** @file\r
UEFI Component Name(2) protocol implementation for IsaAcpi driver.\r
\r
/** @file\r
UEFI Component Name(2) protocol implementation for IsaAcpi driver.\r
\r
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
**/\r
\r
#include "PcatIsaAcpi.h"\r
**/\r
\r
#include "PcatIsaAcpi.h"\r
return LookupUnicodeString2 (\r
Language,\r
This->SupportedLanguages,\r
return LookupUnicodeString2 (\r
Language,\r
This->SupportedLanguages,\r
- mPcatIsaAcpiDriverNameTable, \r
+ mPcatIsaAcpiDriverNameTable,\r
DriverName,\r
(BOOLEAN)(This == &gPcatIsaAcpiComponentName)\r
);\r
DriverName,\r
(BOOLEAN)(This == &gPcatIsaAcpiComponentName)\r
);\r
/** @file\r
ISA ACPI Protocol Implementation\r
\r
/** @file\r
ISA ACPI Protocol Implementation\r
\r
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
**/\r
\r
#include "PcatIsaAcpi.h"\r
**/\r
\r
#include "PcatIsaAcpi.h"\r
/**\r
Enumerate the ISA devices on the ISA bus.\r
\r
/**\r
Enumerate the ISA devices on the ISA bus.\r
\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param IsaAcpiDevice On return, point to resource data for Isa device\r
@param NextIsaAcpiDevice On return, point to resource data for next Isa device\r
**/\r
@param IsaAcpiDevice On return, point to resource data for Isa device\r
@param NextIsaAcpiDevice On return, point to resource data for next Isa device\r
**/\r
Index = 0;\r
} else {\r
for(Index = 0; gPcatIsaAcpiDeviceList[Index].ResourceItem != NULL; Index++) {\r
Index = 0;\r
} else {\r
for(Index = 0; gPcatIsaAcpiDeviceList[Index].ResourceItem != NULL; Index++) {\r
- if (Device->HID == gPcatIsaAcpiDeviceList[Index].Device.HID && \r
+ if (Device->HID == gPcatIsaAcpiDeviceList[Index].Device.HID &&\r
Device->UID == gPcatIsaAcpiDeviceList[Index].Device.UID ) {\r
break;\r
}\r
Device->UID == gPcatIsaAcpiDeviceList[Index].Device.UID ) {\r
break;\r
}\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
\r
@retval EFI_NOT_FOUND Can not found the next Isa device.\r
@retval EFI_SUCCESS Success retrieve the next Isa device for enumration.\r
\r
@retval EFI_NOT_FOUND Can not found the next Isa device.\r
@retval EFI_SUCCESS Success retrieve the next Isa device for enumration.\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param OnOff TRUE for setting isa device power on,\r
FALSE for setting isa device power off\r
\r
@param OnOff TRUE for setting isa device power on,\r
FALSE for setting isa device power off\r
\r
)\r
{\r
return EFI_SUCCESS;\r
)\r
{\r
return EFI_SUCCESS;\r
\r
/**\r
Get current resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
\r
/**\r
Get current resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_NOT_FOUND Can not found the resource instance for given isa device\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_NOT_FOUND Can not found the resource instance for given isa device\r
EFIAPI\r
IsaGetCurrentResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
EFIAPI\r
IsaGetCurrentResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
- IN EFI_ISA_ACPI_DEVICE_ID *Device, \r
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
)\r
{\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
)\r
{\r
\r
/**\r
Get possible resource for the specific ISA device.\r
\r
/**\r
Get possible resource for the specific ISA device.\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_SUCCESS Success to get resource instance for given isa device.\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_SUCCESS Success to get resource instance for given isa device.\r
EFIAPI\r
IsaGetPossibleResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
EFIAPI\r
IsaGetPossibleResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
- IN EFI_ISA_ACPI_DEVICE_ID *Device, \r
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
)\r
{\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
)\r
{\r
Set resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
Set resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param ResourceList Point to resources instances for given isa device\r
\r
@return EFI_SUCCESS Success to set resource.\r
@param ResourceList Point to resources instances for given isa device\r
\r
@return EFI_SUCCESS Success to set resource.\r
EFIAPI\r
IsaSetResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
EFIAPI\r
IsaSetResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
- IN EFI_ISA_ACPI_DEVICE_ID *Device, \r
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
IN EFI_ISA_ACPI_RESOURCE_LIST *ResourceList\r
)\r
{\r
return EFI_SUCCESS;\r
}\r
IN EFI_ISA_ACPI_RESOURCE_LIST *ResourceList\r
)\r
{\r
return EFI_SUCCESS;\r
}\r
/**\r
Enable/Disable the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
/**\r
Enable/Disable the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param Enable Enable/Disable\r
\r
@return EFI_SUCCESS Success to enable/disable.\r
@param Enable Enable/Disable\r
\r
@return EFI_SUCCESS Success to enable/disable.\r
IN BOOLEAN Enable\r
)\r
{\r
IN BOOLEAN Enable\r
)\r
{\r
}\r
\r
/**\r
Initialize the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
}\r
\r
/**\r
Initialize the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
\r
@return EFI_SUCCESS Success to initialize.\r
\r
\r
@return EFI_SUCCESS Success to initialize.\r
\r
EFIAPI\r
IsaInterfaceInit (\r
IN EFI_ISA_ACPI_PROTOCOL *This\r
EFIAPI\r
IsaInterfaceInit (\r
IN EFI_ISA_ACPI_PROTOCOL *This\r
{\r
return EFI_SUCCESS;\r
{\r
return EFI_SUCCESS;\r
//\r
// PCAT ISA ACPI driver for a Generic PC Platform.\r
//\r
//\r
// PCAT ISA ACPI driver for a Generic PC Platform.\r
//\r
-// Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2005 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// /** @file\r
// IsaAcpi Localized Strings and Content\r
//\r
// /** @file\r
// IsaAcpi Localized Strings and Content\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
-#string STR_PROPERTIES_MODULE_NAME \r
-#language en-US \r
+#string STR_PROPERTIES_MODULE_NAME\r
+#language en-US\r
"PCAT ISA ACPI DXE Driver"\r
\r
\r
"PCAT ISA ACPI DXE Driver"\r
\r
\r
/** @file\r
EFI PCAT ISA ACPI Driver for a Generic PC Platform\r
\r
/** @file\r
EFI PCAT ISA ACPI Driver for a Generic PC Platform\r
\r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
)\r
{\r
return EfiLibInstallDriverBindingComponentName2 (\r
)\r
{\r
return EfiLibInstallDriverBindingComponentName2 (\r
- ImageHandle, \r
- SystemTable, \r
+ ImageHandle,\r
+ SystemTable,\r
&gPcatIsaAcpiDriverBinding,\r
ImageHandle,\r
&gPcatIsaAcpiComponentName,\r
&gPcatIsaAcpiDriverBinding,\r
ImageHandle,\r
&gPcatIsaAcpiComponentName,\r
/**\r
ControllerDriver Protocol Method\r
\r
/**\r
ControllerDriver Protocol Method\r
\r
- @param This Driver Binding protocol instance pointer. \r
+ @param This Driver Binding protocol instance pointer.\r
@param Controller Handle of device to test.\r
@param RemainingDevicePath Optional parameter use to pick a specific child\r
device to start.\r
@param Controller Handle of device to test.\r
@param RemainingDevicePath Optional parameter use to pick a specific child\r
device to start.\r
\r
//\r
// Get PciIo protocol instance\r
\r
//\r
// Get PciIo protocol instance\r
Status = gBS->OpenProtocol (\r
Status = gBS->OpenProtocol (\r
- Controller, \r
- &gEfiPciIoProtocolGuid, \r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
(VOID**)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
(VOID**)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
PciIo,\r
EfiPciIoWidthUint32,\r
0,\r
PciIo,\r
EfiPciIoWidthUint32,\r
0,\r
- sizeof(Pci) / sizeof(UINT32), \r
+ sizeof(Pci) / sizeof(UINT32),\r
&Pci);\r
\r
if (!EFI_ERROR (Status)) {\r
&Pci);\r
\r
if (!EFI_ERROR (Status)) {\r
//\r
if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA) {\r
Status = EFI_SUCCESS;\r
//\r
if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA) {\r
Status = EFI_SUCCESS;\r
\r
//\r
// See if this is an Intel PCI to ISA bridge in Positive Decode Mode\r
//\r
\r
//\r
// See if this is an Intel PCI to ISA bridge in Positive Decode Mode\r
//\r
- if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE && \r
+ if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE &&\r
Pci.Hdr.VendorId == 0x8086 ) {\r
//\r
Pci.Hdr.VendorId == 0x8086 ) {\r
//\r
- // See if this is on Function #0 to avoid false positives on \r
- // PCI_CLASS_BRIDGE_OTHER that has the same value as \r
+ // See if this is on Function #0 to avoid false positives on\r
+ // PCI_CLASS_BRIDGE_OTHER that has the same value as\r
// PCI_CLASS_BRIDGE_ISA_PDECODE\r
//\r
Status = PciIo->GetLocation (\r
// PCI_CLASS_BRIDGE_ISA_PDECODE\r
//\r
Status = PciIo->GetLocation (\r
- PciIo, \r
- &SegmentNumber, \r
- &BusNumber, \r
- &DeviceNumber, \r
+ PciIo,\r
+ &SegmentNumber,\r
+ &BusNumber,\r
+ &DeviceNumber,\r
&FunctionNumber\r
);\r
if (!EFI_ERROR (Status) && FunctionNumber == 0) {\r
&FunctionNumber\r
);\r
if (!EFI_ERROR (Status) && FunctionNumber == 0) {\r
Status = EFI_UNSUPPORTED;\r
}\r
}\r
Status = EFI_UNSUPPORTED;\r
}\r
}\r
}\r
}\r
\r
gBS->CloseProtocol (\r
}\r
}\r
\r
gBS->CloseProtocol (\r
- Controller, \r
- &gEfiPciIoProtocolGuid, \r
- This->DriverBindingHandle, \r
- Controller \r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
+ Controller\r
//\r
PciIo = NULL;\r
Status = gBS->OpenProtocol (\r
//\r
PciIo = NULL;\r
Status = gBS->OpenProtocol (\r
- Controller, \r
- &gEfiPciIoProtocolGuid, \r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle, \r
- Controller, \r
- EFI_OPEN_PROTOCOL_BY_DRIVER \r
+ This->DriverBindingHandle,\r
+ Controller,\r
+ EFI_OPEN_PROTOCOL_BY_DRIVER\r
);\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
);\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
}\r
\r
Status = PciIo->Attributes (\r
}\r
\r
Status = PciIo->Attributes (\r
- PciIo, \r
- EfiPciIoAttributeOperationEnable, \r
- EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO, \r
- NULL \r
+ PciIo,\r
+ EfiPciIoAttributeOperationEnable,\r
+ EFI_PCI_DEVICE_ENABLE | Supports | EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO,\r
+ NULL\r
);\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
);\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
// Initialize PcatIsaAcpiDeviceList\r
//\r
InitializePcatIsaAcpiDeviceList ();\r
// Initialize PcatIsaAcpiDeviceList\r
//\r
InitializePcatIsaAcpiDeviceList ();\r
//\r
// IsaAcpi interface\r
//\r
//\r
// IsaAcpi interface\r
//\r
(PcatIsaAcpiDev->IsaAcpi).EnableDevice = IsaEnableDevice;\r
(PcatIsaAcpiDev->IsaAcpi).InitDevice = IsaInitDevice;\r
(PcatIsaAcpiDev->IsaAcpi).InterfaceInit = IsaInterfaceInit;\r
(PcatIsaAcpiDev->IsaAcpi).EnableDevice = IsaEnableDevice;\r
(PcatIsaAcpiDev->IsaAcpi).InitDevice = IsaInitDevice;\r
(PcatIsaAcpiDev->IsaAcpi).InterfaceInit = IsaInterfaceInit;\r
//\r
// Install the ISA ACPI Protocol interface\r
//\r
//\r
// Install the ISA ACPI Protocol interface\r
//\r
if (EFI_ERROR (Status)) {\r
if (PciIo != NULL && Enabled) {\r
PciIo->Attributes (\r
if (EFI_ERROR (Status)) {\r
if (PciIo != NULL && Enabled) {\r
PciIo->Attributes (\r
EfiPciIoAttributeOperationSet,\r
OriginalAttributes,\r
EfiPciIoAttributeOperationSet,\r
OriginalAttributes,\r
);\r
}\r
gBS->CloseProtocol (\r
);\r
}\r
gBS->CloseProtocol (\r
- Controller, \r
- &gEfiPciIoProtocolGuid, \r
- This->DriverBindingHandle, \r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
Controller\r
);\r
if (PcatIsaAcpiDev != NULL) {\r
Controller\r
);\r
if (PcatIsaAcpiDev != NULL) {\r
return EFI_SUCCESS;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS Status;\r
EFI_ISA_ACPI_PROTOCOL *IsaAcpi;\r
PCAT_ISA_ACPI_DEV *PcatIsaAcpiDev;\r
EFI_STATUS Status;\r
EFI_ISA_ACPI_PROTOCOL *IsaAcpi;\r
PCAT_ISA_ACPI_DEV *PcatIsaAcpiDev;\r
//\r
// Get the ISA ACPI Protocol Interface\r
//\r
// Get the ISA ACPI Protocol Interface\r
Status = gBS->OpenProtocol (\r
Status = gBS->OpenProtocol (\r
- Controller, \r
- &gEfiIsaAcpiProtocolGuid, \r
+ Controller,\r
+ &gEfiIsaAcpiProtocolGuid,\r
- This->DriverBindingHandle, \r
- Controller, \r
+ This->DriverBindingHandle,\r
+ Controller,\r
EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
);\r
if (EFI_ERROR (Status)) {\r
EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
);\r
if (EFI_ERROR (Status)) {\r
}\r
\r
gBS->CloseProtocol (\r
}\r
\r
gBS->CloseProtocol (\r
- Controller, \r
- &gEfiPciIoProtocolGuid, \r
- This->DriverBindingHandle, \r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
gBS->FreePool (PcatIsaAcpiDev);\r
gBS->FreePool (PcatIsaAcpiDev);\r
return EFI_SUCCESS;\r
}\r
return EFI_SUCCESS;\r
}\r
/** @file\r
EFI PCAT ISA ACPI Driver for a Generic PC Platform\r
\r
/** @file\r
EFI PCAT ISA ACPI Driver for a Generic PC Platform\r
\r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution. The full text of the license may be found at \r
-http://opensource.org/licenses/bsd-license.php \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
typedef struct {\r
UINTN Signature;\r
\r
typedef struct {\r
UINTN Signature;\r
EFI_ISA_ACPI_PROTOCOL IsaAcpi;\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
UINT64 OriginalAttributes;\r
EFI_ISA_ACPI_PROTOCOL IsaAcpi;\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
UINT64 OriginalAttributes;\r
/**\r
ControllerDriver Protocol Method\r
\r
/**\r
ControllerDriver Protocol Method\r
\r
- @param This Driver Binding protocol instance pointer. \r
+ @param This Driver Binding protocol instance pointer.\r
@param Controller Handle of device to test.\r
@param RemainingDevicePath Optional parameter use to pick a specific child\r
device to start.\r
@param Controller Handle of device to test.\r
@param RemainingDevicePath Optional parameter use to pick a specific child\r
device to start.\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
\r
@retval EFI_NOT_FOUND Can not found the next Isa device.\r
@retval EFI_SUCCESS Success retrieve the next Isa device for enumration.\r
\r
@retval EFI_NOT_FOUND Can not found the next Isa device.\r
@retval EFI_SUCCESS Success retrieve the next Isa device for enumration.\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param OnOff TRUE for setting isa device power on,\r
FALSE for setting isa device power off\r
\r
@param OnOff TRUE for setting isa device power on,\r
FALSE for setting isa device power off\r
\r
IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
IN BOOLEAN OnOff\r
);\r
IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
IN BOOLEAN OnOff\r
);\r
/**\r
Get current resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
/**\r
Get current resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_NOT_FOUND Can not found the resource instance for given isa device\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_NOT_FOUND Can not found the resource instance for given isa device\r
IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
);\r
IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
);\r
/**\r
Get possible resource for the specific ISA device.\r
/**\r
Get possible resource for the specific ISA device.\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_SUCCESS Success to get resource instance for given isa device.\r
@param ResourceList On return, point to resources instances for given isa device\r
\r
@retval EFI_SUCCESS Success to get resource instance for given isa device.\r
EFIAPI\r
IsaGetPossibleResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
EFIAPI\r
IsaGetPossibleResource (\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
- IN EFI_ISA_ACPI_DEVICE_ID *Device, \r
+ IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
);\r
OUT EFI_ISA_ACPI_RESOURCE_LIST **ResourceList\r
);\r
/**\r
Set resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
/**\r
Set resource for the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param ResourceList Point to resources instances for given isa device\r
\r
@return EFI_SUCCESS Success to set resource.\r
@param ResourceList Point to resources instances for given isa device\r
\r
@return EFI_SUCCESS Success to set resource.\r
IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
IN EFI_ISA_ACPI_RESOURCE_LIST *ResourceList\r
);\r
IN EFI_ISA_ACPI_DEVICE_ID *Device,\r
IN EFI_ISA_ACPI_RESOURCE_LIST *ResourceList\r
);\r
/**\r
Enable/Disable the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
/**\r
Enable/Disable the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
@param Enable Enable/Disable\r
\r
@return EFI_SUCCESS Success to enable/disable.\r
@param Enable Enable/Disable\r
\r
@return EFI_SUCCESS Success to enable/disable.\r
Initialize the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
Initialize the specific ISA device.\r
\r
@param This Point to instance of EFI_ISA_ACPI_PROTOCOL\r
- @param Device Point to device ID instance \r
+ @param Device Point to device ID instance\r
\r
@return EFI_SUCCESS Success to initialize.\r
\r
\r
@return EFI_SUCCESS Success to initialize.\r
\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
IN EFI_ISA_ACPI_DEVICE_ID *Device\r
);\r
IN EFI_ISA_ACPI_PROTOCOL *This,\r
IN EFI_ISA_ACPI_DEVICE_ID *Device\r
);\r
/**\r
Initialize the ISA interface.\r
\r
/**\r
Initialize the ISA interface.\r
\r
EFIAPI\r
IsaInterfaceInit (\r
IN EFI_ISA_ACPI_PROTOCOL *This\r
EFIAPI\r
IsaInterfaceInit (\r
IN EFI_ISA_ACPI_PROTOCOL *This\r
\r
/**\r
Initialize the ISA device list.\r
\r
/**\r
Initialize the ISA device list.\r
UINT8 EnableMask;\r
\r
//\r
UINT8 EnableMask;\r
\r
//\r
- // ASSERT for the invalid PCD values. They must be configured to the real value. \r
+ // ASSERT for the invalid PCD values. They must be configured to the real value.\r
//\r
ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);\r
ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress) != 0xFFFF);\r
\r
//\r
//\r
ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);\r
ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress) != 0xFFFF);\r
\r
//\r
- // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then \r
+ // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then\r
// no PCI register programming is required to enable access to the the ACPI registers\r
// specified by PcdAcpiIoPortBaseAddress\r
//\r
// no PCI register programming is required to enable access to the the ACPI registers\r
// specified by PcdAcpiIoPortBaseAddress\r
//\r
- // ASSERT for the invalid PCD values. They must be configured to the real value. \r
+ // ASSERT for the invalid PCD values. They must be configured to the real value.\r
//\r
ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);\r
ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
//\r
ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);\r
ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
return RETURN_SUCCESS;\r
}\r
\r
return RETURN_SUCCESS;\r
}\r
\r
Port = PcdGet16 (PcdAcpiIoPortBaseAddress);\r
Port = PcdGet16 (PcdAcpiIoPortBaseAddress);\r
- // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then \r
- // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a \r
+ // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then\r
+ // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a\r
// value other than PcdAcpiIoPortBaseAddress\r
//\r
if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r
Port = PciRead16 (PCI_LIB_ADDRESS (\r
// value other than PcdAcpiIoPortBaseAddress\r
//\r
if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r
Port = PciRead16 (PCI_LIB_ADDRESS (\r
- PcdGet8 (PcdAcpiIoPciBusNumber), \r
- PcdGet8 (PcdAcpiIoPciDeviceNumber), \r
- PcdGet8 (PcdAcpiIoPciFunctionNumber), \r
+ PcdGet8 (PcdAcpiIoPciBusNumber),\r
+ PcdGet8 (PcdAcpiIoPciDeviceNumber),\r
+ PcdGet8 (PcdAcpiIoPciFunctionNumber),\r
PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
));\r
}\r
PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
));\r
}\r
return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);\r
}\r
\r
return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);\r
}\r
\r
/** @file\r
ACPI Timer implements one instance of Timer Library.\r
\r
/** @file\r
ACPI Timer implements one instance of Timer Library.\r
\r
- Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
UINT64\r
InternalGetPerformanceCounterFrequency (\r
VOID\r
UINT64\r
InternalGetPerformanceCounterFrequency (\r
VOID\r
{\r
return InternalCalculateTscFrequency ();\r
}\r
{\r
return InternalCalculateTscFrequency ();\r
}\r
# Note: The implementation uses the lower 24-bits of the ACPI timer and\r
# is compatible with both 24-bit and 32-bit ACPI timers.\r
#\r
# Note: The implementation uses the lower 24-bits of the ACPI timer and\r
# is compatible with both 24-bit and 32-bit ACPI timers.\r
#\r
-# Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution. The full text of the license may be found at\r
[Sources]\r
AcpiTimerLib.c\r
BaseAcpiTimerLib.c\r
[Sources]\r
AcpiTimerLib.c\r
BaseAcpiTimerLib.c\r
[Packages]\r
MdePkg/MdePkg.dec\r
PcAtChipsetPkg/PcAtChipsetPkg.dec\r
[Packages]\r
MdePkg/MdePkg.dec\r
PcAtChipsetPkg/PcAtChipsetPkg.dec\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset ## CONSUMES\r
- gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask ## CONSUMES
\ No newline at end of file
+ gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask ## CONSUMES\r
// Provides basic timer support using the ACPI timer hardware. The performance\r
// counter features are provided by the processors time stamp counter.\r
//\r
// Provides basic timer support using the ACPI timer hardware. The performance\r
// counter features are provided by the processors time stamp counter.\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
/** @file\r
ACPI Timer implements one instance of Timer Library.\r
\r
/** @file\r
ACPI Timer implements one instance of Timer Library.\r
\r
- Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
UINT64\r
InternalGetPerformanceCounterFrequency (\r
VOID\r
UINT64\r
InternalGetPerformanceCounterFrequency (\r
VOID\r
{\r
return mPerformanceCounterFrequency;\r
}\r
\r
/**\r
{\r
return mPerformanceCounterFrequency;\r
}\r
\r
/**\r
- The constructor function enables ACPI IO space, and caches PerformanceCounterFrequency. \r
+ The constructor function enables ACPI IO space, and caches PerformanceCounterFrequency.\r
\r
@param ImageHandle The firmware allocated handle for the EFI image.\r
@param SystemTable A pointer to the EFI System Table.\r
\r
@param ImageHandle The firmware allocated handle for the EFI image.\r
@param SystemTable A pointer to the EFI System Table.\r
// Provides basic timer support using the ACPI timer hardware. The performance\r
// counter features are provided by the processors time stamp counter.\r
//\r
// Provides basic timer support using the ACPI timer hardware. The performance\r
// counter features are provided by the processors time stamp counter.\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
//\r
// Library instance for I/O APIC library class.\r
//\r
//\r
// Library instance for I/O APIC library class.\r
//\r
-// Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
I/O APIC library.\r
\r
I/O APIC library assumes I/O APIC is enabled. It does not\r
handles cases where I/O APIC is disabled.\r
\r
I/O APIC library.\r
\r
I/O APIC library assumes I/O APIC is enabled. It does not\r
handles cases where I/O APIC is disabled.\r
\r
- Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
Read a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
Read a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
@param Index Specifies the I/O APIC register to read.\r
\r
@return The 32-bit value read from the I/O APIC register specified by Index.\r
@param Index Specifies the I/O APIC register to read.\r
\r
@return The 32-bit value read from the I/O APIC register specified by Index.\r
Write a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
Write a 32-bit I/O APIC register.\r
\r
If Index is >= 0x100, then ASSERT().\r
@param Index Specifies the I/O APIC register to write.\r
@param Value Specifies the value to write to the I/O APIC register specified by Index.\r
\r
@param Index Specifies the I/O APIC register to write.\r
@param Value Specifies the value to write to the I/O APIC register specified by Index.\r
\r
/**\r
Set the interrupt mask of an I/O APIC interrupt.\r
\r
/**\r
Set the interrupt mask of an I/O APIC interrupt.\r
\r
- If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). \r
+ If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().\r
\r
@param Irq Specifies the I/O APIC interrupt to enable or disable.\r
@param Enable If TRUE, then enable the I/O APIC interrupt specified by Irq.\r
\r
@param Irq Specifies the I/O APIC interrupt to enable or disable.\r
@param Enable If TRUE, then enable the I/O APIC interrupt specified by Irq.\r
\r
/**\r
Configures an I/O APIC interrupt.\r
\r
/**\r
Configures an I/O APIC interrupt.\r
Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical\r
Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical\r
- mode to the Local APIC of the currntly executing CPU. The default state of the \r
+ mode to the Local APIC of the currntly executing CPU. The default state of the\r
entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must\r
be used to enable(unmask) the I/O APIC Interrupt.\r
entry is for the interrupt to be disabled (masked). IoApicEnableInterrupts() must\r
be used to enable(unmask) the I/O APIC Interrupt.\r
- \r
- If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT(). \r
+\r
+ If Irq is larger than the maximum number I/O APIC redirection entries, then ASSERT().\r
If Vector >= 0x100, then ASSERT().\r
If DeliveryMode is not supported, then ASSERT().\r
\r
If Vector >= 0x100, then ASSERT().\r
If DeliveryMode is not supported, then ASSERT().\r
\r
ASSERT (Irq <= Version.Bits.MaximumRedirectionEntry);\r
ASSERT (Vector <= 0xFF);\r
ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);\r
ASSERT (Irq <= Version.Bits.MaximumRedirectionEntry);\r
ASSERT (Vector <= 0xFF);\r
ASSERT (DeliveryMode < 8 && DeliveryMode != 6 && DeliveryMode != 3);\r
Entry.Uint32.Low = IoApicRead (IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX + Irq * 2);\r
Entry.Bits.Vector = (UINT8)Vector;\r
Entry.Bits.DeliveryMode = (UINT32)DeliveryMode;\r
Entry.Uint32.Low = IoApicRead (IO_APIC_REDIRECTION_TABLE_ENTRY_INDEX + Irq * 2);\r
Entry.Bits.Vector = (UINT8)Vector;\r
Entry.Bits.DeliveryMode = (UINT32)DeliveryMode;\r
- Entry.Bits.DestinationMode = 0; \r
+ Entry.Bits.DestinationMode = 0;\r
Entry.Bits.Polarity = AssertionLevel ? 0 : 1;\r
Entry.Bits.TriggerMode = LevelTriggered ? 1 : 0;\r
Entry.Bits.Mask = 1;\r
Entry.Bits.Polarity = AssertionLevel ? 0 : 1;\r
Entry.Bits.TriggerMode = LevelTriggered ? 1 : 0;\r
Entry.Bits.Mask = 1;\r
//\r
// Library instance for ResetSystem library class for PCAT systems\r
//\r
//\r
// Library instance for ResetSystem library class for PCAT systems\r
//\r
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
//\r
// Library instance for SerialIO library class.\r
//\r
//\r
// Library instance for SerialIO library class.\r
//\r
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
/** @file\r
UART Serial Port library functions\r
\r
/** @file\r
UART Serial Port library functions\r
\r
- Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
/**\r
Initialize the serial device hardware.\r
\r
/**\r
Initialize the serial device hardware.\r
If no initialization is required, then return RETURN_SUCCESS.\r
If the serial device was successfully initialized, then return RETURN_SUCCESS.\r
If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.\r
If no initialization is required, then return RETURN_SUCCESS.\r
If the serial device was successfully initialized, then return RETURN_SUCCESS.\r
If the serial device could not be initialized, then return RETURN_DEVICE_ERROR.\r
@retval RETURN_SUCCESS The serial device was initialized.\r
@retval RETURN_DEVICE_ERROR The serail device could not be initialized.\r
\r
@retval RETURN_SUCCESS The serial device was initialized.\r
@retval RETURN_DEVICE_ERROR The serail device could not be initialized.\r
\r
// Calculate divisor for baud generator\r
//\r
Divisor = 115200 / gBps;\r
// Calculate divisor for baud generator\r
//\r
Divisor = 115200 / gBps;\r
//\r
// Set communications format\r
//\r
//\r
// Set communications format\r
//\r
- Write data from buffer to serial device. \r
- \r
- Writes NumberOfBytes data bytes from Buffer to the serial device. \r
+ Write data from buffer to serial device.\r
+\r
+ Writes NumberOfBytes data bytes from Buffer to the serial device.\r
The number of bytes actually written to the serial device is returned.\r
If the return value is less than NumberOfBytes, then the write operation failed.\r
\r
The number of bytes actually written to the serial device is returned.\r
If the return value is less than NumberOfBytes, then the write operation failed.\r
\r
- If Buffer is NULL, then ASSERT(). \r
+ If Buffer is NULL, then ASSERT().\r
\r
If NumberOfBytes is zero, then return 0.\r
\r
\r
If NumberOfBytes is zero, then return 0.\r
\r
@param NumberOfBytes Number of bytes to written to the serial device.\r
\r
@retval 0 NumberOfBytes is 0.\r
@param NumberOfBytes Number of bytes to written to the serial device.\r
\r
@retval 0 NumberOfBytes is 0.\r
- @retval >0 The number of bytes written to the serial device. \r
+ @retval >0 The number of bytes written to the serial device.\r
If this value is less than NumberOfBytes, then the write operation failed.\r
\r
**/\r
If this value is less than NumberOfBytes, then the write operation failed.\r
\r
**/\r
@param NumberOfBytes Number of bytes to read from the serial device.\r
\r
@retval 0 NumberOfBytes is 0.\r
@param NumberOfBytes Number of bytes to read from the serial device.\r
\r
@retval 0 NumberOfBytes is 0.\r
- @retval >0 The number of bytes read from the serial device. \r
+ @retval >0 The number of bytes read from the serial device.\r
If this value is less than NumberOfBytes, then the read operation failed.\r
\r
**/\r
If this value is less than NumberOfBytes, then the read operation failed.\r
\r
**/\r
## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.\r
#\r
IoApicLib|Include/Library/IoApicLib.h\r
## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.\r
#\r
IoApicLib|Include/Library/IoApicLib.h\r
[Guids]\r
gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }\r
\r
[Guids]\r
gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }\r
\r
# 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;\r
# Because only clock interrupt is allowed in legacy mode in pure UEFI platform.<BR>\r
# 2) If platform install CSM and use thunk module:<BR>\r
# 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;\r
# Because only clock interrupt is allowed in legacy mode in pure UEFI platform.<BR>\r
# 2) If platform install CSM and use thunk module:<BR>\r
- # a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit \r
+ # a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit\r
# should be opened as 0.<BR>\r
# For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 1, then\r
# the value should be set to 0xFFFC.<BR>\r
# should be opened as 0.<BR>\r
# For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 1, then\r
# the value should be set to 0xFFFC.<BR>\r
# to 0xFFFF or 0xFFFE.<BR>\r
#\r
# The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely\r
# to 0xFFFF or 0xFFFE.<BR>\r
#\r
# The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely\r
- # need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to \r
+ # need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to\r
# mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.<BR>\r
# @Prompt 8259 Legacy Mode mask.\r
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001\r
# mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.<BR>\r
# @Prompt 8259 Legacy Mode mask.\r
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001\r
## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.\r
# For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.\r
# @Prompt 8259 Legacy Mode edge level.\r
## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.\r
# For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.\r
# @Prompt 8259 Legacy Mode edge level.\r
# The default value of 100000 100 ns units is the same as 10 ms.\r
# @Prompt Default period of HPET timer.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B\r
# The default value of 100000 100 ns units is the same as 10 ms.\r
# @Prompt Default period of HPET timer.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B\r
## This PCD specifies the base address of the IO APIC.\r
# @Prompt IO APIC base address.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C\r
## This PCD specifies the base address of the IO APIC.\r
# @Prompt IO APIC base address.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C\r
# @Prompt Maximal valid year in RTC.\r
# @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100\r
gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E\r
# @Prompt Maximal valid year in RTC.\r
# @Expression 0x80000001 | gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear < gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear + 100\r
gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear|2097|UINT16|0x0000000E\r
[PcdsFixedAtBuild, PcdsPatchableInModule]\r
## Defines the ACPI register set base address.\r
[PcdsFixedAtBuild, PcdsPatchableInModule]\r
## Defines the ACPI register set base address.\r
- # The invalid 0xFFFF is as its default value. It must be configured to the real value. \r
+ # The invalid 0xFFFF is as its default value. It must be configured to the real value.\r
# @Prompt ACPI Timer IO Port Address\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress |0xFFFF|UINT16|0x00000010\r
\r
# @Prompt ACPI Timer IO Port Address\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress |0xFFFF|UINT16|0x00000010\r
\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00| UINT8|0x00000011\r
\r
## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00| UINT8|0x00000011\r
\r
## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.\r
- # The invalid 0xFF is as its default value. It must be configured to the real value. \r
+ # The invalid 0xFF is as its default value. It must be configured to the real value.\r
# @Prompt ACPI Hardware PCI Device Number\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0xFF| UINT8|0x00000012\r
\r
## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.\r
# @Prompt ACPI Hardware PCI Device Number\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0xFF| UINT8|0x00000012\r
\r
## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.\r
- # The invalid 0xFF is as its default value. It must be configured to the real value. \r
+ # The invalid 0xFF is as its default value. It must be configured to the real value.\r
# @Prompt ACPI Hardware PCI Function Number\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0xFF| UINT8|0x00000013\r
# @Prompt ACPI Hardware PCI Function Number\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0xFF| UINT8|0x00000013\r
## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.\r
## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.\r
- # The invalid 0xFFFF is as its default value. It must be configured to the real value. \r
+ # The invalid 0xFFFF is as its default value. It must be configured to the real value.\r
# @Prompt ACPI Hardware PCI Register Offset\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014\r
# @Prompt ACPI Hardware PCI Register Offset\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014\r
## Defines the bit mask that must be set to enable the APIC hardware register BAR.\r
# @Prompt ACPI Hardware PCI Bar Enable BitMask\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x00| UINT8|0x00000015\r
## Defines the bit mask that must be set to enable the APIC hardware register BAR.\r
# @Prompt ACPI Hardware PCI Bar Enable BitMask\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x00| UINT8|0x00000015\r
## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.\r
## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.\r
- # The invalid 0xFFFF is as its default value. It must be configured to the real value. \r
+ # The invalid 0xFFFF is as its default value. It must be configured to the real value.\r
# @Prompt ACPI Hardware PCI Bar Register Offset\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0xFFFF|UINT16|0x00000016\r
\r
# @Prompt ACPI Hardware PCI Bar Register Offset\r
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0xFFFF|UINT16|0x00000016\r
\r
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf\r
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf\r
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf\r
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf\r
DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
- DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf \r
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf\r
DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf\r
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// /** @file\r
// PcAtChipset Package Localized Strings and Content.\r
//\r
// /** @file\r
// PcAtChipset Package Localized Strings and Content.\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
-#string STR_PROPERTIES_PACKAGE_NAME \r
-#language en-US \r
+#string STR_PROPERTIES_PACKAGE_NAME\r
+#language en-US\r
"PcAtChipset package"\r
\r
\r
"PcAtChipset package"\r
\r
\r
\r
/**\r
Compare the Hour, Minute and Second of the From time and the To time.\r
\r
/**\r
Compare the Hour, Minute and Second of the From time and the To time.\r
Only compare H/M/S in EFI_TIME and ignore other fields here.\r
\r
@param From the first time\r
Only compare H/M/S in EFI_TIME and ignore other fields here.\r
\r
@param From the first time\r
if (!EfiAtRuntime ()) {\r
EfiReleaseLock (&Global->RtcLock);\r
}\r
if (!EfiAtRuntime ()) {\r
EfiReleaseLock (&Global->RtcLock);\r
}\r
//\r
// Get the data of Daylight saving and time zone, if they have been\r
// stored in NV variable during previous boot.\r
//\r
// Get the data of Daylight saving and time zone, if they have been\r
// stored in NV variable during previous boot.\r
Time.Daylight = (UINT8) (TimerVar >> 16);\r
} else {\r
Time.TimeZone = EFI_UNSPECIFIED_TIMEZONE;\r
Time.Daylight = (UINT8) (TimerVar >> 16);\r
} else {\r
Time.TimeZone = EFI_UNSPECIFIED_TIMEZONE;\r
if (EFI_ERROR (Status)) {\r
return EFI_DEVICE_ERROR;\r
}\r
if (EFI_ERROR (Status)) {\r
return EFI_DEVICE_ERROR;\r
}\r
//\r
// Reset wakeup time value to valid state when wakeup alarm is disabled and wakeup time is invalid.\r
// Global variable has already had valid SavedTimeZone and Daylight,\r
//\r
// Reset wakeup time value to valid state when wakeup alarm is disabled and wakeup time is invalid.\r
// Global variable has already had valid SavedTimeZone and Daylight,\r
if ((Enabled) || (!EFI_ERROR (Status))) {\r
return EFI_SUCCESS;\r
}\r
if ((Enabled) || (!EFI_ERROR (Status))) {\r
return EFI_SUCCESS;\r
}\r
- // When wakeup time is disabled and invalid, reset wakeup time register to valid state \r
+ // When wakeup time is disabled and invalid, reset wakeup time register to valid state\r
// but keep wakeup alarm disabled.\r
//\r
Time.Second = RTC_INIT_SECOND;\r
// but keep wakeup alarm disabled.\r
//\r
Time.Second = RTC_INIT_SECOND;\r
}\r
return EFI_DEVICE_ERROR;\r
}\r
}\r
return EFI_DEVICE_ERROR;\r
}\r
//\r
// Inhibit updates of the RTC\r
//\r
RegisterB.Bits.Set = 1;\r
RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);\r
//\r
// Inhibit updates of the RTC\r
//\r
RegisterB.Bits.Set = 1;\r
RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);\r
//\r
// Set RTC alarm time registers\r
//\r
//\r
// Set RTC alarm time registers\r
//\r
//\r
RegisterB.Bits.Set = 0;\r
RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);\r
//\r
RegisterB.Bits.Set = 0;\r
RtcWrite (RTC_ADDRESS_REGISTER_B, RegisterB.Data);\r
//\r
// Release RTC Lock.\r
//\r
//\r
// Release RTC Lock.\r
//\r
//\r
// Write timezone and daylight to RTC variable\r
//\r
//\r
// Write timezone and daylight to RTC variable\r
//\r
}\r
return EFI_DEVICE_ERROR;\r
}\r
}\r
return EFI_DEVICE_ERROR;\r
}\r
//\r
// Inhibit updates of the RTC\r
//\r
//\r
// Inhibit updates of the RTC\r
//\r
@param Timeout Tell how long it should take to wait.\r
\r
@retval EFI_DEVICE_ERROR RTC device error.\r
@param Timeout Tell how long it should take to wait.\r
\r
@retval EFI_DEVICE_ERROR RTC device error.\r
- @retval EFI_SUCCESS RTC is updated and ready. \r
+ @retval EFI_SUCCESS RTC is updated and ready.\r
**/\r
EFI_STATUS\r
RtcWaitToUpdate (\r
**/\r
EFI_STATUS\r
RtcWaitToUpdate (\r
\r
/**\r
Compare the Hour, Minute and Second of the From time and the To time.\r
\r
/**\r
Compare the Hour, Minute and Second of the From time and the To time.\r
Only compare H/M/S in EFI_TIME and ignore other fields here.\r
\r
@param From the first time\r
Only compare H/M/S in EFI_TIME and ignore other fields here.\r
\r
@param From the first time\r
//\r
ASSERT (From->Month >=1);\r
ASSERT (From->Month <=12);\r
//\r
ASSERT (From->Month >=1);\r
ASSERT (From->Month <=12);\r
if (From->Year == To->Year) {\r
if (From->Month == To->Month) {\r
if ((From->Day + 1) == To->Day) {\r
if (From->Year == To->Year) {\r
if (From->Month == To->Month) {\r
if ((From->Day + 1) == To->Day) {\r
@param Timeout Tell how long it should take to wait.\r
\r
@retval EFI_DEVICE_ERROR RTC device error.\r
@param Timeout Tell how long it should take to wait.\r
\r
@retval EFI_DEVICE_ERROR RTC device error.\r
- @retval EFI_SUCCESS RTC is updated and ready. \r
+ @retval EFI_SUCCESS RTC is updated and ready.\r
**/\r
EFI_STATUS\r
RtcWaitToUpdate (\r
**/\r
EFI_STATUS\r
RtcWaitToUpdate (\r
// PcRtc driver to install EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL\r
//\r
// PcRtc driver to install EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL.\r
// PcRtc driver to install EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL\r
//\r
// PcRtc driver to install EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL.\r
// This driver provides GetTime, SetTime, GetWakeupTime, SetWakeupTime services to Runtime Service Table.\r
// It will install a tagging protocol with gEfiRealTimeClockArchProtocolGuid.\r
//\r
// This driver provides GetTime, SetTime, GetWakeupTime, SetWakeupTime services to Runtime Service Table.\r
// It will install a tagging protocol with gEfiRealTimeClockArchProtocolGuid.\r
//\r
-// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
/** @file\r
Provides Set/Get time operations.\r
\r
/** @file\r
Provides Set/Get time operations.\r
\r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
Status = PcRtcInit (&mModuleGlobal);\r
ASSERT_EFI_ERROR (Status);\r
\r
Status = PcRtcInit (&mModuleGlobal);\r
ASSERT_EFI_ERROR (Status);\r
Status = gBS->CreateEventEx (\r
EVT_NOTIFY_SIGNAL,\r
TPL_CALLBACK,\r
Status = gBS->CreateEventEx (\r
EVT_NOTIFY_SIGNAL,\r
TPL_CALLBACK,\r
&Event\r
);\r
ASSERT_EFI_ERROR (Status);\r
&Event\r
);\r
ASSERT_EFI_ERROR (Status);\r
Status = gBS->CreateEventEx (\r
EVT_NOTIFY_SIGNAL,\r
TPL_CALLBACK,\r
Status = gBS->CreateEventEx (\r
EVT_NOTIFY_SIGNAL,\r
TPL_CALLBACK,\r
// /** @file\r
// PcRtc Localized Strings and Content\r
//\r
// /** @file\r
// PcRtc Localized Strings and Content\r
//\r
-// Copyright (c) 2013 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
//\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
-#string STR_PROPERTIES_MODULE_NAME \r
-#language en-US \r
+#string STR_PROPERTIES_MODULE_NAME\r
+#language en-US\r
"PCAT Real Time Clock DXE Driver"\r
\r
\r
"PCAT Real Time Clock DXE Driver"\r
\r
\r
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterA ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterB ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdInitialValueRtcRegisterD ## CONSUMES\r
[Pcd]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear ## CONSUMES\r
[Pcd]\r
gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout ## CONSUMES\r
gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear ## CONSUMES\r