SecurityPkg Tcg: Use SW SMI IO port PCD in Tpm.asl

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2416

Replaces the hardcoded value of 0xB2 with a PCD for the SMI port access
operation region. This allows platforms to customize the IO port value if
necessary.

Cc: Kun Qin <Kun.Qin@microsoft.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Guomin Jiang <guomin.jiang@intel.com>
Reviewed-by: Bret Barkelew <bret.barkelew@microsoft.com>

diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
index e33cbcc49152385670dcec16eda758c780423b95..2ebf2e05f2eaa29c3eac5d6080249947f135a996 100644 (file)
--- a/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
+++ b/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
@@ -21,6 +21,7 @@
 #  This external input must be validated carefully to avoid security issue.\r
 #\r
 # Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) Microsoft Corporation.<BR>\r
 # SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
 ##\r
@@ -70,6 +71,9 @@
   gEfiSmmVariableProtocolGuid                                   ## CONSUMES\r
   gEfiAcpiTableProtocolGuid                                     ## CONSUMES\r
 \r
+[FixedPcd]\r
+  gEfiSecurityPkgTokenSpaceGuid.PcdSmiCommandIoPort             ## CONSUMES\r
+\r
 [Pcd]\r
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid              ## CONSUMES\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId            ## SOMETIMES_CONSUMES\r

diff --git a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
index 7a91708a1a344016a763bb33581c737657beaea3..95f9d7eae8416ee60d86d3003f47198361d76d88 100644 (file)
--- a/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
+++ b/SecurityPkg/Tcg/Tcg2Smm/Tpm.asl
@@ -4,7 +4,7 @@
 \r
 Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
 (c)Copyright 2016 HP Development Company, L.P.<BR>\r
-Copyright (c) 2017, Microsoft Corporation.  All rights reserved. <BR>\r
+Copyright (c) Microsoft Corporation.<BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -41,10 +41,10 @@ DefinitionBlock (
       //\r
       // Operational region for Smi port access\r
       //\r
-      OperationRegion (SMIP, SystemIO, 0xB2, 1)\r
+      OperationRegion (SMIP, SystemIO, FixedPcdGet16 (PcdSmiCommandIoPort), 1)\r
       Field (SMIP, ByteAcc, NoLock, Preserve)\r
       {\r
-          IOB2, 8\r
+          IOPN, 8\r
       }\r
 \r
       //\r
@@ -258,7 +258,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (MCIN, IOB2)\r
+            Store (MCIN, IOPN)\r
           }\r
         }\r
         Return (0)\r
@@ -359,7 +359,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
             Return (FRET)\r
 \r
 \r
@@ -390,7 +390,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
 \r
             Store (LPPR, Index (TPM3, 0x01))\r
             Store (PPRP, Index (TPM3, 0x02))\r
@@ -422,7 +422,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
             Return (FRET)\r
           }\r
           Case (8)\r
@@ -436,7 +436,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
 \r
             Return (FRET)\r
           }\r
@@ -475,7 +475,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (MCIN, IOB2)\r
+            Store (MCIN, IOPN)\r
             Return (MRET)\r
           }\r
           Default {BreakPoint}\r

diff --git a/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf b/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
index 29f9c15b0e02562606b74d008fb29f724202406a..9fac896dde8bd2b0e2ba65720a3f3665e1ed748b 100644 (file)
--- a/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
+++ b/SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
@@ -10,6 +10,7 @@
 #  This external input must be validated carefully to avoid security issue.\r
 #\r
 # Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) Microsoft Corporation.<BR>\r
 # SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
 ##\r
@@ -63,6 +64,9 @@
   gEfiSmmVariableProtocolGuid                           ## CONSUMES\r
   gEfiAcpiTableProtocolGuid                             ## CONSUMES\r
 \r
+[FixedPcd]\r
+  gEfiSecurityPkgTokenSpaceGuid.PcdSmiCommandIoPort     ## CONSUMES\r
+\r
 [Pcd]\r
   gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid      ## CONSUMES\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemId    ## SOMETIMES_CONSUMES\r

diff --git a/SecurityPkg/Tcg/TcgSmm/Tpm.asl b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
index 739067dbec0351e634d0fe9a8deb9024f84d0764..9d5e6ddc110b5841dcac276600cc1a58790928e9 100644 (file)
--- a/SecurityPkg/Tcg/TcgSmm/Tpm.asl
+++ b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
@@ -3,6 +3,7 @@
   and MemoryClear.\r
 \r
 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) Microsoft Corporation.<BR>\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -41,10 +42,10 @@ DefinitionBlock (
       //\r
       // Operational region for Smi port access\r
       //\r
-      OperationRegion (SMIP, SystemIO, 0xB2, 1)\r
+      OperationRegion (SMIP, SystemIO, FixedPcdGet16 (PcdSmiCommandIoPort), 1)\r
       Field (SMIP, ByteAcc, NoLock, Preserve)\r
       {\r
-          IOB2, 8\r
+          IOPN, 8\r
       }\r
 \r
       //\r
@@ -96,7 +97,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (MCIN, IOB2)\r
+            Store (MCIN, IOPN)\r
           }\r
         }\r
         Return (0)\r
@@ -196,7 +197,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
             Return (FRET)\r
 \r
 \r
@@ -227,7 +228,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
 \r
             Store (LPPR, Index (TPM3, 0x01))\r
             Store (PPRP, Index (TPM3, 0x02))\r
@@ -255,7 +256,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
             Return (FRET)\r
           }\r
           Case (8)\r
@@ -269,7 +270,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)\r
+            Store (PPIN, IOPN)\r
 \r
             Return (FRET)\r
           }\r
@@ -308,7 +309,7 @@ DefinitionBlock (
             //\r
             // Trigger the SMI interrupt\r
             //\r
-            Store (MCIN, IOB2)\r
+            Store (MCIN, IOPN)\r
             Return (MRET)\r
           }\r
           Default {BreakPoint}\r