#\r
# Copyright (c) 2013-2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {\r
<LibraryClasses>\r
#\r
# Copyright (c) 2013-2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
#\r
# Copyright (c) 2012-2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
#\r
# Copyright (c) 2012-2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
#\r
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
#\r
# Copyright (c) 2011 - 2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
#\r
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
\r
#\r
# Copyright (c) 2011-2015, ARM Limited. All rights reserved.\r
+# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
- INF EmbeddedPkg/SerialDxe/SerialDxe.inf\r
+ INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf\r
\r
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf\r
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf\r
# ARM PL011 UART Driver\r
PL011UartLib|ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf\r
SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf\r
- SerialPortExtLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortExtLib.inf\r
# ARM SP804 Dual Timer Driver\r
TimerLib|ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.inf\r
\r
+++ /dev/null
-/** @file\r
- Serial I/O Port library functions with no library constructor/destructor\r
-\r
- Copyright (c) 2012-2014, ARM Ltd. All rights reserved.<BR>\r
-\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/\r
-\r
-#include <Base.h>\r
-\r
-#include <Library/IoLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/SerialPortExtLib.h>\r
-\r
-#include <Drivers/PL011Uart.h>\r
-\r
-/**\r
- Set new attributes to PL011.\r
-\r
- @param BaudRate The baud rate of the serial device. If the baud rate is not supported,\r
- the speed will be reduced down to the nearest supported one and the\r
- variable's value will be updated accordingly.\r
- @param ReceiveFifoDepth The number of characters the device will buffer on input. If the specified\r
- value is not supported, the variable's value will be reduced down to the\r
- nearest supported one.\r
- @param Timeout If applicable, the number of microseconds the device will wait\r
- before timing out a Read or a Write operation.\r
- @param Parity If applicable, this is the EFI_PARITY_TYPE that is computed or checked\r
- as each character is transmitted or received. If the device does not\r
- support parity, the value is the default parity value.\r
- @param DataBits The number of data bits in each character\r
- @param StopBits If applicable, the EFI_STOP_BITS_TYPE number of stop bits per character.\r
- If the device does not support stop bits, the value is the default stop\r
- bit value.\r
-\r
- @retval EFI_SUCCESS All attributes were set correctly on the serial device.\r
- @retval EFI_INVALID_PARAMETERS One or more of the attributes has an unsupported value.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-SerialPortSetAttributes (\r
- IN OUT UINT64 *BaudRate,\r
- IN OUT UINT32 *ReceiveFifoDepth,\r
- IN OUT UINT32 *Timeout,\r
- IN OUT EFI_PARITY_TYPE *Parity,\r
- IN OUT UINT8 *DataBits,\r
- IN OUT EFI_STOP_BITS_TYPE *StopBits\r
- )\r
-{\r
- return PL011UartInitializePort (\r
- (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
- BaudRate,\r
- ReceiveFifoDepth,\r
- Parity,\r
- DataBits,\r
- StopBits);\r
-}\r
-\r
-/**\r
-\r
- Assert or deassert the control signals on a serial port.\r
- The following control signals are set according their bit settings :\r
- . Request to Send\r
- . Data Terminal Ready\r
-\r
- @param[in] Control The following bits are taken into account :\r
- . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
- "Request To Send" control signal if this bit is\r
- equal to one/zero.\r
- . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
- the "Data Terminal Ready" control signal if this\r
- bit is equal to one/zero.\r
- . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
- the hardware loopback if this bit is equal to\r
- one/zero.\r
- . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
- . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
- disable the hardware flow control based on CTS (Clear\r
- To Send) and RTS (Ready To Send) control signals.\r
-\r
- @retval RETURN_SUCCESS The new control bits were set on the serial device.\r
- @retval RETURN_UNSUPPORTED The serial device does not support this operation.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-SerialPortSetControl (\r
- IN UINT32 Control\r
- )\r
-{\r
- return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
-}\r
-\r
-/**\r
-\r
- Retrieve the status of the control bits on a serial device.\r
-\r
- @param[out] Control Status of the control bits on a serial device :\r
-\r
- . EFI_SERIAL_DATA_CLEAR_TO_SEND, EFI_SERIAL_DATA_SET_READY,\r
- EFI_SERIAL_RING_INDICATE, EFI_SERIAL_CARRIER_DETECT,\r
- EFI_SERIAL_REQUEST_TO_SEND, EFI_SERIAL_DATA_TERMINAL_READY\r
- are all related to the DTE (Data Terminal Equipment) and\r
- DCE (Data Communication Equipment) modes of operation of\r
- the serial device.\r
- . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the receive\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the transmit\r
- buffer is empty, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if the\r
- hardware loopback is enabled (the ouput feeds the receive\r
- buffer), 0 otherwise.\r
- . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if a\r
- loopback is accomplished by software, 0 otherwise.\r
- . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to one if the\r
- hardware flow control based on CTS (Clear To Send) and RTS\r
- (Ready To Send) control signals is enabled, 0 otherwise.\r
-\r
- @retval RETURN_SUCCESS The control bits were read from the serial device.\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-SerialPortGetControl (\r
- OUT UINT32 *Control\r
- )\r
-{\r
- return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
-}\r
+++ /dev/null
-#/** @file\r
-#\r
-# Component description file for PL011SerialPortLib module\r
-#\r
-# Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
-#\r
-# This program and the accompanying materials\r
-# are licensed and made available under the terms and conditions of the BSD License\r
-# which accompanies this distribution. The full text of the license may be found at\r
-# http://opensource.org/licenses/bsd-license.php\r
-#\r
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-#\r
-#**/\r
-\r
-[Defines]\r
- INF_VERSION = 0x00010005\r
- BASE_NAME = PL011SerialPortExtLib\r
- FILE_GUID = 2be281f1-c506-4558-bd98-d6930e6de9d6\r
- MODULE_TYPE = BASE\r
- VERSION_STRING = 1.0\r
- LIBRARY_CLASS = SerialPortExtLib\r
-\r
-[Sources.common]\r
- PL011SerialPortExtLib.c\r
-\r
-[LibraryClasses]\r
- PL011UartLib\r
- PcdLib\r
-\r
-[Packages]\r
- EmbeddedPkg/EmbeddedPkg.dec\r
- MdePkg/MdePkg.dec\r
- MdeModulePkg/MdeModulePkg.dec\r
- ArmPlatformPkg/ArmPlatformPkg.dec\r
-\r
-[Pcd]\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity\r
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits\r
Serial I/O Port library functions with no library constructor/destructor\r
\r
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r
- Copyright (c) 2012 - 2013, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2012 - 2014, ARM Ltd. All rights reserved.<BR>\r
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
#include <Library/IoLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/SerialPortLib.h>\r
-#include <Library/SerialPortExtLib.h>\r
\r
#include <Drivers/PL011Uart.h>\r
\r
{\r
return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));\r
}\r
+/**\r
+ Set new attributes to PL011.\r
+\r
+ @param BaudRate The baud rate of the serial device. If the baud rate is not supported,\r
+ the speed will be reduced down to the nearest supported one and the\r
+ variable's value will be updated accordingly.\r
+ @param ReceiveFifoDepth The number of characters the device will buffer on input. If the specified\r
+ value is not supported, the variable's value will be reduced down to the\r
+ nearest supported one.\r
+ @param Timeout If applicable, the number of microseconds the device will wait\r
+ before timing out a Read or a Write operation.\r
+ @param Parity If applicable, this is the EFI_PARITY_TYPE that is computed or checked\r
+ as each character is transmitted or received. If the device does not\r
+ support parity, the value is the default parity value.\r
+ @param DataBits The number of data bits in each character\r
+ @param StopBits If applicable, the EFI_STOP_BITS_TYPE number of stop bits per character.\r
+ If the device does not support stop bits, the value is the default stop\r
+ bit value.\r
+\r
+ @retval EFI_SUCCESS All attributes were set correctly on the serial device.\r
+ @retval EFI_INVALID_PARAMETERS One or more of the attributes has an unsupported value.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortSetAttributes (\r
+ IN OUT UINT64 *BaudRate,\r
+ IN OUT UINT32 *ReceiveFifoDepth,\r
+ IN OUT UINT32 *Timeout,\r
+ IN OUT EFI_PARITY_TYPE *Parity,\r
+ IN OUT UINT8 *DataBits,\r
+ IN OUT EFI_STOP_BITS_TYPE *StopBits\r
+ )\r
+{\r
+ return PL011UartInitializePort (\r
+ (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
+ BaudRate,\r
+ ReceiveFifoDepth,\r
+ Parity,\r
+ DataBits,\r
+ StopBits);\r
+}\r
+\r
+/**\r
+\r
+ Assert or deassert the control signals on a serial port.\r
+ The following control signals are set according their bit settings :\r
+ . Request to Send\r
+ . Data Terminal Ready\r
+\r
+ @param[in] Control The following bits are taken into account :\r
+ . EFI_SERIAL_REQUEST_TO_SEND : assert/deassert the\r
+ "Request To Send" control signal if this bit is\r
+ equal to one/zero.\r
+ . EFI_SERIAL_DATA_TERMINAL_READY : assert/deassert\r
+ the "Data Terminal Ready" control signal if this\r
+ bit is equal to one/zero.\r
+ . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : enable/disable\r
+ the hardware loopback if this bit is equal to\r
+ one/zero.\r
+ . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : not supported.\r
+ . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : enable/\r
+ disable the hardware flow control based on CTS (Clear\r
+ To Send) and RTS (Ready To Send) control signals.\r
+\r
+ @retval RETURN_SUCCESS The new control bits were set on the serial device.\r
+ @retval RETURN_UNSUPPORTED The serial device does not support this operation.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortSetControl (\r
+ IN UINT32 Control\r
+ )\r
+{\r
+ return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
+}\r
+\r
+/**\r
\r
+ Retrieve the status of the control bits on a serial device.\r
+\r
+ @param[out] Control Status of the control bits on a serial device :\r
+\r
+ . EFI_SERIAL_DATA_CLEAR_TO_SEND, EFI_SERIAL_DATA_SET_READY,\r
+ EFI_SERIAL_RING_INDICATE, EFI_SERIAL_CARRIER_DETECT,\r
+ EFI_SERIAL_REQUEST_TO_SEND, EFI_SERIAL_DATA_TERMINAL_READY\r
+ are all related to the DTE (Data Terminal Equipment) and\r
+ DCE (Data Communication Equipment) modes of operation of\r
+ the serial device.\r
+ . EFI_SERIAL_INPUT_BUFFER_EMPTY : equal to one if the receive\r
+ buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_OUTPUT_BUFFER_EMPTY : equal to one if the transmit\r
+ buffer is empty, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE : equal to one if the\r
+ hardware loopback is enabled (the output feeds the receive\r
+ buffer), 0 otherwise.\r
+ . EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE : equal to one if a\r
+ loopback is accomplished by software, 0 otherwise.\r
+ . EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE : equal to one if the\r
+ hardware flow control based on CTS (Clear To Send) and RTS\r
+ (Ready To Send) control signals is enabled, 0 otherwise.\r
+\r
+ @retval RETURN_SUCCESS The control bits were read from the serial device.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortGetControl (\r
+ OUT UINT32 *Control\r
+ )\r
+{\r
+ return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
+}\r
projects / mirror_edk2.git / commitdiff