EXTERN GetBootFirmwareVolumeOffset:PROC\r
EXTERN Pei2LoaderSwitchStack:PROC\r
EXTERN FspSelfCheck(FspSelfCheckDflt):PROC\r
-EXTERN PlatformBasicInit(PlatformBasicInitDflt):PROC\r
EXTERN LoadUcode(LoadUcodeDflt):PROC\r
-EXTERN SecPlatformInit:PROC\r
+EXTERN SecPlatformInit(SecPlatformInitDflt):PROC\r
EXTERN SecCarInit:PROC\r
\r
;\r
FspSelfCheckDflt ENDP\r
\r
;------------------------------------------------------------------------------\r
-PlatformBasicInitDflt PROC NEAR PUBLIC\r
+SecPlatformInitDflt PROC NEAR PUBLIC\r
; Inputs:\r
; eax -> Return address\r
; Outputs:\r
xor eax, eax\r
exit:\r
jmp ebp\r
-PlatformBasicInitDflt ENDP\r
+SecPlatformInitDflt ENDP\r
\r
;------------------------------------------------------------------------------\r
LoadUcodeDflt PROC NEAR PUBLIC\r
LoadUcodeDflt ENDP\r
\r
EstablishStackFsp PROC NEAR PRIVATE\r
- ; Following is the code copied from BYTFSP, need to figure out what it is doing..\r
;\r
; Save parameter pointer in edx \r
;\r
;\r
push DATA_LEN_OF_PER0 ; Size of the data region \r
push 30524550h ; Signature of the data region 'PER0'\r
- movd eax, xmm4\r
- push eax\r
- movd eax, xmm5\r
+ LOAD_EDX\r
+ push edx\r
+ LOAD_EAX\r
push eax\r
rdtsc\r
push edx\r
; Save timestamp into XMM4 & XMM5\r
;\r
rdtsc\r
- movd xmm4, edx\r
- movd xmm5, eax\r
- \r
+ SAVE_EAX\r
+ SAVE_EDX\r
+\r
+ ;\r
+ ; Check Parameter\r
+ ;\r
+ mov eax, dword ptr [esp + 4]\r
+ cmp eax, 0\r
+ mov eax, 80000002h\r
+ jz NemInitExit\r
+\r
;\r
; CPUID/DeviceID check\r
;\r
jnz NemInitExit\r
\r
CALL_MMX SecPlatformInit\r
-\r
- ; Call Sec CAR Init\r
- CALL_MMX SecCarInit\r
+ cmp eax, 0\r
+ jnz NemInitExit\r
\r
- ; @todo: ESP has been modified, we need to restore here.\r
- LOAD_REGS\r
- SAVE_REGS\r
; Load microcode\r
+ LOAD_ESP\r
CALL_MMX LoadUcode\r
+ cmp eax, 0\r
+ jnz NemInitExit\r
+\r
+ ; Call Sec CAR Init\r
+ LOAD_ESP\r
+ CALL_MMX SecCarInit\r
+ cmp eax, 0\r
+ jnz NemInitExit\r
\r
+ LOAD_ESP\r
CALL_MMX EstablishStackFsp\r
\r
NemInitExit:\r
\r
\r
#------------------------------------------------------------------------------\r
-# PlatformBasicInitDflt\r
+# SecPlatformInitDflt\r
# Inputs:\r
# eax -> Return address\r
# Outputs:\r
# eax is cleared and ebp is used for return address.\r
# All others reserved.\r
#------------------------------------------------------------------------------\r
-ASM_GLOBAL ASM_PFX(PlatformBasicInitDflt)\r
-ASM_PFX(PlatformBasicInitDflt):\r
+ASM_GLOBAL ASM_PFX(SecPlatformInitDflt)\r
+ASM_PFX(SecPlatformInitDflt):\r
#\r
# Save return address to EBP\r
#\r
movl %eax, %ebp\r
xorl %eax, %eax\r
\r
-PlatformBasicInitDfltExit:\r
+SecPlatformInitDfltExit:\r
jmp *%ebp\r
\r
\r
#\r
# Save return address to EBP\r
#\r
- movd %xmm7, %ebp\r
+ movd %mm7, %ebp\r
\r
cmpl $0x00, %esp\r
jz ParamError\r
#----------------------------------------------------------------------------\r
# EstablishStackFsp\r
#\r
-# Following is the code copied from BYTFSP, need to figure out what it is doing..\r
-#\r
#----------------------------------------------------------------------------\r
ASM_GLOBAL ASM_PFX(EstablishStackFsp)\r
ASM_PFX(EstablishStackFsp):\r
#\r
pushl $DATA_LEN_OF_PER0 # Size of the data region\r
pushl $0x30524550 # Signature of the data region 'PER0'\r
- movd %xmm4, %eax\r
- pushl %eax\r
- movd %xmm5, %eax\r
+ LOAD_EDX\r
+ pushl %edx\r
+ LOAD_EAX\r
pushl %eax\r
rdtsc\r
pushl %edx\r
# Save timestamp into XMM4 & XMM5\r
#\r
rdtsc\r
- movd %edx, %xmm4\r
- movd %eax, %xmm5\r
+ SAVE_EAX\r
+ SAVE_EDX\r
+\r
+ #\r
+ # Check Parameter\r
+ #\r
+ movl 4(%esp), %eax\r
+ cmpl $0x00, %eax\r
+ movl $0x80000002, %eax\r
+ jz NemInitExit\r
\r
#\r
# CPUID/DeviceID check\r
movd %mm7, %esi\r
jmp ASM_PFX(SecPlatformInit)\r
TempRamInitApiL1:\r
+ cmpl $0x00, %eax\r
+ jnz NemInitExit\r
\r
#\r
- # Call Sec CAR Init\r
+ # Load microcode\r
#\r
- movl $TempRamInitApiL2, %esi #CALL_MMX SecCarInit\r
+ LOAD_ESP\r
+ movl $TempRamInitApiL2, %esi #CALL_MMX LoadUcode\r
movd %mm7, %esi\r
- jmp ASM_PFX(SecCarInit)\r
+ jmp ASM_PFX(LoadUcode)\r
TempRamInitApiL2:\r
-\r
- # @todo: ESP has been modified, we need to restore here.\r
-\r
- LOAD_REGS\r
- SAVE_REGS\r
+ cmpl $0x00, %eax\r
+ jnz NemInitExit\r
\r
#\r
- # Load microcode\r
+ # Call Sec CAR Init\r
#\r
- movl $TempRamInitApiL3, %esi #CALL_MMX LoadUcode\r
+ LOAD_ESP\r
+ movl $TempRamInitApiL3, %esi #CALL_MMX SecCarInit\r
movd %mm7, %esi\r
- jmp ASM_PFX(LoadUcode)\r
+ jmp ASM_PFX(SecCarInit)\r
TempRamInitApiL3:\r
+ cmpl $0x00, %eax\r
+ jnz NemInitExit\r
\r
#\r
# EstablishStackFsp\r
#\r
+ LOAD_ESP\r
movl $TempRamInitApiL4, %esi #CALL_MMX EstablishStackFsp\r
movd %mm7, %esi\r
jmp ASM_PFX(EstablishStackFsp)\r
#ifndef __GUID_HOB_FSP_EAS_GUID__\r
#define __GUID_HOB_FSP_EAS_GUID__\r
\r
-extern EFI_GUID gFspBootLoaderTempMemoryGuid;\r
-extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid; // Same as gFspBootLoaderTempMemoryGuid\r
+extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid;\r
\r
extern EFI_GUID gFspReservedMemoryResourceHobGuid;\r
extern EFI_GUID gFspNonVolatileStorageHobGuid;\r
UINT8 Reserved[3];\r
UINT32 PerfIdx;\r
UINT64 PerfData[32];\r
-// UINT64 PerfData[FixedPcdGet32(PcdFspMaxPerfEntry)];\r
} FSP_GLOBAL_DATA;\r
\r
#pragma pack()\r
UINT8 Reserved;\r
UINT32 PatchEntryNum;\r
UINT32 PatchData[FixedPcdGet32(PcdFspMaxPatchEntry)];\r
- UINT32 VpdBase;\r
} FSP_PATCH_TABLE;\r
\r
#pragma pack()\r
\r
# Guid define in FSP EAS\r
gFspHeaderFileGuid = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }\r
- gFspBootLoaderTempMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }\r
gFspBootLoaderTemporaryMemoryGuid = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }\r
gFspReservedMemoryResourceHobGuid = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }\r
gFspNonVolatileStorageHobGuid = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }\r
gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES\r
\r
[Guids]\r
- gFspBootLoaderTempMemoryGuid ## PRODUCES ## HOB\r
+ gFspBootLoaderTemporaryMemoryGuid ## PRODUCES ## HOB\r
\r
[FixedPcd]\r
gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry ## CONSUMES\r
// Build a Boot Loader Temporary Memory GUID HOB\r
//\r
if (ApiMode == 0) {\r
- BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTempMemoryGuid, BootLoaderTempRamSize);\r
+ BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTemporaryMemoryGuid, BootLoaderTempRamSize);\r
} else {\r
- BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);\r
+ BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);\r
}\r
+ ASSERT(BootLoaderTempRamHob != NULL);\r
\r
CopyMem (BootLoaderTempRamHob, (VOID *)BootLoaderTempRamStart, BootLoaderTempRamSize);\r
OffsetGap = (UINT32)BootLoaderTempRamHob - BootLoaderTempRamStart;\r
ElifStack[-1] = ElifStack[-1] + 1\r
else:\r
if len(DscLine) > 0 and DscLine[0] == '!':\r
- #\r
- # Current it can only handle build switch.\r
- # It does not support INF file in included dsc.\r
- #\r
+ #\r
+ # Current it can only handle build switch.\r
+ # It does not support INF file in included dsc.\r
+ #\r
else:\r
if reduce(lambda x,y: x and y, IfStack):\r
Handle = True\r
ImageRev = struct.unpack('<I', BinFd.read(0x04))\r
BinFd.close()\r
\r
- HeaderFd.write("#define VPD_IMAGE_ID 0x%016X /* '%s' */\n" % (ImageId[0], IdStr))\r
- HeaderFd.write("#define VPD_IMAGE_REV 0x%08X \n\n" % ImageRev[0])\r
+ HeaderFd.write("#define FSP_IMAGE_ID 0x%016X /* '%s' */\n" % (ImageId[0], IdStr))\r
+ HeaderFd.write("#define FSP_IMAGE_REV 0x%08X \n\n" % ImageRev[0])\r
\r
HeaderFd.write("typedef struct _" + Region[0] + "PD_DATA_REGION {\n")\r
NextOffset = 0\r
return EFI_DEVICE_ERROR;\r
}\r
\r
+ ASSERT (FspHeader->TempRamInitEntryOffset != 0);\r
+ ASSERT (FspHeader->FspInitEntryOffset != 0);\r
+ ASSERT (FspHeader->NotifyPhaseEntryOffset != 0);\r
+\r
if ((PcdGet8 (PcdFspApiVersion) >= 2) &&\r
(FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) &&\r
- (FspHeader->ApiEntryNum >= 6) &&\r
- (FspHeader->FspMemoryInitEntryOffset != 0) &&\r
- (FspHeader->TempRamExitEntryOffset != 0) &&\r
- (FspHeader->FspSiliconInitEntryOffset != 0) ) {\r
- PcdFspApiVersion = FSP_HEADER_REVISION_2;\r
+ (FspHeader->ApiEntryNum >= 6) ) {\r
+ ASSERT (FspHeader->FspMemoryInitEntryOffset != 0);\r
+ ASSERT (FspHeader->TempRamExitEntryOffset != 0);\r
+ ASSERT (FspHeader->FspSiliconInitEntryOffset != 0);\r
+ PcdFspApiVersion = PcdGet8 (PcdFspApiVersion);\r
}\r
DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion));\r
\r
- if (PcdFspApiVersion == FSP_HEADER_REVISION_1) {\r
+ if (PcdFspApiVersion == 1) {\r
PeiFspInitV1 (FspHeader);\r
} else {\r
PeiFspInitV2 (FspHeader);\r
FspMemoryInitParams.NvsBufferPtr = GetNvsBuffer ();\r
DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n", FspMemoryInitParams.NvsBufferPtr));\r
FspMemoryInitParams.RtBufferPtr = (VOID *)&FspRtBuffer;\r
+ FspHobList = NULL;\r
FspMemoryInitParams.HobListPtr = &FspHobList;\r
\r
DEBUG ((DEBUG_INFO, "FspMemoryInitParams - 0x%x\n", &FspMemoryInitParams));\r
ASSERT_EFI_ERROR (Status);\r
\r
DEBUG ((DEBUG_INFO, " HobListPtr (returned) - 0x%x\n", FspHobList));\r
+ ASSERT (FspHobList != NULL);\r
\r
FspHobProcessForMemoryResource (FspHobList);\r
\r