ArmPlatformPkg/Sec: Added support for Non Cold Boot Paths

For instance, in case of CpuHotPlug boot path the platform has already been
initialized. The CPU core should not execute any of the platform initialization
in this case.

Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13492 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h b/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h
index 477fd7d99f0edf56f0e468009ac344c409d48583..32f1eb5088944e9867a3a2cd837b2791ede28e4a 100644 (file)
--- a/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h
+++ b/ArmPlatformPkg/Include/Library/ArmPlatformSecLib.h
@@ -15,6 +15,10 @@
 #ifndef _ARMPLATFORMSECLIB_H_
 #define _ARMPLATFORMSECLIB_H_
 
 #ifndef _ARMPLATFORMSECLIB_H_
 #define _ARMPLATFORMSECLIB_H_
 

+#define ARM_SEC_BOOT_MASK                 ~0
+#define ARM_SEC_COLD_BOOT                 (1 << 0)
+#define ARM_SEC_SECONDARY_COLD_BOOT       (1 << 1)
+

 /**
   Initialize the memory where the initial stacks will reside
 
 /**
   Initialize the memory where the initial stacks will reside
 

diff --git a/ArmPlatformPkg/Sec/Helper.S b/ArmPlatformPkg/Sec/Helper.S
index 8bdb66ab8716381da852e2aa7bb3d01169239a78..4eede5faba6ba517caefa3057c55f31e4b5d3faf 100644 (file)
--- a/ArmPlatformPkg/Sec/Helper.S
+++ b/ArmPlatformPkg/Sec/Helper.S
@@ -22,17 +22,18 @@ GCC_ASM_EXPORT(set_non_secure_mode)
 \r
 # r0: Monitor World EntryPoint\r
 # r1: MpId\r
 \r
 # r0: Monitor World EntryPoint\r
 # r1: MpId\r

-# r2: Secure Monitor mode stack\r
+# r2: SecBootMode\r
+# r3: Secure Monitor mode stack\r

 ASM_PFX(enter_monitor_mode):\r
 ASM_PFX(enter_monitor_mode):\r

-    cmp     r2, #0                      @ If a Secure Monitor stack base has not been defined then use the Secure stack\r
-    moveq   r2, sp\r
+    cmp     r3, #0                      @ If a Secure Monitor stack base has not been defined then use the Secure stack\r
+    moveq   r3, sp\r

 \r
     mrs     r4, cpsr                    @ Save current mode (SVC) in r4\r
 \r
     mrs     r4, cpsr                    @ Save current mode (SVC) in r4\r

-    bic     r3, r4, #0x1f               @ Clear all mode bits\r
-    orr     r3, r3, #0x16               @ Set bits for Monitor mode\r
-    msr     cpsr_cxsf, r3               @ We are now in Monitor Mode\r
+    bic     r5, r4, #0x1f               @ Clear all mode bits\r
+    orr     r5, r5, #0x16               @ Set bits for Monitor mode\r
+    msr     cpsr_cxsf, r5               @ We are now in Monitor Mode\r

 \r
 \r

-    mov   sp, r2                      @ Set the stack of the Monitor Mode\r
+    mov     sp, r3                      @ Set the stack of the Monitor Mode\r

 \r
     mov     lr, r0                      @ Use the pass entrypoint as lr\r
     \r
 \r
     mov     lr, r0                      @ Use the pass entrypoint as lr\r
     \r


@@ -40,6 +41,8 @@ ASM_PFX(enter_monitor_mode):
 \r
     mov     r4, r0                      @ Swap EntryPoint and MpId registers\r
     mov     r0, r1\r
 \r
     mov     r4, r0                      @ Swap EntryPoint and MpId registers\r
     mov     r0, r1\r

+    mov     r1, r2\r
+    mov     r2, r3\r

 \r
     bx      r4\r
 \r
 \r
     bx      r4\r
 \r

diff --git a/ArmPlatformPkg/Sec/Helper.asm b/ArmPlatformPkg/Sec/Helper.asm
index a03a90626ee14137d2a2d7e8e152d1b6878e0d25..b31cc31a97eeca196291f86bfbe6bf5a3ab73cae 100644 (file)
--- a/ArmPlatformPkg/Sec/Helper.asm
+++ b/ArmPlatformPkg/Sec/Helper.asm
@@ -20,17 +20,18 @@
 \r
 // r0: Monitor World EntryPoint\r
 // r1: MpId\r
 \r
 // r0: Monitor World EntryPoint\r
 // r1: MpId\r

-// r2: Secure Monitor mode stack\r
-enter_monitor_mode\r
-    cmp     r2, #0                      // If a Secure Monitor stack base has not been defined then use the Secure stack\r
-    moveq   r2, sp\r
+// r2: SecBootMode\r
+// r3: Secure Monitor mode stack\r
+enter_monitor_mode FUNCTION\r
+    cmp     r3, #0                      // If a Secure Monitor stack base has not been defined then use the Secure stack\r
+    moveq   r3, sp\r

 \r
     mrs     r4, cpsr                    // Save current mode (SVC) in r4\r
 \r
     mrs     r4, cpsr                    // Save current mode (SVC) in r4\r

-    bic     r3, r4, #0x1f               // Clear all mode bits\r
-    orr     r3, r3, #0x16               // Set bits for Monitor mode\r
-    msr     cpsr_cxsf, r3               // We are now in Monitor Mode\r
+    bic     r5, r4, #0x1f               // Clear all mode bits\r
+    orr     r5, r5, #0x16               // Set bits for Monitor mode\r
+    msr     cpsr_cxsf, r5               // We are now in Monitor Mode\r

 \r
 \r

-    mov     sp, r2                      // Set the stack of the Monitor Mode\r
+    mov     sp, r3                      // Set the stack of the Monitor Mode\r

 \r
     mov     lr, r0                      // Use the pass entrypoint as lr\r
     \r
 \r
     mov     lr, r0                      // Use the pass entrypoint as lr\r
     \r


@@ -38,8 +39,11 @@ enter_monitor_mode
 \r
     mov     r4, r0                      // Swap EntryPoint and MpId registers\r
     mov     r0, r1\r
 \r
     mov     r4, r0                      // Swap EntryPoint and MpId registers\r
     mov     r0, r1\r

+    mov     r1, r2\r
+    mov     r2, r3\r

 \r
     bx      r4\r
 \r
     bx      r4\r

+    ENDFUNC\r

 \r
 // We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r
 // When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r
 \r
 // We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.\r
 // When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into\r

diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c
index f9746ad89161d20f12d65ba3f9486e1c284ac207..6734653c3e0e98d21c9c5ee8a9ce804e4bb8d99b 100644 (file)
--- a/ArmPlatformPkg/Sec/Sec.c
+++ b/ArmPlatformPkg/Sec/Sec.c
@@ -26,7 +26,8 @@
 
 VOID
 CEntryPoint (
 
 VOID
 CEntryPoint (

-  IN  UINTN                     MpId
+  IN  UINTN                     MpId,
+  IN  UINTN                     SecBootMode

   )
 {
   CHAR8           Buffer[100];
   )
 {
   CHAR8           Buffer[100];


@@ -109,7 +110,7 @@ CEntryPoint (
             ((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0)));
 
     // Enter Monitor Mode
             ((PcdGet32(PcdCPUCoresSecMonStackBase) != 0) && (PcdGet32(PcdCPUCoreSecMonStackSize) != 0)));
 
     // Enter Monitor Mode

-    enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
+    enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));

   } else {
     if (IS_PRIMARY_CORE(MpId)) {
       SerialPrint ("Trust Zone Configuration is disabled\n\r");
   } else {
     if (IS_PRIMARY_CORE(MpId)) {
       SerialPrint ("Trust Zone Configuration is disabled\n\r");


@@ -131,7 +132,8 @@ CEntryPoint (
 
 VOID
 TrustedWorldInitialization (
 
 VOID
 TrustedWorldInitialization (

-  IN  UINTN                     MpId
+  IN  UINTN                     MpId,
+  IN  UINTN                     SecBootMode

   )
 {
   UINTN   JumpAddress;
   )
 {
   UINTN   JumpAddress;


@@ -153,7 +155,7 @@ TrustedWorldInitialization (
       // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
       ArmCallSEV ();
     }
       // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT)
       ArmCallSEV ();
     }

-  } else {
+  } else if ((SecBootMode & ARM_SEC_BOOT_MASK) == ARM_SEC_COLD_BOOT) {

     // The secondary cores need to wait until the Trustzone chipsets configuration is done
     // before switching to Non Secure World
 
     // The secondary cores need to wait until the Trustzone chipsets configuration is done
     // before switching to Non Secure World
 

diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.S b/ArmPlatformPkg/Sec/SecEntryPoint.S
index 8266dad9776b55522c4537870a7b4bda2e3ee187..ed7448af215c75a2387ed3886b0e125883eb73fd 100644 (file)
--- a/ArmPlatformPkg/Sec/SecEntryPoint.S
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.S
@@ -38,6 +38,9 @@ ASM_PFX(_ModuleEntryPoint):
   // Ensure that the MMU and caches are off\r
   bl    ASM_PFX(ArmDisableCachesAndMmu)\r
 \r
   // Ensure that the MMU and caches are off\r
   bl    ASM_PFX(ArmDisableCachesAndMmu)\r
 \r

+  // By default, we are doing a cold boot\r
+  mov   r10, #ARM_SEC_COLD_BOOT\r
+\r

   // Jump to Platform Specific Boot Action function\r
   blx   ASM_PFX(ArmPlatformSecBootAction)\r
 \r
   // Jump to Platform Specific Boot Action function\r
   blx   ASM_PFX(ArmPlatformSecBootAction)\r
 \r


@@ -59,6 +62,11 @@ _IdentifyCpu:
   beq   _InitMem\r
   \r
 _WaitInitMem:\r
   beq   _InitMem\r
   \r
 _WaitInitMem:\r

+  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
+  // Otherwise we have to wait the Primary Core to finish the initialization\r
+  cmp   r10, #ARM_SEC_COLD_BOOT\r
+  bne   _SetupSecondaryCoreStack\r
+\r

   // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)\r
   bl    ASM_PFX(ArmCallWFE)\r
   // Now the Init Mem is initialized, we setup the secondary core stacks\r
   // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)\r
   bl    ASM_PFX(ArmCallWFE)\r
   // Now the Init Mem is initialized, we setup the secondary core stacks\r


@@ -108,7 +116,9 @@ _PrepareArguments:
   \r
   // Jump to SEC C code\r
   //    r0 = mp_id\r
   \r
   // Jump to SEC C code\r
   //    r0 = mp_id\r

+  //    r1 = Boot Mode\r

   mov   r0, r5\r
   mov   r0, r5\r

+  mov   r1, r10\r

   blx   r3\r
   \r
 _NeverReturn:\r
   blx   r3\r
   \r
 _NeverReturn:\r

diff --git a/ArmPlatformPkg/Sec/SecEntryPoint.asm b/ArmPlatformPkg/Sec/SecEntryPoint.asm
index a20a3fd9f619b2f4f2708d4cfc9fe2a2ac2c68b0..30cf19245cb8dd521726e50c4b3044d5ac211d78 100644 (file)
--- a/ArmPlatformPkg/Sec/SecEntryPoint.asm
+++ b/ArmPlatformPkg/Sec/SecEntryPoint.asm
@@ -33,13 +33,16 @@
   \r
 StartupAddr        DCD      CEntryPoint\r
 \r
   \r
 StartupAddr        DCD      CEntryPoint\r
 \r

-_ModuleEntryPoint\r
+_ModuleEntryPoint FUNCTION\r

   // First ensure all interrupts are disabled\r
   blx   ArmDisableInterrupts\r
 \r
   // Ensure that the MMU and caches are off\r
   blx   ArmDisableCachesAndMmu\r
 \r
   // First ensure all interrupts are disabled\r
   blx   ArmDisableInterrupts\r
 \r
   // Ensure that the MMU and caches are off\r
   blx   ArmDisableCachesAndMmu\r
 \r

+  // By default, we are doing a cold boot\r
+  mov   r10, #ARM_SEC_COLD_BOOT\r
+\r

   // Jump to Platform Specific Boot Action function\r
   blx   ArmPlatformSecBootAction\r
 \r
   // Jump to Platform Specific Boot Action function\r
   blx   ArmPlatformSecBootAction\r
 \r


@@ -61,6 +64,11 @@ _IdentifyCpu
   beq   _InitMem\r
   \r
 _WaitInitMem\r
   beq   _InitMem\r
   \r
 _WaitInitMem\r

+  // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
+  // Otherwise we have to wait the Primary Core to finish the initialization\r
+  cmp   r10, #ARM_SEC_COLD_BOOT\r
+  bne   _SetupSecondaryCoreStack\r
+\r

   // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)\r
   bl    ArmCallWFE\r
   // Now the Init Mem is initialized, we setup the secondary core stacks\r
   // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)\r
   bl    ArmCallWFE\r
   // Now the Init Mem is initialized, we setup the secondary core stacks\r


@@ -110,8 +118,11 @@ _PrepareArguments
   \r
   // Jump to SEC C code\r
   //    r0 = mp_id\r
   \r
   // Jump to SEC C code\r
   //    r0 = mp_id\r

+  //    r1 = Boot Mode\r

   mov   r0, r5\r
   mov   r0, r5\r

+  mov   r1, r10\r

   blx   r3\r
   blx   r3\r

+  ENDFUNC\r

   \r
 _NeverReturn\r
   b _NeverReturn\r
   \r
 _NeverReturn\r
   b _NeverReturn\r

diff --git a/ArmPlatformPkg/Sec/SecInternal.h b/ArmPlatformPkg/Sec/SecInternal.h
index 0d6daf993aabdc2c648f31b41cea33c5e228a91d..34a6feab1e15f5a0f9dd4b75bc0598b3d0741419 100644 (file)
--- a/ArmPlatformPkg/Sec/SecInternal.h
+++ b/ArmPlatformPkg/Sec/SecInternal.h
@@ -28,7 +28,8 @@
 \r
 VOID\r
 TrustedWorldInitialization (\r
 \r
 VOID\r
 TrustedWorldInitialization (\r

-  IN  UINTN                 MpId\r
+  IN  UINTN                     MpId,\r
+  IN  UINTN                     SecBootMode\r

   );\r
 \r
 VOID\r
   );\r
 \r
 VOID\r


@@ -53,7 +54,8 @@ VOID
 enter_monitor_mode (\r
   IN UINTN                  MonitorEntryPoint,\r
   IN UINTN                  MpId,\r
 enter_monitor_mode (\r
   IN UINTN                  MonitorEntryPoint,\r
   IN UINTN                  MpId,\r

-  IN VOID*                  Stack\r
+  IN UINTN                  SecBootMode,\r
+  IN VOID*                  MonitorStackBase\r

   );\r
 \r
 VOID\r
   );\r
 \r
 VOID\r