IntelFsp2Pkg: Update FSP_GLOBAL_DATA and FSP_PLAT_DATA for X64

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3893
Updated FSP_GLOBAL_DATA and FSP_PLAT_DATA structures to support
both IA32 and X64.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Ashraf Ali S <ashraf.ali.s@intel.com>
Signed-off-by: Ted Kuo <ted.kuo@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

diff --git a/IntelFsp2Pkg/FspSecCore/SecFsp.c b/IntelFsp2Pkg/FspSecCore/SecFsp.c
index 04b43c10d094ee1a0d8152b7e82f014cc7e50aae..7fde6e7f418c99a46a24ed4ae65cfbbbcdb14e06 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecFsp.c
+++ b/IntelFsp2Pkg/FspSecCore/SecFsp.c
@@ -130,7 +130,7 @@ FspGlobalDataInit (
   ZeroMem ((VOID *)PeiFspData, sizeof (FSP_GLOBAL_DATA));\r
 \r
   PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE;\r
-  PeiFspData->Version   = 0;\r
+  PeiFspData->Version   = FSP_GLOBAL_DATA_VERSION;\r
   PeiFspData->CoreStack = BootLoaderStack;\r
   PeiFspData->PerfIdx   = 2;\r
   PeiFspData->PerfSig   = FSP_PERFORMANCE_DATA_SIGNATURE;\r

diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h
index 2b534075aee9a7cbbcacc87f9041cb490d9acbcb..445540abfa51b8b7c94e5bb6565d6a5e32db0f85 100644 (file)
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -10,8 +10,9 @@
 \r
 #include <FspEas.h>\r
 \r
-#define FSP_IN_API_MODE       0\r
-#define FSP_IN_DISPATCH_MODE  1\r
+#define FSP_IN_API_MODE         0\r
+#define FSP_IN_DISPATCH_MODE    1\r
+#define FSP_GLOBAL_DATA_VERSION 1\r
 \r
 #pragma pack(1)\r
 \r
@@ -28,10 +29,11 @@ typedef enum {
 \r
 typedef struct  {\r
   VOID      *DataPtr;\r
-  UINT32    MicrocodeRegionBase;\r
-  UINT32    MicrocodeRegionSize;\r
-  UINT32    CodeRegionBase;\r
-  UINT32    CodeRegionSize;\r
+  UINTN     MicrocodeRegionBase;\r
+  UINTN     MicrocodeRegionSize;\r
+  UINTN     CodeRegionBase;\r
+  UINTN     CodeRegionSize;\r
+  UINTN     Reserved;\r
 } FSP_PLAT_DATA;\r
 \r
 #define FSP_GLOBAL_DATA_SIGNATURE        SIGNATURE_32 ('F', 'S', 'P', 'D')\r
@@ -42,15 +44,15 @@ typedef struct  {
   UINT32             Signature;\r
   UINT8              Version;\r
   UINT8              Reserved1[3];\r
+  ///\r
+  /// Offset 0x08\r
+  ///\r
   UINTN              CoreStack;\r
+  UINTN              Reserved2;\r
+  ///\r
+  /// IA32: Offset 0x10; X64: Offset 0x18\r
+  ///\r
   UINT32             StatusCode;\r
-  UINT32             Reserved2[8];\r
-  FSP_PLAT_DATA      PlatformData;\r
-  FSP_INFO_HEADER    *FspInfoHeader;\r
-  VOID               *UpdDataPtr;\r
-  VOID               *TempRamInitUpdPtr;\r
-  VOID               *MemoryInitUpdPtr;\r
-  VOID               *SiliconInitUpdPtr;\r
   UINT8              ApiIdx;\r
   ///\r
   /// 0: FSP in API mode; 1: FSP in DISPATCH mode\r
@@ -60,15 +62,34 @@ typedef struct  {
   UINT8              Reserved3;\r
   UINT32             NumberOfPhases;\r
   UINT32             PhasesExecuted;\r
+  UINT32             Reserved4[8];\r
   ///\r
+  /// IA32: Offset 0x40; X64: Offset 0x48\r
+  /// Start of UINTN and pointer section\r
+  /// All UINTN and pointer members must be put in this section\r
+  /// except CoreStack and Reserved2. In addition, the number of\r
+  /// UINTN and pointer members must be even for natural alignment\r
+  /// in both IA32 and X64.\r
+  ///\r
+  FSP_PLAT_DATA      PlatformData;\r
+  VOID               *TempRamInitUpdPtr;\r
+  VOID               *MemoryInitUpdPtr;\r
+  VOID               *SiliconInitUpdPtr;\r
+  ///\r
+  /// IA32: Offset 0x64; X64: Offset 0x90\r
   /// To store function parameters pointer\r
   /// so it can be retrieved after stack switched.\r
   ///\r
   VOID               *FunctionParameterPtr;\r
-  UINT8              Reserved4[16];\r
+  FSP_INFO_HEADER    *FspInfoHeader;\r
+  VOID               *UpdDataPtr;\r
+  ///\r
+  /// End of UINTN and pointer section\r
+  ///\r
+  UINT8              Reserved5[16];\r
   UINT32             PerfSig;\r
   UINT16             PerfLen;\r
-  UINT16             Reserved5;\r
+  UINT16             Reserved6;\r
   UINT32             PerfIdx;\r
   UINT64             PerfData[32];\r
 } FSP_GLOBAL_DATA;\r