Import some basic libraries instances for Mde Packages.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2704 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
new file mode 100644 (file)
index 0000000..2dcdd3e
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
@@ -0,0 +1,101 @@
+#/** @file\r
+# Component description file for Base Cache Maintenance Library\r
+#\r
+# Cache Maintenance Library that uses Base Library services to maintain caches.\r
+#  This library assumes there are no chipset dependencies required to maintain caches.\r
+# Copyright (c) 2007 - 2007, Intel Corporation\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseCacheMaintenanceLib\r
+  FILE_GUID                      = 123dd843-57c9-4158-8418-ce68b3944ce7\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = CacheMaintenanceLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  CommonHeader.h\r
+\r
+[Sources.Ia32]\r
+  x86Cache.c\r
+\r
+[Sources.X64]\r
+  x86Cache.c\r
+\r
+[Sources.IPF]\r
+  IpfCache.c\r
+\r
+[Sources.EBC]\r
+  EbcCache.c\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+\r
+[LibraryClasses.IA32]\r
+  BaseLib\r
+\r
+[LibraryClasses.X64]\r
+  BaseLib\r
+\r
+[LibraryClasses.IPF]\r
+  BaseLib\r
+\r

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa
new file mode 100644 (file)
index 0000000..cb15605
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa
@@ -0,0 +1,49 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">\r
+  <MsaHeader>\r
+    <ModuleName>BaseCacheMaintenanceLib</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>123dd843-57c9-4158-8418-ce68b3944ce7</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Base Cache Maintenance Library</Abstract>\r
+    <Description>Cache Maintenance Library that uses Base Library services to maintain caches.
+    This library assumes there are no chipset dependencies required to maintain caches.</Description>\r
+    <Copyright>Copyright (c) 2006 - 2007, Intel Corporation</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials
+      are licensed and made available under the terms and conditions of the BSD License
+      which accompanies this distribution.  The full text of the license may be found at
+      http://opensource.org/licenses/bsd-license.php
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BaseCacheMaintenanceLib</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>CacheMaintenanceLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED" SupArchList="IA32 X64 IPF">\r
+      <Keyword>BaseLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename SupArchList="IA32">x86Cache.c</Filename>\r
+    <Filename SupArchList="X64">x86Cache.c</Filename>\r
+    <Filename SupArchList="EBC">EbcCache.c</Filename>\r
+    <Filename SupArchList="IPF">IpfCache.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/CommonHeader.h b/MdePkg/Library/BaseCacheMaintenanceLib/CommonHeader.h
new file mode 100644 (file)
index 0000000..d0df949
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007 - 2007, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/CacheMaintenanceLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
new file mode 100644 (file)
index 0000000..45d44db
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
@@ -0,0 +1,236 @@
+/** @file\r
+  Cache Maintenance Functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Invalidates the entire instruction cache in cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Invalidates the entire instruction cache in cache coherency domain of the\r
+  calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateInstructionCache (\r
+  VOID\r
+  )\r
+{\r
+}\r
+\r
+/**\r
+  Invalidates a range of instruction cache lines in the cache coherency domain\r
+  of the calling CPU.\r
+\r
+  Invalidates the instruction cache lines specified by Address and Length. If\r
+  Address is not aligned on a cache line boundary, then entire instruction\r
+  cache line containing Address is invalidated. If Address + Length is not\r
+  aligned on a cache line boundary, then the entire instruction cache line\r
+  containing Address + Length -1 is invalidated. This function may choose to\r
+  invalidate the entire instruction cache if that is more efficient than\r
+  invalidating the specified range. If Length is 0, the no instruction cache\r
+  lines are invalidated. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the instruction cache lines to\r
+                  invalidate. If the CPU is in a physical addressing mode, then\r
+                  Address is a physical address. If the CPU is in a virtual\r
+                  addressing mode, then Address is a virtual address.\r
+\r
+  @param  Length  The number of bytes to invalidate from the instruction cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateInstructionCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+  return Address;\r
+}\r
+\r
+/**\r
+  Writes Back and Invalidates the entire data cache in cache coherency domain\r
+  of the calling CPU.\r
+\r
+  Writes Back and Invalidates the entire data cache in cache coherency domain\r
+  of the calling CPU. This function guarantees that all dirty cache lines are\r
+  written back to system memory, and also invalidates all the data cache lines\r
+  in the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackInvalidateDataCache (\r
+  VOID\r
+  )\r
+{\r
+}\r
+\r
+/**\r
+  Writes Back and Invalidates a range of data cache lines in the cache\r
+  coherency domain of the calling CPU.\r
+\r
+  Writes Back and Invalidate the data cache lines specified by Address and\r
+  Length. If Address is not aligned on a cache line boundary, then entire data\r
+  cache line containing Address is written back and invalidated. If Address +\r
+  Length is not aligned on a cache line boundary, then the entire data cache\r
+  line containing Address + Length -1 is written back and invalidated. This\r
+  function may choose to write back and invalidate the entire data cache if\r
+  that is more efficient than writing back and invalidating the specified\r
+  range. If Length is 0, the no data cache lines are written back and\r
+  invalidated. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to write back and\r
+                  invalidate. If the CPU is in a physical addressing mode, then\r
+                  Address is a physical address. If the CPU is in a virtual\r
+                  addressing mode, then Address is a virtual address.\r
+  @param  Length  The number of bytes to write back and invalidate from the\r
+                  data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackInvalidateDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+  return Address;\r
+}\r
+\r
+/**\r
+  Writes Back the entire data cache in cache coherency domain of the calling\r
+  CPU.\r
+\r
+  Writes Back the entire data cache in cache coherency domain of the calling\r
+  CPU. This function guarantees that all dirty cache lines are written back to\r
+  system memory. This function may also invalidate all the data cache lines in\r
+  the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackDataCache (\r
+  VOID\r
+  )\r
+{\r
+}\r
+\r
+/**\r
+  Writes Back a range of data cache lines in the cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Writes Back the data cache lines specified by Address and Length. If Address\r
+  is not aligned on a cache line boundary, then entire data cache line\r
+  containing Address is written back. If Address + Length is not aligned on a\r
+  cache line boundary, then the entire data cache line containing Address +\r
+  Length -1 is written back. This function may choose to write back the entire\r
+  data cache if that is more efficient than writing back the specified range.\r
+  If Length is 0, the no data cache lines are written back. This function may\r
+  also invalidate all the data cache lines in the specified range of the cache\r
+  coherency domain of the calling CPU. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to write back. If\r
+                  the CPU is in a physical addressing mode, then Address is a\r
+                  physical address. If the CPU is in a virtual addressing\r
+                  mode, then Address is a virtual address.\r
+  @param  Length  The number of bytes to write back from the data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+  return Address;\r
+}\r
+\r
+/**\r
+  Invalidates the entire data cache in cache coherency domain of the calling\r
+  CPU.\r
+\r
+  Invalidates the entire data cache in cache coherency domain of the calling\r
+  CPU. This function must be used with care because dirty cache lines are not\r
+  written back to system memory. It is typically used for cache diagnostics. If\r
+  the CPU does not support invalidation of the entire data cache, then a write\r
+  back and invalidate operation should be performed on the entire data cache.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateDataCache (\r
+  VOID\r
+  )\r
+{\r
+}\r
+\r
+/**\r
+  Invalidates a range of data cache lines in the cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Invalidates the data cache lines specified by Address and Length. If Address\r
+  is not aligned on a cache line boundary, then entire data cache line\r
+  containing Address is invalidated. If Address + Length is not aligned on a\r
+  cache line boundary, then the entire data cache line containing Address +\r
+  Length -1 is invalidated. This function must never invalidate any cache lines\r
+  outside the specified range. If Length is 0, the no data cache lines are\r
+  invalidated. Address is returned. This function must be used with care\r
+  because dirty cache lines are not written back to system memory. It is\r
+  typically used for cache diagnostics. If the CPU does not support\r
+  invalidation of a data cache range, then a write back and invalidate\r
+  operation should be performed on the data cache range.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to invalidate. If\r
+                  the CPU is in a physical addressing mode, then Address is a\r
+                  physical address. If the CPU is in a virtual addressing mode,\r
+                  then Address is a virtual address.\r
+  @param  Length  The number of bytes to invalidate from the data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+  return Address;\r
+}\r

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
new file mode 100644 (file)
index 0000000..e714eae
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
@@ -0,0 +1,241 @@
+/** @file\r
+  Cache Maintenance Functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Invalidates the entire instruction cache in cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Invalidates the entire instruction cache in cache coherency domain of the\r
+  calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateInstructionCache (\r
+  VOID\r
+  )\r
+{\r
+  PalCallStatic (NULL, 1, 1, 1, 0);\r
+}\r
+\r
+/**\r
+  Invalidates a range of instruction cache lines in the cache coherency domain\r
+  of the calling CPU.\r
+\r
+  Invalidates the instruction cache lines specified by Address and Length. If\r
+  Address is not aligned on a cache line boundary, then entire instruction\r
+  cache line containing Address is invalidated. If Address + Length is not\r
+  aligned on a cache line boundary, then the entire instruction cache line\r
+  containing Address + Length -1 is invalidated. This function may choose to\r
+  invalidate the entire instruction cache if that is more efficient than\r
+  invalidating the specified range. If Length is 0, the no instruction cache\r
+  lines are invalidated. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the instruction cache lines to\r
+                  invalidate. If the CPU is in a physical addressing mode, then\r
+                  Address is a physical address. If the CPU is in a virtual\r
+                  addressing mode, then Address is a virtual address.\r
+\r
+  @param  Length  The number of bytes to invalidate from the instruction cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateInstructionCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  return IpfFlushCacheRange (Address, Length);\r
+}\r
+\r
+/**\r
+  Writes Back and Invalidates the entire data cache in cache coherency domain\r
+  of the calling CPU.\r
+\r
+  Writes Back and Invalidates the entire data cache in cache coherency domain\r
+  of the calling CPU. This function guarantees that all dirty cache lines are\r
+  written back to system memory, and also invalidates all the data cache lines\r
+  in the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackInvalidateDataCache (\r
+  VOID\r
+  )\r
+{\r
+  PalCallStatic (NULL, 1, 2, 1, 0);\r
+}\r
+\r
+/**\r
+  Writes Back and Invalidates a range of data cache lines in the cache\r
+  coherency domain of the calling CPU.\r
+\r
+  Writes Back and Invalidate the data cache lines specified by Address and\r
+  Length. If Address is not aligned on a cache line boundary, then entire data\r
+  cache line containing Address is written back and invalidated. If Address +\r
+  Length is not aligned on a cache line boundary, then the entire data cache\r
+  line containing Address + Length -1 is written back and invalidated. This\r
+  function may choose to write back and invalidate the entire data cache if\r
+  that is more efficient than writing back and invalidating the specified\r
+  range. If Length is 0, the no data cache lines are written back and\r
+  invalidated. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to write back and\r
+                  invalidate. If the CPU is in a physical addressing mode, then\r
+                  Address is a physical address. If the CPU is in a virtual\r
+                  addressing mode, then Address is a virtual address.\r
+  @param  Length  The number of bytes to write back and invalidate from the\r
+                  data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackInvalidateDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+\r
+  return IpfFlushCacheRange (Address, Length);\r
+}\r
+\r
+/**\r
+  Writes Back the entire data cache in cache coherency domain of the calling\r
+  CPU.\r
+\r
+  Writes Back the entire data cache in cache coherency domain of the calling\r
+  CPU. This function guarantees that all dirty cache lines are written back to\r
+  system memory. This function may also invalidate all the data cache lines in\r
+  the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackDataCache (\r
+  VOID\r
+  )\r
+{\r
+  PalCallStatic (NULL, 1, 2, 0, 0);\r
+}\r
+\r
+/**\r
+  Writes Back a range of data cache lines in the cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Writes Back the data cache lines specified by Address and Length. If Address\r
+  is not aligned on a cache line boundary, then entire data cache line\r
+  containing Address is written back. If Address + Length is not aligned on a\r
+  cache line boundary, then the entire data cache line containing Address +\r
+  Length -1 is written back. This function may choose to write back the entire\r
+  data cache if that is more efficient than writing back the specified range.\r
+  If Length is 0, the no data cache lines are written back. This function may\r
+  also invalidate all the data cache lines in the specified range of the cache\r
+  coherency domain of the calling CPU. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to write back. If\r
+                  the CPU is in a physical addressing mode, then Address is a\r
+                  physical address. If the CPU is in a virtual addressing\r
+                  mode, then Address is a virtual address.\r
+  @param  Length  The number of bytes to write back from the data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+\r
+  return IpfFlushCacheRange (Address, Length);\r
+}\r
+\r
+/**\r
+  Invalidates the entire data cache in cache coherency domain of the calling\r
+  CPU.\r
+\r
+  Invalidates the entire data cache in cache coherency domain of the calling\r
+  CPU. This function must be used with care because dirty cache lines are not\r
+  written back to system memory. It is typically used for cache diagnostics. If\r
+  the CPU does not support invalidation of the entire data cache, then a write\r
+  back and invalidate operation should be performed on the entire data cache.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateDataCache (\r
+  VOID\r
+  )\r
+{\r
+  WriteBackInvalidateDataCache ();\r
+}\r
+\r
+/**\r
+  Invalidates a range of data cache lines in the cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Invalidates the data cache lines specified by Address and Length. If Address\r
+  is not aligned on a cache line boundary, then entire data cache line\r
+  containing Address is invalidated. If Address + Length is not aligned on a\r
+  cache line boundary, then the entire data cache line containing Address +\r
+  Length -1 is invalidated. This function must never invalidate any cache lines\r
+  outside the specified range. If Length is 0, the no data cache lines are\r
+  invalidated. Address is returned. This function must be used with care\r
+  because dirty cache lines are not written back to system memory. It is\r
+  typically used for cache diagnostics. If the CPU does not support\r
+  invalidation of a data cache range, then a write back and invalidate\r
+  operation should be performed on the data cache range.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to invalidate. If\r
+                  the CPU is in a physical addressing mode, then Address is a\r
+                  physical address. If the CPU is in a virtual addressing mode,\r
+                  then Address is a virtual address.\r
+  @param  Length  The number of bytes to invalidate from the data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  return IpfFlushCacheRange (Address, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c
new file mode 100644 (file)
index 0000000..276e763
--- /dev/null
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c
@@ -0,0 +1,259 @@
+/** @file\r
+  Cache Maintenance Functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86Cache.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+//\r
+// This size must be at or below the smallest cache size possible among all\r
+// supported processors\r
+//\r
+#define CACHE_LINE_SIZE             0x20\r
+\r
+/**\r
+  Invalidates the entire instruction cache in cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Invalidates the entire instruction cache in cache coherency domain of the\r
+  calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateInstructionCache (\r
+  VOID\r
+  )\r
+{\r
+}\r
+\r
+/**\r
+  Invalidates a range of instruction cache lines in the cache coherency domain\r
+  of the calling CPU.\r
+\r
+  Invalidates the instruction cache lines specified by Address and Length. If\r
+  Address is not aligned on a cache line boundary, then entire instruction\r
+  cache line containing Address is invalidated. If Address + Length is not\r
+  aligned on a cache line boundary, then the entire instruction cache line\r
+  containing Address + Length -1 is invalidated. This function may choose to\r
+  invalidate the entire instruction cache if that is more efficient than\r
+  invalidating the specified range. If Length is 0, the no instruction cache\r
+  lines are invalidated. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the instruction cache lines to\r
+                  invalidate. If the CPU is in a physical addressing mode, then\r
+                  Address is a physical address. If the CPU is in a virtual\r
+                  addressing mode, then Address is a virtual address.\r
+\r
+  @param  Length  The number of bytes to invalidate from the instruction cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateInstructionCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+  return Address;\r
+}\r
+\r
+/**\r
+  Writes Back and Invalidates the entire data cache in cache coherency domain\r
+  of the calling CPU.\r
+\r
+  Writes Back and Invalidates the entire data cache in cache coherency domain\r
+  of the calling CPU. This function guarantees that all dirty cache lines are\r
+  written back to system memory, and also invalidates all the data cache lines\r
+  in the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackInvalidateDataCache (\r
+  VOID\r
+  )\r
+{\r
+  AsmWbinvd ();\r
+}\r
+\r
+/**\r
+  Writes Back and Invalidates a range of data cache lines in the cache\r
+  coherency domain of the calling CPU.\r
+\r
+  Writes Back and Invalidate the data cache lines specified by Address and\r
+  Length. If Address is not aligned on a cache line boundary, then entire data\r
+  cache line containing Address is written back and invalidated. If Address +\r
+  Length is not aligned on a cache line boundary, then the entire data cache\r
+  line containing Address + Length -1 is written back and invalidated. This\r
+  function may choose to write back and invalidate the entire data cache if\r
+  that is more efficient than writing back and invalidating the specified\r
+  range. If Length is 0, the no data cache lines are written back and\r
+  invalidated. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to write back and\r
+                  invalidate. If the CPU is in a physical addressing mode, then\r
+                  Address is a physical address. If the CPU is in a virtual\r
+                  addressing mode, then Address is a virtual address.\r
+  @param  Length  The number of bytes to write back and invalidate from the\r
+                  data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackInvalidateDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  UINTN                             Start, End;\r
+\r
+  ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
+\r
+  if (Length == 0) {\r
+    return Address;\r
+  }\r
+\r
+  Start = (UINTN)Address;\r
+  End = (Start + Length + (CACHE_LINE_SIZE - 1)) & ~(CACHE_LINE_SIZE - 1);\r
+  Start &= ~(CACHE_LINE_SIZE - 1);\r
+\r
+  do {\r
+    Start = (UINTN)AsmFlushCacheLine ((VOID*)Start) + CACHE_LINE_SIZE;\r
+  } while (Start != End);\r
+  return Address;\r
+}\r
+\r
+/**\r
+  Writes Back the entire data cache in cache coherency domain of the calling\r
+  CPU.\r
+\r
+  Writes Back the entire data cache in cache coherency domain of the calling\r
+  CPU. This function guarantees that all dirty cache lines are written back to\r
+  system memory. This function may also invalidate all the data cache lines in\r
+  the cache coherency domain of the calling CPU.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+WriteBackDataCache (\r
+  VOID\r
+  )\r
+{\r
+  WriteBackInvalidateDataCache ();\r
+}\r
+\r
+/**\r
+  Writes Back a range of data cache lines in the cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Writes Back the data cache lines specified by Address and Length. If Address\r
+  is not aligned on a cache line boundary, then entire data cache line\r
+  containing Address is written back. If Address + Length is not aligned on a\r
+  cache line boundary, then the entire data cache line containing Address +\r
+  Length -1 is written back. This function may choose to write back the entire\r
+  data cache if that is more efficient than writing back the specified range.\r
+  If Length is 0, the no data cache lines are written back. This function may\r
+  also invalidate all the data cache lines in the specified range of the cache\r
+  coherency domain of the calling CPU. Address is returned.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to write back. If\r
+                  the CPU is in a physical addressing mode, then Address is a\r
+                  physical address. If the CPU is in a virtual addressing\r
+                  mode, then Address is a virtual address.\r
+  @param  Length  The number of bytes to write back from the data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+WriteBackDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  return WriteBackInvalidateDataCacheRange (Address, Length);\r
+}\r
+\r
+/**\r
+  Invalidates the entire data cache in cache coherency domain of the calling\r
+  CPU.\r
+\r
+  Invalidates the entire data cache in cache coherency domain of the calling\r
+  CPU. This function must be used with care because dirty cache lines are not\r
+  written back to system memory. It is typically used for cache diagnostics. If\r
+  the CPU does not support invalidation of the entire data cache, then a write\r
+  back and invalidate operation should be performed on the entire data cache.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InvalidateDataCache (\r
+  VOID\r
+  )\r
+{\r
+  AsmInvd ();\r
+}\r
+\r
+/**\r
+  Invalidates a range of data cache lines in the cache coherency domain of the\r
+  calling CPU.\r
+\r
+  Invalidates the data cache lines specified by Address and Length. If Address\r
+  is not aligned on a cache line boundary, then entire data cache line\r
+  containing Address is invalidated. If Address + Length is not aligned on a\r
+  cache line boundary, then the entire data cache line containing Address +\r
+  Length -1 is invalidated. This function must never invalidate any cache lines\r
+  outside the specified range. If Length is 0, the no data cache lines are\r
+  invalidated. Address is returned. This function must be used with care\r
+  because dirty cache lines are not written back to system memory. It is\r
+  typically used for cache diagnostics. If the CPU does not support\r
+  invalidation of a data cache range, then a write back and invalidate\r
+  operation should be performed on the data cache range.\r
+\r
+  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
+\r
+  @param  Address The base address of the data cache lines to invalidate. If\r
+                  the CPU is in a physical addressing mode, then Address is a\r
+                  physical address. If the CPU is in a virtual addressing mode,\r
+                  then Address is a virtual address.\r
+  @param  Length  The number of bytes to invalidate from the data cache.\r
+\r
+  @return Address\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InvalidateDataCacheRange (\r
+  IN      VOID                      *Address,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  return WriteBackInvalidateDataCacheRange (Address, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
new file mode 100644 (file)
index 0000000..bc939c2
--- /dev/null
+++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
@@ -0,0 +1,68 @@
+#/** @file\r
+# Component description file for NULL Debug Library\r
+#\r
+# Debug Library with empty functions.\r
+# Copyright (c) 2007 - 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseDebugLibNull\r
+  FILE_GUID                      = 9ba1d976-0624-41a3-8650-28165e8d9ae8\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = DebugLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  DebugLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r

diff --git a/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa
new file mode 100644 (file)
index 0000000..d482cf9
--- /dev/null
+++ b/MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.msa
@@ -0,0 +1,39 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">\r
+  <MsaHeader>\r
+    <ModuleName>BaseDebugLibNull</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>9ba1d976-0624-41a3-8650-28165e8d9ae8</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for NULL Debug Library</Abstract>\r
+    <Description>Debug Library with empty functions.</Description>\r
+    <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BaseDebugLibNull</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>DebugLib.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BaseDebugLibNull/CommonHeader.h b/MdePkg/Library/BaseDebugLibNull/CommonHeader.h
new file mode 100644 (file)
index 0000000..27168bf
--- /dev/null
+++ b/MdePkg/Library/BaseDebugLibNull/CommonHeader.h
@@ -0,0 +1,31 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007 - 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseDebugLibNull/DebugLib.c b/MdePkg/Library/BaseDebugLibNull/DebugLib.c
new file mode 100644 (file)
index 0000000..1d3e719
--- /dev/null
+++ b/MdePkg/Library/BaseDebugLibNull/DebugLib.c
@@ -0,0 +1,188 @@
+/** @file\r
+  Base Debug Library that uses PrintLib to print messages to a memory buffer.\r
+\r
+  Copyright (c) 2006, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+\r
+  Prints a debug message to the debug output device if the specified error level is enabled.\r
+\r
+  If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print \r
+  the message specified by Format and the associated variable argument list to \r
+  the debug output device.\r
+\r
+  If Format is NULL, then ASSERT().\r
+\r
+  @param  ErrorLevel  The error level of the debug message.\r
+  @param  Format      Format string for the debug message to print.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugPrint (\r
+  IN  UINTN        ErrorLevel,\r
+  IN  CONST CHAR8  *Format,\r
+  ...\r
+  )\r
+{\r
+}\r
+\r
+\r
+/**\r
+\r
+  Prints an assert message containing a filename, line number, and description.  \r
+  This may be followed by a breakpoint or a dead loop.\r
+\r
+  Print a message of the form "ASSERT <FileName>(<LineNumber>): <Description>\n" \r
+  to the debug output device.  If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of \r
+  PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if \r
+  DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then \r
+  CpuDeadLoop() is called.  If neither of these bits are set, then this function \r
+  returns immediately after the message is printed to the debug output device.\r
+  DebugAssert() must actively prevent recusrsion.  If DebugAssert() is called while\r
+  processing another DebugAssert(), then DebugAssert() must return immediately.\r
+\r
+  If FileName is NULL, then a <FileName> string of "(NULL) Filename" is printed.\r
+\r
+  If Description is NULL, then a <Description> string of "(NULL) Description" is printed.\r
+\r
+  @param  FileName     Pointer to the name of the source file that generated the assert condition.\r
+  @param  LineNumber   The line number in the source file that generated the assert condition\r
+  @param  Description  Pointer to the description of the assert condition.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugAssert (\r
+  IN CONST CHAR8  *FileName,\r
+  IN UINTN        LineNumber,\r
+  IN CONST CHAR8  *Description\r
+  )\r
+{\r
+}\r
+\r
+\r
+/**\r
+\r
+  Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the value specified by \r
+  PcdDebugClearMemoryValue, and returns Buffer.\r
+\r
+  If Buffer is NULL, then ASSERT().\r
+\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param   Buffer  Pointer to the target buffer to fill with PcdDebugClearMemoryValue.\r
+  @param   Length  Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue. \r
+\r
+  @return  Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+DebugClearMemory (\r
+  OUT VOID  *Buffer,\r
+  IN UINTN  Length\r
+  )\r
+{\r
+  return Buffer;\r
+}\r
+\r
+\r
+/**\r
+  \r
+  Returns TRUE if ASSERT() macros are enabled.\r
+\r
+  This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of \r
+  PcdDebugProperyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.\r
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugAssertEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return FALSE;\r
+}\r
+\r
+\r
+/**\r
+  \r
+  Returns TRUE if DEBUG()macros are enabled.\r
+\r
+  This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of \r
+  PcdDebugProperyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.\r
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugPrintEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return FALSE;\r
+}\r
+\r
+\r
+/**\r
+  \r
+  Returns TRUE if DEBUG_CODE()macros are enabled.\r
+\r
+  This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of \r
+  PcdDebugProperyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.\r
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugCodeEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return FALSE;\r
+}\r
+\r
+\r
+/**\r
+  \r
+  Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.\r
+\r
+  This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of \r
+  PcdDebugProperyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE    The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.\r
+  @retval  FALSE   The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+DebugClearMemoryEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return FALSE;\r
+}\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
new file mode 100644 (file)
index 0000000..fb3e2d2
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -0,0 +1,111 @@
+#/** @file\r
+# Component description file for Intrinsic Base Io Library\r
+#\r
+# I/O Library that uses compiler intrinsics to perform IN and OUT instructions\r
+#  for IA-32 and x64. It also performs direct memory access for MMIO services.\r
+# Copyright (c) 2007 - 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseIoLibIntrinsic\r
+  FILE_GUID                      = 926c9cd0-4bb8-479b-9ac4-8a2a23f85307\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = IoLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  IoLibMmioBuffer.c\r
+  CommonHeader.h\r
+\r
+[Sources.Ia32]\r
+  IoHighLevel.c\r
+  IoLibGcc.c\r
+  IoLibMsc.c\r
+  IoLib.c\r
+\r
+[Sources.X64]\r
+  IoHighLevel.c\r
+  IoLibGcc.c\r
+  IoLibMsc.c\r
+  IoLib.c\r
+\r
+[Sources.IPF]\r
+  IoHighLevel.c\r
+  IoLibIpf.c\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+  BaseLib\r
+\r
+[LibraryClasses.IPF]\r
+  PcdLib\r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.\r
+#\r
+################################################################################\r
+\r
+[PcdsFixedAtBuild.IPF]\r
+  PcdIoBlockBaseAddressForIpf|gEfiMdePkgTokenSpaceGuid\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa
new file mode 100644 (file)
index 0000000..e974647
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.msa
@@ -0,0 +1,67 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+  <MsaHeader>
+    <ModuleName>BaseIoLibIntrinsic</ModuleName>
+    <ModuleType>BASE</ModuleType>
+    <GuidValue>926c9cd0-4bb8-479b-9ac4-8a2a23f85307</GuidValue>
+    <Version>1.0</Version>
+    <Abstract>Component description file for Intrinsic Base Io Library</Abstract>
+    <Description>I/O Library that uses compiler intrinsics to perform IN and OUT instructions
+      for IA-32 and x64.  It also performs direct memory access for MMIO services.</Description>
+    <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+    <License>All rights reserved. This program and the accompanying materials
+      are licensed and made available under the terms and conditions of the BSD License
+      which accompanies this distribution.  The full text of the license may be found at
+      http://opensource.org/licenses/bsd-license.php
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>
+  </MsaHeader>
+  <ModuleDefinitions>
+    <SupportedArchitectures>IA32 X64 IPF</SupportedArchitectures>
+    <BinaryModule>false</BinaryModule>
+    <OutputFileBasename>BaseIoLibIntrinsic</OutputFileBasename>
+  </ModuleDefinitions>
+  <LibraryClassDefinitions>
+    <LibraryClass Usage="ALWAYS_PRODUCED">
+      <Keyword>IoLib</Keyword>
+    </LibraryClass>
+    <LibraryClass Usage="ALWAYS_CONSUMED">
+      <Keyword>BaseLib</Keyword>
+    </LibraryClass>
+    <LibraryClass Usage="ALWAYS_CONSUMED">
+      <Keyword>DebugLib</Keyword>
+    </LibraryClass>
+    <LibraryClass Usage="ALWAYS_CONSUMED" SupArchList="IPF">
+      <Keyword>PcdLib</Keyword>
+    </LibraryClass>
+  </LibraryClassDefinitions>
+  <SourceFiles>
+    <Filename>IoLibMmioBuffer.c</Filename>
+    <Filename SupArchList="IA32">IoLib.c</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="MSFT">IoLibMsc.c</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">IoLibGcc.c</Filename>
+    <Filename SupArchList="IA32">IoHighLevel.c</Filename>
+    <Filename SupArchList="X64">IoLib.c</Filename>
+    <Filename SupArchList="X64" ToolChainFamily="MSFT">IoLibMsc.c</Filename>
+    <Filename SupArchList="X64" ToolChainFamily="GCC">IoLibGcc.c</Filename>
+    <Filename SupArchList="X64">IoHighLevel.c</Filename>
+    <Filename SupArchList="IPF">IoLibIpf.c</Filename>
+    <Filename SupArchList="IPF">IoHighLevel.c</Filename>
+  </SourceFiles>
+  <PackageDependencies>
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+  </PackageDependencies>
+  <Externs>
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+  </Externs>
+  <PcdCoded>
+    <PcdEntry PcdItemType="FIXED_AT_BUILD" Usage="ALWAYS_CONSUMED" SupArchList="IPF">
+      <C_Name>PcdIoBlockBaseAddressForIpf</C_Name>
+      <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+      <DefaultValue>0x0ffffc000000</DefaultValue>
+      <HelpText>The base address of IPF IO Block</HelpText>
+    </PcdEntry>
+  </PcdCoded>
+</ModuleSurfaceArea>

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/CommonHeader.h b/MdePkg/Library/BaseIoLibIntrinsic/CommonHeader.h
new file mode 100644 (file)
index 0000000..56858d1
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/CommonHeader.h
@@ -0,0 +1,34 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007 - 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/IoLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
new file mode 100644 (file)
index 0000000..d9702c9
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoHighLevel.c
@@ -0,0 +1,2277 @@
+/** @file\r
+  High-level Io/Mmio functions.\r
+\r
+  All assertions for bit field operations are handled bit field functions in the\r
+  Base Library.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  IoHighLevel.c\r
+\r
+  The following IoLib instances share the same version of this file:\r
+\r
+    BaseIoLibIntrinsic\r
+    DxeIoLibCpuIo\r
+    PeiIoLibCpuIo\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+  result back to the 8-bit I/O port.\r
+\r
+  Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 8-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  OrData  The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoOr8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));\r
+}\r
+\r
+/**\r
+  Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back\r
+  to the 8-bit I/O port.\r
+\r
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 8-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoAnd8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));\r
+}\r
+\r
+/**\r
+  Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 8-bit I/O port.\r
+\r
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, performs a bitwise OR\r
+  between the result of the AND operation and the value specified by OrData,\r
+  and writes the result to the 8-bit I/O port specified by Port. The value\r
+  written to the I/O port is returned. This function must guarantee that all\r
+  I/O read and write operations are serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoAndThenOr8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));\r
+}\r
+\r
+/**\r
+  Reads a bit field of an I/O register.\r
+\r
+  Reads the bit field in an 8-bit I/O register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoBitFieldRead8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to an I/O register.\r
+\r
+  Writes Value to the bit field of the I/O register. The bit field is specified\r
+  by the StartBit and the EndBit. All other bits in the destination I/O\r
+  register are preserved. The value written to the I/O port is returned. Extra\r
+  left bits in Value are stripped.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoBitFieldWrite8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  return IoWrite8 (\r
+           Port,\r
+           BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r
+  result back to the bit field in the 8-bit port.\r
+\r
+  Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 8-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  OrData    The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoBitFieldOr8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return IoWrite8 (\r
+           Port,\r
+           BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the\r
+  result back to the bit field in the 8-bit port.\r
+\r
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 8-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized. Extra left bits in AndData are stripped.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoBitFieldAnd8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return IoWrite8 (\r
+           Port,\r
+           BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  8-bit port.\r
+\r
+  Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r
+  by a bitwise inclusive OR between the read result and the value specified by\r
+  AndData, and writes the result to the 8-bit I/O port specified by Port. The\r
+  value written to the I/O port is returned. This function must guarantee that\r
+  all I/O read and write operations are serialized. Extra left bits in both\r
+  AndData and OrData are stripped.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoBitFieldAndThenOr8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return IoWrite8 (\r
+           Port,\r
+           BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+  result back to the 16-bit I/O port.\r
+\r
+  Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 16-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  OrData  The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoOr16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back\r
+  to the 16-bit I/O port.\r
+\r
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 16-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoAnd16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 16-bit I/O port.\r
+\r
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, performs a bitwise OR\r
+  between the result of the AND operation and the value specified by OrData,\r
+  and writes the result to the 16-bit I/O port specified by Port. The value\r
+  written to the I/O port is returned. This function must guarantee that all\r
+  I/O read and write operations are serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoAndThenOr16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));\r
+}\r
+\r
+/**\r
+  Reads a bit field of an I/O register.\r
+\r
+  Reads the bit field in a 16-bit I/O register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoBitFieldRead16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to an I/O register.\r
+\r
+  Writes Value to the bit field of the I/O register. The bit field is specified\r
+  by the StartBit and the EndBit. All other bits in the destination I/O\r
+  register are preserved. The value written to the I/O port is returned. Extra\r
+  left bits in Value are stripped.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoBitFieldWrite16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  return IoWrite16 (\r
+           Port,\r
+           BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r
+  result back to the bit field in the 16-bit port.\r
+\r
+  Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 16-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  OrData    The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoBitFieldOr16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return IoWrite16 (\r
+           Port,\r
+           BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the\r
+  result back to the bit field in the 16-bit port.\r
+\r
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 16-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized. Extra left bits in AndData are stripped.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoBitFieldAnd16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return IoWrite16 (\r
+           Port,\r
+           BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  16-bit port.\r
+\r
+  Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r
+  by a bitwise inclusive OR between the read result and the value specified by\r
+  AndData, and writes the result to the 16-bit I/O port specified by Port. The\r
+  value written to the I/O port is returned. This function must guarantee that\r
+  all I/O read and write operations are serialized. Extra left bits in both\r
+  AndData and OrData are stripped.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoBitFieldAndThenOr16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return IoWrite16 (\r
+           Port,\r
+           BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+  result back to the 32-bit I/O port.\r
+\r
+  Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 32-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  OrData  The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoOr32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return IoWrite32 (Port, IoRead32 (Port) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back\r
+  to the 32-bit I/O port.\r
+\r
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 32-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoAnd32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return IoWrite32 (Port, IoRead32 (Port) & AndData);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 32-bit I/O port.\r
+\r
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, performs a bitwise OR\r
+  between the result of the AND operation and the value specified by OrData,\r
+  and writes the result to the 32-bit I/O port specified by Port. The value\r
+  written to the I/O port is returned. This function must guarantee that all\r
+  I/O read and write operations are serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoAndThenOr32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of an I/O register.\r
+\r
+  Reads the bit field in a 32-bit I/O register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoBitFieldRead32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to an I/O register.\r
+\r
+  Writes Value to the bit field of the I/O register. The bit field is specified\r
+  by the StartBit and the EndBit. All other bits in the destination I/O\r
+  register are preserved. The value written to the I/O port is returned. Extra\r
+  left bits in Value are stripped.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoBitFieldWrite32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  return IoWrite32 (\r
+           Port,\r
+           BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r
+  result back to the bit field in the 32-bit port.\r
+\r
+  Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 32-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoBitFieldOr32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return IoWrite32 (\r
+           Port,\r
+           BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the\r
+  result back to the bit field in the 32-bit port.\r
+\r
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 32-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized. Extra left bits in AndData are stripped.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoBitFieldAnd32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return IoWrite32 (\r
+           Port,\r
+           BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  32-bit port.\r
+\r
+  Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r
+  by a bitwise inclusive OR between the read result and the value specified by\r
+  AndData, and writes the result to the 32-bit I/O port specified by Port. The\r
+  value written to the I/O port is returned. This function must guarantee that\r
+  all I/O read and write operations are serialized. Extra left bits in both\r
+  AndData and OrData are stripped.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoBitFieldAndThenOr32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return IoWrite32 (\r
+           Port,\r
+           BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the\r
+  result back to the 64-bit I/O port.\r
+\r
+  Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 64-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  OrData  The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoOr64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return IoWrite64 (Port, IoRead64 (Port) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back\r
+  to the 64-bit I/O port.\r
+\r
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 64-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoAnd64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT64                    AndData\r
+  )\r
+{\r
+  return IoWrite64 (Port, IoRead64 (Port) & AndData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 64-bit I/O port.\r
+\r
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, performs a bitwise OR\r
+  between the result of the AND operation and the value specified by OrData,\r
+  and writes the result to the 64-bit I/O port specified by Port. The value\r
+  written to the I/O port is returned. This function must guarantee that all\r
+  I/O read and write operations are serialized.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  AndData The value to AND with the read value from the I/O port.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoAndThenOr64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT64                    AndData,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of an I/O register.\r
+\r
+  Reads the bit field in a 64-bit I/O register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoBitFieldRead64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to an I/O register.\r
+\r
+  Writes Value to the bit field of the I/O register. The bit field is specified\r
+  by the StartBit and the EndBit. All other bits in the destination I/O\r
+  register are preserved. The value written to the I/O port is returned. Extra\r
+  left bits in Value are stripped.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoBitFieldWrite64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  return IoWrite64 (\r
+           Port,\r
+           BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r
+  result back to the bit field in the 64-bit port.\r
+\r
+  Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 64-bit I/O port specified by Port. The value written to the I/O\r
+  port is returned. This function must guarantee that all I/O read and write\r
+  operations are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  OrData    The value to OR with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoBitFieldOr64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return IoWrite64 (\r
+           Port,\r
+           BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the\r
+  result back to the bit field in the 64-bit port.\r
+\r
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r
+  the read result and the value specified by AndData, and writes the result to\r
+  the 64-bit I/O port specified by Port. The value written to the I/O port is\r
+  returned. This function must guarantee that all I/O read and write operations\r
+  are serialized. Extra left bits in AndData are stripped.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoBitFieldAnd64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData\r
+  )\r
+{\r
+  return IoWrite64 (\r
+           Port,\r
+           BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  64-bit port.\r
+\r
+  Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r
+  by a bitwise inclusive OR between the read result and the value specified by\r
+  AndData, and writes the result to the 64-bit I/O port specified by Port. The\r
+  value written to the I/O port is returned. This function must guarantee that\r
+  all I/O read and write operations are serialized. Extra left bits in both\r
+  AndData and OrData are stripped.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Port      The I/O port to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with the read value from the I/O port.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoBitFieldAndThenOr64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return IoWrite64 (\r
+           Port,\r
+           BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+  result back to the 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 8-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  OrData  The value to OR with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));\r
+}\r
+\r
+/**\r
+  Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result\r
+  back to the 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 8-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));\r
+}\r
+\r
+/**\r
+  Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, performs a\r
+  bitwise OR between the result of the AND operation and the value specified by\r
+  OrData, and writes the result to the 8-bit MMIO register specified by\r
+  Address. The value written to the MMIO register is returned. This function\r
+  must guarantee that all MMIO read and write operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));\r
+}\r
+\r
+/**\r
+  Reads a bit field of a MMIO register.\r
+\r
+  Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioBitFieldRead8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a MMIO register.\r
+\r
+  Writes Value to the bit field of the MMIO register. The bit field is\r
+  specified by the StartBit and the EndBit. All other bits in the destination\r
+  MMIO register are preserved. The new value of the 8-bit register is returned.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioBitFieldWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  return MmioWrite8 (\r
+           Address,\r
+           BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 8-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized. Extra left bits in OrData\r
+  are stripped.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  OrData    The value to OR with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioBitFieldOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return MmioWrite8 (\r
+           Address,\r
+           BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r
+  writes the result back to the bit field in the 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 8-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized. Extra left bits in AndData are\r
+  stripped.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioBitFieldAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return MmioWrite8 (\r
+           Address,\r
+           BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r
+  by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+  8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r
+  followed by a bitwise inclusive OR between the read result and the value\r
+  specified by AndData, and writes the result to the 8-bit MMIO register\r
+  specified by Address. The value written to the MMIO register is returned.\r
+  This function must guarantee that all MMIO read and write operations are\r
+  serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioBitFieldAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return MmioWrite8 (\r
+           Address,\r
+           BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+  result back to the 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 16-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  OrData  The value to OR with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));\r
+}\r
+\r
+/**\r
+  Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result\r
+  back to the 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 16-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));\r
+}\r
+\r
+/**\r
+  Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, performs a\r
+  bitwise OR between the result of the AND operation and the value specified by\r
+  OrData, and writes the result to the 16-bit MMIO register specified by\r
+  Address. The value written to the MMIO register is returned. This function\r
+  must guarantee that all MMIO read and write operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));\r
+}\r
+\r
+/**\r
+  Reads a bit field of a MMIO register.\r
+\r
+  Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioBitFieldRead16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a MMIO register.\r
+\r
+  Writes Value to the bit field of the MMIO register. The bit field is\r
+  specified by the StartBit and the EndBit. All other bits in the destination\r
+  MMIO register are preserved. The new value of the 16-bit register is returned.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioBitFieldWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  return MmioWrite16 (\r
+           Address,\r
+           BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 16-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized. Extra left bits in OrData\r
+  are stripped.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  OrData    The value to OR with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioBitFieldOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return MmioWrite16 (\r
+           Address,\r
+           BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r
+  writes the result back to the bit field in the 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 16-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized. Extra left bits in AndData are\r
+  stripped.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioBitFieldAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return MmioWrite16 (\r
+           Address,\r
+           BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r
+  by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+  16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r
+  followed by a bitwise inclusive OR between the read result and the value\r
+  specified by AndData, and writes the result to the 16-bit MMIO register\r
+  specified by Address. The value written to the MMIO register is returned.\r
+  This function must guarantee that all MMIO read and write operations are\r
+  serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioBitFieldAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return MmioWrite16 (\r
+           Address,\r
+           BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+  result back to the 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 32-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  OrData  The value to OR with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return MmioWrite32 (Address, MmioRead32 (Address) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result\r
+  back to the 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 32-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return MmioWrite32 (Address, MmioRead32 (Address) & AndData);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, performs a\r
+  bitwise OR between the result of the AND operation and the value specified by\r
+  OrData, and writes the result to the 32-bit MMIO register specified by\r
+  Address. The value written to the MMIO register is returned. This function\r
+  must guarantee that all MMIO read and write operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a MMIO register.\r
+\r
+  Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioBitFieldRead32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a MMIO register.\r
+\r
+  Writes Value to the bit field of the MMIO register. The bit field is\r
+  specified by the StartBit and the EndBit. All other bits in the destination\r
+  MMIO register are preserved. The new value of the 32-bit register is returned.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioBitFieldWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  return MmioWrite32 (\r
+           Address,\r
+           BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 32-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized. Extra left bits in OrData\r
+  are stripped.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioBitFieldOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return MmioWrite32 (\r
+           Address,\r
+           BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r
+  writes the result back to the bit field in the 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 32-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized. Extra left bits in AndData are\r
+  stripped.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioBitFieldAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return MmioWrite32 (\r
+           Address,\r
+           BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r
+  by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+  32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r
+  followed by a bitwise inclusive OR between the read result and the value\r
+  specified by AndData, and writes the result to the 32-bit MMIO register\r
+  specified by Address. The value written to the MMIO register is returned.\r
+  This function must guarantee that all MMIO read and write operations are\r
+  serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioBitFieldAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return MmioWrite32 (\r
+           Address,\r
+           BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the\r
+  result back to the 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 64-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  OrData  The value to OR with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioOr64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return MmioWrite64 (Address, MmioRead64 (Address) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result\r
+  back to the 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 64-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioAnd64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT64                    AndData\r
+  )\r
+{\r
+  return MmioWrite64 (Address, MmioRead64 (Address) & AndData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r
+  inclusive OR, and writes the result back to the 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, performs a\r
+  bitwise OR between the result of the AND operation and the value specified by\r
+  OrData, and writes the result to the 64-bit MMIO register specified by\r
+  Address. The value written to the MMIO register is returned. This function\r
+  must guarantee that all MMIO read and write operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  AndData The value to AND with the read value from the MMIO register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioAndThenOr64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT64                    AndData,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a MMIO register.\r
+\r
+  Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r
+  the StartBit and the EndBit. The value of the bit field is returned.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioBitFieldRead64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a MMIO register.\r
+\r
+  Writes Value to the bit field of the MMIO register. The bit field is\r
+  specified by the StartBit and the EndBit. All other bits in the destination\r
+  MMIO register are preserved. The new value of the 64-bit register is returned.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioBitFieldWrite64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  return MmioWrite64 (\r
+           Address,\r
+           BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise\r
+  inclusive OR between the read result and the value specified by OrData, and\r
+  writes the result to the 64-bit MMIO register specified by Address. The value\r
+  written to the MMIO register is returned. This function must guarantee that\r
+  all MMIO read and write operations are serialized. Extra left bits in OrData\r
+  are stripped.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  OrData    The value to OR with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioBitFieldOr64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return MmioWrite64 (\r
+           Address,\r
+           BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r
+  writes the result back to the bit field in the 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+  between the read result and the value specified by AndData, and writes the\r
+  result to the 64-bit MMIO register specified by Address. The value written to\r
+  the MMIO register is returned. This function must guarantee that all MMIO\r
+  read and write operations are serialized. Extra left bits in AndData are\r
+  stripped.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioBitFieldAnd64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData\r
+  )\r
+{\r
+  return MmioWrite64 (\r
+           Address,\r
+           BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r
+  by a bitwise inclusive OR, and writes the result back to the bit field in the\r
+  64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r
+  followed by a bitwise inclusive OR between the read result and the value\r
+  specified by AndData, and writes the result to the 64-bit MMIO register\r
+  specified by Address. The value written to the MMIO register is returned.\r
+  This function must guarantee that all MMIO read and write operations are\r
+  serialized. Extra left bits in both AndData and OrData are stripped.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   MMIO register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with read value from the MMIO register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioBitFieldAndThenOr64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return MmioWrite64 (\r
+           Address,\r
+           BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)\r
+           );\r
+}\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
new file mode 100644 (file)
index 0000000..bbd1295
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLib.c
@@ -0,0 +1,71 @@
+/** @file\r
+  Common I/O Library routines.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  IoLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Reads a 64-bit I/O port.\r
+\r
+  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoRead64 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return 0;\r
+}\r
+\r
+/**\r
+  Writes a 64-bit I/O port.\r
+\r
+  Writes the 64-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoWrite64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return 0;\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
new file mode 100644 (file)
index 0000000..c6cf5f7
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibGcc.c
@@ -0,0 +1,388 @@
+/** @file\r
+  I/O Library. This file has compiler specifics for GCC as there is no\r
+  ANSI C standard for doing IO.\r
+\r
+  GCC - uses EFIAPI assembler. __asm__ calls GAS. __volatile__ makes sure the\r
+  compiler puts the assembler in this exact location. The complex GNUC\r
+  operations are not optimzed. It would be possible to also write these\r
+  with EFIAPI assembler.\r
+\r
+  We don't advocate putting compiler specifics in libraries or drivers but there\r
+  is no other way to make this work.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  IoLibGcc.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Reads an 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioRead8 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return *(volatile UINT8*)Address;\r
+}\r
+\r
+/**\r
+  Writes an 8-bit MMIO register.\r
+\r
+  Writes the 8-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  return *(volatile UINT8*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioRead16 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT ((Address & 1) == 0);\r
+  return *(volatile UINT16*)Address;\r
+}\r
+\r
+/**\r
+  Writes a 16-bit MMIO register.\r
+\r
+  Writes the 16-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 1) == 0);\r
+  return *(volatile UINT16*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioRead32 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT ((Address & 3) == 0);\r
+  return *(volatile UINT32*)Address;\r
+}\r
+\r
+/**\r
+  Writes a 32-bit MMIO register.\r
+\r
+  Writes the 32-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 3) == 0);\r
+  return *(volatile UINT32*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioRead64 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT ((Address & 7) == 0);\r
+  return *(volatile UINT64*)Address;\r
+}\r
+\r
+/**\r
+  Writes a 64-bit MMIO register.\r
+\r
+  Writes the 64-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioWrite64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 7) == 0);\r
+  return *(volatile UINT64*)Address = Value;\r
+}\r
+\r
+\r
+\r
+/**\r
+  Reads an 8-bit I/O port.\r
+\r
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+__inline__\r
+UINT8\r
+EFIAPI\r
+IoRead8 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  UINT8   Data;\r
+\r
+  __asm__ __volatile__ ("inb %w1,%b0" : "=a" (Data) : "d" ((UINT16)Port));\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Writes an 8-bit I/O port.\r
+\r
+  Writes the 8-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+__inline__\r
+UINT8\r
+EFIAPI\r
+IoWrite8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  __asm__ __volatile__ ("outb %b0,%w1" : : "a" (Value), "d" ((UINT16)Port));\r
+  return Value;;\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port.\r
+\r
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+__inline__\r
+UINT16\r
+EFIAPI\r
+IoRead16 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  UINT16   Data;\r
+\r
+  ASSERT ((Port & 1) == 0);\r
+  __asm__ __volatile__ ("inw %w1,%w0" : "=a" (Data) : "d" ((UINT16)Port));\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Writes a 16-bit I/O port.\r
+\r
+  Writes the 16-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+__inline__\r
+UINT16\r
+EFIAPI\r
+IoWrite16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT ((Port & 1) == 0);\r
+  __asm__ __volatile__ ("outw %w0,%w1" : : "a" (Value), "d" ((UINT16)Port));\r
+  return Value;;\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port.\r
+\r
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+__inline__\r
+UINT32\r
+EFIAPI\r
+IoRead32 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  UINT32   Data;\r
+\r
+  ASSERT ((Port & 3) == 0);\r
+  __asm__ __volatile__ ("inl %w1,%0" : "=a" (Data) : "d" ((UINT16)Port));\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Writes a 32-bit I/O port.\r
+\r
+  Writes the 32-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+__inline__\r
+UINT32\r
+EFIAPI\r
+IoWrite32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT32  Value\r
+  )\r
+{\r
+  ASSERT ((Port & 3) == 0);\r
+  __asm__ __volatile__ ("outl %0,%w1" : : "a" (Value), "d" ((UINT16)Port));\r
+  return Value;\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
new file mode 100644 (file)
index 0000000..27d21c1
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
@@ -0,0 +1,486 @@
+/** @file\r
+  Common I/O Library routines.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  IoLibIpf.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#define MAP_PORT_BASE_TO_MEM(_Port) \\r
+    ((((_Port) & 0xfffc) << 10) | ((_Port) & 0x0fff))\r
+\r
+/**\r
+  Reads a 8-bit I/O port.\r
+\r
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoRead8 (\r
+  IN  UINT64                 Port\r
+  )\r
+{\r
+  UINT64           Address;\r
+\r
+  //\r
+  // Add the 64MB aligned IO Port space to the IO address\r
+  //\r
+  Address = MAP_PORT_BASE_TO_MEM (Port);\r
+  Address += PcdGet64(PcdIoBlockBaseAddressForIpf);\r
+\r
+  return MmioRead8 (Address);\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port.\r
+\r
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoRead16 (\r
+  IN  UINT64                 Port\r
+  )\r
+{\r
+  UINT64           Address;\r
+\r
+  //\r
+  // Add the 64MB aligned IO Port space to the IO address\r
+  //\r
+  Address = MAP_PORT_BASE_TO_MEM (Port);\r
+  Address += PcdGet64(PcdIoBlockBaseAddressForIpf);\r
+\r
+  return MmioRead16 (Address);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port.\r
+\r
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoRead32 (\r
+  IN  UINT64                 Port\r
+  )\r
+{\r
+  UINT64           Address;\r
+\r
+  //\r
+  // Add the 64MB aligned IO Port space to the IO address\r
+  //\r
+  Address = MAP_PORT_BASE_TO_MEM (Port);\r
+  Address += PcdGet64(PcdIoBlockBaseAddressForIpf);\r
+\r
+  return MmioRead32 (Address);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit I/O port.\r
+\r
+  Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoRead64 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return 0;\r
+}\r
+\r
+/**\r
+  Writes a 8-bit I/O port.\r
+\r
+  Writes the 8-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoWrite8 (\r
+  IN  UINT64                 Port,\r
+  IN  UINT8                  Data\r
+  )\r
+{\r
+  UINT64           Address;\r
+\r
+  //\r
+  // Add the 64MB aligned IO Port space to the IO address\r
+  //\r
+  Address = MAP_PORT_BASE_TO_MEM (Port);\r
+  Address += PcdGet64(PcdIoBlockBaseAddressForIpf);\r
+\r
+  return MmioWrite8 (Address, Data);\r
+}\r
+\r
+/**\r
+  Writes a 16-bit I/O port.\r
+\r
+  Writes the 16-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoWrite16 (\r
+  IN  UINT64                 Port,\r
+  IN  UINT16                 Data\r
+  )\r
+{\r
+  UINT64           Address;\r
+\r
+  //\r
+  // Add the 64MB aligned IO Port space to the IO address\r
+  //\r
+  Address = MAP_PORT_BASE_TO_MEM (Port);\r
+  Address += PcdGet64(PcdIoBlockBaseAddressForIpf);\r
+\r
+  return MmioWrite16 (Address, Data);\r
+}\r
+\r
+/**\r
+  Writes a 32-bit I/O port.\r
+\r
+  Writes the 32-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoWrite32 (\r
+  IN  UINT64                 Port,\r
+  IN  UINT32                 Data\r
+  )\r
+{\r
+  UINT64           Address;\r
+\r
+  //\r
+  // Add the 64MB aligned IO Port space to the IO address\r
+  //\r
+  Address = MAP_PORT_BASE_TO_MEM (Port);\r
+  Address += PcdGet64(PcdIoBlockBaseAddressForIpf);\r
+\r
+  return MmioWrite32 (Address, Data);\r
+}\r
+\r
+/**\r
+  Writes a 64-bit I/O port.\r
+\r
+  Writes the 64-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 64-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoWrite64 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return 0;\r
+}\r
+\r
+/**\r
+  Reads a 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioRead8 (\r
+  IN  UINT64                 Address\r
+  )\r
+{\r
+  UINT8            Data;\r
+\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  Data = *((volatile UINT8 *) Address);\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Reads a 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioRead16 (\r
+  IN  UINT64                 Address\r
+  )\r
+{\r
+  UINT16           Data;\r
+\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  Data = *((volatile UINT16 *) Address);\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Reads a 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioRead32 (\r
+  IN  UINT64                 Address\r
+  )\r
+{\r
+  UINT32           Data;\r
+\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  Data = *((volatile UINT32 *) Address);\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioRead64 (\r
+  IN  UINT64                 Address\r
+  )\r
+{\r
+  UINT64           Data;\r
+\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  Data = *((volatile UINT64 *) Address);\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+\r
+}\r
+\r
+/**\r
+  Writes a 8-bit MMIO register.\r
+\r
+  Writes the 8-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Data    The value to write to the MMIO register.\r
+\r
+  @return The value written the memory address.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioWrite8 (\r
+  IN  UINT64                 Address,\r
+  IN  UINT8                  Data\r
+  )\r
+{\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  *((volatile UINT8 *) Address) = Data;\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Writes a 16-bit MMIO register.\r
+\r
+  Writes the 16-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Data    The value to write to the MMIO register.\r
+\r
+  @return The value written the memory address.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioWrite16 (\r
+  IN  UINT64                 Address,\r
+  IN  UINT16                 Data\r
+  )\r
+{\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  *((volatile UINT16 *) Address) = Data;\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Writes a 32-bit MMIO register.\r
+\r
+  Writes the 32-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Data    The value to write to the MMIO register.\r
+\r
+  @return The value written the memory address.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioWrite32 (\r
+  IN  UINT64                 Address,\r
+  IN  UINT32                 Data\r
+  )\r
+{\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  *((volatile UINT32 *) Address) = Data;\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+}\r
+\r
+/**\r
+  Writes a 64-bit MMIO register.\r
+\r
+  Writes the 64-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Data    The value to write to the MMIO register.\r
+\r
+  @return The value written the memory address.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioWrite64 (\r
+  IN  UINT64                 Address,\r
+  IN  UINT64                 Data\r
+  )\r
+{\r
+  Address |= BIT63;\r
+\r
+  MemoryFence ();\r
+  *((volatile UINT64 *) Address) = Data;\r
+  MemoryFence ();\r
+\r
+  return Data;\r
+}\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
new file mode 100644 (file)
index 0000000..8befbf8
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMmioBuffer.c
@@ -0,0 +1,414 @@
+/** @file\r
+  I/O Library MMIO Buffer Functions.\r
+\r
+  Copyright (c) 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Copy data from MMIO region to system memory by using 8-bit access.\r
+\r
+  Copy data from MMIO region specified by starting address StartAddress \r
+  to system memory specified by Buffer by using 8-bit access. The total \r
+  number of byte to be copied is specified by Length. Buffer is returned.\r
+  \r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied from.\r
+  @param  Length          Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer receiving the data read.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+UINT8 *\r
+EFIAPI\r
+MmioReadBuffer8 (\r
+  IN  UINTN       StartAddress,\r
+  IN  UINTN       Length,\r
+  OUT UINT8       *Buffer\r
+  )\r
+{\r
+  UINT8   *ReturnBuffer;\r
+\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+ \r
+  ReturnBuffer = Buffer;\r
+  \r
+  while (Length--) {\r
+    *(Buffer++) = MmioRead8 (StartAddress++);\r
+  }\r
+\r
+  return ReturnBuffer;\r
+}\r
+\r
+/**\r
+  Copy data from MMIO region to system memory by using 16-bit access.\r
+\r
+  Copy data from MMIO region specified by starting address StartAddress \r
+  to system memory specified by Buffer by using 16-bit access. The total \r
+  number of byte to be copied is specified by Length. Buffer is returned.\r
+  \r
+  If StartAddress is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied from.\r
+  @param  Length          Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer receiving the data read.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+UINT16 *\r
+EFIAPI\r
+MmioReadBuffer16 (\r
+  IN  UINTN       StartAddress,\r
+  IN  UINTN       Length,\r
+  OUT UINT16      *Buffer\r
+  )\r
+{\r
+  UINT16    *ReturnBuffer;\r
+\r
+  ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);\r
+  \r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+\r
+  ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);\r
+  ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);\r
+ \r
+  ReturnBuffer = Buffer;\r
+  \r
+  while (Length) {\r
+    *(Buffer++) = MmioRead16 (StartAddress);\r
+    StartAddress += sizeof (UINT16);\r
+    Length -= sizeof (UINT16);\r
+  }\r
+\r
+  return ReturnBuffer;\r
+}\r
+\r
+/**\r
+  Copy data from MMIO region to system memory by using 32-bit access.\r
+\r
+  Copy data from MMIO region specified by starting address StartAddress \r
+  to system memory specified by Buffer by using 32-bit access. The total \r
+  number of byte to be copied is specified by Length. Buffer is returned.\r
+  \r
+  If StartAddress is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied from.\r
+  @param  Length          Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer receiving the data read.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+UINT32 *\r
+EFIAPI\r
+MmioReadBuffer32 (\r
+  IN  UINTN       StartAddress,\r
+  IN  UINTN       Length,\r
+  OUT UINT32      *Buffer\r
+  )\r
+{\r
+  UINT32    *ReturnBuffer;\r
+\r
+  ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);\r
+  \r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+\r
+  ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);\r
+  ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);\r
+ \r
+  ReturnBuffer = Buffer;\r
+  \r
+  while (Length) {\r
+    *(Buffer++) = MmioRead32 (StartAddress);\r
+    StartAddress += sizeof (UINT32);\r
+    Length -= sizeof (UINT32);\r
+  }\r
+\r
+  return ReturnBuffer;\r
+}\r
+\r
+/**\r
+  Copy data from MMIO region to system memory by using 64-bit access.\r
+\r
+  Copy data from MMIO region specified by starting address StartAddress \r
+  to system memory specified by Buffer by using 64-bit access. The total \r
+  number of byte to be copied is specified by Length. Buffer is returned.\r
+  \r
+  If StartAddress is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied from.\r
+  @param  Length          Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer receiving the data read.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+UINT64 *\r
+EFIAPI\r
+MmioReadBuffer64 (\r
+  IN  UINTN       StartAddress,\r
+  IN  UINTN       Length,\r
+  OUT UINT64      *Buffer\r
+  )\r
+{\r
+  UINT64    *ReturnBuffer;\r
+\r
+  ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);\r
+  \r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+\r
+  ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);\r
+  ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);\r
+ \r
+  ReturnBuffer = Buffer;\r
+  \r
+  while (Length) {\r
+    *(Buffer++) = MmioRead64 (StartAddress);\r
+    StartAddress += sizeof (UINT64);\r
+    Length -= sizeof (UINT64);\r
+  }\r
+\r
+  return ReturnBuffer;\r
+}\r
+\r
+\r
+/**\r
+  Copy data from system memory to MMIO region by using 8-bit access.\r
+\r
+  Copy data from system memory specified by Buffer to MMIO region specified \r
+  by starting address StartAddress by using 8-bit access. The total number \r
+  of byte to be copied is specified by Length. Buffer is returned.\r
+  \r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied to.\r
+  @param  Length     Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer containing the data to write.\r
+\r
+  @return Size in bytes of the copy.\r
+\r
+**/\r
+UINT8 *\r
+EFIAPI\r
+MmioWriteBuffer8 (\r
+  IN  UINTN         StartAddress,\r
+  IN  UINTN         Length,\r
+  IN  CONST UINT8   *Buffer\r
+  )\r
+{\r
+  VOID* ReturnBuffer;\r
+\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+ \r
+  ReturnBuffer = (UINT8 *) Buffer;\r
+  \r
+  while (Length--) {\r
+     MmioWrite8 (StartAddress++, *(Buffer++));\r
+  }\r
+\r
+  return ReturnBuffer;\r
+ \r
+}\r
+\r
+/**\r
+  Copy data from system memory to MMIO region by using 16-bit access.\r
+\r
+  Copy data from system memory specified by Buffer to MMIO region specified \r
+  by starting address StartAddress by using 16-bit access. The total number \r
+  of byte to be copied is specified by Length. Length is returned.\r
+  \r
+  If StartAddress is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied to.\r
+  @param  Length     Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer containing the data to write.\r
+\r
+  @return Size in bytes of the copy.\r
+\r
+**/\r
+UINT16 *\r
+EFIAPI\r
+MmioWriteBuffer16 (\r
+  IN  UINTN        StartAddress,\r
+  IN  UINTN        Length,\r
+  IN  CONST UINT16 *Buffer\r
+  )\r
+{\r
+  UINT16    *ReturnBuffer;\r
+\r
+  ASSERT ((StartAddress & (sizeof (UINT16) - 1)) == 0);\r
+  \r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+\r
+  ASSERT ((Length & (sizeof (UINT16) - 1)) == 0);\r
+  ASSERT (((UINTN) Buffer & (sizeof (UINT16) - 1)) == 0);\r
+\r
+  ReturnBuffer = (UINT16 *) Buffer;\r
+  \r
+  while (Length) {\r
+    MmioWrite16 (StartAddress, *(Buffer++));\r
+    \r
+    StartAddress += sizeof (UINT16);\r
+    Length -= sizeof (UINT16);\r
+  }\r
+\r
+  return ReturnBuffer;\r
+}\r
+\r
+\r
+/**\r
+  Copy data from system memory to MMIO region by using 32-bit access.\r
+\r
+  Copy data from system memory specified by Buffer to MMIO region specified \r
+  by starting address StartAddress by using 32-bit access. The total number \r
+  of byte to be copied is specified by Length. Length is returned.\r
+  \r
+  If StartAddress is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied to.\r
+  @param  Length     Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer containing the data to write.\r
+\r
+  @return Size in bytes of the copy.\r
+\r
+**/\r
+UINT32 *\r
+EFIAPI\r
+MmioWriteBuffer32 (\r
+  IN  UINTN        StartAddress,\r
+  IN  UINTN        Length,\r
+  IN  CONST UINT32 *Buffer\r
+  )\r
+{\r
+  UINT32    *ReturnBuffer;\r
+\r
+  ASSERT ((StartAddress & (sizeof (UINT32) - 1)) == 0);\r
+  \r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+\r
+  ASSERT ((Length & (sizeof (UINT32) - 1)) == 0);\r
+  ASSERT (((UINTN) Buffer & (sizeof (UINT32) - 1)) == 0);\r
+\r
+  ReturnBuffer = (UINT32 *) Buffer;\r
+  \r
+  while (Length) {\r
+    MmioWrite32 (StartAddress, *(Buffer++));\r
+    \r
+    StartAddress += sizeof (UINT32);\r
+    Length -= sizeof (UINT32);\r
+  }\r
+\r
+  return ReturnBuffer;\r
+}\r
+\r
+/**\r
+  Copy data from system memory to MMIO region by using 64-bit access.\r
+\r
+  Copy data from system memory specified by Buffer to MMIO region specified \r
+  by starting address StartAddress by using 64-bit access. The total number \r
+  of byte to be copied is specified by Length. Length is returned.\r
+  \r
+  If StartAddress is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().\r
+\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  @param  StartAddress    Starting address for the MMIO region to be copied to.\r
+  @param  Length     Size in bytes of the copy.\r
+  @param  Buffer          Pointer to a system memory buffer containing the data to write.\r
+\r
+  @return Size in bytes of the copy.\r
+\r
+**/\r
+UINT64 *\r
+EFIAPI\r
+MmioWriteBuffer64 (\r
+  IN  UINTN        StartAddress,\r
+  IN  UINTN        Length,\r
+  IN  CONST UINT64 *Buffer\r
+  )\r
+{\r
+  UINT64    *ReturnBuffer;\r
+\r
+  ASSERT ((StartAddress & (sizeof (UINT64) - 1)) == 0);\r
+  \r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - StartAddress));\r
+  ASSERT ((Length - 1) <=  (MAX_ADDRESS - (UINTN) Buffer));\r
+\r
+  ASSERT ((Length & (sizeof (UINT64) - 1)) == 0);\r
+  ASSERT (((UINTN) Buffer & (sizeof (UINT64) - 1)) == 0);\r
+\r
+  ReturnBuffer = (UINT64 *) Buffer;\r
+  \r
+  while (Length) {\r
+    MmioWrite64 (StartAddress, *(Buffer++));\r
+    \r
+    StartAddress += sizeof (UINT64);\r
+    Length -= sizeof (UINT64);\r
+  }\r
+\r
+  return ReturnBuffer;\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
new file mode 100644 (file)
index 0000000..35854c6
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibMsc.c
@@ -0,0 +1,431 @@
+/** @file\r
+  I/O Library. This file has compiler specifics for Microsft C as there is no\r
+  ANSI C standard for doing IO.\r
+\r
+  MSC - uses intrinsic functions and the optimize will remove the function call\r
+  overhead.\r
+\r
+  We don't advocate putting compiler specifics in libraries or drivers but there\r
+  is no other way to make this work.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  IoLibMsc.c\r
+\r
+**/\r
+\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+//\r
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
+//\r
+int            _inp (unsigned short port);\r
+unsigned short _inpw (unsigned short port);\r
+unsigned long  _inpd (unsigned short port);\r
+int            _outp (unsigned short port, int databyte );\r
+unsigned short _outpw (unsigned short port, unsigned short dataword );\r
+unsigned long  _outpd (unsigned short port, unsigned long dataword );\r
+void          _ReadWriteBarrier (void);\r
+\r
+#pragma intrinsic(_inp)\r
+#pragma intrinsic(_inpw)\r
+#pragma intrinsic(_inpd)\r
+#pragma intrinsic(_outp)\r
+#pragma intrinsic(_outpw)\r
+#pragma intrinsic(_outpd)\r
+#pragma intrinsic(_ReadWriteBarrier)\r
+\r
+//\r
+// _ReadWriteBarrier() forces memory reads and writes to complete at the point\r
+// in the call. This is only a hint to the compiler and does emit code.\r
+// In past versions of the compiler, _ReadWriteBarrier was enforced only\r
+// locally and did not affect functions up the call tree. In Visual C++\r
+// 2005, _ReadWriteBarrier is enforced all the way up the call tree.\r
+//\r
+\r
+/**\r
+  Reads an 8-bit I/O port.\r
+\r
+  Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoRead8 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  UINT8                             Value;\r
+\r
+  _ReadWriteBarrier ();\r
+  Value = (UINT8)_inp ((UINT16)Port);\r
+  _ReadWriteBarrier ();\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Writes an 8-bit I/O port.\r
+\r
+  Writes the 8-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+IoWrite8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  _ReadWriteBarrier ();\r
+  (UINT8)_outp ((UINT16)Port, Value);\r
+  _ReadWriteBarrier ();\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port.\r
+\r
+  Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoRead16 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  UINT16                            Value;\r
+\r
+  ASSERT ((Port & 1) == 0);\r
+  _ReadWriteBarrier ();\r
+  Value = _inpw ((UINT16)Port);\r
+  _ReadWriteBarrier ();\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Writes a 16-bit I/O port.\r
+\r
+  Writes the 16-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+IoWrite16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT ((Port & 1) == 0);\r
+  _ReadWriteBarrier ();\r
+  _outpw ((UINT16)Port, Value);\r
+  _ReadWriteBarrier ();\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port.\r
+\r
+  Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoRead32 (\r
+  IN      UINTN                     Port\r
+  )\r
+{\r
+  UINT32                            Value;\r
+\r
+  ASSERT ((Port & 3) == 0);\r
+  _ReadWriteBarrier ();\r
+  Value = _inpd ((UINT16)Port);\r
+  _ReadWriteBarrier ();\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Writes a 32-bit I/O port.\r
+\r
+  Writes the 32-bit I/O port specified by Port with the value specified by Value\r
+  and returns Value. This function must guarantee that all I/O read and write\r
+  operations are serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port  The I/O port to write.\r
+  @param  Value The value to write to the I/O port.\r
+\r
+  @return The value written the I/O port.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+IoWrite32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT ((Port & 3) == 0);\r
+  _ReadWriteBarrier ();\r
+  _outpd ((UINT16)Port, Value);\r
+  _ReadWriteBarrier ();\r
+  return Value;\r
+}\r
+\r
+\r
+/**\r
+  Reads an 8-bit MMIO register.\r
+\r
+  Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioRead8 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  UINT8                             Value;\r
+\r
+  Value = *(volatile UINT8*)Address;\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Writes an 8-bit MMIO register.\r
+\r
+  Writes the 8-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 8-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+MmioWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  return *(volatile UINT8*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 16-bit MMIO register.\r
+\r
+  Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioRead16 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  UINT16                            Value;\r
+\r
+  ASSERT ((Address & 1) == 0);\r
+  Value = *(volatile UINT16*)Address;\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Writes a 16-bit MMIO register.\r
+\r
+  Writes the 16-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 16-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+MmioWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 1) == 0);\r
+  return *(volatile UINT16*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 32-bit MMIO register.\r
+\r
+  Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioRead32 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  UINT32                            Value;\r
+\r
+  ASSERT ((Address & 3) == 0);\r
+  Value = *(volatile UINT32*)Address;\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Writes a 32-bit MMIO register.\r
+\r
+  Writes the 32-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 32-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+MmioWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 3) == 0);\r
+  return *(volatile UINT32*)Address = Value;\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MMIO register.\r
+\r
+  Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
+  returned. This function must guarantee that all MMIO read and write\r
+  operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioRead64 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  UINT64                            Value;\r
+\r
+  ASSERT ((Address & 7) == 0);\r
+  Value = *(volatile UINT64*)Address;\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Writes a 64-bit MMIO register.\r
+\r
+  Writes the 64-bit MMIO register specified by Address with the value specified\r
+  by Value and returns Value. This function must guarantee that all MMIO read\r
+  and write operations are serialized.\r
+\r
+  If 64-bit MMIO register operations are not supported, then ASSERT().\r
+\r
+  @param  Address The MMIO register to write.\r
+  @param  Value   The value to write to the MMIO register.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioWrite64 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  ASSERT ((Address & 7) == 0);\r
+  return *(volatile UINT64*)Address = Value;\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/ARShiftU64.c b/MdePkg/Library/BaseLib/ARShiftU64.c
new file mode 100644 (file)
index 0000000..d9105c6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/ARShiftU64.c
@@ -0,0 +1,46 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r
+  with original integer's bit 63. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the right by Count bits. The\r
+  high Count bits are set to bit 63 of Operand.  The shifted value is returned.\r
+\r
+  If Count is greater than 63, then ASSERT().\r
+\r
+  @param  Operand The 64-bit operand to shift right.\r
+  @param  Count   The number of bits to shift right.\r
+\r
+  @return Operand arithmetically shifted right by Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+ARShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  ASSERT (Count < sizeof (Operand) * 8);\r
+  return InternalMathARShiftU64 (Operand, Count);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
new file mode 100644 (file)
index 0000000..a974588
--- /dev/null
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -0,0 +1,575 @@
+#/** @file\r
+# Component description file for Base Library\r
+#\r
+# Base Library implementation.\r
+# Copyright (c) 2007 - 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseLib\r
+  FILE_GUID                      = 27d67720-ea68-48ae-93da-a3a074c90e30\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = BaseLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  CheckSum.c\r
+  SwitchStack.c\r
+  SwapBytes64.c\r
+  SwapBytes32.c\r
+  SwapBytes16.c\r
+  LongJump.c\r
+  SetJump.c\r
+  RShiftU64.c\r
+  RRotU64.c\r
+  RRotU32.c\r
+  MultU64x64.c\r
+  MultU64x32.c\r
+  MultS64x64.c\r
+  ModU64x32.c\r
+  LShiftU64.c\r
+  LRotU64.c\r
+  LRotU32.c\r
+  LowBitSet64.c\r
+  LowBitSet32.c\r
+  HighBitSet64.c\r
+  HighBitSet32.c\r
+  GetPowerOfTwo64.c\r
+  GetPowerOfTwo32.c\r
+  DivU64x64Remainder.c\r
+  DivU64x32Remainder.c\r
+  DivU64x32.c\r
+  DivS64x64Remainder.c\r
+  ARShiftU64.c\r
+  BitField.c\r
+  CpuDeadLoop.c\r
+  Cpu.c\r
+  LinkedList.c\r
+  String.c\r
+  BaseLibInternals.h\r
+  CommonHeader.h\r
+\r
+[Sources.Ia32]\r
+  Ia32/Wbinvd.c\r
+  Ia32/WriteMm7.c\r
+  Ia32/WriteMm6.c\r
+  Ia32/WriteMm5.c\r
+  Ia32/WriteMm4.c\r
+  Ia32/WriteMm3.c\r
+  Ia32/WriteMm2.c\r
+  Ia32/WriteMm1.c\r
+  Ia32/WriteMm0.c\r
+  Ia32/WriteLdtr.c\r
+  Ia32/WriteIdtr.c\r
+  Ia32/WriteGdtr.c\r
+  Ia32/WriteDr7.c\r
+  Ia32/WriteDr6.c\r
+  Ia32/WriteDr5.c\r
+  Ia32/WriteDr4.c\r
+  Ia32/WriteDr3.c\r
+  Ia32/WriteDr2.c\r
+  Ia32/WriteDr1.c\r
+  Ia32/WriteDr0.c\r
+  Ia32/WriteCr4.c\r
+  Ia32/WriteCr3.c\r
+  Ia32/WriteCr2.c\r
+  Ia32/WriteCr0.c\r
+  Ia32/WriteMsr64.c\r
+  Ia32/Thunk16.asm\r
+  Ia32/SwapBytes64.c\r
+  Ia32/SetJump.c\r
+  Ia32/RRotU64.c\r
+  Ia32/RShiftU64.c\r
+  Ia32/ReadPmc.c\r
+  Ia32/ReadTsc.c\r
+  Ia32/ReadLdtr.c\r
+  Ia32/ReadIdtr.c\r
+  Ia32/ReadGdtr.c\r
+  Ia32/ReadTr.c\r
+  Ia32/ReadSs.c\r
+  Ia32/ReadGs.c\r
+  Ia32/ReadFs.c\r
+  Ia32/ReadEs.c\r
+  Ia32/ReadDs.c\r
+  Ia32/ReadCs.c\r
+  Ia32/ReadMsr64.c\r
+  Ia32/ReadMm7.c\r
+  Ia32/ReadMm6.c\r
+  Ia32/ReadMm5.c\r
+  Ia32/ReadMm4.c\r
+  Ia32/ReadMm3.c\r
+  Ia32/ReadMm2.c\r
+  Ia32/ReadMm1.c\r
+  Ia32/ReadMm0.c\r
+  Ia32/ReadEflags.c\r
+  Ia32/ReadDr7.c\r
+  Ia32/ReadDr6.c\r
+  Ia32/ReadDr5.c\r
+  Ia32/ReadDr4.c\r
+  Ia32/ReadDr3.c\r
+  Ia32/ReadDr2.c\r
+  Ia32/ReadDr1.c\r
+  Ia32/ReadDr0.c\r
+  Ia32/ReadCr4.c\r
+  Ia32/ReadCr3.c\r
+  Ia32/ReadCr2.c\r
+  Ia32/ReadCr0.c\r
+  Ia32/Mwait.c\r
+  Ia32/Monitor.c\r
+  Ia32/ModU64x32.c\r
+  Ia32/MultU64x64.c\r
+  Ia32/MultU64x32.c\r
+  Ia32/LShiftU64.c\r
+  Ia32/LRotU64.c\r
+  Ia32/LongJump.c\r
+  Ia32/Invd.c\r
+  Ia32/InterlockedCompareExchange64.c\r
+  Ia32/InterlockedCompareExchange32.c\r
+  Ia32/InterlockedDecrement.c\r
+  Ia32/InterlockedIncrement.c\r
+  Ia32/FxRestore.c\r
+  Ia32/FxSave.c\r
+  Ia32/FlushCacheLine.c\r
+  Ia32/EnablePaging64.asm\r
+  Ia32/EnablePaging32.c\r
+  Ia32/EnableInterrupts.c\r
+  Ia32/EnableDisableInterrupts.c\r
+  Ia32/DivU64x64Remainder.c\r
+  Ia32/DivU64x32Remainder.c\r
+  Ia32/DivU64x32.c\r
+  Ia32/DisablePaging32.c\r
+  Ia32/DisableInterrupts.c\r
+  Ia32/CpuPause.c\r
+  Ia32/CpuIdEx.c\r
+  Ia32/CpuId.c\r
+  Ia32/CpuSleep.c\r
+  Ia32/CpuFlushTlb.c\r
+  Ia32/CpuBreakpoint.c\r
+  Ia32/ARShiftU64.c\r
+  Ia32/Thunk16.S\r
+  Ia32/CpuFlushTlb.S\r
+  Ia32/CpuBreakpoint.S\r
+  Ia32/CpuPause.S\r
+  Ia32/CpuSleep.S\r
+  Ia32/EnableDisableInterrupts.S\r
+  Ia32/DisableInterrupts.S\r
+  Ia32/EnableInterrupts.S\r
+  Ia32/InterlockedCompareExchange64.S\r
+  Ia32/InterlockedCompareExchange32.S\r
+  Ia32/InterlockedDecrement.S\r
+  Ia32/InterlockedIncrement.S\r
+  Ia32/FlushCacheLine.S\r
+  Ia32/Invd.S\r
+  Ia32/Wbinvd.S\r
+  Ia32/EnablePaging64.S\r
+  Ia32/DisablePaging32.S\r
+  Ia32/EnablePaging32.S\r
+  Ia32/Mwait.S\r
+  Ia32/Monitor.S\r
+  Ia32/ReadPmc.S\r
+  Ia32/ReadTsc.S\r
+  Ia32/WriteMm7.S\r
+  Ia32/WriteMm6.S\r
+  Ia32/WriteMm5.S\r
+  Ia32/WriteMm4.S\r
+  Ia32/WriteMm3.S\r
+  Ia32/WriteMm2.S\r
+  Ia32/WriteMm1.S\r
+  Ia32/WriteMm0.S\r
+  Ia32/ReadMm7.S\r
+  Ia32/ReadMm6.S\r
+  Ia32/ReadMm5.S\r
+  Ia32/ReadMm4.S\r
+  Ia32/ReadMm3.S\r
+  Ia32/ReadMm2.S\r
+  Ia32/ReadMm1.S\r
+  Ia32/ReadMm0.S\r
+  Ia32/FxRestore.S\r
+  Ia32/FxSave.S\r
+  Ia32/WriteLdtr.S\r
+  Ia32/ReadLdtr.S\r
+  Ia32/WriteIdtr.S\r
+  Ia32/ReadIdtr.S\r
+  Ia32/WriteGdtr.S\r
+  Ia32/ReadGdtr.S\r
+  Ia32/ReadTr.S\r
+  Ia32/ReadSs.S\r
+  Ia32/ReadGs.S\r
+  Ia32/ReadFs.S\r
+  Ia32/ReadEs.S\r
+  Ia32/ReadDs.S\r
+  Ia32/ReadCs.S\r
+  Ia32/WriteDr7.S\r
+  Ia32/WriteDr6.S\r
+  Ia32/WriteDr5.S\r
+  Ia32/WriteDr4.S\r
+  Ia32/WriteDr3.S\r
+  Ia32/WriteDr2.S\r
+  Ia32/WriteDr1.S\r
+  Ia32/WriteDr0.S\r
+  Ia32/ReadDr7.S\r
+  Ia32/ReadDr6.S\r
+  Ia32/ReadDr5.S\r
+  Ia32/ReadDr4.S\r
+  Ia32/ReadDr3.S\r
+  Ia32/ReadDr2.S\r
+  Ia32/ReadDr1.S\r
+  Ia32/ReadDr0.S\r
+  Ia32/WriteCr4.S\r
+  Ia32/WriteCr3.S\r
+  Ia32/WriteCr2.S\r
+  Ia32/WriteCr0.S\r
+  Ia32/ReadCr4.S\r
+  Ia32/ReadCr3.S\r
+  Ia32/ReadCr2.S\r
+  Ia32/ReadCr0.S\r
+  Ia32/WriteMsr64.S\r
+  Ia32/ReadMsr64.S\r
+  Ia32/ReadEflags.S\r
+  Ia32/CpuIdEx.S\r
+  Ia32/CpuId.S\r
+  Ia32/LongJump.S\r
+  Ia32/SetJump.S\r
+  Ia32/SwapBytes64.S\r
+  Ia32/DivU64x64Remainder.S\r
+  Ia32/DivU64x32Remainder.S\r
+  Ia32/ModU64x32.S\r
+  Ia32/DivU64x32.S\r
+  Ia32/MultU64x64.S\r
+  Ia32/MultU64x32.S\r
+  Ia32/RRotU64.S\r
+  Ia32/LRotU64.S\r
+  Ia32/ARShiftU64.S\r
+  Ia32/RShiftU64.S\r
+  Ia32/LShiftU64.S\r
+  Ia32/DivS64x64Remainder.c\r
+  Ia32/InternalSwitchStack.c\r
+  Ia32/Non-existing.c\r
+  Unaligned.c\r
+  x86WriteIdtr.c\r
+  x86WriteGdtr.c\r
+  x86Thunk.c\r
+  x86ReadIdtr.c\r
+  x86ReadGdtr.c\r
+  x86Msr.c\r
+  x86MemoryFence.c\r
+  x86GetInterruptState.c\r
+  x86FxSave.c\r
+  x86FxRestore.c\r
+  x86EnablePaging64.c\r
+  x86EnablePaging32.c\r
+  x86DisablePaging64.c\r
+  x86DisablePaging32.c\r
+  Synchronization.c\r
+  SynchronizationMsc.c\r
+  SynchronizationGcc.c\r
+\r
+[Sources.X64]\r
+  X64/Thunk16.asm\r
+  X64/CpuFlushTlb.asm\r
+  X64/CpuBreakpoint.c\r
+  X64/CpuPause.asm\r
+  X64/CpuSleep.asm\r
+  X64/EnableDisableInterrupts.asm\r
+  X64/DisableInterrupts.asm\r
+  X64/EnableInterrupts.asm\r
+  X64/InterlockedCompareExchange64.asm\r
+  X64/InterlockedCompareExchange32.asm\r
+  X64/InterlockedDecrement.c\r
+  X64/InterlockedIncrement.c\r
+  X64/FlushCacheLine.asm\r
+  X64/Invd.asm\r
+  X64/Wbinvd.asm\r
+  X64/DisablePaging64.asm\r
+  X64/EnablePaging64.asm\r
+  X64/Mwait.asm\r
+  X64/Monitor.asm\r
+  X64/ReadPmc.asm\r
+  X64/ReadTsc.asm\r
+  X64/WriteMm7.asm\r
+  X64/WriteMm6.asm\r
+  X64/WriteMm5.asm\r
+  X64/WriteMm4.asm\r
+  X64/WriteMm3.asm\r
+  X64/WriteMm2.asm\r
+  X64/WriteMm1.asm\r
+  X64/WriteMm0.asm\r
+  X64/ReadMm7.asm\r
+  X64/ReadMm6.asm\r
+  X64/ReadMm5.asm\r
+  X64/ReadMm4.asm\r
+  X64/ReadMm3.asm\r
+  X64/ReadMm2.asm\r
+  X64/ReadMm1.asm\r
+  X64/ReadMm0.asm\r
+  X64/FxRestore.asm\r
+  X64/FxSave.asm\r
+  X64/WriteLdtr.asm\r
+  X64/ReadLdtr.asm\r
+  X64/WriteIdtr.asm\r
+  X64/ReadIdtr.asm\r
+  X64/WriteGdtr.asm\r
+  X64/ReadGdtr.asm\r
+  X64/ReadTr.asm\r
+  X64/ReadSs.asm\r
+  X64/ReadGs.asm\r
+  X64/ReadFs.asm\r
+  X64/ReadEs.asm\r
+  X64/ReadDs.asm\r
+  X64/ReadCs.asm\r
+  X64/WriteDr7.asm\r
+  X64/WriteDr6.asm\r
+  X64/WriteDr5.asm\r
+  X64/WriteDr4.asm\r
+  X64/WriteDr3.asm\r
+  X64/WriteDr2.asm\r
+  X64/WriteDr1.asm\r
+  X64/WriteDr0.asm\r
+  X64/ReadDr7.asm\r
+  X64/ReadDr6.asm\r
+  X64/ReadDr5.asm\r
+  X64/ReadDr4.asm\r
+  X64/ReadDr3.asm\r
+  X64/ReadDr2.asm\r
+  X64/ReadDr1.asm\r
+  X64/ReadDr0.asm\r
+  X64/WriteCr4.asm\r
+  X64/WriteCr3.asm\r
+  X64/WriteCr2.asm\r
+  X64/WriteCr0.asm\r
+  X64/ReadCr4.asm\r
+  X64/ReadCr3.asm\r
+  X64/ReadCr2.asm\r
+  X64/ReadCr0.asm\r
+  X64/WriteMsr64.c\r
+  X64/ReadMsr64.c\r
+  X64/ReadEflags.asm\r
+  X64/CpuIdEx.asm\r
+  X64/CpuId.asm\r
+  X64/LongJump.asm\r
+  X64/SetJump.asm\r
+  X64/SwitchStack.asm\r
+  X64/Non-existing.c\r
+  Math64.c\r
+  Unaligned.c\r
+  x86WriteIdtr.c\r
+  x86WriteGdtr.c\r
+  x86Thunk.c\r
+  x86ReadIdtr.c\r
+  x86ReadGdtr.c\r
+  x86Msr.c\r
+  x86MemoryFence.c\r
+  x86GetInterruptState.c\r
+  x86FxSave.c\r
+  x86FxRestore.c\r
+  x86EnablePaging64.c\r
+  x86EnablePaging32.c\r
+  x86DisablePaging64.c\r
+  x86DisablePaging32.c\r
+  X64/WriteMsr64.S\r
+  X64/WriteMm7.S\r
+  X64/WriteMm6.S\r
+  X64/WriteMm5.S\r
+  X64/WriteMm4.S\r
+  X64/WriteMm3.S\r
+  X64/WriteMm2.S\r
+  X64/WriteMm1.S\r
+  X64/WriteMm0.S\r
+  X64/WriteLdtr.S\r
+  X64/WriteIdtr.S\r
+  X64/WriteGdtr.S\r
+  X64/WriteDr7.S\r
+  X64/WriteDr6.S\r
+  X64/WriteDr5.S\r
+  X64/WriteDr4.S\r
+  X64/WriteDr3.S\r
+  X64/WriteDr2.S\r
+  X64/WriteDr1.S\r
+  X64/WriteDr0.S\r
+  X64/WriteCr4.S\r
+  X64/WriteCr3.S\r
+  X64/WriteCr2.S\r
+  X64/WriteCr0.S\r
+  X64/Wbinvd.S\r
+  X64/Thunk16.S\r
+  X64/SwitchStack.S\r
+  X64/SetJump.S\r
+  X64/ReadTsc.S\r
+  X64/ReadTr.S\r
+  X64/ReadSs.S\r
+  X64/ReadPmc.S\r
+  X64/ReadMsr64.S\r
+  X64/ReadMm7.S\r
+  X64/ReadMm6.S\r
+  X64/ReadMm5.S\r
+  X64/ReadMm4.S\r
+  X64/ReadMm3.S\r
+  X64/ReadMm2.S\r
+  X64/ReadMm1.S\r
+  X64/ReadMm0.S\r
+  X64/ReadLdtr.S\r
+  X64/ReadIdtr.S\r
+  X64/ReadGs.S\r
+  X64/ReadGdtr.S\r
+  X64/ReadFs.S\r
+  X64/ReadEs.S\r
+  X64/ReadEflags.S\r
+  X64/ReadDs.S\r
+  X64/ReadDr7.S\r
+  X64/ReadDr6.S\r
+  X64/ReadDr5.S\r
+  X64/ReadDr4.S\r
+  X64/ReadDr3.S\r
+  X64/ReadDr2.S\r
+  X64/ReadDr1.S\r
+  X64/ReadDr0.S\r
+  X64/ReadCs.S\r
+  X64/ReadCr4.S\r
+  X64/ReadCr3.S\r
+  X64/ReadCr2.S\r
+  X64/ReadCr0.S\r
+  X64/Mwait.S\r
+  X64/Monitor.S\r
+  X64/LongJump.S\r
+  X64/Invd.S\r
+  X64/InterlockedIncrement.S\r
+  X64/InterlockedDecrement.S\r
+  X64/InterlockedCompareExchange64.S\r
+  X64/InterlockedCompareExchange32.S\r
+  X64/FxSave.S\r
+  X64/FxRestore.S\r
+  X64/FlushCacheLine.S\r
+  X64/EnablePaging64.S\r
+  X64/EnableInterrupts.S\r
+  X64/EnableDisableInterrupts.S\r
+  X64/DisablePaging64.S\r
+  X64/DisableInterrupts.S\r
+  X64/CpuSleep.S\r
+  X64/CpuPause.S\r
+  X64/CpuId.S\r
+  X64/CpuIdEx.S\r
+  X64/CpuFlushTlb.S\r
+  X64/CpuBreakpoint.S\r
+  Synchronization.c\r
+  SynchronizationMsc.c\r
+  SynchronizationGcc.c\r
+\r
+[Sources.IPF]\r
+  Ipf/AccessGp.s\r
+  Ipf/ReadCpuid.s\r
+  Ipf/ExecFc.s\r
+  Ipf/AsmPalCall.s\r
+  Ipf/AccessPsr.s\r
+  Ipf/AccessPmr.s\r
+  Ipf/AccessKr.s\r
+  Ipf/AccessGcr.s\r
+  Ipf/AccessEicr.s\r
+  Ipf/AccessDbr.s\r
+  Ipf/FlushCacheRange.s\r
+  Ipf/InternalSwitchStack.c\r
+  Ipf/GetInterruptState.s\r
+  Ipf/CpuFlushTlb.s\r
+  Ipf/CpuPause.s\r
+  Ipf/Synchronization.c\r
+  Ipf/InterlockedCompareExchange64.s\r
+  Ipf/InterlockedCompareExchange32.s\r
+  Ipf/CpuBreakpoint.c\r
+  Ipf/Unaligned.c\r
+  Ipf/SwitchStack.s\r
+  Ipf/longjmp.s\r
+  Ipf/setjmp.s\r
+  Ipf/PalCallStatic.s\r
+  Ipf/ia_64gen.h\r
+  Ipf/asm.h\r
+  Math64.c\r
+  Synchronization.c\r
+  SynchronizationMsc.c\r
+  SynchronizationGcc.c\r
+\r
+[Sources.EBC]\r
+  Synchronization.c\r
+  Ebc/Synchronization.c\r
+  Ebc/CpuBreakpoint.c\r
+  Ebc/SetJumpLongJump.c\r
+  Ebc/SwitchStack.c\r
+  Unaligned.c\r
+  Math64.c\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  PcdLib\r
+  TimerLib\r
+  DebugLib\r
+  BaseMemoryLib\r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.\r
+#\r
+################################################################################\r
+\r
+[PcdsFixedAtBuild.common]\r
+  PcdSpinLockTimeout|gEfiMdePkgTokenSpaceGuid\r
+  PcdMaximumLinkedListLength|gEfiMdePkgTokenSpaceGuid\r
+  PcdMaximumAsciiStringLength|gEfiMdePkgTokenSpaceGuid\r
+  PcdMaximumUnicodeStringLength|gEfiMdePkgTokenSpaceGuid\r
+\r

diff --git a/MdePkg/Library/BaseLib/BaseLib.msa b/MdePkg/Library/BaseLib/BaseLib.msa
new file mode 100644 (file)
index 0000000..96b303c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/BaseLib.msa
@@ -0,0 +1,660 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
+  <MsaHeader>
+    <ModuleName>BaseLib</ModuleName>
+    <ModuleType>BASE</ModuleType>
+    <GuidValue>27d67720-ea68-48ae-93da-a3a074c90e30</GuidValue>
+    <Version>1.0</Version>
+    <Abstract>Component description file for Base Library</Abstract>
+    <Description>Base Library implementation.</Description>
+    <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
+    <License>All rights reserved. This program and the accompanying materials
+      are licensed and made available under the terms and conditions of the BSD License
+      which accompanies this distribution.  The full text of the license may be found at
+      http://opensource.org/licenses/bsd-license.php
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>
+  </MsaHeader>
+  <ModuleDefinitions>
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
+    <BinaryModule>false</BinaryModule>
+    <OutputFileBasename>BaseLib</OutputFileBasename>
+  </ModuleDefinitions>
+  <LibraryClassDefinitions>
+    <LibraryClass Usage="ALWAYS_PRODUCED">
+      <Keyword>BaseLib</Keyword>
+    </LibraryClass>
+    <LibraryClass Usage="ALWAYS_CONSUMED">
+      <Keyword>BaseMemoryLib</Keyword>
+    </LibraryClass>
+    <LibraryClass Usage="ALWAYS_CONSUMED">
+      <Keyword>DebugLib</Keyword>
+    </LibraryClass>
+    <LibraryClass Usage="ALWAYS_CONSUMED">
+      <Keyword>TimerLib</Keyword>
+    </LibraryClass>
+    <LibraryClass Usage="ALWAYS_CONSUMED">
+      <Keyword>PcdLib</Keyword>
+    </LibraryClass>
+  </LibraryClassDefinitions>
+  <SourceFiles>
+    <Filename>BaseLibInternals.h</Filename>
+    <Filename>String.c</Filename>
+    <Filename>LinkedList.c</Filename>
+    <Filename>Cpu.c</Filename>
+    <Filename>CpuDeadLoop.c</Filename>
+    <Filename>BitField.c</Filename>
+    <Filename>ARShiftU64.c</Filename>
+    <Filename>DivS64x64Remainder.c</Filename>
+    <Filename>DivU64x32.c</Filename>
+    <Filename>DivU64x32Remainder.c</Filename>
+    <Filename>DivU64x64Remainder.c</Filename>
+    <Filename>GetPowerOfTwo32.c</Filename>
+    <Filename>GetPowerOfTwo64.c</Filename>
+    <Filename>HighBitSet32.c</Filename>
+    <Filename>HighBitSet64.c</Filename>
+    <Filename>LowBitSet32.c</Filename>
+    <Filename>LowBitSet64.c</Filename>
+    <Filename>LRotU32.c</Filename>
+    <Filename>LRotU64.c</Filename>
+    <Filename>LShiftU64.c</Filename>
+    <Filename>ModU64x32.c</Filename>
+    <Filename>MultS64x64.c</Filename>
+    <Filename>MultU64x32.c</Filename>
+    <Filename>MultU64x64.c</Filename>
+    <Filename>RRotU32.c</Filename>
+    <Filename>RRotU64.c</Filename>
+    <Filename>RShiftU64.c</Filename>
+    <Filename>SetJump.c</Filename>
+    <Filename>LongJump.c</Filename>
+    <Filename>SwapBytes16.c</Filename>
+    <Filename>SwapBytes32.c</Filename>
+    <Filename>SwapBytes64.c</Filename>
+    <Filename>SwitchStack.c</Filename>
+    <Filename>CheckSum.c</Filename>
+    <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="GCC">SynchronizationGcc.c</Filename>
+    <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="MSFT">SynchronizationMsc.c</Filename>
+    <Filename SupArchList="IA32 X64 IPF" ToolChainFamily="INTEL">Synchronization.c</Filename>
+
+    <Filename SupArchList="IA32">x86DisablePaging32.c</Filename>
+    <Filename SupArchList="IA32">x86DisablePaging64.c</Filename>
+    <Filename SupArchList="IA32">x86EnablePaging32.c</Filename>
+    <Filename SupArchList="IA32">x86EnablePaging64.c</Filename>
+    <Filename SupArchList="IA32">x86FxRestore.c</Filename>
+    <Filename SupArchList="IA32">x86FxSave.c</Filename>
+    <Filename SupArchList="IA32">x86GetInterruptState.c</Filename>
+    <Filename SupArchList="IA32">x86MemoryFence.c</Filename>
+    <Filename SupArchList="IA32">x86Msr.c</Filename>
+    <Filename SupArchList="IA32">x86ReadGdtr.c</Filename>
+    <Filename SupArchList="IA32">x86ReadIdtr.c</Filename>
+    <Filename SupArchList="IA32">x86Thunk.c</Filename>
+    <Filename SupArchList="IA32">x86WriteGdtr.c</Filename>
+    <Filename SupArchList="IA32">x86WriteIdtr.c</Filename>
+    <Filename SupArchList="IA32">Unaligned.c</Filename>
+    <Filename SupArchList="IA32">Ia32/Non-existing.c</Filename>
+    <Filename SupArchList="IA32">Ia32/InternalSwitchStack.c</Filename>
+    <Filename SupArchList="IA32">Ia32/DivS64x64Remainder.c</Filename>
+
+    <!-- GCC assembly code is with .S extension -->
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/LShiftU64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/RShiftU64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ARShiftU64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/LRotU64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/RRotU64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/MultU64x32.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/MultU64x64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DivU64x32.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ModU64x32.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DivU64x32Remainder.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/DivU64x64Remainder.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/SwapBytes64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/SetJump.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/LongJump.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuId.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/CpuIdEx.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadEflags.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMsr64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMsr64.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr0.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr2.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr3.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCr4.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr0.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr2.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr3.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteCr4.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr0.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr1.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr2.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr3.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr4.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr5.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr6.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDr7.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr0.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr1.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr2.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr3.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr4.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr5.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr6.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteDr7.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadCs.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadDs.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadEs.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadFs.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadGs.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadSs.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadTr.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadGdtr.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteGdtr.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadIdtr.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteIdtr.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadLdtr.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteLdtr.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/FxSave.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/FxRestore.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm0.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm1.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm2.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm3.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm4.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm5.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm6.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/ReadMm7.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm0.S</Filename>
+    <Filename SupArchList="IA32" ToolChainFamily="GCC">Ia32/WriteMm1.S</Filename>
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+    <Filename SupArchList="X64">X64/FxSave.asm</Filename>
+    <Filename SupArchList="X64">X64/FxRestore.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm0.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm1.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm2.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm3.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm4.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm5.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm6.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadMm7.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm0.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm1.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm2.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm3.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm4.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm5.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm6.asm</Filename>
+    <Filename SupArchList="X64">X64/WriteMm7.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadTsc.asm</Filename>
+    <Filename SupArchList="X64">X64/ReadPmc.asm</Filename>
+    <Filename SupArchList="X64">X64/Monitor.asm</Filename>
+    <Filename SupArchList="X64">X64/Mwait.asm</Filename>
+    <Filename SupArchList="X64">X64/EnablePaging64.asm</Filename>
+    <Filename SupArchList="X64">X64/DisablePaging64.asm</Filename>
+    <Filename SupArchList="X64">X64/Wbinvd.asm</Filename>
+    <Filename SupArchList="X64">X64/Invd.asm</Filename>
+    <Filename SupArchList="X64">X64/FlushCacheLine.asm</Filename>
+    <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedIncrement.c</Filename>
+    <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedDecrement.c</Filename>
+    <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedCompareExchange32.asm</Filename>
+    <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/InterlockedCompareExchange64.asm</Filename>
+    <Filename SupArchList="X64">X64/EnableInterrupts.asm</Filename>
+    <Filename SupArchList="X64">X64/DisableInterrupts.asm</Filename>
+    <Filename SupArchList="X64">X64/EnableDisableInterrupts.asm</Filename>
+    <Filename SupArchList="X64">X64/CpuSleep.asm</Filename>
+    <Filename SupArchList="X64">X64/CpuPause.asm</Filename>
+    <Filename SupArchList="X64" ToolChainFamily="MSFT">X64/CpuBreakpoint.c</Filename>
+    <Filename SupArchList="X64">X64/CpuFlushTlb.asm</Filename>
+    <Filename SupArchList="X64">X64/Thunk16.asm</Filename>
+
+    <Filename SupArchList="IPF">Math64.c</Filename>
+    <Filename SupArchList="IPF">Ipf/asm.h</Filename>
+    <Filename SupArchList="IPF">Ipf/ia_64gen.h</Filename>
+    <Filename SupArchList="IPF">Ipf/PalCallStatic.s</Filename>
+    <Filename SupArchList="IPF">Ipf/setjmp.s</Filename>
+    <Filename SupArchList="IPF">Ipf/longjmp.s</Filename>
+    <Filename SupArchList="IPF">Ipf/SwitchStack.s</Filename>
+    <Filename SupArchList="IPF">Ipf/Unaligned.c</Filename>
+    <Filename SupArchList="IPF">Ipf/CpuBreakpoint.c</Filename>
+    <Filename SupArchList="IPF">Ipf/InterlockedCompareExchange32.s</Filename>
+    <Filename SupArchList="IPF">Ipf/InterlockedCompareExchange64.s</Filename>
+    <Filename SupArchList="IPF">Ipf/Synchronization.c</Filename>
+    <Filename SupArchList="IPF">Ipf/CpuPause.s</Filename>
+    <Filename SupArchList="IPF">Ipf/CpuFlushTlb.s</Filename>
+    <Filename SupArchList="IPF">Ipf/GetInterruptState.s</Filename>
+    <Filename SupArchList="IPF">Ipf/InternalSwitchStack.c</Filename>
+    <Filename SupArchList="IPF">Ipf/FlushCacheRange.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AccessDbr.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AccessEicr.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AccessGcr.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AccessKr.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AccessPmr.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AccessPsr.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AsmPalCall.s</Filename>
+    <Filename SupArchList="IPF">Ipf/ExecFc.s</Filename>
+    <Filename SupArchList="IPF">Ipf/ReadCpuid.s</Filename>
+    <Filename SupArchList="IPF">Ipf/AccessGp.s</Filename>
+ 
+    <Filename SupArchList="EBC">Math64.c</Filename>
+    <Filename SupArchList="EBC">Unaligned.c</Filename>
+    <Filename SupArchList="EBC">Ebc/SwitchStack.c</Filename>
+    <Filename SupArchList="EBC">Ebc/SetJumpLongJump.c</Filename>
+    <Filename SupArchList="EBC">Ebc/CpuBreakpoint.c</Filename>
+    <Filename SupArchList="EBC">Ebc/Synchronization.c</Filename>
+    <Filename SupArchList="EBC">Synchronization.c</Filename>
+  </SourceFiles>
+  <NonProcessedFiles>
+    <Filename>Ia32/ARShiftU64.asm</Filename>
+    <Filename>Ia32/CpuBreakpoint.asm</Filename>
+    <Filename>Ia32/CpuFlushTlb.asm</Filename>
+    <Filename>Ia32/CpuId.asm</Filename>
+    <Filename>Ia32/CpuIdEx.asm</Filename>
+    <Filename>Ia32/CpuPause.asm</Filename>
+    <Filename>Ia32/CpuSleep.asm</Filename>
+    <Filename>Ia32/DisableInterrupts.asm</Filename>
+    <Filename>Ia32/DisablePaging32.asm</Filename>
+    <Filename>Ia32/DivU64x32.asm</Filename>
+    <Filename>Ia32/DivU64x32Remainder.asm</Filename>
+    <Filename>Ia32/DivU64x64Remainder.asm</Filename>
+    <Filename>Ia32/EnableDisableInterrupts.asm</Filename>
+    <Filename>Ia32/EnableInterrupts.asm</Filename>
+    <Filename>Ia32/EnablePaging32.asm</Filename>
+    <Filename>Ia32/EnablePaging64.asm</Filename>
+    <Filename>Ia32/FlushCacheLine.asm</Filename>
+    <Filename>Ia32/FxRestore.asm</Filename>
+    <Filename>Ia32/FxSave.asm</Filename>
+    <Filename>Ia32/InterlockedCompareExchange32.asm</Filename>
+    <Filename>Ia32/InterlockedCompareExchange64.asm</Filename>
+    <Filename>Ia32/InterlockedDecrement.asm</Filename>
+    <Filename>Ia32/InterlockedIncrement.asm</Filename>
+    <Filename>Ia32/Invd.asm</Filename>
+    <Filename>Ia32/LongJump.asm</Filename>
+    <Filename>Ia32/LRotU64.asm</Filename>
+    <Filename>Ia32/LShiftU64.asm</Filename>
+    <Filename>Ia32/ModU64x32.asm</Filename>
+    <Filename>Ia32/Monitor.asm</Filename>
+    <Filename>Ia32/MultU64x32.asm</Filename>
+    <Filename>Ia32/MultU64x64.asm</Filename>
+    <Filename>Ia32/Mwait.asm</Filename>
+    <Filename>Ia32/ReadCr0.asm</Filename>
+    <Filename>Ia32/ReadCr2.asm</Filename>
+    <Filename>Ia32/ReadCr3.asm</Filename>
+    <Filename>Ia32/ReadCr4.asm</Filename>
+    <Filename>Ia32/ReadCs.asm</Filename>
+    <Filename>Ia32/ReadDr0.asm</Filename>
+    <Filename>Ia32/ReadDr1.asm</Filename>
+    <Filename>Ia32/ReadDr2.asm</Filename>
+    <Filename>Ia32/ReadDr3.asm</Filename>
+    <Filename>Ia32/ReadDr4.asm</Filename>
+    <Filename>Ia32/ReadDr5.asm</Filename>
+    <Filename>Ia32/ReadDr6.asm</Filename>
+    <Filename>Ia32/ReadDr7.asm</Filename>
+    <Filename>Ia32/ReadDs.asm</Filename>
+    <Filename>Ia32/ReadEflags.asm</Filename>
+    <Filename>Ia32/ReadEs.asm</Filename>
+    <Filename>Ia32/ReadFs.asm</Filename>
+    <Filename>Ia32/ReadGdtr.asm</Filename>
+    <Filename>Ia32/ReadGs.asm</Filename>
+    <Filename>Ia32/ReadIdtr.asm</Filename>
+    <Filename>Ia32/ReadLdtr.asm</Filename>
+    <Filename>Ia32/ReadMm0.asm</Filename>
+    <Filename>Ia32/ReadMm1.asm</Filename>
+    <Filename>Ia32/ReadMm2.asm</Filename>
+    <Filename>Ia32/ReadMm3.asm</Filename>
+    <Filename>Ia32/ReadMm4.asm</Filename>
+    <Filename>Ia32/ReadMm5.asm</Filename>
+    <Filename>Ia32/ReadMm6.asm</Filename>
+    <Filename>Ia32/ReadMm7.asm</Filename>
+    <Filename>Ia32/ReadMsr64.asm</Filename>
+    <Filename>Ia32/ReadPmc.asm</Filename>
+    <Filename>Ia32/ReadSs.asm</Filename>
+    <Filename>Ia32/ReadTr.asm</Filename>
+    <Filename>Ia32/ReadTsc.asm</Filename>
+    <Filename>Ia32/RRotU64.asm</Filename>
+    <Filename>Ia32/RShiftU64.asm</Filename>
+    <Filename>Ia32/SetJump.asm</Filename>
+    <Filename>Ia32/SwapBytes64.asm</Filename>
+    <Filename>Ia32/Thunk16.asm</Filename>
+    <Filename>Ia32/Wbinvd.asm</Filename>
+    <Filename>Ia32/WriteCr0.asm</Filename>
+    <Filename>Ia32/WriteCr2.asm</Filename>
+    <Filename>Ia32/WriteCr3.asm</Filename>
+    <Filename>Ia32/WriteCr4.asm</Filename>
+    <Filename>Ia32/WriteDr0.asm</Filename>
+    <Filename>Ia32/WriteDr1.asm</Filename>
+    <Filename>Ia32/WriteDr2.asm</Filename>
+    <Filename>Ia32/WriteDr3.asm</Filename>
+    <Filename>Ia32/WriteDr4.asm</Filename>
+    <Filename>Ia32/WriteDr5.asm</Filename>
+    <Filename>Ia32/WriteDr6.asm</Filename>
+    <Filename>Ia32/WriteDr7.asm</Filename>
+    <Filename>Ia32/WriteGdtr.asm</Filename>
+    <Filename>Ia32/WriteIdtr.asm</Filename>
+    <Filename>Ia32/WriteLdtr.asm</Filename>
+    <Filename>Ia32/WriteMm0.asm</Filename>
+    <Filename>Ia32/WriteMm1.asm</Filename>
+    <Filename>Ia32/WriteMm2.asm</Filename>
+    <Filename>Ia32/WriteMm3.asm</Filename>
+    <Filename>Ia32/WriteMm4.asm</Filename>
+    <Filename>Ia32/WriteMm5.asm</Filename>
+    <Filename>Ia32/WriteMm6.asm</Filename>
+    <Filename>Ia32/WriteMm7.asm</Filename>
+    <Filename>Ia32/WriteMsr64.asm</Filename>
+  </NonProcessedFiles>
+  <PackageDependencies>
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
+  </PackageDependencies>
+  <Externs>
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
+  </Externs>
+  <PcdCoded>
+    <PcdEntry PcdItemType="FIXED_AT_BUILD">
+      <C_Name>PcdMaximumUnicodeStringLength</C_Name>
+      <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+      <HelpText>If PcdMaximumUnicodeStringLength is not zero, the maximum
+                number of characters (not counting the NULL-terminator) in a
+                Unicode string cannot exceed it.</HelpText>
+    </PcdEntry>
+    <PcdEntry PcdItemType="FIXED_AT_BUILD">
+      <C_Name>PcdMaximumAsciiStringLength</C_Name>
+      <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+      <HelpText>If PcdMaximumAsciiStringLength is not zero, the maximum number
+                of characters (not counting the NULL-terminator) in an ASCII
+                string cannot exceed it.</HelpText>
+    </PcdEntry>
+    <PcdEntry PcdItemType="FIXED_AT_BUILD">
+      <C_Name>PcdMaximumLinkedListLength</C_Name>
+      <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+      <HelpText>If PcdMaximumLinkedListLength is not zero, the maximum number
+                of nodes (not counting the list header) in a linked list
+                cannot exceed it.</HelpText>
+    </PcdEntry>
+    <PcdEntry PcdItemType="FIXED_AT_BUILD">
+      <C_Name>PcdSpinLockTimeout</C_Name>
+      <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>
+      <HelpText>If PcdSpinLockTimeout is not zero, it stands for the timeout
+                value (unit: millisecond) for spin lock.</HelpText>
+    </PcdEntry>
+  </PcdCoded>
+</ModuleSurfaceArea>

diff --git a/MdePkg/Library/BaseLib/BaseLibInternals.h b/MdePkg/Library/BaseLib/BaseLibInternals.h
new file mode 100644 (file)
index 0000000..7b397e3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/BaseLibInternals.h
@@ -0,0 +1,872 @@
+/** @file\r
+  Declaration of internal functions in BaseLib.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  BaseLibInternals.h\r
+\r
+**/\r
+\r
+#ifndef __BASE_LIB_INTERNALS__\r
+#define __BASE_LIB_INTERNALS__\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#define QUIENT_MAX_UINTN_DIVIDED_BY_10      ((UINTN) -1 / 10)\r
+#define REMINDER_MAX_UINTN_DIVIDED_BY_10    ((UINTN) -1 % 10)\r
+\r
+#define QUIENT_MAX_UINTN_DIVIDED_BY_16      ((UINTN) -1 / 16)\r
+#define REMINDER_MAX_UINTN_DIVIDED_BY_16    ((UINTN) -1 % 16)\r
+\r
+#define QUIENT_MAX_UINT64_DIVIDED_BY_10      ((UINT64) -1 / 10)\r
+#define REMINDER_MAX_UINT64_DIVIDED_BY_10    ((UINT64) -1 % 10)\r
+\r
+#define QUIENT_MAX_UINT64_DIVIDED_BY_16      ((UINT64) -1 / 16)\r
+#define REMINDER_MAX_UINT64_DIVIDED_BY_16    ((UINT64) -1 % 16)\r
+\r
+//\r
+// Math functions\r
+//\r
+\r
+/**\r
+  Shifts a 64-bit integer left between 0 and 63 bits. The low bits\r
+  are filled with zeros. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the left by Count bits. The\r
+  low Count bits are set to zero. The shifted value is returned.\r
+\r
+  @param  Operand The 64-bit operand to shift left.\r
+  @param  Count   The number of bits to shift left.\r
+\r
+  @return Operand << Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathLShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  );\r
+\r
+/**\r
+  Shifts a 64-bit integer right between 0 and 63 bits. This high bits\r
+  are filled with zeros. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the right by Count bits. The\r
+  high Count bits are set to zero. The shifted value is returned.\r
+\r
+  @param  Operand The 64-bit operand to shift right.\r
+  @param  Count   The number of bits to shift right.\r
+\r
+  @return Operand >> Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathRShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  );\r
+\r
+/**\r
+  Shifts a 64-bit integer right between 0 and 63 bits. The high bits\r
+  are filled with original integer's bit 63. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the right by Count bits. The\r
+  high Count bits are set to bit 63 of Operand.  The shifted value is returned.\r
+\r
+  @param  Operand The 64-bit operand to shift right.\r
+  @param  Count   The number of bits to shift right.\r
+\r
+  @return Operand arithmetically shifted right by Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathARShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  );\r
+\r
+/**\r
+  Rotates a 64-bit integer left between 0 and 63 bits, filling\r
+  the low bits with the high bits that were rotated.\r
+\r
+  This function rotates the 64-bit value Operand to the left by Count bits. The\r
+  low Count bits are fill with the high Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  @param  Operand The 64-bit operand to rotate left.\r
+  @param  Count   The number of bits to rotate left.\r
+\r
+  @return Operand <<< Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathLRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  );\r
+\r
+/**\r
+  Rotates a 64-bit integer right between 0 and 63 bits, filling\r
+  the high bits with the high low bits that were rotated.\r
+\r
+  This function rotates the 64-bit value Operand to the right by Count bits.\r
+  The high Count bits are fill with the low Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  @param  Operand The 64-bit operand to rotate right.\r
+  @param  Count   The number of bits to rotate right.\r
+\r
+  @return Operand >>> Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathRRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  );\r
+\r
+/**\r
+  Switches the endianess of a 64-bit integer.\r
+\r
+  This function swaps the bytes in a 64-bit unsigned value to switch the value\r
+  from little endian to big endian or vice versa. The byte swapped value is\r
+  returned.\r
+\r
+  @param  Operand A 64-bit unsigned value.\r
+\r
+  @return The byte swaped Operand.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathSwapBytes64 (\r
+  IN      UINT64                    Operand\r
+  );\r
+\r
+/**\r
+  Multiples a 64-bit unsigned integer by a 32-bit unsigned integer\r
+  and generates a 64-bit unsigned result.\r
+\r
+  This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
+  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+  bit unsigned result is returned.\r
+\r
+  @param  Multiplicand  A 64-bit unsigned value.\r
+  @param  Multiplier    A 32-bit unsigned value.\r
+\r
+  @return Multiplicand * Multiplier\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathMultU64x32 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT32                    Multiplier\r
+  );\r
+\r
+/**\r
+  Multiples a 64-bit unsigned integer by a 64-bit unsigned integer\r
+  and generates a 64-bit unsigned result.\r
+\r
+  This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
+  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+  bit unsigned result is returned.\r
+\r
+  @param  Multiplicand  A 64-bit unsigned value.\r
+  @param  Multiplier    A 64-bit unsigned value.\r
+\r
+  @return Multiplicand * Multiplier\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathMultU64x64 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT64                    Multiplier\r
+  );\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+  generates a 64-bit unsigned result.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
+  function returns the 64-bit unsigned quotient.\r
+\r
+   @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathDivU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  );\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+  generates a 32-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 32-bit remainder. This function\r
+  returns the 32-bit unsigned remainder.\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+\r
+  @return Dividend % Divisor\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InternalMathModU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  );\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+  generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+  @param  Remainder A pointer to a 32-bit unsigned value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathDivRemU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor,\r
+  OUT     UINT32                    *Remainder\r
+  );\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 64-bit unsigned integer and\r
+  generates a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 64-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 64-bit unsigned value.\r
+  @param  Remainder A pointer to a 64-bit unsigned value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathDivRemU64x64 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT64                    Divisor,\r
+  OUT     UINT64                    *Remainder\r
+  );\r
+\r
+/**\r
+  Divides a 64-bit signed integer by a 64-bit signed integer and\r
+  generates a  64-bit signed result and a optional 64-bit signed remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 64-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  @param  Dividend  A 64-bit signed value.\r
+  @param  Divisor   A 64-bit signed value.\r
+  @param  Remainder A pointer to a 64-bit signed value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+INT64\r
+InternalMathDivRemS64x64 (\r
+  IN      INT64                     Dividend,\r
+  IN      INT64                     Divisor,\r
+  OUT     INT64                     *Remainder  OPTIONAL\r
+ );\r
+\r
+/**\r
+  Transfers control to a function starting with a new stack.\r
+\r
+  Transfers control to the function specified by EntryPoint using the\r
+  new stack specified by NewStack and passing in the parameters specified\r
+  by Context1 and Context2.  Context1 and Context2 are optional and may\r
+  be NULL.  The function EntryPoint must never return.\r
+  Marker will be ignored on IA-32, x64, and EBC.\r
+  IPF CPUs expect one additional parameter of type VOID * that specifies\r
+  the new backing store pointer.\r
+\r
+  If EntryPoint is NULL, then ASSERT().\r
+  If NewStack is NULL, then ASSERT().\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function.\r
+  @param  Marker      VA_LIST marker for the variable argument list.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalSwitchStack (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,   OPTIONAL\r
+  IN      VOID                      *Context2,   OPTIONAL\r
+  IN      VOID                      *NewStack,\r
+  IN      VA_LIST                   Marker\r
+  );\r
+\r
+\r
+/**\r
+  Worker function that locates the Node in the List\r
+\r
+  By searching the List, finds the location of the Node in List. At the same time,\r
+  verifies the validity of this list.\r
+\r
+  If List is NULL, then ASSERT().\r
+  If List->ForwardLink is NULL, then ASSERT().\r
+  If List->backLink is NULL, then ASSERT().\r
+  If Node is NULL, then ASSERT();\r
+  If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
+  of nodes in ListHead, including the ListHead node, is greater than or\r
+  equal to PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  List  A pointer to a node in a linked list.\r
+  @param  Node  A pointer to one nod.\r
+\r
+  @retval TRUE   Node is in List\r
+  @retval FALSE  Node isn't in List, or List is invalid\r
+\r
+**/\r
+BOOLEAN\r
+IsNodeInList (\r
+  IN      CONST LIST_ENTRY      *List,\r
+  IN      CONST LIST_ENTRY      *Node\r
+  );\r
+\r
+\r
+/**\r
+  Performs an atomic increment of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic increment of the 32-bit unsigned integer specified by\r
+  Value and returns the incremented value. The increment operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  @param  Value A pointer to the 32-bit value to increment.\r
+\r
+  @return The incremented value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InternalSyncIncrement (\r
+  IN      volatile UINT32           *Value\r
+  );\r
+\r
+\r
+/**\r
+  Performs an atomic decrement of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic decrement of the 32-bit unsigned integer specified by\r
+  Value and returns the decrement value. The decrement operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  @param  Value A pointer to the 32-bit value to decrement.\r
+\r
+  @return The decrement value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InternalSyncDecrement (\r
+  IN      volatile UINT32           *Value\r
+  );\r
+\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
+  specified by Value.  If Value is equal to CompareValue, then Value is set to\r
+  ExchangeValue and CompareValue is returned.  If Value is not equal to CompareValue,\r
+  then Value is returned.  The compare exchange operation must be performed using\r
+  MP safe mechanisms.\r
+\r
+  @param  Value         A pointer to the 32-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  32-bit value used in compare operation.\r
+  @param  ExchangeValue 32-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InternalSyncCompareExchange32 (\r
+  IN      volatile UINT32           *Value,\r
+  IN      UINT32                    CompareValue,\r
+  IN      UINT32                    ExchangeValue\r
+  );\r
+\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified\r
+  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and\r
+  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned.\r
+  The compare exchange operation must be performed using MP safe mechanisms.\r
+\r
+  @param  Value         A pointer to the 64-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  64-bit value used in compare operation.\r
+  @param  ExchangeValue 64-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalSyncCompareExchange64 (\r
+  IN      volatile UINT64           *Value,\r
+  IN      UINT64                    CompareValue,\r
+  IN      UINT64                    ExchangeValue\r
+  );\r
+\r
+\r
+/**\r
+  Worker function that returns a bit field from Operand\r
+\r
+  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+\r
+  @return The bit field read.\r
+\r
+**/\r
+unsigned int\r
+BitFieldReadUint (\r
+  IN      unsigned int              Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  );\r
+\r
+\r
+/**\r
+  Worker function that reads a bit field from Operand, performs a bitwise OR,\r
+  and returns the result.\r
+\r
+  Performs a bitwise OR between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new value is returned.\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+  @param  OrData    The value to OR with the read value from the value\r
+\r
+  @return The new value.\r
+\r
+**/\r
+unsigned int\r
+BitFieldOrUint (\r
+  IN      unsigned int              Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      unsigned int              OrData\r
+  );\r
+\r
+\r
+/**\r
+  Worker function that reads a bit field from Operand, performs a bitwise AND,\r
+  and returns the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new value is returned.\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+  @param  AndData    The value to And with the read value from the value\r
+\r
+  @return The new value.\r
+\r
+**/\r
+unsigned int\r
+BitFieldAndUint (\r
+  IN      unsigned int              Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      unsigned int              AndData\r
+  );\r
+\r
+\r
+/**\r
+  Worker function that checks ASSERT condition for JumpBuffer\r
+\r
+  Checks ASSERT condition for JumpBuffer.\r
+\r
+  If JumpBuffer is NULL, then ASSERT().\r
+  For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+\r
+  @param  JumpBuffer    A pointer to CPU context buffer.\r
+\r
+**/\r
+VOID\r
+InternalAssertJumpBuffer (\r
+  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer\r
+  );\r
+\r
+\r
+/**\r
+  Restores the CPU context that was saved with SetJump().\r
+\r
+  Restores the CPU context from the buffer specified by JumpBuffer.\r
+  This function never returns to the caller.\r
+  Instead is resumes execution based on the state of JumpBuffer.\r
+\r
+  @param  JumpBuffer    A pointer to CPU context buffer.\r
+  @param  Value         The value to return when the SetJump() context is restored.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalLongJump (\r
+  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,\r
+  IN      UINTN                     Value\r
+  );\r
+\r
+\r
+//\r
+// Ia32 and x64 specific functions\r
+//\r
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
+\r
+/**\r
+  Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
+\r
+  Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
+  function is only available on IA-32 and X64.\r
+\r
+  @param  Gdtr  Pointer to a GDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86ReadGdtr (\r
+  OUT     IA32_DESCRIPTOR           *Gdtr\r
+  );\r
+\r
+/**\r
+  Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
+\r
+  Writes and the current GDTR descriptor specified by Gdtr. This function is\r
+  only available on IA-32 and X64.\r
+\r
+  @param  Gdtr  Pointer to a GDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86WriteGdtr (\r
+  IN      CONST IA32_DESCRIPTOR     *Gdtr\r
+  );\r
+\r
+/**\r
+  Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
+\r
+  Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
+  function is only available on IA-32 and X64.\r
+\r
+  @param  Idtr  Pointer to a IDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86ReadIdtr (\r
+  OUT     IA32_DESCRIPTOR           *Idtr\r
+  );\r
+\r
+/**\r
+  Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
+\r
+  Writes the current IDTR descriptor and returns it in Idtr. This function is\r
+  only available on IA-32 and X64.\r
+\r
+  @param  Idtr  Pointer to a IDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86WriteIdtr (\r
+  IN      CONST IA32_DESCRIPTOR     *Idtr\r
+  );\r
+\r
+/**\r
+  Save the current floating point/SSE/SSE2 context to a buffer.\r
+\r
+  Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
+  Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
+  available on IA-32 and X64.\r
+\r
+  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86FxSave (\r
+  OUT     IA32_FX_BUFFER            *Buffer\r
+  );\r
+\r
+/**\r
+  Restores the current floating point/SSE/SSE2 context from a buffer.\r
+\r
+  Restores the current floating point/SSE/SSE2 state from the buffer specified\r
+  by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
+  only available on IA-32 and X64.\r
+\r
+  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86FxRestore (\r
+  IN      CONST IA32_FX_BUFFER      *Buffer\r
+  );\r
+\r
+/**\r
+  Enables the 32-bit paging mode on the CPU.\r
+\r
+  Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
+  must be properly initialized prior to calling this service. This function\r
+  assumes the current execution mode is 32-bit protected mode. This function is\r
+  only available on IA-32. After the 32-bit paging mode is enabled, control is\r
+  transferred to the function specified by EntryPoint using the new stack\r
+  specified by NewStack and passing in the parameters specified by Context1 and\r
+  Context2. Context1 and Context2 are optional and may be NULL. The function\r
+  EntryPoint must never return.\r
+\r
+  There are a number of constraints that must be followed before calling this\r
+  function:\r
+  1)  Interrupts must be disabled.\r
+  2)  The caller must be in 32-bit protected mode with flat descriptors. This\r
+      means all descriptors must have a base of 0 and a limit of 4GB.\r
+  3)  CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
+      descriptors.\r
+  4)  CR3 must point to valid page tables that will be used once the transition\r
+      is complete, and those page tables must guarantee that the pages for this\r
+      function and the stack are identity mapped.\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack after\r
+                      paging is enabled.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function as the first parameter after paging is enabled.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function as the second parameter after paging is enabled.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function after paging is enabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86EnablePaging32 (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,  OPTIONAL\r
+  IN      VOID                      *Context2,  OPTIONAL\r
+  IN      VOID                      *NewStack\r
+  );\r
+\r
+/**\r
+  Disables the 32-bit paging mode on the CPU.\r
+\r
+  Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
+  mode. This function assumes the current execution mode is 32-paged protected\r
+  mode. This function is only available on IA-32. After the 32-bit paging mode\r
+  is disabled, control is transferred to the function specified by EntryPoint\r
+  using the new stack specified by NewStack and passing in the parameters\r
+  specified by Context1 and Context2. Context1 and Context2 are optional and\r
+  may be NULL. The function EntryPoint must never return.\r
+\r
+  There are a number of constraints that must be followed before calling this\r
+  function:\r
+  1)  Interrupts must be disabled.\r
+  2)  The caller must be in 32-bit paged mode.\r
+  3)  CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
+  4)  CR3 must point to valid page tables that guarantee that the pages for\r
+      this function and the stack are identity mapped.\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack after\r
+                      paging is disabled.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function as the first parameter after paging is disabled.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function as the second parameter after paging is\r
+                      disabled.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function after paging is disabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86DisablePaging32 (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,  OPTIONAL\r
+  IN      VOID                      *Context2,  OPTIONAL\r
+  IN      VOID                      *NewStack\r
+  );\r
+\r
+/**\r
+  Enables the 64-bit paging mode on the CPU.\r
+\r
+  Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
+  must be properly initialized prior to calling this service. This function\r
+  assumes the current execution mode is 32-bit protected mode with flat\r
+  descriptors. This function is only available on IA-32. After the 64-bit\r
+  paging mode is enabled, control is transferred to the function specified by\r
+  EntryPoint using the new stack specified by NewStack and passing in the\r
+  parameters specified by Context1 and Context2. Context1 and Context2 are\r
+  optional and may be 0. The function EntryPoint must never return.\r
+\r
+  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
+                      is called. The descriptor in the GDT that this selector\r
+                      references must be setup for long mode.\r
+  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
+                      the new stack after paging is enabled.\r
+  @param  Context1    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the first parameter after\r
+                      paging is enabled.\r
+  @param  Context2    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the second parameter after\r
+                      paging is enabled.\r
+  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
+                      the EntryPoint function after paging is enabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86EnablePaging64 (\r
+  IN      UINT16                    Cs,\r
+  IN      UINT64                    EntryPoint,\r
+  IN      UINT64                    Context1,  OPTIONAL\r
+  IN      UINT64                    Context2,  OPTIONAL\r
+  IN      UINT64                    NewStack\r
+  );\r
+\r
+/**\r
+  Disables the 64-bit paging mode on the CPU.\r
+\r
+  Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
+  mode. This function assumes the current execution mode is 64-paging mode.\r
+  This function is only available on X64. After the 64-bit paging mode is\r
+  disabled, control is transferred to the function specified by EntryPoint\r
+  using the new stack specified by NewStack and passing in the parameters\r
+  specified by Context1 and Context2. Context1 and Context2 are optional and\r
+  may be 0. The function EntryPoint must never return.\r
+\r
+  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
+                      is called. The descriptor in the GDT that this selector\r
+                      references must be setup for 32-bit protected mode.\r
+  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
+                      the new stack after paging is disabled.\r
+  @param  Context1    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the first parameter after\r
+                      paging is disabled.\r
+  @param  Context2    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the second parameter after\r
+                      paging is disabled.\r
+  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
+                      the EntryPoint function after paging is disabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86DisablePaging64 (\r
+  IN      UINT16                    Cs,\r
+  IN      UINT32                    EntryPoint,\r
+  IN      UINT32                    Context1,  OPTIONAL\r
+  IN      UINT32                    Context2,  OPTIONAL\r
+  IN      UINT32                    NewStack\r
+  );\r
+\r
+\r
+#elif defined (MDE_CPU_IPF)\r
+//\r
+//\r
+// IPF specific functions\r
+//\r
+\r
+/**\r
+  Transfers control to a function starting with a new stack.\r
+\r
+  Transfers control to the function specified by EntryPoint using the new stack\r
+  specified by NewStack and passing in the parameters specified by Context1 and\r
+  Context2. Context1 and Context2 are optional and may be NULL. The function\r
+  EntryPoint must never return.\r
+\r
+  If EntryPoint is NULL, then ASSERT().\r
+  If NewStack is NULL, then ASSERT().\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function.\r
+  @param  NewBsp      A pointer to the new memory location for RSE backing\r
+                      store.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmSwitchStackAndBackingStore (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,  OPTIONAL\r
+  IN      VOID                      *Context2,  OPTIONAL\r
+  IN      VOID                      *NewStack,\r
+  IN      VOID                      *NewBsp\r
+  );\r
+#else\r
+\r
+#endif\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseLib/BitField.c b/MdePkg/Library/BaseLib/BitField.c
new file mode 100644 (file)
index 0000000..9c9981e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/BitField.c
@@ -0,0 +1,872 @@
+/** @file\r
+  Bit field functions of BaseLib.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  BitField.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Worker function that returns a bit field from Operand\r
+\r
+  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+\r
+  @return The bit field read.\r
+\r
+**/\r
+unsigned int\r
+BitFieldReadUint (\r
+  IN      unsigned int              Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  //\r
+  // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]\r
+  // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.\r
+  //\r
+  return (Operand & ~((unsigned int)-2 << EndBit)) >> StartBit;\r
+}\r
+\r
+/**\r
+  Worker function that reads a bit field from Operand, performs a bitwise OR, \r
+  and returns the result.\r
+\r
+  Performs a bitwise OR between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new value is returned.\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+  @param  OrData    The value to OR with the read value from the value\r
+\r
+  @return The new value.\r
+\r
+**/\r
+unsigned int\r
+BitFieldOrUint (\r
+  IN      unsigned int              Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      unsigned int              OrData\r
+  )\r
+{\r
+  //\r
+  // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]\r
+  // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.\r
+  //\r
+  return Operand | ((OrData << StartBit) & ~((unsigned int) -2 << EndBit));\r
+}\r
+\r
+/**\r
+  Worker function that reads a bit field from Operand, performs a bitwise AND, \r
+  and returns the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new value is returned.\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+  @param  AndData    The value to And with the read value from the value\r
+\r
+  @return The new value.\r
+\r
+**/\r
+unsigned int\r
+BitFieldAndUint (\r
+  IN      unsigned int              Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      unsigned int              AndData\r
+  )\r
+{\r
+  //\r
+  // ~((unsigned int)-2 << EndBit) is a mask in which bit[0] thru bit[EndBit]\r
+  // are 1's while bit[EndBit + 1] thru the most significant bit are 0's.\r
+  //\r
+  return Operand & ~((~AndData << StartBit) & ~((unsigned int) -2 << EndBit));\r
+}\r
+\r
+/**\r
+  Returns a bit field from an 8-bit value.\r
+\r
+  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+\r
+  If 8-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+\r
+  @return The bit field read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldRead8 (\r
+  IN      UINT8                     Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT8)BitFieldReadUint (Operand, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to an 8-bit value, and returns the result.\r
+\r
+  Writes Value to the bit field specified by the StartBit and the EndBit in\r
+  Operand. All other bits in Operand are preserved. The new 8-bit value is\r
+  returned.\r
+\r
+  If 8-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The new 8-bit value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldWrite8 (\r
+  IN      UINT8                     Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldAndThenOr8 (Operand, StartBit, EndBit, 0, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
+  result.\r
+\r
+  Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+  and EndBit in Operand and the value specified by OrData. All other bits in\r
+  Operand are preserved. The new 8-bit value is returned.\r
+\r
+  If 8-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  OrData    The value to OR with the read value from the value\r
+\r
+  @return The new 8-bit value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldOr8 (\r
+  IN      UINT8                     Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT8)BitFieldOrUint (Operand, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r
+  the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new 8-bit value is returned.\r
+\r
+  If 8-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the read value from the value.\r
+\r
+  @return The new 8-bit value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldAnd8 (\r
+  IN      UINT8                     Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT8)BitFieldAndUint (Operand, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r
+  bitwise OR, and returns the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData, followed by a bitwise\r
+  inclusive OR with value specified by OrData. All other bits in Operand are\r
+  preserved. The new 8-bit value is returned.\r
+\r
+  If 8-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the read value from the value.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The new 8-bit value.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BitFieldAndThenOr8 (\r
+  IN      UINT8                     Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldOr8 (\r
+           BitFieldAnd8 (Operand, StartBit, EndBit, AndData),\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Returns a bit field from a 16-bit value.\r
+\r
+  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+\r
+  If 16-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+\r
+  @return The bit field read.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+BitFieldRead16 (\r
+  IN      UINT16                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT16)BitFieldReadUint (Operand, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a 16-bit value, and returns the result.\r
+\r
+  Writes Value to the bit field specified by the StartBit and the EndBit in\r
+  Operand. All other bits in Operand are preserved. The new 16-bit value is\r
+  returned.\r
+\r
+  If 16-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The new 16-bit value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+BitFieldWrite16 (\r
+  IN      UINT16                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldAndThenOr16 (Operand, StartBit, EndBit, 0, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
+  result.\r
+\r
+  Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+  and EndBit in Operand and the value specified by OrData. All other bits in\r
+  Operand are preserved. The new 16-bit value is returned.\r
+\r
+  If 16-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  OrData    The value to OR with the read value from the value\r
+\r
+  @return The new 16-bit value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+BitFieldOr16 (\r
+  IN      UINT16                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT16)BitFieldOrUint (Operand, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r
+  the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new 16-bit value is returned.\r
+\r
+  If 16-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the read value from the value\r
+\r
+  @return The new 16-bit value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+BitFieldAnd16 (\r
+  IN      UINT16                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT16)BitFieldAndUint (Operand, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r
+  bitwise OR, and returns the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData, followed by a bitwise\r
+  inclusive OR with value specified by OrData. All other bits in Operand are\r
+  preserved. The new 16-bit value is returned.\r
+\r
+  If 16-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the read value from the value.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The new 16-bit value.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+BitFieldAndThenOr16 (\r
+  IN      UINT16                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldOr16 (\r
+           BitFieldAnd16 (Operand, StartBit, EndBit, AndData),\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Returns a bit field from a 32-bit value.\r
+\r
+  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+\r
+  If 32-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The bit field read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+BitFieldRead32 (\r
+  IN      UINT32                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT32)BitFieldReadUint (Operand, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a 32-bit value, and returns the result.\r
+\r
+  Writes Value to the bit field specified by the StartBit and the EndBit in\r
+  Operand. All other bits in Operand are preserved. The new 32-bit value is\r
+  returned.\r
+\r
+  If 32-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The new 32-bit value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+BitFieldWrite32 (\r
+  IN      UINT32                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldAndThenOr32 (Operand, StartBit, EndBit, 0, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
+  result.\r
+\r
+  Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+  and EndBit in Operand and the value specified by OrData. All other bits in\r
+  Operand are preserved. The new 32-bit value is returned.\r
+\r
+  If 32-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with the read value from the value\r
+\r
+  @return The new 32-bit value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+BitFieldOr32 (\r
+  IN      UINT32                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT32)BitFieldOrUint (Operand, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r
+  the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new 32-bit value is returned.\r
+\r
+  If 32-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the read value from the value\r
+\r
+  @return The new 32-bit value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+BitFieldAnd32 (\r
+  IN      UINT32                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT32)BitFieldAndUint (Operand, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r
+  bitwise OR, and returns the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData, followed by a bitwise\r
+  inclusive OR with value specified by OrData. All other bits in Operand are\r
+  preserved. The new 32-bit value is returned.\r
+\r
+  If 32-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the read value from the value.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The new 32-bit value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+BitFieldAndThenOr32 (\r
+  IN      UINT32                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldOr32 (\r
+           BitFieldAnd32 (Operand, StartBit, EndBit, AndData),\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Returns a bit field from a 64-bit value.\r
+\r
+  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
+\r
+  If 64-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+\r
+  @return The bit field read.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+BitFieldRead64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return RShiftU64 (Operand & ~LShiftU64 ((UINT64)-2, EndBit), StartBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a 64-bit value, and returns the result.\r
+\r
+  Writes Value to the bit field specified by the StartBit and the EndBit in\r
+  Operand. All other bits in Operand are preserved. The new 64-bit value is\r
+  returned.\r
+\r
+  If 64-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The new 64-bit value.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+BitFieldWrite64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldAndThenOr64 (Operand, StartBit, EndBit, 0, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
+  result.\r
+\r
+  Performs a bitwise inclusive OR between the bit field specified by StartBit\r
+  and EndBit in Operand and the value specified by OrData. All other bits in\r
+  Operand are preserved. The new 64-bit value is returned.\r
+\r
+  If 64-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  OrData    The value to OR with the read value from the value\r
+\r
+  @return The new 64-bit value.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+BitFieldOr64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  UINT64  Value1;\r
+  UINT64  Value2;\r
+\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+\r
+  Value1 = LShiftU64 (OrData, StartBit);\r
+  Value2 = LShiftU64 ((UINT64) - 2, EndBit);\r
+\r
+  return Operand | (Value1 & ~Value2);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r
+  the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData. All other bits in Operand are\r
+  preserved. The new 64-bit value is returned.\r
+\r
+  If 64-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with the read value from the value\r
+\r
+  @return The new 64-bit value.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+BitFieldAnd64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData\r
+  )\r
+{\r
+  UINT64  Value1;\r
+  UINT64  Value2;\r
+  \r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+\r
+  Value1 = LShiftU64 (~AndData, StartBit);\r
+  Value2 = LShiftU64 ((UINT64)-2, EndBit);\r
+\r
+  return Operand & ~(Value1 & ~Value2);\r
+}\r
+\r
+/**\r
+  Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r
+  bitwise OR, and returns the result.\r
+\r
+  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
+  in Operand and the value specified by AndData, followed by a bitwise\r
+  inclusive OR with value specified by OrData. All other bits in Operand are\r
+  preserved. The new 64-bit value is returned.\r
+\r
+  If 64-bit operations are not supported, then ASSERT().\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Operand   Operand on which to perform the bitfield operation.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with the read value from the value.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The new 64-bit value.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+BitFieldAndThenOr64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Operand) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return BitFieldOr64 (\r
+           BitFieldAnd64 (Operand, StartBit, EndBit, AndData),\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r

diff --git a/MdePkg/Library/BaseLib/CheckSum.c b/MdePkg/Library/BaseLib/CheckSum.c
new file mode 100644 (file)
index 0000000..61d74a4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/CheckSum.c
@@ -0,0 +1,339 @@
+/** @file\r
+  Utility functions to generate checksum based on 2's complement\r
+  algorithm.\r
+\r
+  Copyright (c) 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  CheckSum.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Calculate the sum of all elements in a buffer in unit of UINT8. \r
+  During calculation, the carry bits are dropped.\r
+\r
+  This function calculates the sum of all elements in a buffer \r
+  in unit of UINT8. The carry bits in result of addition are dropped. \r
+  The result is returned as UINT8. If Length is Zero, then Zero is \r
+  returned.\r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the sum operation.\r
+  @param  Length           The size, in bytes, of Buffer .\r
+\r
+  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+CalculateSum8 (\r
+  IN      CONST UINT8                  *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT8     Sum;\r
+  UINTN     Count;\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));\r
+\r
+  for (Sum = 0, Count = 0; Count < Length; Count++) {\r
+    Sum = (UINT8) (Sum + *(Buffer + Count));\r
+  }\r
+  \r
+  return Sum;\r
+}\r
+\r
+\r
+/**\r
+  Returns the two's complement checksum of all elements in a buffer \r
+  of 8-bit values.\r
+\r
+  This function first calculates the sum of the 8-bit values in the \r
+  buffer specified by Buffer and Length.  The carry bits in the result \r
+  of addition are dropped. Then, the two's complement of the sum is \r
+  returned.  If Length is 0, then 0 is returned.\r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the checksum operation.\r
+  @param  Length           The size, in bytes, of Buffer.\r
+\r
+  @return Checksum       The 2's complement checksum of Buffer.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+CalculateCheckSum8 (\r
+  IN      CONST UINT8                  *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT8     CheckSum;\r
+\r
+  CheckSum = CalculateSum8 (Buffer, Length);\r
+\r
+  //\r
+  // Return the checksum based on 2's complement.\r
+  //\r
+  return (UINT8) (0x100 - CheckSum);\r
+}\r
+\r
+/**\r
+  Returns the sum of all elements in a buffer of 16-bit values.  During \r
+  calculation, the carry bits are dropped.\r
+\r
+  This function calculates the sum of the 16-bit values in the buffer \r
+  specified by Buffer and Length. The carry bits in result of addition are dropped. \r
+  The 16-bit result is returned.  If Length is 0, then 0 is returned.  \r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the sum operation.\r
+  @param  Length           The size, in bytes, of Buffer.\r
+\r
+  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+CalculateSum16 (\r
+  IN      CONST UINT16                 *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT16    Sum;\r
+  UINTN     Count;\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN) Buffer & 0x1) == 0);\r
+  ASSERT ((Length & 0x1) == 0);\r
+  ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));\r
+\r
+\r
+  for (Sum = 0, Count = 0; Count < Length; Count++) {\r
+    Sum = (UINT16) (Sum + *(Buffer + Count));\r
+  }\r
+  \r
+  return Sum;\r
+}\r
+\r
+\r
+/**\r
+  Returns the two's complement checksum of all elements in a buffer of \r
+  16-bit values.\r
+\r
+  This function first calculates the sum of the 16-bit values in the buffer \r
+  specified by Buffer and Length.  The carry bits in the result of addition \r
+  are dropped. Then, the two's complement of the sum is returned.  If Length \r
+  is 0, then 0 is returned.\r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the checksum operation.\r
+  @param  Length           The size, in bytes, of Buffer.\r
+\r
+  @return Checksum       The 2's complement checksum of Buffer.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+CalculateCheckSum16 (\r
+  IN      CONST UINT16                 *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT16     CheckSum;\r
+\r
+  CheckSum = CalculateSum16 (Buffer, Length);\r
+\r
+  //\r
+  // Return the checksum based on 2's complement.\r
+  //\r
+  return (UINT16) (0x10000 - CheckSum);\r
+}\r
+\r
+\r
+/**\r
+  Returns the sum of all elements in a buffer of 32-bit values.  During \r
+  calculation, the carry bits are dropped.\r
+\r
+  This function calculates the sum of the 32-bit values in the buffer \r
+  specified by Buffer and Length. The carry bits in result of addition are dropped. \r
+  The 32-bit result is returned.  If Length is 0, then 0 is returned.  \r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the sum operation.\r
+  @param  Length           The size, in bytes, of Buffer.\r
+\r
+  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+CalculateSum32 (\r
+  IN      CONST UINT32                 *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT32    Sum;\r
+  UINTN     Count;\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN) Buffer & 0x3) == 0);\r
+  ASSERT ((Length & 0x3) == 0);\r
+  ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));\r
+\r
+\r
+  for (Sum = 0, Count = 0; Count < Length; Count++) {\r
+    Sum = Sum + *(Buffer + Count);\r
+  }\r
+  \r
+  return Sum;\r
+}\r
+\r
+\r
+/**\r
+  Returns the two's complement checksum of all elements in a buffer of \r
+  32-bit values.\r
+\r
+  This function first calculates the sum of the 32-bit values in the buffer \r
+  specified by Buffer and Length.  The carry bits in the result of addition \r
+  are dropped. Then, the two's complement of the sum is returned.  If Length \r
+  is 0, then 0 is returned.\r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the checksum operation.\r
+  @param  Length           The size, in bytes, of Buffer.\r
+\r
+  @return Checksum       The 2's complement checksum of Buffer.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+CalculateCheckSum32 (\r
+  IN      CONST UINT32                 *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT32     CheckSum;\r
+\r
+  CheckSum = CalculateSum32 (Buffer, Length);\r
+\r
+  //\r
+  // Return the checksum based on 2's complement.\r
+  //\r
+  return (UINT32) ((UINT32)(-1) - CheckSum + 1);\r
+}\r
+\r
+\r
+/**\r
+  Returns the sum of all elements in a buffer of 64-bit values.  During \r
+  calculation, the carry bits are dropped.\r
+\r
+  This function calculates the sum of the 64-bit values in the buffer \r
+  specified by Buffer and Length. The carry bits in result of addition are dropped. \r
+  The 64-bit result is returned.  If Length is 0, then 0 is returned.  \r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the sum operation.\r
+  @param  Length           The size, in bytes, of Buffer.\r
+\r
+  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+CalculateSum64 (\r
+  IN      CONST UINT64                 *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT64    Sum;\r
+  UINTN     Count;\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN) Buffer & 0x7) == 0);\r
+  ASSERT ((Length & 0x7) == 0);\r
+  ASSERT (Length <= (MAX_ADDRESS - ((UINTN) Buffer) + 1));\r
+\r
+  for (Sum = 0, Count = 0; Count < Length; Count++) {\r
+    Sum = Sum + *(Buffer + Count);\r
+  }\r
+  \r
+  return Sum;\r
+}\r
+\r
+\r
+/**\r
+  Returns the two's complement checksum of all elements in a buffer of \r
+  64-bit values.\r
+\r
+  This function first calculates the sum of the 64-bit values in the buffer \r
+  specified by Buffer and Length.  The carry bits in the result of addition \r
+  are dropped. Then, the two's complement of the sum is returned.  If Length \r
+  is 0, then 0 is returned.\r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer                       Pointer to the buffer to carry out the checksum operation.\r
+  @param  Length           The size, in bytes, of Buffer.\r
+\r
+  @return Checksum       The 2's complement checksum of Buffer.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+CalculateCheckSum64 (\r
+  IN      CONST UINT64                 *Buffer,\r
+  IN      UINTN                                      Length\r
+  )\r
+{\r
+  UINT64     CheckSum;\r
+\r
+  CheckSum = CalculateSum64 (Buffer, Length);\r
+\r
+  //\r
+  // Return the checksum based on 2's complement.\r
+  //\r
+  return (UINT64) ((UINT64)(-1) - CheckSum + 1);\r
+}\r
+\r
+\r

diff --git a/MdePkg/Library/BaseLib/CommonHeader.h b/MdePkg/Library/BaseLib/CommonHeader.h
new file mode 100644 (file)
index 0000000..07c57bd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/CommonHeader.h
@@ -0,0 +1,35 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007 - 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/TimerLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseLib/Cpu.c b/MdePkg/Library/BaseLib/Cpu.c
new file mode 100644 (file)
index 0000000..d8564c0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Cpu.c
@@ -0,0 +1,72 @@
+/** @file\r
+  Base Library CPU Functions for all architectures.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  Cpu.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Disables CPU interrupts and returns the interrupt state prior to the disable\r
+  operation.\r
+\r
+  Disables CPU interrupts and returns the interrupt state prior to the disable\r
+  operation.\r
+\r
+  @retval TRUE  CPU interrupts were enabled on entry to this call.\r
+  @retval FALSE CPU interrupts were disabled on entry to this call.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+SaveAndDisableInterrupts (\r
+  VOID\r
+  )\r
+{\r
+  BOOLEAN                           InterruptState;\r
+\r
+  InterruptState = GetInterruptState ();\r
+  DisableInterrupts ();\r
+  return InterruptState;\r
+}\r
+\r
+/**\r
+  Set the current CPU interrupt state.\r
+\r
+  Sets the current CPU interrupt state to the state specified by\r
+  InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r
+  InterruptState is FALSE, then interrupts are disabled. InterruptState is\r
+  returned.\r
+\r
+  @param  InterruptState  TRUE if interrupts should enabled. FALSE if\r
+                          interrupts should be disabled.\r
+\r
+  @return InterruptState\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+SetInterruptState (\r
+  IN      BOOLEAN                   InterruptState\r
+  )\r
+{\r
+  if (InterruptState) {\r
+    EnableInterrupts ();\r
+  } else {\r
+    DisableInterrupts ();\r
+  }\r
+  return InterruptState;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/CpuDeadLoop.c b/MdePkg/Library/BaseLib/CpuDeadLoop.c
new file mode 100644 (file)
index 0000000..01810d1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/CpuDeadLoop.c
@@ -0,0 +1,38 @@
+/** @file\r
+  Base Library CPU Functions for all architectures.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Executes an infinite loop.\r
+\r
+  Forces the CPU to execute an infinite loop. A debugger may be used to skip\r
+  past the loop and the code that follows the loop must execute properly. This\r
+  implies that the infinite loop must not cause the code that follow it to be\r
+  optimized away.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+CpuDeadLoop (\r
+  VOID\r
+  )\r
+{\r
+  volatile UINTN  Index;\r
+\r
+  for (Index = 0; Index == 0;);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/DivS64x64Remainder.c
new file mode 100644 (file)
index 0000000..d8e2a81
--- /dev/null
+++ b/MdePkg/Library/BaseLib/DivS64x64Remainder.c
@@ -0,0 +1,51 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r
+  64-bit signed result and a optional 64-bit signed remainder.\r
+\r
+  This function divides the 64-bit signed value Dividend by the 64-bit signed\r
+  value Divisor and generates a 64-bit signed quotient. If Remainder is not\r
+  NULL, then the 64-bit signed remainder is returned in Remainder. This\r
+  function returns the 64-bit signed quotient.\r
+\r
+  If Divisor is 0, then ASSERT().\r
+\r
+  @param  Dividend  A 64-bit signed value.\r
+  @param  Divisor   A 64-bit signed value.\r
+  @param  Remainder A pointer to a 64-bit signed value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+INT64\r
+EFIAPI\r
+DivS64x64Remainder (\r
+  IN      INT64                     Dividend,\r
+  IN      INT64                     Divisor,\r
+  OUT     INT64                     *Remainder  OPTIONAL\r
+  )\r
+{\r
+  ASSERT (Divisor != 0);\r
+  return InternalMathDivRemS64x64 (Dividend, Divisor, Remainder);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/DivU64x32.c b/MdePkg/Library/BaseLib/DivU64x32.c
new file mode 100644 (file)
index 0000000..a599b87
--- /dev/null
+++ b/MdePkg/Library/BaseLib/DivU64x32.c
@@ -0,0 +1,47 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
+  a 64-bit unsigned result.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
+  function returns the 64-bit unsigned quotient.\r
+\r
+  If Divisor is 0, then ASSERT().\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+DivU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  )\r
+{\r
+  ASSERT (Divisor != 0);\r
+  return InternalMathDivU64x32 (Dividend, Divisor);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/DivU64x32Remainder.c b/MdePkg/Library/BaseLib/DivU64x32Remainder.c
new file mode 100644 (file)
index 0000000..524a800
--- /dev/null
+++ b/MdePkg/Library/BaseLib/DivU64x32Remainder.c
@@ -0,0 +1,51 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
+  a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  If Divisor is 0, then ASSERT().\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+  @param  Remainder A pointer to a 32-bit unsigned value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+DivU64x32Remainder (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor,\r
+  OUT     UINT32                    *Remainder  OPTIONAL\r
+  )\r
+{\r
+  ASSERT (Divisor != 0);\r
+  return InternalMathDivRemU64x32 (Dividend, Divisor, Remainder);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/DivU64x64Remainder.c b/MdePkg/Library/BaseLib/DivU64x64Remainder.c
new file mode 100644 (file)
index 0000000..49e80b4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/DivU64x64Remainder.c
@@ -0,0 +1,51 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r
+  a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 64-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  If Divisor is 0, then ASSERT().\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 64-bit unsigned value.\r
+  @param  Remainder A pointer to a 64-bit unsigned value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+DivU64x64Remainder (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT64                    Divisor,\r
+  OUT     UINT64                    *Remainder  OPTIONAL\r
+  )\r
+{\r
+  ASSERT (Divisor != 0);\r
+  return InternalMathDivRemU64x64 (Dividend, Divisor, Remainder);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo32.c b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c
new file mode 100644 (file)
index 0000000..dcfdc4b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/GetPowerOfTwo32.c
@@ -0,0 +1,46 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Returns the value of the highest bit set in a 32-bit value. Equivalent to\r
+  1 << HighBitSet32(x).\r
+\r
+  This function computes the value of the highest bit set in the 32-bit value\r
+  specified by Operand. If Operand is zero, then zero is returned.\r
+\r
+  @param  Operand The 32-bit operand to evaluate.\r
+\r
+  @return 1 << HighBitSet32(Operand)\r
+  @retval 0 Operand is zero.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+GetPowerOfTwo32 (\r
+  IN      UINT32                    Operand\r
+  )\r
+{\r
+  if (Operand == 0) {\r
+    return 0;\r
+  }\r
+\r
+  return 1ul << HighBitSet32 (Operand);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/GetPowerOfTwo64.c b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c
new file mode 100644 (file)
index 0000000..57d9c0a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/GetPowerOfTwo64.c
@@ -0,0 +1,46 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Returns the value of the highest bit set in a 64-bit value. Equivalent to\r
+  1 << HighBitSet64(x).\r
+\r
+  This function computes the value of the highest bit set in the 64-bit value\r
+  specified by Operand. If Operand is zero, then zero is returned.\r
+\r
+  @param  Operand The 64-bit operand to evaluate.\r
+\r
+  @return 1 << HighBitSet64(Operand)\r
+  @retval 0 Operand is zero.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+GetPowerOfTwo64 (\r
+  IN      UINT64                    Operand\r
+  )\r
+{\r
+  if (Operand == 0) {\r
+    return 0;\r
+  }\r
+\r
+  return LShiftU64 (1, HighBitSet64 (Operand));\r
+}\r

diff --git a/MdePkg/Library/BaseLib/HighBitSet32.c b/MdePkg/Library/BaseLib/HighBitSet32.c
new file mode 100644 (file)
index 0000000..46811fb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/HighBitSet32.c
@@ -0,0 +1,49 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r
+  to log2(x).\r
+\r
+  This function computes the bit position of the highest bit set in the 32-bit\r
+  value specified by Operand. If Operand is zero, then -1 is returned.\r
+  Otherwise, a value between 0 and 31 is returned.\r
+\r
+  @param  Operand The 32-bit operand to evaluate.\r
+\r
+  @return Position of the highest bit set in Operand if found.\r
+  @retval -1  Operand is zero.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+HighBitSet32 (\r
+  IN      UINT32                    Operand\r
+  )\r
+{\r
+  INTN                              BitIndex;\r
+\r
+  if (Operand == 0) {\r
+    return - 1;\r
+  }\r
+  for (BitIndex = 31; (INT32)Operand > 0; BitIndex--, Operand <<= 1);\r
+  return BitIndex;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/HighBitSet64.c b/MdePkg/Library/BaseLib/HighBitSet64.c
new file mode 100644 (file)
index 0000000..e931987
--- /dev/null
+++ b/MdePkg/Library/BaseLib/HighBitSet64.c
@@ -0,0 +1,57 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r
+  to log2(x).\r
+\r
+  This function computes the bit position of the highest bit set in the 64-bit\r
+  value specified by Operand. If Operand is zero, then -1 is returned.\r
+  Otherwise, a value between 0 and 63 is returned.\r
+\r
+  @param  Operand The 64-bit operand to evaluate.\r
+\r
+  @return Position of the highest bit set in Operand if found.\r
+  @retval -1  Operand is zero.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+HighBitSet64 (\r
+  IN      UINT64                    Operand\r
+  )\r
+{\r
+  if (Operand == (UINT32)Operand) {\r
+    //\r
+    // Operand is just a 32-bit integer\r
+    //\r
+    return HighBitSet32 ((UINT32)Operand);\r
+  }\r
+\r
+  //\r
+  // Operand is really a 64-bit integer\r
+  //\r
+  if (sizeof (UINTN) == sizeof (UINT32)) {\r
+    return HighBitSet32 (((UINT32*)&Operand)[1]) + 32;\r
+  } else {\r
+    return HighBitSet32 ((UINT32)RShiftU64 (Operand, 32)) + 32;\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S
new file mode 100644 (file)
index 0000000..8476208
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S
@@ -0,0 +1,46 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ARShiftU64.asm\r
+#\r
+# Abstract:\r
+#\r
+#   64-bit arithmetic right shift function for IA-32\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathARShiftU64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathARShiftU64 (\r
+#   IN      UINT64                    Operand,\r
+#   IN      UINTN                     Count\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathARShiftU64):\r
+    movb    12(%esp), %cl\r
+    movl    8(%esp), %eax\r
+    cltd\r
+    testb   $32, %cl\r
+    cmovz   %eax, %edx\r
+    cmovz   4(%esp), %eax\r
+    shrdl   %cl, %edx, %eax\r
+    sar     %cl, %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm
new file mode 100644 (file)
index 0000000..17f07bb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ARShiftU64.asm\r
+;\r
+; Abstract:\r
+;\r
+;   64-bit arithmetic right shift function for IA-32\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathARShiftU64 (\r
+;   IN      UINT64                    Operand,\r
+;   IN      UINTN                     Count\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathARShiftU64  PROC\r
+    mov     cl, [esp + 12]\r
+    mov     eax, [esp + 8]\r
+    cdq\r
+    test    cl, 32\r
+    cmovz   edx, eax\r
+    cmovz   eax, [esp + 4]\r
+    shrd    eax, edx, cl\r
+    sar     edx, cl\r
+    ret\r
+InternalMathARShiftU64  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c
new file mode 100644 (file)
index 0000000..4e1f715
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c
@@ -0,0 +1,38 @@
+/** @file\r
+  64-bit arithmetic right shift function for IA-32.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathARShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  _asm {\r
+    mov     cl, byte ptr [Count]\r
+    mov     eax, dword ptr [Operand + 4]\r
+    cdq\r
+    test    cl, 32\r
+    cmovz   edx, eax\r
+    cmovz   eax, dword ptr [Operand + 0]\r
+    shrd    eax, edx, cl\r
+    sar     edx, cl\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S
new file mode 100644 (file)
index 0000000..59a1143
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------ ;\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CpuBreakpoint.s\r
+#\r
+# Abstract:\r
+#\r
+#   CpuBreakpoint function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(CpuBreakpoint)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# CpuBreakpoint (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(CpuBreakpoint):\r
+    int  $3\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm
new file mode 100644 (file)
index 0000000..a4d3978
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------ ;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CpuBreakpoint.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   CpuBreakpoint function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; CpuBreakpoint (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+_CpuBreakpoint   PROC\r
+    int  3\r
+    ret\r
+_CpuBreakpoint   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c
new file mode 100644 (file)
index 0000000..71bb896
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuBreakpoint.c
@@ -0,0 +1,35 @@
+/** @file\r
+  CpuBreakpoint function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+//\r
+// Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics\r
+//\r
+void __debugbreak ();\r
+\r
+#pragma intrinsic(__debugbreak)\r
+\r
+VOID\r
+EFIAPI\r
+CpuBreakpoint (\r
+  VOID\r
+  )\r
+{\r
+  __debugbreak ();\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S
new file mode 100644 (file)
index 0000000..07550ff
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------ ;\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CpuFlushTlb.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   CpuFlushTlb function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(CpuFlushTlb)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# CpuFlushTlb (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(CpuFlushTlb):\r
+    movl    %cr3, %eax\r
+    movl    %eax, %cr3\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm
new file mode 100644 (file)
index 0000000..4f0c4f9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------ ;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CpuFlushTlb.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   CpuFlushTlb function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; CpuFlushTlb (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+CpuFlushTlb PROC\r
+    mov     eax, cr3\r
+    mov     cr3, eax                    ; moving to CR3 flushes TLB\r
+    ret\r
+CpuFlushTlb ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c
new file mode 100644 (file)
index 0000000..2660deb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuFlushTlb.c
@@ -0,0 +1,31 @@
+/** @file\r
+  CpuFlushTlb function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+CpuFlushTlb (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, cr3\r
+    mov     cr3, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.S b/MdePkg/Library/BaseLib/Ia32/CpuId.S
new file mode 100644 (file)
index 0000000..2373ad1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuId.S
@@ -0,0 +1,68 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CpuId.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmCpuid function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl  ASM_PFX(AsmCpuid)\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID\r
+#  EFIAPI\r
+#  AsmCpuid (\r
+#    IN   UINT32  RegisterInEax,\r
+#    OUT  UINT32  *RegisterOutEax  OPTIONAL,\r
+#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,\r
+#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,\r
+#    OUT  UINT32  *RegisterOutEdx  OPTIONAL\r
+#    )\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmCpuid):\r
+    push    %ebx\r
+    push    %ebp\r
+    movl    %esp, %ebp\r
+    movl    12(%ebp), %eax\r
+    cpuid\r
+    push    %ecx\r
+    movl    16(%ebp), %ecx\r
+    jecxz   L1\r
+    movl    %eax, (%ecx)\r
+L1:\r
+    movl    20(%ebp), %ecx\r
+    jecxz   L2\r
+    movl    %ebx, (%ecx)\r
+L2:\r
+    movl    24(%ebp), %ecx\r
+    jecxz   L3\r
+    popl    (%ecx)\r
+L3:\r
+    movl    28(%ebp), %ecx\r
+    jecxz   L4\r
+    movl    %edx, (%ecx)\r
+L4:\r
+    movl    12(%ebp), %eax\r
+    leave\r
+    pop     %ebx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.asm b/MdePkg/Library/BaseLib/Ia32/CpuId.asm
new file mode 100644 (file)
index 0000000..5c0eb1f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuId.asm
@@ -0,0 +1,66 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CpuId.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmCpuid function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586P\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  AsmCpuid (\r
+;    IN   UINT32  RegisterInEax,\r
+;    OUT  UINT32  *RegisterOutEax  OPTIONAL,\r
+;    OUT  UINT32  *RegisterOutEbx  OPTIONAL,\r
+;    OUT  UINT32  *RegisterOutEcx  OPTIONAL,\r
+;    OUT  UINT32  *RegisterOutEdx  OPTIONAL\r
+;    );\r
+;------------------------------------------------------------------------------\r
+AsmCpuid    PROC    USES    ebx\r
+    push    ebp\r
+    mov     ebp, esp\r
+    mov     eax, [ebp + 12]\r
+    cpuid\r
+    push    ecx\r
+    mov     ecx, [ebp + 16]\r
+    jecxz   @F\r
+    mov     [ecx], eax\r
+@@:\r
+    mov     ecx, [ebp + 20]\r
+    jecxz   @F\r
+    mov     [ecx], ebx\r
+@@:\r
+    mov     ecx, [ebp + 24]\r
+    jecxz   @F\r
+    pop     [ecx]\r
+@@:\r
+    mov     ecx, [ebp + 28]\r
+    jecxz   @F\r
+    mov     [ecx], edx\r
+@@:\r
+    mov     eax, [ebp + 12]\r
+    leave\r
+    ret\r
+AsmCpuid    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuId.c b/MdePkg/Library/BaseLib/Ia32/CpuId.c
new file mode 100644 (file)
index 0000000..d1893ae
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuId.c
@@ -0,0 +1,54 @@
+/** @file\r
+  AsmCpuid function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT32\r
+EFIAPI\r
+AsmCpuid (\r
+  IN      UINT32                    Index,\r
+  OUT     UINT32                    *RegisterEax,  OPTIONAL\r
+  OUT     UINT32                    *RegisterEbx,  OPTIONAL\r
+  OUT     UINT32                    *RegisterEcx,  OPTIONAL\r
+  OUT     UINT32                    *RegisterEdx   OPTIONAL\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Index\r
+    cpuid\r
+    push    ecx\r
+    mov     ecx, RegisterEax\r
+    jecxz   SkipEax\r
+    mov     [ecx], eax\r
+SkipEax:\r
+    mov     ecx, RegisterEbx\r
+    jecxz   SkipEbx\r
+    mov     [ecx], ebx\r
+SkipEbx:\r
+    pop     eax\r
+    mov     ecx, RegisterEcx\r
+    jecxz   SkipEcx\r
+    mov     [ecx], eax\r
+SkipEcx:\r
+    mov     ecx, RegisterEdx\r
+    jecxz   SkipEdx\r
+    mov     [ecx], edx\r
+SkipEdx:\r
+    mov     eax, Index\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
new file mode 100644 (file)
index 0000000..2d7ec49
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S
@@ -0,0 +1,72 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CpuIdEx.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmCpuidEx function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+    .686:\r
+    .code:\r
+\r
+#------------------------------------------------------------------------------\r
+#  UINT32\r
+#  EFIAPI\r
+#  AsmCpuidEx (\r
+#    IN   UINT32  RegisterInEax,\r
+#    IN   UINT32  RegisterInEcx,\r
+#    OUT  UINT32  *RegisterOutEax  OPTIONAL,\r
+#    OUT  UINT32  *RegisterOutEbx  OPTIONAL,\r
+#    OUT  UINT32  *RegisterOutEcx  OPTIONAL,\r
+#    OUT  UINT32  *RegisterOutEdx  OPTIONAL\r
+#    )\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmCpuidEx)\r
+ASM_PFX(AsmCpuidEx):\r
+    push    %ebx\r
+    push    %ebp\r
+    movl    %esp, %ebp\r
+    movl    12(%ebp), %eax\r
+    movl    16(%ebp), %ecx\r
+    cpuid\r
+    push    %ecx\r
+    movl    20(%ebp), %ecx\r
+    jecxz   L1\r
+    movl    %eax, (%ecx)\r
+L1:\r
+    movl    24(%ebp), %ecx\r
+    jecxz   L2\r
+    movl    %ebx, (%ecx)\r
+L2:\r
+    movl    28(%ebp), %ecx\r
+    jecxz   L3\r
+    popl    (%ecx)\r
+L3:\r
+    movl    32(%ebp), %edx\r
+    jecxz   L4\r
+    movl    %edx, (%ecx)\r
+L4:\r
+    movl    12(%ebp), %eax\r
+    leave\r
+    pop     %ebx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm
new file mode 100644 (file)
index 0000000..cdebec2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.asm
@@ -0,0 +1,68 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   CpuIdEx.Asm\r
+;
+; Abstract:
+;
+;   AsmCpuidEx function\r
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+    .686\r
+    .model  flat,C\r
+    .code
+
+;------------------------------------------------------------------------------
+;  UINT32
+;  EFIAPI
+;  AsmCpuidEx (\r
+;    IN   UINT32  RegisterInEax,
+;    IN   UINT32  RegisterInEcx,
+;    OUT  UINT32  *RegisterOutEax  OPTIONAL,
+;    OUT  UINT32  *RegisterOutEbx  OPTIONAL,
+;    OUT  UINT32  *RegisterOutEcx  OPTIONAL,
+;    OUT  UINT32  *RegisterOutEdx  OPTIONAL
+;    )
+;------------------------------------------------------------------------------
+AsmCpuidEx  PROC    USES    ebx\r
+    push    ebp\r
+    mov     ebp, esp\r
+    mov     eax, [ebp + 12]\r
+    mov     ecx, [ebp + 16]\r
+    cpuid\r
+    push    ecx\r
+    mov     ecx, [ebp + 20]\r
+    jecxz   @F\r
+    mov     [ecx], eax\r
+@@:\r
+    mov     ecx, [ebp + 24]\r
+    jecxz   @F\r
+    mov     [ecx], ebx\r
+@@:\r
+    mov     ecx, [ebp + 28]\r
+    jecxz   @F\r
+    pop     [ecx]\r
+@@:\r
+    mov     edx, [ebp + 32]\r
+    jecxz   @F\r
+    mov     [ecx], edx\r
+@@:\r
+    mov     eax, [ebp + 12]\r
+    leave\r
+    ret\r
+AsmCpuidEx  ENDP\r
+
+    END

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c
new file mode 100644 (file)
index 0000000..99e2edb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.c
@@ -0,0 +1,55 @@
+/** @file\r
+  AsmCpuidEx function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT32\r
+EFIAPI\r
+AsmCpuidEx (\r
+  IN      UINT32                    Index,\r
+  IN      UINT32                    SubIndex,\r
+  OUT     UINT32                    *RegisterEax,  OPTIONAL\r
+  OUT     UINT32                    *RegisterEbx,  OPTIONAL\r
+  OUT     UINT32                    *RegisterEcx,  OPTIONAL\r
+  OUT     UINT32                    *RegisterEdx   OPTIONAL\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Index\r
+    mov     ecx, SubIndex\r
+    cpuid\r
+    push    ecx\r
+    mov     ecx, RegisterEax\r
+    jecxz   SkipEax\r
+    mov     [ecx], eax\r
+SkipEax:\r
+    mov     ecx, RegisterEbx\r
+    jecxz   SkipEbx\r
+    mov     [ecx], ebx\r
+SkipEbx:\r
+    pop     eax\r
+    mov     ecx, RegisterEcx\r
+    jecxz   SkipEcx\r
+    mov     [ecx], eax\r
+SkipEcx:\r
+    mov     ecx, RegisterEdx\r
+    jecxz   SkipEdx\r
+    mov     [ecx], edx\r
+SkipEdx:\r
+    mov     eax, Index\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.S b/MdePkg/Library/BaseLib/Ia32/CpuPause.S
new file mode 100644 (file)
index 0000000..3661b1f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------ ;\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CpuPause.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   CpuPause function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(CpuPause)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# CpuPause (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(CpuPause):\r
+    pause\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.asm b/MdePkg/Library/BaseLib/Ia32/CpuPause.asm
new file mode 100644 (file)
index 0000000..4c7135f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------ ;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CpuPause.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   CpuPause function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; CpuPause (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+CpuPause    PROC\r
+    pause\r
+    ret\r
+CpuPause    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuPause.c b/MdePkg/Library/BaseLib/Ia32/CpuPause.c
new file mode 100644 (file)
index 0000000..7750ee4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuPause.c
@@ -0,0 +1,30 @@
+/** @file\r
+  CpuPause function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+CpuPause (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    pause\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuSleep.S b/MdePkg/Library/BaseLib/Ia32/CpuSleep.S
new file mode 100644 (file)
index 0000000..8bf9d55
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuSleep.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------ ;\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CpuSleep.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   CpuSleep function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(CpuSleep)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# CpuSleep (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(CpuSleep):\r
+    hlt\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuSleep.asm b/MdePkg/Library/BaseLib/Ia32/CpuSleep.asm
new file mode 100644 (file)
index 0000000..8a779f7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuSleep.asm
@@ -0,0 +1,39 @@
+;------------------------------------------------------------------------------ ;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CpuSleep.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   CpuSleep function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; CpuSleep (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+CpuSleep    PROC\r
+    hlt\r
+    ret\r
+CpuSleep    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/CpuSleep.c b/MdePkg/Library/BaseLib/Ia32/CpuSleep.c
new file mode 100644 (file)
index 0000000..5975374
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/CpuSleep.c
@@ -0,0 +1,30 @@
+/** @file\r
+  CpuSleep function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+CpuSleep (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    hlt\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.S b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.S
new file mode 100644 (file)
index 0000000..3a7a81d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   DisableInterrupts.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   DisableInterrupts function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(DisableInterrupts)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# DisableInterrupts (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(DisableInterrupts):\r
+    cli\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm
new file mode 100644 (file)
index 0000000..35209ff
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   DisableInterrupts.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   DisableInterrupts function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; DisableInterrupts (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+DisableInterrupts   PROC\r
+    cli\r
+    ret\r
+DisableInterrupts   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c
new file mode 100644 (file)
index 0000000..f1ef0f1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisableInterrupts.c
@@ -0,0 +1,30 @@
+/** @file\r
+  DisableInterrupts function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+DisableInterrupts (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    cli\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S
new file mode 100644 (file)
index 0000000..f950b05
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.S
@@ -0,0 +1,57 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   DisablePaging32.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86DisablePaging32 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalX86DisablePaging32)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86DisablePaging32 (\r
+#   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+#   IN      VOID                      *Context1,    OPTIONAL\r
+#   IN      VOID                      *Context2,    OPTIONAL\r
+#   IN      VOID                      *NewStack\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalX86DisablePaging32):\r
+    movl    4(%esp), %ebx\r
+    movl    8(%esp), %ecx\r
+    movl    12(%esp), %edx\r
+    pushfl\r
+    pop     %edi\r
+    cli\r
+    movl    %cr0, %eax\r
+    btrl    $31, %eax\r
+    movl    16(%esp), %esp\r
+    movl    %eax, %cr0\r
+    push    %edi\r
+    popfl\r
+    push    %edx\r
+    push    %ecx\r
+    call    *%ebx\r
+    jmp     .\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm
new file mode 100644 (file)
index 0000000..d294977
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.asm
@@ -0,0 +1,57 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   DisablePaging32.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmDisablePaging32 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86DisablePaging32 (\r
+;   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+;   IN      VOID                      *Context1,    OPTIONAL\r
+;   IN      VOID                      *Context2,    OPTIONAL\r
+;   IN      VOID                      *NewStack\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86DisablePaging32    PROC\r
+    mov     ebx, [esp + 4]\r
+    mov     ecx, [esp + 8]\r
+    mov     edx, [esp + 12]\r
+    pushfd\r
+    pop     edi                         ; save EFLAGS to edi\r
+    cli\r
+    mov     eax, cr0\r
+    btr     eax, 31\r
+    mov     esp, [esp + 16]\r
+    mov     cr0, eax\r
+    push    edi\r
+    popfd                               ; restore EFLAGS from edi\r
+    push    edx\r
+    push    ecx\r
+    call    ebx\r
+    jmp     $                           ; EntryPoint() should not return\r
+InternalX86DisablePaging32    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c
new file mode 100644 (file)
index 0000000..d3c7718
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DisablePaging32.c
@@ -0,0 +1,51 @@
+/** @file\r
+  AsmDisablePaging32 function.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+__declspec (naked)\r
+VOID\r
+EFIAPI\r
+InternalX86DisablePaging32 (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,    OPTIONAL\r
+  IN      VOID                      *Context2,    OPTIONAL\r
+  IN      VOID                      *NewStack\r
+  )\r
+{\r
+  _asm {\r
+    push    ebp\r
+    mov     ebp, esp\r
+    mov     ebx, EntryPoint\r
+    mov     ecx, Context1\r
+    mov     edx, Context2\r
+    pushfd\r
+    pop     edi                         // save EFLAGS to edi\r
+    cli\r
+    mov     eax, cr0\r
+    btr     eax, 31\r
+    mov     esp, NewStack\r
+    mov     cr0, eax\r
+    push    edi\r
+    popfd                               // restore EFLAGS from edi\r
+    push    edx\r
+    push    ecx\r
+    call    ebx\r
+    jmp     $                           // EntryPoint() should not return\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c
new file mode 100644 (file)
index 0000000..da3afbf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivS64x64Remainder.c
@@ -0,0 +1,59 @@
+/** @file\r
+  Integer division worker functions for Ia32.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  DivS64x64Remainder.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "../BaseLibInternals.h"\r
+\r
+/**\r
+  Worker function that Divides a 64-bit signed integer by a 64-bit signed integer and\r
+  generates a  64-bit signed result and a optional 64-bit signed remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 64-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  @param  Dividend  A 64-bit signed value.\r
+  @param  Divisor   A 64-bit signed value.\r
+  @param  Remainder A pointer to a 64-bit signed value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+INT64\r
+InternalMathDivRemS64x64 (\r
+  IN      INT64                     Dividend,\r
+  IN      INT64                     Divisor,\r
+  OUT     INT64                     *Remainder  OPTIONAL\r
+  )\r
+{\r
+  INT64                             Quot;\r
+\r
+  Quot = InternalMathDivRemU64x64 (\r
+           Dividend >= 0 ? Dividend : -Dividend,\r
+           Divisor >= 0 ? Divisor : -Divisor,\r
+           (UINT64 *) Remainder\r
+           );\r
+  if (Remainder != NULL && Dividend < 0) {\r
+    *Remainder = -*Remainder;\r
+  }\r
+  return (Dividend ^ Divisor) >= 0 ? Quot : -Quot;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.S b/MdePkg/Library/BaseLib/Ia32/DivU64x32.S
new file mode 100644 (file)
index 0000000..1708198
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.S
@@ -0,0 +1,46 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   DivU64x32.asm\r
+#\r
+# Abstract:\r
+#\r
+#   Calculate the quotient of a 64-bit integer by a 32-bit integer\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathDivU64x32)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathDivU64x32 (\r
+#   IN      UINT64                    Dividend,\r
+#   IN      UINT32                    Divisor\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathDivU64x32):\r
+    movl    8(%esp), %eax\r
+    movl    12(%esp), %ecx\r
+    xorl    %edx, %edx\r
+    divl    %ecx\r
+    push    %eax\r
+    movl    8(%esp), %eax\r
+    divl    %ecx\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm
new file mode 100644 (file)
index 0000000..25ca074
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.asm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   DivU64x32.asm\r
+;\r
+; Abstract:\r
+;\r
+;   Calculate the quotient of a 64-bit integer by a 32-bit integer\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathDivU64x32 (\r
+;   IN      UINT64                    Dividend,\r
+;   IN      UINT32                    Divisor\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathDivU64x32   PROC\r
+    mov     eax, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    xor     edx, edx\r
+    div     ecx\r
+    push    eax                     ; save quotient on stack\r
+    mov     eax, [esp + 8]\r
+    div     ecx\r
+    pop     edx                     ; restore high-order dword of the quotient\r
+    ret\r
+InternalMathDivU64x32   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32.c b/MdePkg/Library/BaseLib/Ia32/DivU64x32.c
new file mode 100644 (file)
index 0000000..d680c29
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32.c
@@ -0,0 +1,38 @@
+/** @file\r
+  Calculate the quotient of a 64-bit integer by a 32-bit integer\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathDivU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, dword ptr [Dividend + 4]\r
+    mov     ecx, Divisor\r
+    xor     edx, edx\r
+    div     ecx\r
+    push    eax                     ; save quotient on stack\r
+    mov     eax, dword ptr [Dividend]\r
+    div     ecx\r
+    pop     edx                     ; restore high-order dword of the quotient\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S
new file mode 100644 (file)
index 0000000..987e0ea
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.S
@@ -0,0 +1,51 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   DivError.asm\r
+#\r
+# Abstract:\r
+#\r
+#   Set error flag for all division functions\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathDivRemU64x32)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathDivRemU64x32 (\r
+#   IN      UINT64                    Dividend,\r
+#   IN      UINT32                    Divisor,\r
+#   OUT     UINT32                    *Remainder\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathDivRemU64x32):\r
+    movl    12(%esp), %ecx\r
+    movl    8(%esp), %eax\r
+    xorl    %edx, %edx\r
+    divl    %ecx\r
+    push    %eax\r
+    movl    8(%esp), %eax\r
+    divl    %ecx\r
+    movl    20(%esp), %ecx\r
+    jecxz   L1\r
+    movl    %edx, (%ecx)\r
+L1:\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm
new file mode 100644 (file)
index 0000000..e025b22
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   DivError.asm\r
+;\r
+; Abstract:\r
+;\r
+;   Set error flag for all division functions\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathDivRemU64x32 (\r
+;   IN      UINT64                    Dividend,\r
+;   IN      UINT32                    Divisor,\r
+;   OUT     UINT32                    *Remainder\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathDivRemU64x32    PROC\r
+    mov     ecx, [esp + 12]         ; ecx <- divisor\r
+    mov     eax, [esp + 8]          ; eax <- dividend[32..63]\r
+    xor     edx, edx\r
+    div     ecx                     ; eax <- quotient[32..63], edx <- remainder\r
+    push    eax\r
+    mov     eax, [esp + 8]          ; eax <- dividend[0..31]\r
+    div     ecx                     ; eax <- quotient[0..31]\r
+    mov     ecx, [esp + 20]         ; ecx <- Remainder\r
+    jecxz   @F                      ; abandon remainder if Remainder == NULL\r
+    mov     [ecx], edx\r
+@@:\r
+    pop     edx                     ; edx <- quotient[32..63]\r
+    ret\r
+InternalMathDivRemU64x32    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c
new file mode 100644 (file)
index 0000000..a9c54a7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x32Remainder.c
@@ -0,0 +1,43 @@
+/** @file\r
+  Set error flag for all division functions\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathDivRemU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor,\r
+  OUT     UINT32                    *Remainder\r
+  )\r
+{\r
+  _asm {\r
+    mov     ecx, Divisor\r
+    mov     eax, dword ptr [Dividend + 4]\r
+    xor     edx, edx\r
+    div     ecx\r
+    push    eax\r
+    mov     eax, dword ptr [Dividend + 0]\r
+    div     ecx\r
+    mov     ecx, Remainder\r
+    jecxz   RemainderNull                      // abandon remainder if Remainder == NULL\r
+    mov     [ecx], edx\r
+RemainderNull:\r
+    pop     edx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S
new file mode 100644 (file)
index 0000000..36008bf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.S
@@ -0,0 +1,94 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   DivU64x64Remainder.asm\r
+#\r
+# Abstract:\r
+#\r
+#   Calculate the quotient of a 64-bit integer by a 64-bit integer and returns\r
+#   both the quotient and the remainder\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathDivRemU64x32), ASM_PFX(InternalMathDivRemU64x64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathDivRemU64x64 (\r
+#   IN      UINT64                    Dividend,\r
+#   IN      UINT64                    Divisor,\r
+#   OUT     UINT64                    *Remainder    OPTIONAL\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathDivRemU64x64):\r
+    movl    16(%esp), %ecx\r
+    testl   %ecx, %ecx\r
+    jnz     Hard\r
+    movl    20(%esp), %ecx\r
+    jecxz   L1\r
+    and     $0, 4(%ecx)\r
+    movl    %ecx, 16(%esp)\r
+L1:\r
+    jmp     ASM_PFX(InternalMathDivRemU64x32)\r
+Hard:\r
+    push    %ebx\r
+    push    %esi\r
+    push    %edi\r
+    mov     20(%esp), %edx\r
+    mov     16(%esp), %eax\r
+    movl    %edx, %edi\r
+    movl    %eax, %esi\r
+    mov     24(%esp), %ebx\r
+L2:\r
+    shrl    %edx\r
+    rcrl    $1, %eax\r
+    shrdl   $1, %ecx, %ebx\r
+    shrl    %ecx\r
+    jnz     L2\r
+    divl    %ebx\r
+    movl    %eax, %ebx\r
+    movl    28(%esp), %ecx\r
+    mull    24(%esp)\r
+    imull   %ebx, %ecx\r
+    addl    %ecx, %edx\r
+    mov     32(%esp), %ecx\r
+    jc      TooLarge\r
+    cmpl    %edx, %edi\r
+    ja      Correct\r
+    jb      TooLarge\r
+    cmpl    %eax, %esi\r
+    jae     Correct\r
+TooLarge:\r
+    decl    %ebx\r
+    jecxz   Return\r
+    sub     24(%esp), %eax\r
+    sbb     28(%esp), %edx\r
+Correct:\r
+    jecxz   Return\r
+    subl    %eax, %esi\r
+    sbbl    %edx, %edi\r
+    movl    %esi, (%ecx)\r
+    movl    %edi, 4(%ecx)\r
+Return:\r
+    movl    %ebx, %eax\r
+    xorl    %edx, %edx\r
+    pop     %edi\r
+    pop     %esi\r
+    pop     %ebx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm
new file mode 100644 (file)
index 0000000..95e57ef
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.asm
@@ -0,0 +1,92 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   DivU64x64Remainder.asm\r
+;\r
+; Abstract:\r
+;\r
+;   Calculate the quotient of a 64-bit integer by a 64-bit integer and returns\r
+;   both the quotient and the remainder\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+EXTERN  InternalMathDivRemU64x32:PROC\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathDivRemU64x64 (\r
+;   IN      UINT64                    Dividend,\r
+;   IN      UINT64                    Divisor,\r
+;   OUT     UINT64                    *Remainder    OPTIONAL\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathDivRemU64x64    PROC\r
+    mov     ecx, [esp + 16]             ; ecx <- divisor[32..63]\r
+    test    ecx, ecx\r
+    jnz     _@DivRemU64x64              ; call _@DivRemU64x64 if Divisor > 2^32\r
+    mov     ecx, [esp + 20]\r
+    jecxz   @F\r
+    and     dword ptr [ecx + 4], 0      ; zero high dword of remainder\r
+    mov     [esp + 16], ecx             ; set up stack frame to match DivRemU64x32\r
+@@:\r
+    jmp     InternalMathDivRemU64x32\r
+InternalMathDivRemU64x64    ENDP\r
+\r
+_@DivRemU64x64  PROC    USES    ebx esi edi\r
+    mov     edx, dword ptr [esp + 20]\r
+    mov     eax, dword ptr [esp + 16]   ; edx:eax <- dividend\r
+    mov     edi, edx\r
+    mov     esi, eax                    ; edi:esi <- dividend\r
+    mov     ebx, dword ptr [esp + 24]   ; ecx:ebx <- divisor\r
+@@:\r
+    shr     edx, 1\r
+    rcr     eax, 1\r
+    shrd    ebx, ecx, 1\r
+    shr     ecx, 1\r
+    jnz     @B\r
+    div     ebx\r
+    mov     ebx, eax                    ; ebx <- quotient\r
+    mov     ecx, [esp + 28]             ; ecx <- high dword of divisor\r
+    mul     dword ptr [esp + 24]        ; edx:eax <- quotient * divisor[0..31]\r
+    imul    ecx, ebx                    ; ecx <- quotient * divisor[32..63]\r
+    add     edx, ecx                    ; edx <- (quotient * divisor)[32..63]\r
+    mov     ecx, dword ptr [esp + 32]   ; ecx <- addr for Remainder\r
+    jc      @TooLarge                   ; product > 2^64\r
+    cmp     edi, edx                    ; compare high 32 bits\r
+    ja      @Correct\r
+    jb      @TooLarge                   ; product > dividend\r
+    cmp     esi, eax\r
+    jae     @Correct                    ; product <= dividend\r
+@TooLarge:\r
+    dec     ebx                         ; adjust quotient by -1\r
+    jecxz   @Return                     ; return if Remainder == NULL\r
+    sub     eax, dword ptr [esp + 24]\r
+    sbb     edx, dword ptr [esp + 28]   ; edx:eax <- (quotient - 1) * divisor\r
+@Correct:\r
+    jecxz   @Return\r
+    sub     esi, eax\r
+    sbb     edi, edx                    ; edi:esi <- remainder\r
+    mov     [ecx], esi\r
+    mov     [ecx + 4], edi\r
+@Return:\r
+    mov     eax, ebx                    ; eax <- quotient\r
+    xor     edx, edx                    ; quotient is 32 bits long\r
+    ret\r
+_@DivRemU64x64  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c
new file mode 100644 (file)
index 0000000..29413b2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/DivU64x64Remainder.c
@@ -0,0 +1,71 @@
+/** @file\r
+  Calculate the quotient of a 64-bit integer by a 64-bit integer and returns\r
+  both the quotient and the remainderSet error flag for all division functions\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathDivRemU64x64 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT64                    Divisor,\r
+  OUT     UINT64                    *Remainder    OPTIONAL\r
+  )\r
+{\r
+  _asm {\r
+    mov     edx, dword ptr [Dividend + 4]\r
+    mov     eax, dword ptr [Dividend + 0]   // edx:eax <- dividend\r
+    mov     edi, edx\r
+    mov     esi, eax                    // edi:esi <- dividend\r
+    mov     ecx, dword ptr [Divisor + 4]\r
+    mov     ebx, dword ptr [Divisor + 0]   // ecx:ebx <- divisor\r
+BitLoop:\r
+    shr     edx, 1\r
+    rcr     eax, 1\r
+    shrd    ebx, ecx, 1\r
+    shr     ecx, 1\r
+    jnz     BitLoop\r
+    div     ebx\r
+    mov     ebx, eax                    // ebx <- quotient\r
+    mov     ecx, dword ptr [Divisor + 4]\r
+    mul     dword ptr [Divisor]\r
+    imul    ecx, ebx\r
+    add     edx, ecx\r
+    mov     ecx, Remainder\r
+    jc      TooLarge                   // product > 2^64\r
+    cmp     edi, edx                    // compare high 32 bits\r
+    ja      Correct\r
+    jb      TooLarge                   // product > dividend\r
+    cmp     esi, eax\r
+    jae     Correct                    // product <= dividend\r
+TooLarge:\r
+    dec     ebx                         // adjust quotient by -1\r
+    jecxz   Return                     // return if Remainder == NULL\r
+    sub     eax, dword ptr [Divisor + 0]\r
+    sbb     edx, dword ptr [Divisor + 4]\r
+Correct:\r
+    jecxz   Return\r
+    sub     esi, eax\r
+    sbb     edi, edx                    // edi:esi <- remainder\r
+    mov     [ecx], esi\r
+    mov     [ecx + 4], edi\r
+Return:\r
+    mov     eax, ebx                    // eax <- quotient\r
+    xor     edx, edx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S
new file mode 100644 (file)
index 0000000..2799832
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   EnableDisableInterrupts.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   EnableDisableInterrupts function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(EnableDisableInterrupts)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# EnableDisableInterrupts (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(EnableDisableInterrupts):\r
+    sti\r
+    cli\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm
new file mode 100644 (file)
index 0000000..fe2016d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   EnableDisableInterrupts.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   EnableDisableInterrupts function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; EnableDisableInterrupts (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+_EnableDisableInterrupts    PROC\r
+    sti\r
+    cli\r
+    ret\r
+_EnableDisableInterrupts    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c
new file mode 100644 (file)
index 0000000..7194ca2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableDisableInterrupts.c
@@ -0,0 +1,33 @@
+/** @file\r
+  EnableDisableInterrupts function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+EnableDisableInterrupts (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    sti\r
+    nop\r
+    nop\r
+    cli\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.S b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.S
new file mode 100644 (file)
index 0000000..2c83e26
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   EnableInterrupts.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   EnableInterrupts function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(EnableInterrupts)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# EnableInterrupts (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(EnableInterrupts):\r
+    sti\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm
new file mode 100644 (file)
index 0000000..194dd8f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   EnableInterrupts.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   EnableInterrupts function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; EnableInterrupts (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+_EnableInterrupts   PROC\r
+    sti\r
+    ret\r
+_EnableInterrupts   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c
new file mode 100644 (file)
index 0000000..ada4100
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnableInterrupts.c
@@ -0,0 +1,30 @@
+/** @file\r
+  EnableInterrupts function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+EnableInterrupts (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    sti\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S
new file mode 100644 (file)
index 0000000..054a5c9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.S
@@ -0,0 +1,57 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   EnablePaging32.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86EnablePaging32 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalX86EnablePaging32)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86EnablePaging32 (\r
+#   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+#   IN      VOID                      *Context1,    OPTIONAL\r
+#   IN      VOID                      *Context2,    OPTIONAL\r
+#   IN      VOID                      *NewStack\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalX86EnablePaging32):\r
+    movl    4(%esp), %ebx\r
+    movl    8(%esp), %ecx\r
+    movl    12(%esp), %edx\r
+    pushfl\r
+    pop     %edi\r
+    cli\r
+    movl    %cr0, %eax\r
+    btsl    $31, %eax\r
+    movl    16(%esp), %esp\r
+    movl    %eax, %cr0\r
+    push    %edi\r
+    popfl\r
+    push    %edx\r
+    push    %ecx\r
+    call    *%ebx\r
+    jmp     .\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm
new file mode 100644 (file)
index 0000000..ae98b93
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.asm
@@ -0,0 +1,57 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   EnablePaging32.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmEnablePaging32 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86EnablePaging32 (\r
+;   IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+;   IN      VOID                      *Context1,    OPTIONAL\r
+;   IN      VOID                      *Context2,    OPTIONAL\r
+;   IN      VOID                      *NewStack\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86EnablePaging32 PROC\r
+    mov     ebx, [esp + 4]\r
+    mov     ecx, [esp + 8]\r
+    mov     edx, [esp + 12]\r
+    pushfd\r
+    pop     edi                         ; save flags in edi\r
+    cli\r
+    mov     eax, cr0\r
+    bts     eax, 31\r
+    mov     esp, [esp + 16]\r
+    mov     cr0, eax\r
+    push    edi\r
+    popfd                               ; restore flags\r
+    push    edx\r
+    push    ecx\r
+    call    ebx\r
+    jmp     $\r
+InternalX86EnablePaging32 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c
new file mode 100644 (file)
index 0000000..e4765a7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging32.c
@@ -0,0 +1,51 @@
+/** @file\r
+  AsmEnablePaging32 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+__declspec (naked)\r
+VOID\r
+EFIAPI\r
+InternalX86EnablePaging32 (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,    OPTIONAL\r
+  IN      VOID                      *Context2,    OPTIONAL\r
+  IN      VOID                      *NewStack\r
+  )\r
+{\r
+  _asm {\r
+    push    ebp\r
+    mov     ebp, esp\r
+    mov     ebx, EntryPoint\r
+    mov     ecx, Context1\r
+    mov     edx, Context2\r
+    pushfd\r
+    pop     edi\r
+    cli\r
+    mov     eax, cr0\r
+    bts     eax, 31\r
+    mov     esp, NewStack\r
+    mov     cr0, eax\r
+    push    edi\r
+    popfd\r
+    push    edx\r
+    push    ecx\r
+    call    ebx\r
+    jmp     $\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
new file mode 100644 (file)
index 0000000..44b7e16
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.S
@@ -0,0 +1,68 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   EnablePaging64.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86EnablePaging64 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalX86EnablePaging64)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86EnablePaging64 (\r
+#   IN      UINT16                    CodeSelector,\r
+#   IN      UINT64                    EntryPoint,\r
+#   IN      UINT64                    Context1,    OPTIONAL\r
+#   IN      UINT64                    Context2,    OPTIONAL\r
+#   IN      UINT64                    NewStack\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalX86EnablePaging64):\r
+    cli\r
+    movl    $LongStart, (%esp)\r
+    movl    %cr4, %eax\r
+    orb     $0x20, %al\r
+    movl    %eax, %cr4                  # enable PAE\r
+    movl    $0xc0000080, %ecx\r
+    rdmsr\r
+    orb     $1, %ah                     # set LME\r
+    wrmsr\r
+    movl    %cr0, %eax\r
+    btsl    $31, %eax\r
+    movl    %eax, %cr0                  # enable paging\r
+    lret\r
+LongStart:                              # long mode starts here\r
+    .byte   0x67, 0x48\r
+    movl    (%esp), %ebx                # mov rbx, [esp]\r
+    .byte   0x67, 0x48\r
+    movl    8(%esp), %ecx               # mov rcx, [esp + 8]\r
+    .byte   0x67, 0x48\r
+    movl    0x10(%esp), %edx            # mov rdx, [esp + 10h]\r
+    .byte   0x67, 0x48\r
+    movl    0x18(%esp), %esp            # mov rsp, [esp + 18h]\r
+    .byte   0x48\r
+    addl    $0x-20, %esp                # add rsp, -20h\r
+    call    *%ebx                       # call rbx\r
+    jmp     .\r

diff --git a/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm
new file mode 100644 (file)
index 0000000..d54c27e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/EnablePaging64.asm
@@ -0,0 +1,73 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   EnablePaging64.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmEnablePaging64 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86EnablePaging64 (\r
+;   IN      UINT16                    Cs,\r
+;   IN      UINT64                    EntryPoint,\r
+;   IN      UINT64                    Context1,  OPTIONAL\r
+;   IN      UINT64                    Context2,  OPTIONAL\r
+;   IN      UINT64                    NewStack\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86EnablePaging64 PROC\r
+    cli\r
+    mov     [esp], @F                   ; offset for far retf, seg is the 1st arg\r
+    mov     eax, cr4\r
+    or      al, (1 SHL 5)\r
+    mov     cr4, eax                    ; enable PAE\r
+    mov     ecx, 0c0000080h\r
+    rdmsr\r
+    or      ah, 1                       ; set LME\r
+    wrmsr\r
+    mov     eax, cr0\r
+    bts     eax, 31                     ; set PG\r
+    mov     cr0, eax                    ; enable paging\r
+    retf                                ; topmost 2 dwords hold the address\r
+@@:                                     ; long mode starts here\r
+    DB      67h, 48h                    ; 32-bit address size, 64-bit operand size\r
+    mov     ebx, [esp]                  ; mov rbx, [esp]\r
+    DB      67h, 48h\r
+    mov     ecx, [esp + 8]              ; mov rcx, [esp + 8]\r
+    DB      67h, 48h\r
+    mov     edx, [esp + 10h]            ; mov rdx, [esp + 10h]\r
+    DB      67h, 48h\r
+    mov     esp, [esp + 18h]            ; mov rsp, [esp + 18h]\r
+    DB      48h\r
+    add     esp, -20h                   ; add rsp, -20h\r
+    call    ebx                         ; call rbx\r
+    hlt                                 ; no one should get here\r
+InternalX86EnablePaging64 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.S b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.S
new file mode 100644 (file)
index 0000000..b8c87c2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   FlushCacheLine.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmFlushCacheLine function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmFlushCacheLine)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmFlushCacheLine (\r
+#   IN      VOID                      *LinearAddress\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmFlushCacheLine):\r
+    movl    4(%esp), %eax\r
+    clflush (%eax)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
new file mode 100644 (file)
index 0000000..f4ad87d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   FlushCacheLine.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmFlushCacheLine function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586P\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID *\r
+; EFIAPI\r
+; AsmFlushCacheLine (\r
+;   IN      VOID                      *LinearAddress\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmFlushCacheLine   PROC\r
+    mov     eax, [esp + 4]\r
+    clflush [eax]\r
+    ret\r
+AsmFlushCacheLine   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
new file mode 100644 (file)
index 0000000..5071a39
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmFlushCacheLine function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID *\r
+EFIAPI\r
+AsmFlushCacheLine (\r
+  IN      VOID                      *LinearAddress\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, LinearAddress\r
+    clflush [eax]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.S b/MdePkg/Library/BaseLib/Ia32/FxRestore.S
new file mode 100644 (file)
index 0000000..4560751
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   FxRestore.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86FxRestore function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalX86FxRestore)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86FxRestore (\r
+#   IN CONST IA32_FX_BUFFER *Buffer\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalX86FxRestore):\r
+    movl    4(%esp), %eax\r
+    fxrstor (%eax)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.asm b/MdePkg/Library/BaseLib/Ia32/FxRestore.asm
new file mode 100644 (file)
index 0000000..5def311
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.asm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   FxRestore.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmFxRestore function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86FxRestore (\r
+;   IN CONST IA32_FX_BUFFER *Buffer\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86FxRestore  PROC\r
+    mov     eax, [esp + 4]              ; Buffer must be 16-byte aligned\r
+    fxrstor [eax]\r
+    ret\r
+InternalX86FxRestore  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FxRestore.c b/MdePkg/Library/BaseLib/Ia32/FxRestore.c
new file mode 100644 (file)
index 0000000..e95fb67
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxRestore.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmFxRestore function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+InternalX86FxRestore (\r
+  IN CONST IA32_FX_BUFFER *Buffer\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Buffer\r
+    fxrstor [eax]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.S b/MdePkg/Library/BaseLib/Ia32/FxSave.S
new file mode 100644 (file)
index 0000000..343db36
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxSave.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   FxSave.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86FxSave function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalX86FxSave)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86FxSave (\r
+#   OUT IA32_FX_BUFFER *Buffer\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalX86FxSave):\r
+    movl    4(%esp), %eax\r
+    fxsave  (%eax)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.asm b/MdePkg/Library/BaseLib/Ia32/FxSave.asm
new file mode 100644 (file)
index 0000000..d3a9f9c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxSave.asm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   FxSave.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmFxSave function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86FxSave (\r
+;   OUT IA32_FX_BUFFER *Buffer\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86FxSave PROC\r
+    mov     eax, [esp + 4]              ; Buffer must be 16-byte aligned\r
+    fxsave  [eax]\r
+    ret\r
+InternalX86FxSave ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/FxSave.c b/MdePkg/Library/BaseLib/Ia32/FxSave.c
new file mode 100644 (file)
index 0000000..721de53
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/FxSave.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmFxSave function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+InternalX86FxSave (\r
+  OUT IA32_FX_BUFFER *Buffer\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Buffer\r
+    fxsave  [eax]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S
new file mode 100644 (file)
index 0000000..0abb605
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.S
@@ -0,0 +1,46 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   InterlockedCompareExchange32.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalSyncCompareExchange32 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalSyncCompareExchange32)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT32\r
+# EFIAPI\r
+# InternalSyncCompareExchange32 (\r
+#   IN      UINT32                    *Value,\r
+#   IN      UINT32                    CompareValue,\r
+#   IN      UINT32                    ExchangeValue\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalSyncCompareExchange32):\r
+    movl    4(%esp), %ecx\r
+    movl    8(%esp), %eax\r
+    movl    12(%esp), %edx\r
+    lock\r
+    cmpxchgl    %edx, (%ecx)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm
new file mode 100644 (file)
index 0000000..47d959f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   InterlockedCompareExchange32.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   InterlockedCompareExchange32 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .486\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT32\r
+; EFIAPI\r
+; InternalSyncCompareExchange32 (\r
+;   IN      UINT32                    *Value,\r
+;   IN      UINT32                    CompareValue,\r
+;   IN      UINT32                    ExchangeValue\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalSyncCompareExchange32   PROC\r
+    mov     ecx, [esp + 4]\r
+    mov     eax, [esp + 8]\r
+    mov     edx, [esp + 12]\r
+    lock    cmpxchg [ecx], edx\r
+    ret\r
+InternalSyncCompareExchange32   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c
new file mode 100644 (file)
index 0000000..d584a90
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange32.c
@@ -0,0 +1,35 @@
+/** @file\r
+  InterlockedCompareExchange32 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT32\r
+EFIAPI\r
+InternalSyncCompareExchange32 (\r
+  IN      UINT32                    *Value,\r
+  IN      UINT32                    CompareValue,\r
+  IN      UINT32                    ExchangeValue\r
+  )\r
+{\r
+  _asm {\r
+    mov     ecx, Value\r
+    mov     eax, CompareValue\r
+    mov     edx, ExchangeValue\r
+    lock    cmpxchg [ecx], edx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S
new file mode 100644 (file)
index 0000000..ee3278c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.S
@@ -0,0 +1,52 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   InterlockedCompareExchange64.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalSyncCompareExchange64 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalSyncCompareExchange64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalSyncCompareExchange64 (\r
+#   IN      UINT64                    *Value,\r
+#   IN      UINT64                    CompareValue,\r
+#   IN      UINT64                    ExchangeValue\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalSyncCompareExchange64):\r
+    push    %esi\r
+    push    %ebx\r
+    movl    12(%esp), %esi\r
+    movl    16(%esp), %eax\r
+    movl    20(%esp), %edx\r
+    movl    24(%esp), %ebx\r
+    movl    28(%esp), %ecx\r
+    lock\r
+    cmpxchg8b   (%esi)\r
+    pop     %ebx\r
+    pop     %esi\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm
new file mode 100644 (file)
index 0000000..18311e7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.asm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   InterlockedCompareExchange64.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   InterlockedCompareExchange64 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586P\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalSyncCompareExchange64 (\r
+;   IN      UINT64                    *Value,\r
+;   IN      UINT64                    CompareValue,\r
+;   IN      UINT64                    ExchangeValue\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalSyncCompareExchange64   PROC    USES    esi ebx\r
+    mov     esi, [esp + 12]\r
+    mov     eax, [esp + 16]\r
+    mov     edx, [esp + 20]\r
+    mov     ebx, [esp + 24]\r
+    mov     ecx, [esp + 28]\r
+    lock    cmpxchg8b   qword ptr [esi]\r
+    ret\r
+InternalSyncCompareExchange64   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c
new file mode 100644 (file)
index 0000000..a0d0ba8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedCompareExchange64.c
@@ -0,0 +1,36 @@
+/** @file\r
+  InterlockedCompareExchange64 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalSyncCompareExchange64 (\r
+  IN      UINT64                    *Value,\r
+  IN      UINT64                    CompareValue,\r
+  IN      UINT64                    ExchangeValue\r
+  )\r
+{\r
+  _asm {\r
+    mov     esi, Value\r
+    mov     eax, dword ptr [CompareValue + 0]\r
+    mov     edx, dword ptr [CompareValue + 4]\r
+    mov     ebx, dword ptr [ExchangeValue + 0]\r
+    mov     ecx, dword ptr [ExchangeValue + 4]\r
+    lock    cmpxchg8b   qword ptr [esi]\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S
new file mode 100644 (file)
index 0000000..a92ea6b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.S
@@ -0,0 +1,43 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   InterlockedDecrement.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalSyncDecrement function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalSyncDecrement)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT32\r
+# EFIAPI\r
+# InternalSyncDecrement (\r
+#   IN      UINT32                    *Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalSyncDecrement):\r
+    movl    4(%esp), %eax\r
+    lock\r
+    decl    (%eax)\r
+    movl    (%eax), %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm
new file mode 100644 (file)
index 0000000..082429e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.asm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   InterlockedDecrement.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   InterlockedDecrement function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT32\r
+; EFIAPI\r
+; InternalSyncDecrement (\r
+;   IN      UINT32                    *Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalSyncDecrement   PROC\r
+    mov     eax, [esp + 4]\r
+    lock    dec     dword ptr [eax]\r
+    mov     eax, [eax]\r
+    ret\r
+InternalSyncDecrement   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c
new file mode 100644 (file)
index 0000000..afa9a15
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedDecrement.c
@@ -0,0 +1,31 @@
+/** @file\r
+  InterlockedDecrement function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT32\r
+EFIAPI\r
+InternalSyncDecrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    lock    dec     dword ptr [eax]\r
+    mov     eax, [eax]\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S
new file mode 100644 (file)
index 0000000..88c35d5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.S
@@ -0,0 +1,43 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   InterlockedIncrement.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalSyncIncrement function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalSyncIncrement)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT32\r
+# EFIAPI\r
+# InternalSyncIncrement (\r
+#   IN      UINT32                    *Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalSyncIncrement):\r
+    movl    4(%esp), %eax\r
+    lock\r
+    incl    (%eax)\r
+    movl    (%eax), %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm
new file mode 100644 (file)
index 0000000..ea27e66
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.asm
@@ -0,0 +1,42 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   InterlockedIncrement.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   InterlockedIncrement function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT32\r
+; EFIAPI\r
+; InternalSyncIncrement (\r
+;   IN      UINT32                    *Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalSyncIncrement   PROC\r
+    mov     eax, [esp + 4]\r
+    lock    inc     dword ptr [eax]\r
+    mov     eax, [eax]\r
+    ret\r
+InternalSyncIncrement   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c
new file mode 100644 (file)
index 0000000..82fa86f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InterlockedIncrement.c
@@ -0,0 +1,32 @@
+/** @file\r
+  InterLockedIncrement function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT32\r
+EFIAPI\r
+InternalSyncIncrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    lock    inc     dword ptr [eax]\r
+    mov     eax, [eax]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c
new file mode 100644 (file)
index 0000000..2fb0710
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/InternalSwitchStack.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SwitchStack() function for IA-32.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  InternalSwitchStack.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Transfers control to a function starting with a new stack.\r
+\r
+  Transfers control to the function specified by EntryPoint using the\r
+  new stack specified by NewStack and passing in the parameters specified\r
+  by Context1 and Context2.  Context1 and Context2 are optional and may\r
+  be NULL.  The function EntryPoint must never return.\r
+  Marker will be ignored on IA-32, x64, and EBC.\r
+  IPF CPUs expect one additional parameter of type VOID * that specifies\r
+  the new backing store pointer.\r
+\r
+  If EntryPoint is NULL, then ASSERT().\r
+  If NewStack is NULL, then ASSERT().\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function.\r
+  @param  Marker      VA_LIST marker for the variable argument list.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalSwitchStack (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,   OPTIONAL\r
+  IN      VOID                      *Context2,   OPTIONAL\r
+  IN      VOID                      *NewStack,\r
+  IN      VA_LIST                   Marker\r
+  )\r
+{\r
+  BASE_LIBRARY_JUMP_BUFFER  JumpBuffer;\r
+\r
+  //\r
+  // Stack should be aligned with CPU_STACK_ALIGNMENT\r
+  //\r
+  ASSERT (((UINTN)NewStack & (CPU_STACK_ALIGNMENT - 1)) == 0);\r
+\r
+  JumpBuffer.Eip = (UINTN)EntryPoint;\r
+  JumpBuffer.Esp = (UINTN)NewStack - sizeof (VOID*);\r
+  JumpBuffer.Esp -= sizeof (Context1) + sizeof (Context2);\r
+  ((VOID**)JumpBuffer.Esp)[1] = Context1;\r
+  ((VOID**)JumpBuffer.Esp)[2] = Context2;\r
+\r
+  LongJump (&JumpBuffer, (UINTN)-1);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.S b/MdePkg/Library/BaseLib/Ia32/Invd.S
new file mode 100644 (file)
index 0000000..4e85d29
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Invd.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   Invd.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmInvd function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmInvd)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmInvd (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmInvd):\r
+    invd\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.asm b/MdePkg/Library/BaseLib/Ia32/Invd.asm
new file mode 100644 (file)
index 0000000..5767f54
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Invd.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   Invd.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmInvd function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .486p\r
+    .model  flat\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmInvd (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+_AsmInvd    PROC\r
+    invd\r
+    ret\r
+_AsmInvd    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Invd.c b/MdePkg/Library/BaseLib/Ia32/Invd.c
new file mode 100644 (file)
index 0000000..47f6513
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Invd.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmInvd function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmInvd (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    invd\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.S b/MdePkg/Library/BaseLib/Ia32/LRotU64.S
new file mode 100644 (file)
index 0000000..fe3ab60
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.S
@@ -0,0 +1,51 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   LRotU64.asm\r
+#\r
+# Abstract:\r
+#\r
+#   64-bit left rotation for Ia32\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathLRotU64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathLRotU64 (\r
+#   IN      UINT64                    Operand,\r
+#   IN      UINTN                     Count\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathLRotU64):\r
+    push    %ebx\r
+    movb    16(%esp), %cl\r
+    movl    12(%esp), %edx\r
+    movl    8(%esp), %eax\r
+    shldl   %cl, %edx, %ebx\r
+    shldl   %cl, %eax, %edx\r
+    rorl    %cl, %ebx\r
+    shldl   %cl, %ebx, %eax\r
+    testb   $32, %cl\r
+    cmovnz  %eax, %ecx\r
+    cmovnz  %edx, %eax\r
+    cmovnz  %ecx, %edx\r
+    pop     %ebx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.asm b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm
new file mode 100644 (file)
index 0000000..a6437d8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm
@@ -0,0 +1,49 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   LRotU64.asm\r
+;\r
+; Abstract:\r
+;\r
+;   64-bit left rotation for Ia32\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathLRotU64 (\r
+;   IN      UINT64                    Operand,\r
+;   IN      UINTN                     Count\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathLRotU64 PROC    USES    ebx\r
+    mov     cl, [esp + 16]\r
+    mov     edx, [esp + 12]\r
+    mov     eax, [esp + 8]\r
+    shld    ebx, edx, cl\r
+    shld    edx, eax, cl\r
+    ror     ebx, cl\r
+    shld    eax, ebx, cl\r
+    test    cl, 32                      ; Count >= 32?\r
+    cmovnz  ecx, eax\r
+    cmovnz  eax, edx\r
+    cmovnz  edx, ecx\r
+    ret\r
+InternalMathLRotU64 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.c b/MdePkg/Library/BaseLib/Ia32/LRotU64.c
new file mode 100644 (file)
index 0000000..48a6a6b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.c
@@ -0,0 +1,41 @@
+/** @file\r
+  64-bit left rotation for Ia32\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathLRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  _asm {\r
+    mov     cl, byte ptr [Count]\r
+    mov     edx, dword ptr [Operand + 4]\r
+    mov     eax, dword ptr [Operand + 0]\r
+    shld    ebx, edx, cl\r
+    shld    edx, eax, cl\r
+    ror     ebx, cl\r
+    shld    eax, ebx, cl\r
+    test    cl, 32                      ; Count >= 32?\r
+    cmovnz  ecx, eax\r
+    cmovnz  eax, edx\r
+    cmovnz  edx, ecx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.S b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S
new file mode 100644 (file)
index 0000000..9c93242
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S
@@ -0,0 +1,46 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   LShiftU64.asm\r
+#\r
+# Abstract:\r
+#\r
+#   64-bit left shift function for IA-32\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathLShiftU64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathLShiftU64 (\r
+#   IN      UINT64                    Operand,\r
+#   IN      UINTN                     Count\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathLShiftU64):\r
+    movb    12(%esp), %cl\r
+    xorl    %eax, %eax\r
+    movl    4(%esp), %edx\r
+    testb   $32, %cl\r
+    cmovz   %edx, %eax\r
+    cmovz   0x8(%esp), %edx\r
+    shld    %cl, %eax, %edx\r
+    shl     %cl, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm
new file mode 100644 (file)
index 0000000..6c3d9a4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   LShiftU64.asm\r
+;\r
+; Abstract:\r
+;\r
+;   64-bit left shift function for IA-32\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathLShiftU64 (\r
+;   IN      UINT64                    Operand,\r
+;   IN      UINTN                     Count\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathLShiftU64   PROC\r
+    mov     cl, [esp + 12]\r
+    xor     eax, eax\r
+    mov     edx, [esp + 4]\r
+    test    cl, 32                      ; Count >= 32?\r
+    cmovz   eax, edx\r
+    cmovz   edx, [esp + 8]\r
+    shld    edx, eax, cl\r
+    shl     eax, cl\r
+    ret\r
+InternalMathLShiftU64   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.c b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c
new file mode 100644 (file)
index 0000000..766b33b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c
@@ -0,0 +1,38 @@
+/** @file\r
+  64-bit left shift function for IA-32.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathLShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  _asm {\r
+    mov     cl, byte ptr [Count]\r
+    xor     eax, eax\r
+    mov     edx, dword ptr [Operand + 0]\r
+    test    cl, 32                      // Count >= 32?\r
+    cmovz   eax, edx\r
+    cmovz   edx, dword ptr [Operand + 4]\r
+    shld    edx, eax, cl\r
+    shl     eax, cl\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.S b/MdePkg/Library/BaseLib/Ia32/LongJump.S
new file mode 100644 (file)
index 0000000..95dd444
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LongJump.S
@@ -0,0 +1,46 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   LongJump.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   Implementation of _LongJump() on IA-32.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalLongJump)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalLongJump (\r
+#   IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,\r
+#   IN      UINTN                     Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalLongJump):\r
+    pop     %eax\r
+    pop     %edx\r
+    pop     %eax\r
+    movl    (%edx), %ebx\r
+    movl    4(%edx), %esi\r
+    movl    8(%edx), %edi\r
+    movl    12(%edx), %ebp\r
+    movl    16(%edx), %esp\r
+    jmp     *20(%edx)\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.asm b/MdePkg/Library/BaseLib/Ia32/LongJump.asm
new file mode 100644 (file)
index 0000000..0309f6a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LongJump.asm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   LongJump.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   Implementation of _LongJump() on IA-32.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalLongJump (\r
+;   IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,\r
+;   IN      UINTN                     Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalLongJump    PROC\r
+    pop     eax                         ; skip return address\r
+    pop     edx                         ; edx <- JumpBuffer\r
+    pop     eax                         ; eax <- Value\r
+    mov     ebx, [edx]\r
+    mov     esi, [edx + 4]\r
+    mov     edi, [edx + 8]\r
+    mov     ebp, [edx + 12]\r
+    mov     esp, [edx + 16]\r
+    jmp     dword ptr [edx + 20]        ; restore "eip"\r
+InternalLongJump    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/LongJump.c b/MdePkg/Library/BaseLib/Ia32/LongJump.c
new file mode 100644 (file)
index 0000000..3186da5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/LongJump.c
@@ -0,0 +1,40 @@
+/** @file\r
+  Implementation of _LongJump() on IA-32.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+__declspec (naked)\r
+VOID\r
+EFIAPI\r
+InternalLongJump (\r
+  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,\r
+  IN      UINTN                     Value\r
+  )\r
+{\r
+  _asm {\r
+    pop     eax                         ; skip return address\r
+    pop     edx                         ; edx <- JumpBuffer\r
+    pop     eax                         ; eax <- Value\r
+    mov     ebx, [edx]\r
+    mov     esi, [edx + 4]\r
+    mov     edi, [edx + 8]\r
+    mov     ebp, [edx + 12]\r
+    mov     esp, [edx + 16]\r
+    jmp     dword ptr [edx + 20]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.S b/MdePkg/Library/BaseLib/Ia32/ModU64x32.S
new file mode 100644 (file)
index 0000000..decfeaa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.S
@@ -0,0 +1,45 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   DivU64x32.S\r
+#\r
+# Abstract:\r
+#\r
+#   Calculate the remainder of a 64-bit integer by a 32-bit integer\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathModU64x32)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT32\r
+# EFIAPI\r
+# InternalMathModU64x32 (\r
+#   IN      UINT64                    Dividend,\r
+#   IN      UINT32                    Divisor\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathModU64x32):\r
+    movl    8(%esp), %eax\r
+    movl    12(%esp), %ecx\r
+    xorl    %edx, %edx\r
+    divl    %ecx\r
+    movl    4(%esp), %eax\r
+    divl    %ecx\r
+    movl    %edx, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm b/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm
new file mode 100644 (file)
index 0000000..9e5f9ae
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   DivU64x32.asm\r
+;\r
+; Abstract:\r
+;\r
+;   Calculate the remainder of a 64-bit integer by a 32-bit integer\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT32\r
+; EFIAPI\r
+; InternalMathModU64x32 (\r
+;   IN      UINT64                    Dividend,\r
+;   IN      UINT32                    Divisor\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathModU64x32   PROC\r
+    mov     eax, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    xor     edx, edx\r
+    div     ecx\r
+    mov     eax, [esp + 4]\r
+    div     ecx\r
+    mov     eax, edx\r
+    ret\r
+InternalMathModU64x32   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ModU64x32.c b/MdePkg/Library/BaseLib/Ia32/ModU64x32.c
new file mode 100644 (file)
index 0000000..4337f8c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ModU64x32.c
@@ -0,0 +1,36 @@
+/** @file\r
+  Calculate the remainder of a 64-bit integer by a 32-bit integer\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT32\r
+EFIAPI\r
+InternalMathModU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, dword ptr [Dividend + 4]\r
+    mov     ecx, Divisor\r
+    xor     edx, edx\r
+    div     ecx\r
+    mov     eax, dword ptr [Dividend + 0]\r
+    div     ecx\r
+    mov     eax, edx\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.S b/MdePkg/Library/BaseLib/Ia32/Monitor.S
new file mode 100644 (file)
index 0000000..2651124
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Monitor.S
@@ -0,0 +1,45 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   Monitor.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmMonitor function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmMonitor)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# AsmMonitor (\r
+#   IN      UINTN                     Eax,\r
+#   IN      UINTN                     Ecx,\r
+#   IN      UINTN                     Edx\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmMonitor):\r
+    movl    4(%esp), %eax\r
+    movl    8(%esp), %ecx\r
+    movl    12(%esp), %edx\r
+    monitor %eax, %ecx, %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.asm b/MdePkg/Library/BaseLib/Ia32/Monitor.asm
new file mode 100644 (file)
index 0000000..174bd76
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Monitor.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   Monitor.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmMonitor function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmMonitor (\r
+;   IN      UINTN                     Eax,\r
+;   IN      UINTN                     Ecx,\r
+;   IN      UINTN                     Edx\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmMonitor  PROC\r
+    mov     eax, [esp + 4]\r
+    mov     ecx, [esp + 8]\r
+    mov     edx, [esp + 12]\r
+    DB      0fh, 1, 0c8h                ; monitor\r
+    ret\r
+AsmMonitor  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Monitor.c b/MdePkg/Library/BaseLib/Ia32/Monitor.c
new file mode 100644 (file)
index 0000000..a1b3f7b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Monitor.c
@@ -0,0 +1,37 @@
+/** @file\r
+  AsmMonitor function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmMonitor (\r
+  IN      UINTN                     RegisterEax,\r
+  IN      UINTN                     RegisterEcx,\r
+  IN      UINTN                     RegisterEdx\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, RegisterEax\r
+    mov     ecx, RegisterEcx\r
+    mov     edx, RegisterEdx\r
+    _emit   0x0f             // monitor\r
+    _emit   0x01\r
+    _emit   0xc8\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.S b/MdePkg/Library/BaseLib/Ia32/MultU64x32.S
new file mode 100644 (file)
index 0000000..5c44957
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.S
@@ -0,0 +1,46 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   MultU64x32.asm\r
+#\r
+# Abstract:\r
+#\r
+#   Calculate the product of a 64-bit integer and a 32-bit integer\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+    .386:\r
+    .code:\r
+\r
+.globl ASM_PFX(InternalMathMultU64x32)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathMultU64x32 (\r
+#   IN      UINT64                    Multiplicand,\r
+#   IN      UINT32                    Multiplier\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathMultU64x32):\r
+    movl    12(%esp), %ecx\r
+    movl    %ecx, %eax\r
+    imull   8(%esp), %ecx\r
+    mull    0x4(%esp)\r
+    addl    %ecx, %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm b/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm
new file mode 100644 (file)
index 0000000..9c9ef06
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   MultU64x32.asm\r
+;\r
+; Abstract:\r
+;\r
+;   Calculate the product of a 64-bit integer and a 32-bit integer\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathMultU64x32 (\r
+;   IN      UINT64                    Multiplicand,\r
+;   IN      UINT32                    Multiplier\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathMultU64x32  PROC\r
+    mov     ecx, [esp + 12]\r
+    mov     eax, ecx\r
+    imul    ecx, [esp + 8]              ; overflow not detectable\r
+    mul     dword ptr [esp + 4]\r
+    add     edx, ecx\r
+    ret\r
+InternalMathMultU64x32  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x32.c b/MdePkg/Library/BaseLib/Ia32/MultU64x32.c
new file mode 100644 (file)
index 0000000..8eecb14
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x32.c
@@ -0,0 +1,35 @@
+/** @file\r
+  Calculate the product of a 64-bit integer and a 32-bit integer\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathMultU64x32 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT32                    Multiplier\r
+  )\r
+{\r
+  _asm {\r
+    mov     ecx, Multiplier\r
+    mov     eax, ecx\r
+    imul    ecx, dword ptr [Multiplicand + 4]  // overflow not detectable\r
+    mul     dword ptr [Multiplicand + 0]\r
+    add     edx, ecx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.S b/MdePkg/Library/BaseLib/Ia32/MultU64x64.S
new file mode 100644 (file)
index 0000000..40dda6f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.S
@@ -0,0 +1,49 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   MultU64x64.asm\r
+#\r
+# Abstract:\r
+#\r
+#   Calculate the product of a 64-bit integer and another 64-bit integer\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathMultU64x64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathMultU64x64 (\r
+#   IN      UINT64                    Multiplicand,\r
+#   IN      UINT64                    Multiplier\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathMultU64x64):\r
+    push    %ebx\r
+    movl    8(%esp), %ebx\r
+    movl    16(%esp), %edx\r
+    movl    %ebx, %ecx\r
+    movl    %edx, %eax\r
+    imull   20(%esp), %ebx\r
+    imull   12(%esp), %edx\r
+    addl    %edx, %ebx\r
+    mull    %ecx\r
+    addl    %ebx, %edx\r
+    pop     %ebx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm b/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm
new file mode 100644 (file)
index 0000000..f367954
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.asm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   MultU64x64.asm\r
+;\r
+; Abstract:\r
+;\r
+;   Calculate the product of a 64-bit integer and another 64-bit integer\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathMultU64x64 (\r
+;   IN      UINT64                    Multiplicand,\r
+;   IN      UINT64                    Multiplier\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathMultU64x64  PROC    USES    ebx\r
+    mov     ebx, [esp + 8]              ; ebx <- M1[0..31]\r
+    mov     edx, [esp + 16]             ; edx <- M2[0..31]\r
+    mov     ecx, ebx\r
+    mov     eax, edx\r
+    imul    ebx, [esp + 20]             ; ebx <- M1[0..31] * M2[32..63]\r
+    imul    edx, [esp + 12]             ; edx <- M1[32..63] * M2[0..31]\r
+    add     ebx, edx                    ; carries are abandoned\r
+    mul     ecx                         ; edx:eax <- M1[0..31] * M2[0..31]\r
+    add     edx, ebx                    ; carries are abandoned\r
+    ret\r
+InternalMathMultU64x64  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/MultU64x64.c b/MdePkg/Library/BaseLib/Ia32/MultU64x64.c
new file mode 100644 (file)
index 0000000..52e553d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/MultU64x64.c
@@ -0,0 +1,39 @@
+/** @file\r
+  Calculate the product of a 64-bit integer and another 64-bit integer\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathMultU64x64 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT64                    Multiplier\r
+  )\r
+{\r
+  _asm {\r
+    mov     ebx, dword ptr [Multiplicand + 0]\r
+    mov     edx, dword ptr [Multiplier + 0]\r
+    mov     ecx, ebx\r
+    mov     eax, edx\r
+    imul    ebx, dword ptr [Multiplier + 4]\r
+    imul    edx, dword ptr [Multiplicand + 4]\r
+    add     ebx, edx\r
+    mul     ecx\r
+    add     edx, ebx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.S b/MdePkg/Library/BaseLib/Ia32/Mwait.S
new file mode 100644 (file)
index 0000000..80782b7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Mwait.S
@@ -0,0 +1,43 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   Mwait.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmMwait function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmMwait)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# AsmMwait (\r
+#   IN      UINTN                     Eax,\r
+#   IN      UINTN                     Ecx\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmMwait):\r
+    movl    4(%esp), %eax\r
+    movl    8(%esp), %ecx\r
+    mwait   %eax, %ecx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.asm b/MdePkg/Library/BaseLib/Ia32/Mwait.asm
new file mode 100644 (file)
index 0000000..3e5f48c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Mwait.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   Mwait.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmMwait function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmMwait (\r
+;   IN      UINTN                     Eax,\r
+;   IN      UINTN                     Ecx\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmMwait    PROC\r
+    mov     eax, [esp + 4]\r
+    mov     ecx, [esp + 8]\r
+    DB      0fh, 1, 0c9h                ; mwait\r
+    ret\r
+AsmMwait    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Mwait.c b/MdePkg/Library/BaseLib/Ia32/Mwait.c
new file mode 100644 (file)
index 0000000..9ced4c9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Mwait.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmMwait function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmMwait (\r
+  IN      UINTN                     RegisterEax,\r
+  IN      UINTN                     RegisterEcx\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, RegisterEax\r
+    mov     ecx, RegisterEcx\r
+    _emit   0x0f              // mwait\r
+    _emit   0x01\r
+    _emit   0xC9\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Non-existing.c b/MdePkg/Library/BaseLib/Ia32/Non-existing.c
new file mode 100644 (file)
index 0000000..0343455
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Non-existing.c
@@ -0,0 +1,65 @@
+/** @file\r
+  Non-existing BaseLib functions on Ia32\r
+\r
+  Copyright (c) 2006, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  Non-existing.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "../BaseLibInternals.h"\r
+\r
+\r
+/**\r
+  Disables the 64-bit paging mode on the CPU.\r
+\r
+  Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
+  mode. This function assumes the current execution mode is 64-paging mode.\r
+  This function is only available on X64. After the 64-bit paging mode is\r
+  disabled, control is transferred to the function specified by EntryPoint\r
+  using the new stack specified by NewStack and passing in the parameters\r
+  specified by Context1 and Context2. Context1 and Context2 are optional and\r
+  may be 0. The function EntryPoint must never return.\r
+\r
+  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
+                      is called. The descriptor in the GDT that this selector\r
+                      references must be setup for 32-bit protected mode.\r
+  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
+                      the new stack after paging is disabled.\r
+  @param  Context1    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the first parameter after\r
+                      paging is disabled.\r
+  @param  Context2    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the second parameter after\r
+                      paging is disabled.\r
+  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
+                      the EntryPoint function after paging is disabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalX86DisablePaging64 (\r
+  IN      UINT16                    CodeSelector,\r
+  IN      UINT32                    EntryPoint,\r
+  IN      UINT32                    Context1,  OPTIONAL\r
+  IN      UINT32                    Context2,  OPTIONAL\r
+  IN      UINT32                    NewStack\r
+  )\r
+{\r
+  //\r
+  // This function cannot work on IA32 platform\r
+  //\r
+  ASSERT (FALSE);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.S b/MdePkg/Library/BaseLib/Ia32/RRotU64.S
new file mode 100644 (file)
index 0000000..7e89842
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.S
@@ -0,0 +1,51 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   RRotU64.asm\r
+#\r
+# Abstract:\r
+#\r
+#   64-bit right rotation for Ia32\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalMathRRotU64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathRRotU64 (\r
+#   IN      UINT64                    Operand,\r
+#   IN      UINTN                     Count\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathRRotU64):\r
+    push    %ebx\r
+    movb    16(%esp), %cl\r
+    movl    8(%esp), %eax\r
+    movl    12(%esp), %edx\r
+    shrdl   %cl, %eax, %ebx\r
+    shrdl   %cl, %edx, %eax\r
+    roll    %cl, %ebx\r
+    shrdl   %cl, %ebx, %edx\r
+    testb   $32, %cl\r
+    cmovnz  %eax, %ecx\r
+    cmovnz  %edx, %eax\r
+    cmovnz  %ecx, %edx\r
+    pop     %ebx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.asm b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm
new file mode 100644 (file)
index 0000000..fe13abc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm
@@ -0,0 +1,49 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   RRotU64.asm\r
+;\r
+; Abstract:\r
+;\r
+;   64-bit right rotation for Ia32\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathRRotU64 (\r
+;   IN      UINT64                    Operand,\r
+;   IN      UINTN                     Count\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathRRotU64 PROC    USES    ebx\r
+    mov     cl, [esp + 16]\r
+    mov     eax, [esp + 8]\r
+    mov     edx, [esp + 12]\r
+    shrd    ebx, eax, cl\r
+    shrd    eax, edx, cl\r
+    rol     ebx, cl\r
+    shrd    edx, ebx, cl\r
+    test    cl, 32                      ; Count >= 32?\r
+    cmovnz  ecx, eax                    ; switch eax & edx if Count >= 32\r
+    cmovnz  eax, edx\r
+    cmovnz  edx, ecx\r
+    ret\r
+InternalMathRRotU64 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.c b/MdePkg/Library/BaseLib/Ia32/RRotU64.c
new file mode 100644 (file)
index 0000000..6b48222
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.c
@@ -0,0 +1,41 @@
+/** @file\r
+  64-bit right rotation for Ia32\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathRRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  _asm {\r
+    mov     cl, byte ptr [Count]\r
+    mov     eax, dword ptr [Operand + 0]\r
+    mov     edx, dword ptr [Operand + 4]\r
+    shrd    ebx, eax, cl\r
+    shrd    eax, edx, cl\r
+    rol     ebx, cl\r
+    shrd    edx, ebx, cl\r
+    test    cl, 32                      // Count >= 32?\r
+    cmovnz  ecx, eax\r
+    cmovnz  eax, edx\r
+    cmovnz  edx, ecx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.S b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S
new file mode 100644 (file)
index 0000000..7d58fd6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S
@@ -0,0 +1,49 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   RShiftU64.asm\r
+#\r
+# Abstract:\r
+#\r
+#   64-bit logical right shift function for IA-32\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+    .686:\r
+    .code:\r
+\r
+.globl ASM_PFX(InternalMathRShiftU64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathRShiftU64 (\r
+#   IN      UINT64                    Operand,\r
+#   IN      UINTN                     Count\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalMathRShiftU64):\r
+    movb    12(%esp), %cl\r
+    xorl    %edx, %edx\r
+    movl    8(%esp), %eax\r
+    testb   $32, %cl\r
+    cmovz   %eax, %edx\r
+    cmovz   0x4(%esp), %eax\r
+    shrdl   %cl, %edx, %eax\r
+    shr     %cl, %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm
new file mode 100644 (file)
index 0000000..faa4e96
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm
@@ -0,0 +1,46 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   RShiftU64.asm\r
+;\r
+; Abstract:\r
+;\r
+;   64-bit logical right shift function for IA-32\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathRShiftU64 (\r
+;   IN      UINT64                    Operand,\r
+;   IN      UINTN                     Count\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathRShiftU64   PROC\r
+    mov     cl, [esp + 12]              ; cl <- Count\r
+    xor     edx, edx\r
+    mov     eax, [esp + 8]\r
+    test    cl, 32                      ; Count >= 32?\r
+    cmovz   edx, eax\r
+    cmovz   eax, [esp + 4]\r
+    shrd    eax, edx, cl\r
+    shr     edx, cl\r
+    ret\r
+InternalMathRShiftU64   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.c b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c
new file mode 100644 (file)
index 0000000..7480ebd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c
@@ -0,0 +1,38 @@
+/** @file\r
+  64-bit logical right shift function for IA-32\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathRShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  _asm {\r
+    mov     cl, byte ptr [Count]\r
+    xor     edx, edx\r
+    mov     eax, dword ptr [Operand + 4]\r
+    test    cl, 32\r
+    cmovz   edx, eax\r
+    cmovz   eax, dword ptr [Operand + 0]\r
+    shrd    eax, edx, cl\r
+    shr     edx, cl\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.S b/MdePkg/Library/BaseLib/Ia32/ReadCr0.S
new file mode 100644 (file)
index 0000000..b08c7d7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadCr0.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadCr0 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadCr0)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadCr0 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadCr0):\r
+    movl    %cr0, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm
new file mode 100644 (file)
index 0000000..a8fe4a7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadCr0.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadCr0 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadCr0 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadCr0  PROC\r
+    mov     eax, cr0\r
+    ret\r
+AsmReadCr0  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr0.c b/MdePkg/Library/BaseLib/Ia32/ReadCr0.c
new file mode 100644 (file)
index 0000000..d220e8e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr0.c
@@ -0,0 +1,29 @@
+/** @file\r
+  AsmReadCr0 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadCr0 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, cr0\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.S b/MdePkg/Library/BaseLib/Ia32/ReadCr2.S
new file mode 100644 (file)
index 0000000..0b82a25
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadCr2.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadCr2 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadCr2)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadCr2 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadCr2):\r
+    movl    %cr2, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm
new file mode 100644 (file)
index 0000000..a6a9b8c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadCr2.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadCr2 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadCr2 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadCr2  PROC\r
+    mov     eax, cr2\r
+    ret\r
+AsmReadCr2  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr2.c b/MdePkg/Library/BaseLib/Ia32/ReadCr2.c
new file mode 100644 (file)
index 0000000..9ef4d44
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr2.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadCr2 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadCr2 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, cr2\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.S b/MdePkg/Library/BaseLib/Ia32/ReadCr3.S
new file mode 100644 (file)
index 0000000..f973dbe
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadCr3.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadCr3 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadCr3)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadCr3 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadCr3):\r
+    movl    %cr3, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm
new file mode 100644 (file)
index 0000000..97b9ee4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadCr3.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadCr3 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadCr3 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadCr3  PROC\r
+    mov     eax, cr3\r
+    ret\r
+AsmReadCr3  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr3.c b/MdePkg/Library/BaseLib/Ia32/ReadCr3.c
new file mode 100644 (file)
index 0000000..04efb49
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr3.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadCr3 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadCr3 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, cr3\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.S b/MdePkg/Library/BaseLib/Ia32/ReadCr4.S
new file mode 100644 (file)
index 0000000..ee94991
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadCr4.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadCr4 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadCr4)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadCr4 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadCr4):\r
+    movl    %cr4, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm b/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm
new file mode 100644 (file)
index 0000000..a454903
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadCr4.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadCr4 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadCr4 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadCr4  PROC\r
+    mov     eax, cr4\r
+    ret\r
+AsmReadCr4  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCr4.c b/MdePkg/Library/BaseLib/Ia32/ReadCr4.c
new file mode 100644 (file)
index 0000000..9f24fce
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCr4.c
@@ -0,0 +1,32 @@
+/** @file\r
+  AsmReadCr4 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadCr4 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    _emit  0x0f  // mov  eax, cr4\r
+    _emit  0x20\r
+    _emit  0xE0\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.S b/MdePkg/Library/BaseLib/Ia32/ReadCs.S
new file mode 100644 (file)
index 0000000..7406cfb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadCs.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadCs function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadCs)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadCs (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadCs):\r
+    movl    %cs, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.asm b/MdePkg/Library/BaseLib/Ia32/ReadCs.asm
new file mode 100644 (file)
index 0000000..68497e2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadCs.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadCs function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadCs (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadCs   PROC\r
+    mov     eax, cs\r
+    ret\r
+AsmReadCs   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadCs.c b/MdePkg/Library/BaseLib/Ia32/ReadCs.c
new file mode 100644 (file)
index 0000000..52b9a7f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadCs.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadCs function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadCs (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    xor     eax, eax\r
+    mov     ax, cs\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.S b/MdePkg/Library/BaseLib/Ia32/ReadDr0.S
new file mode 100644 (file)
index 0000000..1ba42d9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr0.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr0 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr0)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr0 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr0):\r
+    movl    %dr0, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm
new file mode 100644 (file)
index 0000000..8792ce4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr0.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr0 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr0 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr0  PROC\r
+    mov     eax, dr0\r
+    ret\r
+AsmReadDr0  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr0.c b/MdePkg/Library/BaseLib/Ia32/ReadDr0.c
new file mode 100644 (file)
index 0000000..b8ba653
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr0.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadDr0 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr0 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, dr0\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.S b/MdePkg/Library/BaseLib/Ia32/ReadDr1.S
new file mode 100644 (file)
index 0000000..4fe89da
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr1.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr1 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr1)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr1 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr1):\r
+    movl    %dr1, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm
new file mode 100644 (file)
index 0000000..e924407
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr1.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr1 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr1 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr1  PROC\r
+    mov     eax, dr1\r
+    ret\r
+AsmReadDr1  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr1.c b/MdePkg/Library/BaseLib/Ia32/ReadDr1.c
new file mode 100644 (file)
index 0000000..8820256
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr1.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadDr1 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr1 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, dr1\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.S b/MdePkg/Library/BaseLib/Ia32/ReadDr2.S
new file mode 100644 (file)
index 0000000..916fad7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr2.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr2 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr2)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr2 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr2):\r
+    movl    %dr2, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm
new file mode 100644 (file)
index 0000000..bbbef7e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr2.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr2 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr2 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr2  PROC\r
+    mov     eax, dr2\r
+    ret\r
+AsmReadDr2  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr2.c b/MdePkg/Library/BaseLib/Ia32/ReadDr2.c
new file mode 100644 (file)
index 0000000..30f8da6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr2.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadDr2 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr2 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, dr2\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.S b/MdePkg/Library/BaseLib/Ia32/ReadDr3.S
new file mode 100644 (file)
index 0000000..3505589
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr3.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr3 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr3)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr3 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr3):\r
+    movl    %dr3, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm
new file mode 100644 (file)
index 0000000..af2e7a2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr3.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr3 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr3 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr3  PROC\r
+    mov     eax, dr3\r
+    ret\r
+AsmReadDr3  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr3.c b/MdePkg/Library/BaseLib/Ia32/ReadDr3.c
new file mode 100644 (file)
index 0000000..5858419
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr3.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadDr3 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr3 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, dr3\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.S b/MdePkg/Library/BaseLib/Ia32/ReadDr4.S
new file mode 100644 (file)
index 0000000..44c56aa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr4.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr4 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr4)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr4 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr4):\r
+    movl    %dr4, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm
new file mode 100644 (file)
index 0000000..606f26f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.asm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr4.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr4 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr4 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr4  PROC\r
+    ;\r
+    ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, reading\r
+    ; this register will cause a #UD exception.\r
+    ;\r
+    ; MS assembler doesn't support this instruction since no one would use it\r
+    ; under normal circustances. Here opcode is used.\r
+    ;\r
+    DB      0fh, 21h, 0e0h\r
+    ret\r
+AsmReadDr4  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr4.c b/MdePkg/Library/BaseLib/Ia32/ReadDr4.c
new file mode 100644 (file)
index 0000000..df081aa
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr4.c
@@ -0,0 +1,32 @@
+/** @file\r
+  AsmReadDr4 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr4 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    _emit  0x0f\r
+    _emit  0x21\r
+    _emit  0xe0\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.S b/MdePkg/Library/BaseLib/Ia32/ReadDr5.S
new file mode 100644 (file)
index 0000000..3a01225
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr5.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr5 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr5)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr5 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr5):\r
+    movl    %dr5, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm
new file mode 100644 (file)
index 0000000..091792d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.asm
@@ -0,0 +1,47 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr5.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr5 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr5 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr5  PROC\r
+    ;\r
+    ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, reading\r
+    ; this register will cause a #UD exception.\r
+    ;\r
+    ; MS assembler doesn't support this instruction since no one would use it\r
+    ; under normal circustances. Here opcode is used.\r
+    ;\r
+    DB      0fh, 21h, 0e8h\r
+    ret\r
+AsmReadDr5  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr5.c b/MdePkg/Library/BaseLib/Ia32/ReadDr5.c
new file mode 100644 (file)
index 0000000..d26d1ea
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr5.c
@@ -0,0 +1,32 @@
+/** @file\r
+  AsmReadDr5 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr5 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    _emit  0x0f\r
+    _emit  0x21\r
+    _emit  0xe8\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.S b/MdePkg/Library/BaseLib/Ia32/ReadDr6.S
new file mode 100644 (file)
index 0000000..e5857b0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr6.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr6 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr6)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr6 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr6):\r
+    movl    %dr6, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm
new file mode 100644 (file)
index 0000000..479414b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr6.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr6 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr6 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr6  PROC\r
+    mov     eax, dr6\r
+    ret\r
+AsmReadDr6  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr6.c b/MdePkg/Library/BaseLib/Ia32/ReadDr6.c
new file mode 100644 (file)
index 0000000..732334d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr6.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadDr6 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr6 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, dr6\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.S b/MdePkg/Library/BaseLib/Ia32/ReadDr7.S
new file mode 100644 (file)
index 0000000..8054b96
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDr7.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDr7 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDr7)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadDr7 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDr7):\r
+    movl    %dr7, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm b/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm
new file mode 100644 (file)
index 0000000..7dee981
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDr7.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDr7 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadDr7 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDr7  PROC\r
+    mov     eax, dr7\r
+    ret\r
+AsmReadDr7  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDr7.c b/MdePkg/Library/BaseLib/Ia32/ReadDr7.c
new file mode 100644 (file)
index 0000000..b61d674
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDr7.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadDr7 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadDr7 (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    mov     eax, dr7\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.S b/MdePkg/Library/BaseLib/Ia32/ReadDs.S
new file mode 100644 (file)
index 0000000..41e6bd4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadDs.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadDs function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadDs)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadDs (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadDs):\r
+    movl    %ds, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.asm b/MdePkg/Library/BaseLib/Ia32/ReadDs.asm
new file mode 100644 (file)
index 0000000..b8edcb6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadDs.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadDs function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadDs (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadDs   PROC\r
+    mov     eax, ds\r
+    ret\r
+AsmReadDs   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadDs.c b/MdePkg/Library/BaseLib/Ia32/ReadDs.c
new file mode 100644 (file)
index 0000000..ce12d0c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadDs.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadDs function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadDs (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    xor     eax, eax\r
+    mov     ax, ds\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.S b/MdePkg/Library/BaseLib/Ia32/ReadEflags.S
new file mode 100644 (file)
index 0000000..95b2191
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadEflags.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadEflags function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadEflags)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadEflags (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadEflags):\r
+    pushfl\r
+    pop     %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm b/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm
new file mode 100644 (file)
index 0000000..32d55b3
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadEflags.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadEflags function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmReadEflags (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadEflags   PROC\r
+    pushfd\r
+    pop     eax\r
+    ret\r
+AsmReadEflags   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEflags.c b/MdePkg/Library/BaseLib/Ia32/ReadEflags.c
new file mode 100644 (file)
index 0000000..0600c66
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEflags.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadEflags function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmReadEflags (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    pushfd\r
+    pop     eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.S b/MdePkg/Library/BaseLib/Ia32/ReadEs.S
new file mode 100644 (file)
index 0000000..ed60065
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadEs.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadEs function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadEs)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadEs (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadEs):\r
+    movl    %es, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.asm b/MdePkg/Library/BaseLib/Ia32/ReadEs.asm
new file mode 100644 (file)
index 0000000..48f1417
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadEs.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadEs function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadEs (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadEs   PROC\r
+    mov     eax, es\r
+    ret\r
+AsmReadEs   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadEs.c b/MdePkg/Library/BaseLib/Ia32/ReadEs.c
new file mode 100644 (file)
index 0000000..d7780b7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadEs.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadEs function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadEs (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    xor     eax, eax\r
+    mov     ax, es\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.S b/MdePkg/Library/BaseLib/Ia32/ReadFs.S
new file mode 100644 (file)
index 0000000..19d89ef
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadFs.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadFs function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadFs)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadFs (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadFs):\r
+    movl    %fs, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.asm b/MdePkg/Library/BaseLib/Ia32/ReadFs.asm
new file mode 100644 (file)
index 0000000..ae87107
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadFs.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadFs function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadFs (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadFs   PROC\r
+    mov     eax, fs\r
+    ret\r
+AsmReadFs   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadFs.c b/MdePkg/Library/BaseLib/Ia32/ReadFs.c
new file mode 100644 (file)
index 0000000..193e907
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadFs.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadFs function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadFs (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    xor     eax, eax\r
+    mov     ax, fs\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.S b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.S
new file mode 100644 (file)
index 0000000..ba6564c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadGdtr.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86ReadGdtr function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalX86ReadGdtr)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86ReadGdtr (\r
+#   OUT IA32_DESCRIPTOR  *Gdtr\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalX86ReadGdtr):\r
+    movl    4(%esp), %eax\r
+    sgdt    (%eax)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm
new file mode 100644 (file)
index 0000000..beacb62
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadGdtr.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadGdtr function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86ReadGdtr (\r
+;   OUT IA32_DESCRIPTOR  *Gdtr\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86ReadGdtr   PROC\r
+    mov     eax, [esp + 4]\r
+    sgdt    fword ptr [eax]\r
+    ret\r
+InternalX86ReadGdtr   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c
new file mode 100644 (file)
index 0000000..3b35d26
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGdtr.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadGdtr function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+InternalX86ReadGdtr (\r
+  OUT IA32_DESCRIPTOR  *Gdtr\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Gdtr\r
+    sgdt    fword ptr [eax]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.S b/MdePkg/Library/BaseLib/Ia32/ReadGs.S
new file mode 100644 (file)
index 0000000..1862596
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadGs.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadGs function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadGs)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadGs (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadGs):\r
+    movl    %gs, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.asm b/MdePkg/Library/BaseLib/Ia32/ReadGs.asm
new file mode 100644 (file)
index 0000000..93313b8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadGs.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadGs function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadGs (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadGs   PROC\r
+    mov     eax, gs\r
+    ret\r
+AsmReadGs   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadGs.c b/MdePkg/Library/BaseLib/Ia32/ReadGs.c
new file mode 100644 (file)
index 0000000..01c191d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadGs.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadGs function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadGs (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    xor     eax, eax\r
+    mov     ax, gs\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.S b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.S
new file mode 100644 (file)
index 0000000..7880e7a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadIdtr.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86ReadIdtr function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(InternalX86ReadIdtr)\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86ReadIdtr (\r
+#   OUT IA32_DESCRIPTOR  *Idtr\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(InternalX86ReadIdtr):\r
+    movl    4(%esp), %eax\r
+    sidt    (%eax)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm
new file mode 100644 (file)
index 0000000..dc7d473
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadIdtr.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadIdtr function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86ReadIdtr (\r
+;   OUT     IA32_DESCRIPTOR           *Idtr\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86ReadIdtr PROC\r
+    mov     eax, [esp + 4]\r
+    sidt    fword ptr [eax]\r
+    ret\r
+InternalX86ReadIdtr ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c
new file mode 100644 (file)
index 0000000..0e3c25a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadIdtr.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadIdtr function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+InternalX86ReadIdtr (\r
+  OUT     IA32_DESCRIPTOR           *Idtr\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Idtr\r
+    sidt    fword ptr [eax]\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.S b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.S
new file mode 100644 (file)
index 0000000..301edbd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadLdtr.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadLdtr function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadLdtr)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadLdtr (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadLdtr):\r
+    sldt   %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm
new file mode 100644 (file)
index 0000000..449b7cf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadLdtr.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadLdtr function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadLdtr (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadLdtr PROC\r
+    sldt    ax\r
+    ret\r
+AsmReadLdtr ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c
new file mode 100644 (file)
index 0000000..df9a2b9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadLdtr.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadLdtr function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadLdtr (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    sldt    ax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.S b/MdePkg/Library/BaseLib/Ia32/ReadMm0.S
new file mode 100644 (file)
index 0000000..c6434fc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm0.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm0 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm0)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm0 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm0):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm0, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm
new file mode 100644 (file)
index 0000000..e43c45f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm0.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm0 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm0 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm0  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm0\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm0  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm0.c b/MdePkg/Library/BaseLib/Ia32/ReadMm0.c
new file mode 100644 (file)
index 0000000..8c74545
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm0.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm0 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm0 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm0\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.S b/MdePkg/Library/BaseLib/Ia32/ReadMm1.S
new file mode 100644 (file)
index 0000000..775a517
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm1.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm1 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm1)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm1 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm1):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm1, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm
new file mode 100644 (file)
index 0000000..9f92a44
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm1.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm1 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm1 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm1  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm1\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm1  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm1.c b/MdePkg/Library/BaseLib/Ia32/ReadMm1.c
new file mode 100644 (file)
index 0000000..c6721c8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm1.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm1 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm1 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm1\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.S b/MdePkg/Library/BaseLib/Ia32/ReadMm2.S
new file mode 100644 (file)
index 0000000..7c23a67
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm2.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm2 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm2)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm2 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm2):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm2, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm
new file mode 100644 (file)
index 0000000..38e4cb0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm2.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm2 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm2 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm2  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm2\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm2  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm2.c b/MdePkg/Library/BaseLib/Ia32/ReadMm2.c
new file mode 100644 (file)
index 0000000..35c0a2a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm2.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm2 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm2 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm2\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.S b/MdePkg/Library/BaseLib/Ia32/ReadMm3.S
new file mode 100644 (file)
index 0000000..ad888b1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm3.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm3 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm3)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm3 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm3):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm3, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm
new file mode 100644 (file)
index 0000000..e646762
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm3.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm3 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm3 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm3  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm3\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm3  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm3.c b/MdePkg/Library/BaseLib/Ia32/ReadMm3.c
new file mode 100644 (file)
index 0000000..fabc524
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm3.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm3 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm3 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm3\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.S b/MdePkg/Library/BaseLib/Ia32/ReadMm4.S
new file mode 100644 (file)
index 0000000..a69e914
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm4.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm4 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm4)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm4 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm4):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm4, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm
new file mode 100644 (file)
index 0000000..8da079d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm4.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm4 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm4 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm4  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm4\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm4  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm4.c b/MdePkg/Library/BaseLib/Ia32/ReadMm4.c
new file mode 100644 (file)
index 0000000..42fa902
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm4.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm4 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm4 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm4\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.S b/MdePkg/Library/BaseLib/Ia32/ReadMm5.S
new file mode 100644 (file)
index 0000000..bc047a1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm5.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm5 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm5)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm5 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm5):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm5, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm
new file mode 100644 (file)
index 0000000..9d6b474
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm5.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm5 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm5 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm5  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm5\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm5  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm5.c b/MdePkg/Library/BaseLib/Ia32/ReadMm5.c
new file mode 100644 (file)
index 0000000..c6b35f1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm5.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm5 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm5 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm5\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.S b/MdePkg/Library/BaseLib/Ia32/ReadMm6.S
new file mode 100644 (file)
index 0000000..a168717
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm6.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm6 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm6)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm6 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm6):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm6, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm
new file mode 100644 (file)
index 0000000..95c73f6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm6.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm6 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm6 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm6  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm6\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm6  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm6.c b/MdePkg/Library/BaseLib/Ia32/ReadMm6.c
new file mode 100644 (file)
index 0000000..123a0de
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm6.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm6 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm6 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm6\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.S b/MdePkg/Library/BaseLib/Ia32/ReadMm7.S
new file mode 100644 (file)
index 0000000..c273279
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.S
@@ -0,0 +1,44 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMm7.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMm7 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMm7)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmReadMm7 (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMm7):\r
+    push    %eax\r
+    push    %eax\r
+    movq    %mm7, (%esp)\r
+    pop     %eax\r
+    pop     %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm b/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm
new file mode 100644 (file)
index 0000000..0bd3b9b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.asm
@@ -0,0 +1,45 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMm7.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMm7 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMm7 (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMm7  PROC\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm7\r
+    pop     eax\r
+    pop     edx\r
+    ret\r
+AsmReadMm7  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMm7.c b/MdePkg/Library/BaseLib/Ia32/ReadMm7.c
new file mode 100644 (file)
index 0000000..5c8d87f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMm7.c
@@ -0,0 +1,35 @@
+/** @file\r
+  AsmReadMm7 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMm7 (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    push    eax\r
+    push    eax\r
+    movq    [esp], mm7\r
+    pop     eax\r
+    pop     edx\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.S b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.S
new file mode 100644 (file)
index 0000000..e0655b2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadMsr64.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadMsr64 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadMsr64)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# AsmReadMsr64 (\r
+#   IN UINT32  Index\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadMsr64):\r
+    movl    4(%esp), %ecx\r
+    rdmsr\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm
new file mode 100644 (file)
index 0000000..9a3e11c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadMsr64.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadMsr64 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadMsr64 (\r
+;   IN UINT64  Index\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadMsr64    PROC\r
+    mov     ecx, [esp + 4]\r
+    rdmsr\r
+    ret\r
+AsmReadMsr64    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c
new file mode 100644 (file)
index 0000000..94aa2c8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadMsr64.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadMsr64 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadMsr64 (\r
+  IN UINT32  Index\r
+  )\r
+{\r
+  _asm {\r
+    mov     ecx, Index\r
+    rdmsr\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.S b/MdePkg/Library/BaseLib/Ia32/ReadPmc.S
new file mode 100644 (file)
index 0000000..fd75ef4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.S
@@ -0,0 +1,41 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadPmc.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadPmc function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadPmc)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# AsmReadPmc (\r
+#   IN UINT32   PmcIndex\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadPmc):\r
+    movl    4(%esp), %ecx\r
+    rdpmc\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm b/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm
new file mode 100644 (file)
index 0000000..17156d4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadPmc.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadPmc function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadPmc (\r
+;   IN UINT32   PmcIndex\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadPmc  PROC\r
+    mov     ecx, [esp + 4]\r
+    rdpmc\r
+    ret\r
+AsmReadPmc  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadPmc.c b/MdePkg/Library/BaseLib/Ia32/ReadPmc.c
new file mode 100644 (file)
index 0000000..2bba188
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadPmc.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadPmc function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadPmc (\r
+  IN UINT32   PmcIndex\r
+  )\r
+{\r
+  _asm {\r
+    mov     ecx, PmcIndex\r
+    rdpmc\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.S b/MdePkg/Library/BaseLib/Ia32/ReadSs.S
new file mode 100644 (file)
index 0000000..752cb26
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadSs.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadSs function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadSs)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadSs (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadSs):\r
+    movl    %ss, %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.asm b/MdePkg/Library/BaseLib/Ia32/ReadSs.asm
new file mode 100644 (file)
index 0000000..4143537
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadSs.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadSs function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadSs (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadSs   PROC\r
+    mov     eax, ss\r
+    ret\r
+AsmReadSs   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadSs.c b/MdePkg/Library/BaseLib/Ia32/ReadSs.c
new file mode 100644 (file)
index 0000000..b65e1ac
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadSs.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmReadSs function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadSs (\r
+  VOID\r
+  )\r
+{\r
+  __asm {\r
+    xor     eax, eax\r
+    mov     ax, ss\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.S b/MdePkg/Library/BaseLib/Ia32/ReadTr.S
new file mode 100644 (file)
index 0000000..8b095be
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadTr.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadTr function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadTr)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT16\r
+# EFIAPI\r
+# AsmReadTr (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadTr):\r
+    str     %eax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.asm b/MdePkg/Library/BaseLib/Ia32/ReadTr.asm
new file mode 100644 (file)
index 0000000..4f4e64b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadTr.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadTr function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT16\r
+; EFIAPI\r
+; AsmReadTr (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadTr   PROC\r
+    str     ax\r
+    ret\r
+AsmReadTr   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTr.c b/MdePkg/Library/BaseLib/Ia32/ReadTr.c
new file mode 100644 (file)
index 0000000..ce192bc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTr.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadTr function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT16\r
+EFIAPI\r
+AsmReadTr (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    str     ax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.S b/MdePkg/Library/BaseLib/Ia32/ReadTsc.S
new file mode 100644 (file)
index 0000000..a4436dd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ReadTsc.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmReadTsc function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(AsmReadTsc)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# AsmReadTsc (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(AsmReadTsc):\r
+    rdtsc\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm b/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm
new file mode 100644 (file)
index 0000000..fff3829
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ReadTsc.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmReadTsc function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmReadTsc (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmReadTsc  PROC\r
+    rdtsc\r
+    ret\r
+AsmReadTsc  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/ReadTsc.c b/MdePkg/Library/BaseLib/Ia32/ReadTsc.c
new file mode 100644 (file)
index 0000000..2e16931
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/ReadTsc.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmReadTsc function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmReadTsc (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    rdtsc\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.S b/MdePkg/Library/BaseLib/Ia32/SetJump.S
new file mode 100644 (file)
index 0000000..a3a70b6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SetJump.S
@@ -0,0 +1,49 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetJump.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   Implementation of SetJump() on IA-32.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(SetJump), ASM_PFX(InternalAssertJumpBuffer)\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# SetJump (\r
+#   OUT     BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer\r
+#   );\r
+#------------------------------------------------------------------------------\r
+ASM_PFX(SetJump):\r
+    pushl   0x4(%esp)\r
+    call    ASM_PFX(InternalAssertJumpBuffer)\r
+    pop     %ecx\r
+    pop     %ecx\r
+    movl    (%esp), %edx\r
+    movl    %ebx, (%edx)\r
+    movl    %esi, 4(%edx)\r
+    movl    %edi, 8(%edx)\r
+    movl    %ebp, 12(%edx)\r
+    movl    %esp, 16(%edx)\r
+    movl    %ecx, 20(%edx)\r
+    xorl    %eax, %eax\r
+    jmp     *%ecx\r

diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.asm b/MdePkg/Library/BaseLib/Ia32/SetJump.asm
new file mode 100644 (file)
index 0000000..4b7b40c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SetJump.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetJump.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   Implementation of SetJump() on IA-32.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+InternalAssertJumpBuffer    PROTO   C\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; SetJump (\r
+;   OUT     BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer\r
+;   );\r
+;------------------------------------------------------------------------------\r
+SetJump     PROC\r
+    push    [esp + 4]\r
+    call    InternalAssertJumpBuffer    ; To validate JumpBuffer\r
+    pop     ecx\r
+    pop     ecx                         ; ecx <- return address\r
+    mov     edx, [esp]\r
+    mov     [edx], ebx\r
+    mov     [edx + 4], esi\r
+    mov     [edx + 8], edi\r
+    mov     [edx + 12], ebp\r
+    mov     [edx + 16], esp\r
+    mov     [edx + 20], ecx             ; eip value to restore in LongJump\r
+    xor     eax, eax\r
+    jmp     ecx\r
+SetJump     ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/SetJump.c b/MdePkg/Library/BaseLib/Ia32/SetJump.c
new file mode 100644 (file)
index 0000000..b96ec3a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SetJump.c
@@ -0,0 +1,49 @@
+/** @file\r
+  Implementation of SetJump() on IA-32.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+InternalAssertJumpBuffer (\r
+  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer\r
+  );\r
+\r
+_declspec (naked)\r
+UINTN\r
+EFIAPI\r
+SetJump (\r
+  OUT     BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer\r
+  )\r
+{\r
+  _asm {\r
+    push    [esp + 4]\r
+    call    InternalAssertJumpBuffer\r
+    pop     ecx\r
+    pop     ecx\r
+    mov     edx, [esp]\r
+    mov     [edx], ebx\r
+    mov     [edx + 4], esi\r
+    mov     [edx + 8], edi\r
+    mov     [edx + 12], ebp\r
+    mov     [edx + 16], esp\r
+    mov     [edx + 20], ecx\r
+    xor     eax, eax\r
+    jmp     ecx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S
new file mode 100644 (file)
index 0000000..313f416
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.S
@@ -0,0 +1,43 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CpuId.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmCpuid function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# InternalMathSwapBytes64 (\r
+#   IN      UINT64                    Operand\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(InternalMathSwapBytes64)\r
+ASM_PFX(InternalMathSwapBytes64):\r
+    movl    8(%esp), %eax\r
+    movl    4(%esp), %edx\r
+    bswapl  %eax\r
+    bswapl  %edx\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm
new file mode 100644 (file)
index 0000000..7647880
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CpuId.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmCpuid function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; InternalMathSwapBytes64 (\r
+;   IN      UINT64                    Operand\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMathSwapBytes64 PROC\r
+    mov     eax, [esp + 8]              ; eax <- upper 32 bits\r
+    mov     edx, [esp + 4]              ; edx <- lower 32 bits\r
+    bswap   eax\r
+    bswap   edx\r
+    ret\r
+InternalMathSwapBytes64 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c
new file mode 100644 (file)
index 0000000..9979b68
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/SwapBytes64.c
@@ -0,0 +1,33 @@
+/** @file\r
+  Implementation of 64-bit swap bytes\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+InternalMathSwapBytes64 (\r
+  IN      UINT64                    Operand\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, dword ptr [Operand + 4]\r
+    mov     edx, dword ptr [Operand + 0]\r
+    bswap   eax\r
+    bswap   edx\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.S b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
new file mode 100644 (file)
index 0000000..ca72d0b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
@@ -0,0 +1,205 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   Thunk16.S\r
+#\r
+# Abstract:\r
+#\r
+#   Real mode thunk\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)\r
+.globl ASM_PFX(InternalAsmThunk16)\r
+\r
+ASM_PFX(m16Start):\r
+\r
+SavedGdt:     .space  6\r
+\r
+ASM_PFX(BackFromUserCode):\r
+    push    %ss\r
+    push    %cs\r
+    .byte   0x66\r
+    call    L_Base1                     # push eip\r
+L_Base1:\r
+    pushfw                              # pushfd actually\r
+    cli                                 # disable interrupts\r
+    push    %gs\r
+    push    %fs\r
+    push    %es\r
+    push    %ds\r
+    pushaw                              # pushad actually\r
+    .byte   0x66, 0xba                  # mov edx, imm32\r
+ASM_PFX(ThunkAttr): .space  4\r
+    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
+    jz      1f\r
+    movl    $0x15cd2401, %eax           # mov ax, 2401h & int 15h\r
+    cli                                 # disable interrupts\r
+    jnc     2f\r
+1:\r
+    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl\r
+    jz      2f\r
+    inb     $0x92, %al\r
+    orb     $2, %al\r
+    outb    %al, $0x92                  # deactivate A20M#\r
+2:\r
+    movl    %ss, %eax\r
+    .byte   0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66\r
+    mov     %ebp, 0xffffffd8(%esi)\r
+    mov     0xfffffff8(%esi), %ebx\r
+    shlw    $4, %ax                     # shl eax, 4\r
+    addw    %ax, %bp                    # add ebp, eax\r
+    .byte   0x66, 0xb8                   # mov eax, imm32\r
+SavedCr4:   .space  4\r
+    movl    %eax, %cr4\r
+    lgdtw   %cs:0xfffffff2(%edi)\r
+    .byte   0x66, 0xb8                   # mov eax, imm32\r
+SavedCr0:   .space  4\r
+    movl    %eax, %cr0\r
+    .byte   0xb8                        # mov ax, imm16\r
+SavedSs:    .space  2\r
+    movl    %eax, %ss\r
+    .byte   0x66, 0xbc                   # mov esp, imm32\r
+SavedEsp:   .space  4\r
+    .byte   0x66\r
+    lret                                # return to protected mode\r
+\r
+_EntryPoint:    .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)\r
+                .word      0x8\r
+_16Idtr:        .word      0x3ff\r
+                .long      0\r
+_16Gdtr:        .word      GdtEnd - _NullSegDesc - 1\r
+_16GdtrBase:    .long      _NullSegDesc\r
+\r
+ASM_PFX(ToUserCode):\r
+    movl    %ss, %edx\r
+    movl    %ecx, %ss                   # set new segment selectors\r
+    movl    %ecx, %ds\r
+    movl    %ecx, %es\r
+    movl    %ecx, %fs\r
+    movl    %ecx, %gs\r
+    movl    %eax, %cr0\r
+    movl    %ebp, %cr4                  # real mode starts at next instruction\r
+    movl    %esi, %ss                   # set up 16-bit stack segment\r
+    xchgw   %bx, %sp                    # set up 16-bit stack pointer\r
+    .byte   0x66\r
+    call    L_Base                      # push eip\r
+L_Base:\r
+    popw    %bp                         # ebp <- offset L_Base\r
+    addr16  pushl 36(%si)\r
+    .byte   0x36\r
+    lea     0xc(%esi), %eax\r
+    push    %eax\r
+    lret\r
+\r
+L_RealMode:\r
+    mov     %edx, %cs:0xffffffc5(%esi)\r
+    mov     %bx, %cs:0xffffffcb(%esi)\r
+    lidtw   %cs:0xffffffd7(%esi)\r
+    popaw                               # popad actually\r
+    pop     %ds\r
+    pop     %es\r
+    pop     %fs\r
+    pop     %gs\r
+    popfw                               # popfd\r
+    lretw                               # transfer control to user code\r
+\r
+_NullSegDesc:   .quad   0\r
+_16CsDesc:\r
+                .word   -1\r
+                .word   0\r
+                .byte   0\r
+                .byte   0x9b\r
+                .byte   0x8f            # 16-bit segment, 4GB limit\r
+                .byte   0\r
+_16DsDesc:\r
+                .word   -1\r
+                .word   0\r
+                .byte   0\r
+                .byte   0x93\r
+                .byte   0x8f            # 16-bit segment, 4GB limit\r
+                .byte   0\r
+GdtEnd:\r
+\r
+#\r
+#   @param  RegSet  Pointer to a IA32_DWORD_REGS structure\r
+#   @param  Transition  Pointer to the transition code\r
+#   @return The address of the 16-bit stack after returning from user code\r
+#\r
+ASM_PFX(InternalAsmThunk16):\r
+    push    %ebp\r
+    push    %ebx\r
+    push    %esi\r
+    push    %edi\r
+    push    %ds\r
+    push    %es\r
+    push    %fs\r
+    push    %gs\r
+    movl    36(%esp), %esi              # esi <- RegSet\r
+    movzwl  0x32(%esi), %edx\r
+    mov     0xc(%esi), %edi\r
+    add     $0xffffffc8, %edi\r
+    movl    %edi, %ebx                  # ebx <- stack offset\r
+    imul    $0x10, %edx, %eax\r
+    push    $0xd\r
+    addl    %eax, %edi                  # edi <- linear address of 16-bit stack\r
+    pop     %ecx\r
+    rep\r
+    movsl                               # copy RegSet\r
+    movl    40(%esp), %eax              # eax <- address of transition code\r
+    movl    %edx, %esi                  # esi <- 16-bit stack segment\r
+    lea     0x5e(%eax), %edx\r
+    movl    %eax, %ecx\r
+    andl    $0xf, %ecx\r
+    shll    $12, %eax\r
+    lea     0x6(%ecx), %ecx\r
+    movw    %cx, %ax\r
+    stosl                               # [edi] <- return address of user code\r
+    sgdtl   0xffffffa2(%edx)\r
+    sidtl   0x24(%esp)\r
+    movl    %cr0, %eax\r
+    movl    %eax, (%edx)                # save CR0 in SavedCr0\r
+    andl    $0x7ffffffe, %eax           # clear PE, PG bits\r
+    movl    %cr4, %ebp\r
+    mov     %ebp, 0xfffffff1(%edx)\r
+    andl    $0x300, %ebp                # clear all but PCE and OSFXSR bits\r
+    pushl   $0x10\r
+    pop     %ecx                        # ecx <- selector for data segments\r
+    lgdtl   0x20(%edx)\r
+    pushfl\r
+    lcall   *0x14(%edx)\r
+    popfl\r
+    lidtl   0x24(%esp)\r
+    lea     0xffffffcc(%ebp), %eax\r
+       pop     %gs\r
+       pop     %fs\r
+       pop     %es\r
+       pop     %ds\r
+       pop     %edi\r
+       pop     %esi\r
+       pop     %ebx\r
+       pop     %ebp\r
+    ret\r
+\r
+    .const:\r
+\r
+ASM_PFX(m16Size):        .word      _InternalAsmThunk16 - ASM_PFX(m16Start)\r
+ASM_PFX(mThunk16Attr):   .word      _ThunkAttr          - ASM_PFX(m16Start)\r
+ASM_PFX(m16Gdt):         .word      _NullSegDesc        - ASM_PFX(m16Start)\r
+ASM_PFX(m16GdtrBase):    .word      _16GdtrBase         - ASM_PFX(m16Start)\r
+ASM_PFX(mTransition):    .word      _EntryPoint         - ASM_PFX(m16Start)\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.asm b/MdePkg/Library/BaseLib/Ia32/Thunk16.asm
new file mode 100644 (file)
index 0000000..13ff466
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.asm
@@ -0,0 +1,253 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   Thunk.asm\r
+;\r
+; Abstract:\r
+;\r
+;   Real mode thunk\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686p\r
+    .model  flat,C\r
+\r
+EXTERNDEF   C   m16Start:BYTE\r
+EXTERNDEF   C   m16Size:WORD\r
+EXTERNDEF   C   mThunk16Attr:WORD\r
+EXTERNDEF   C   m16Gdt:WORD\r
+EXTERNDEF   C   m16GdtrBase:WORD\r
+EXTERNDEF   C   mTransition:WORD\r
+\r
+;\r
+; Here is the layout of the real mode stack. _ToUserCode() is responsible for\r
+; loading all these registers from real mode stack.\r
+;\r
+IA32_REGS   STRUC   4t\r
+_EDI        DD      ?\r
+_ESI        DD      ?\r
+_EBP        DD      ?\r
+_ESP        DD      ?\r
+_EBX        DD      ?\r
+_EDX        DD      ?\r
+_ECX        DD      ?\r
+_EAX        DD      ?\r
+_DS         DW      ?\r
+_ES         DW      ?\r
+_FS         DW      ?\r
+_GS         DW      ?\r
+_EFLAGS     DD      ?\r
+_EIP        DD      ?\r
+_CS         DW      ?\r
+_SS         DW      ?\r
+IA32_REGS   ENDS\r
+\r
+    .const\r
+\r
+;\r
+; These are global constant to convey information to C code.\r
+;\r
+m16Size         DW      InternalAsmThunk16 - m16Start\r
+mThunk16Attr    DW      _ThunkAttr - m16Start\r
+m16Gdt          DW      _NullSegDesc - m16Start\r
+m16GdtrBase     DW      _16GdtrBase - m16Start\r
+mTransition     DW      _EntryPoint - m16Start\r
+\r
+    .code\r
+\r
+m16Start    LABEL   BYTE\r
+\r
+SavedGdt    LABEL   FWORD\r
+            DW      ?\r
+            DD      ?\r
+;------------------------------------------------------------------------------\r
+; _BackFromUserCode() takes control in real mode after 'retf' has been executed\r
+; by user code. It will be shadowed to somewhere in memory below 1MB.\r
+;------------------------------------------------------------------------------\r
+_BackFromUserCode   PROC\r
+    ;\r
+    ; The order of saved registers on the stack matches the order they appears\r
+    ; in IA32_REGS structure. This facilitates wrapper function to extract them\r
+    ; into that structure.\r
+    ;\r
+    push    ss\r
+    push    cs\r
+    DB      66h\r
+    call    @Base                       ; push eip\r
+@Base:\r
+    pushf                               ; pushfd actually\r
+    cli                                 ; disable interrupts\r
+    push    gs\r
+    push    fs\r
+    push    es\r
+    push    ds\r
+    pushaw                              ; pushad actually\r
+    DB      66h, 0bah                   ; mov edx, imm32\r
+_ThunkAttr  DD      ?\r
+    test    dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15\r
+    jz      @1\r
+    mov     eax, 15cd2401h              ; mov ax, 2401h & int 15h\r
+    cli                                 ; disable interrupts\r
+    jnc     @2\r
+@1:\r
+    test    dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL\r
+    jz      @2\r
+    in      al, 92h\r
+    or      al, 2\r
+    out     92h, al                     ; deactivate A20M#\r
+@2:\r
+    mov     eax, ss\r
+    DB      67h\r
+    lea     bp, [esp + sizeof (IA32_REGS)]\r
+    ;\r
+    ; esi's in the following 2 instructions are indeed bp in 16-bit code. Fact\r
+    ; is "esi" in 32-bit addressing mode has the same encoding of "bp" in 16-\r
+    ; bit addressing mode.\r
+    ;\r
+    mov     word ptr (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._ESP, bp\r
+    mov     ebx, (IA32_REGS ptr [esi - sizeof (IA32_REGS)])._EIP\r
+    shl     ax, 4                       ; shl eax, 4\r
+    add     bp, ax                      ; add ebp, eax\r
+    DB      66h, 0b8h                   ; mov eax, imm32\r
+SavedCr4    DD      ?\r
+    mov     cr4, eax\r
+    DB      66h\r
+    lgdt    fword ptr cs:[edi + (SavedGdt - @Base)]\r
+    DB      66h, 0b8h                   ; mov eax, imm32\r
+SavedCr0    DD      ?\r
+    mov     cr0, eax\r
+    DB      0b8h                        ; mov ax, imm16\r
+SavedSs     DW      ?\r
+    mov     ss, eax\r
+    DB      66h, 0bch                   ; mov esp, imm32\r
+SavedEsp    DD      ?\r
+    DB      66h\r
+    retf                                ; return to protected mode\r
+_BackFromUserCode   ENDP\r
+\r
+_EntryPoint DD      _ToUserCode - m16Start\r
+            DW      8h\r
+_16Idtr     FWORD   (1 SHL 10) - 1\r
+_16Gdtr     LABEL   FWORD\r
+            DW      GdtEnd - _NullSegDesc - 1\r
+_16GdtrBase DD      _NullSegDesc\r
+\r
+;------------------------------------------------------------------------------\r
+; _ToUserCode() takes control in real mode before passing control to user code.\r
+; It will be shadowed to somewhere in memory below 1MB.\r
+;------------------------------------------------------------------------------\r
+_ToUserCode PROC\r
+    mov     edx, ss\r
+    mov     ss, ecx                     ; set new segment selectors\r
+    mov     ds, ecx\r
+    mov     es, ecx\r
+    mov     fs, ecx\r
+    mov     gs, ecx\r
+    mov     cr0, eax\r
+    mov     cr4, ebp                    ; real mode starts at next instruction\r
+    mov     ss, esi                     ; set up 16-bit stack segment\r
+    xchg    sp, bx                      ; set up 16-bit stack pointer\r
+    DB      66h\r
+    call    @Base                       ; push eip\r
+@Base:\r
+    pop     bp                          ; ebp <- address of @Base\r
+    DB      67h                         ; address size override\r
+    push    [esp + sizeof (IA32_REGS) + 2]\r
+    lea     eax, [esi + (@RealMode - @Base)]\r
+    push    eax\r
+    retf\r
+@RealMode:\r
+    mov     cs:[esi + (SavedSs - @Base)], edx\r
+    mov     cs:[esi + (SavedEsp - @Base)], bx\r
+    DB      66h\r
+    lidt    fword ptr cs:[esi + (_16Idtr - @Base)]\r
+    popaw                               ; popad actually\r
+    pop     ds\r
+    pop     es\r
+    pop     fs\r
+    pop     gs\r
+    popf                                ; popfd\r
+    DB      66h                         ; Use 32-bit addressing for "retf" below\r
+    retf                                ; transfer control to user code\r
+_ToUserCode ENDP\r
+\r
+_NullSegDesc    DQ      0\r
+_16CsDesc       LABEL   QWORD\r
+                DW      -1\r
+                DW      0\r
+                DB      0\r
+                DB      9bh\r
+                DB      8fh             ; 16-bit segment, 4GB limit\r
+                DB      0\r
+_16DsDesc       LABEL   QWORD\r
+                DW      -1\r
+                DW      0\r
+                DB      0\r
+                DB      93h\r
+                DB      8fh             ; 16-bit segment, 4GB limit\r
+                DB      0\r
+GdtEnd          LABEL   QWORD\r
+\r
+;------------------------------------------------------------------------------\r
+; IA32_REGISTER_SET *\r
+; EFIAPI\r
+; InternalAsmThunk16 (\r
+;   IN      IA32_REGISTER_SET         *RegisterSet,\r
+;   IN OUT  VOID                      *Transition\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalAsmThunk16  PROC    USES    ebp ebx esi edi ds  es  fs  gs\r
+    mov     esi, [esp + 36]             ; esi <- RegSet, the 1st parameter\r
+    movzx   edx, (IA32_REGS ptr [esi])._SS\r
+    mov     edi, (IA32_REGS ptr [esi])._ESP\r
+    add     edi, - (sizeof (IA32_REGS) + 4) ; reserve stack space\r
+    mov     ebx, edi                    ; ebx <- stack offset\r
+    imul    eax, edx, 16                ; eax <- edx * 16\r
+    push    sizeof (IA32_REGS) / 4\r
+    add     edi, eax                    ; edi <- linear address of 16-bit stack\r
+    pop     ecx\r
+    rep     movsd                       ; copy RegSet\r
+    mov     eax, [esp + 40]             ; eax <- address of transition code\r
+    mov     esi, edx                    ; esi <- 16-bit stack segment\r
+    lea     edx, [eax + (SavedCr0 - m16Start)]\r
+    mov     ecx, eax\r
+    and     ecx, 0fh\r
+    shl     eax, 12\r
+    lea     ecx, [ecx + (_BackFromUserCode - m16Start)]\r
+    mov     ax, cx\r
+    stosd                               ; [edi] <- return address of user code\r
+    sgdt    fword ptr [edx + (SavedGdt - SavedCr0)]\r
+    sidt    fword ptr [esp + 36]        ; save IDT stack in argument space\r
+    mov     eax, cr0\r
+    mov     [edx], eax                  ; save CR0 in SavedCr0\r
+    and     eax, 7ffffffeh              ; clear PE, PG bits\r
+    mov     ebp, cr4\r
+    mov     [edx + (SavedCr4 - SavedCr0)], ebp\r
+    and     ebp, 300h                   ; clear all but PCE and OSFXSR bits\r
+    push    10h\r
+    pop     ecx                         ; ecx <- selector for data segments\r
+    lgdt    fword ptr [edx + (_16Gdtr - SavedCr0)]\r
+    pushfd                              ; Save df/if indeed\r
+    call    fword ptr [edx + (_EntryPoint - SavedCr0)]\r
+    popfd\r
+    lidt    fword ptr [esp + 36]        ; restore protected mode IDTR\r
+    lea     eax, [ebp - sizeof (IA32_REGS)] ; eax <- the address of IA32_REGS\r
+    ret\r
+InternalAsmThunk16  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.S b/MdePkg/Library/BaseLib/Ia32/Wbinvd.S
new file mode 100644 (file)
index 0000000..9c31adc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   Wbinvd.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWbinvd function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWbinvd (\r
+#   VOID\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWbinvd)\r
+ASM_PFX(AsmWbinvd):\r
+    wbinvd\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm b/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm
new file mode 100644 (file)
index 0000000..1230c89
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.asm
@@ -0,0 +1,40 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   Wbinvd.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWbinvd function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .486p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWbinvd (\r
+;   VOID\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWbinvd   PROC\r
+    wbinvd\r
+    ret\r
+AsmWbinvd   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/Wbinvd.c b/MdePkg/Library/BaseLib/Ia32/Wbinvd.c
new file mode 100644 (file)
index 0000000..60e7213
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Wbinvd.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmWbinvd function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWbinvd (\r
+  VOID\r
+  )\r
+{\r
+  _asm {\r
+    wbinvd\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.S b/MdePkg/Library/BaseLib/Ia32/WriteCr0.S
new file mode 100644 (file)
index 0000000..5cd75cf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteCr0.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteCr0 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteCr0 (\r
+#   IN      UINTN                     Cr0\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteCr0)\r
+ASM_PFX(AsmWriteCr0):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %cr0\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm
new file mode 100644 (file)
index 0000000..5eab67f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteCr0.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteCr0 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteCr0 (\r
+;   UINTN  Cr0\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteCr0 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     cr0, eax\r
+    ret\r
+AsmWriteCr0 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr0.c b/MdePkg/Library/BaseLib/Ia32/WriteCr0.c
new file mode 100644 (file)
index 0000000..9993d47
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr0.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteCr0 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteCr0 (\r
+  UINTN  Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     cr0, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.S b/MdePkg/Library/BaseLib/Ia32/WriteCr2.S
new file mode 100644 (file)
index 0000000..8128e83
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteCr2.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteCr2 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteCr2 (\r
+#   IN      UINTN                     Cr2\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteCr2)\r
+ASM_PFX(AsmWriteCr2):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %cr2\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm
new file mode 100644 (file)
index 0000000..0df8441
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteCr2.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteCr2 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteCr2 (\r
+;   UINTN  Cr2\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteCr2 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     cr2, eax\r
+    ret\r
+AsmWriteCr2 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr2.c b/MdePkg/Library/BaseLib/Ia32/WriteCr2.c
new file mode 100644 (file)
index 0000000..dcbd345
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr2.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteCr2 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteCr2 (\r
+  UINTN  Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     cr2, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.S b/MdePkg/Library/BaseLib/Ia32/WriteCr3.S
new file mode 100644 (file)
index 0000000..06f7208
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteCr3.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteCr3 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteCr3 (\r
+#   IN      UINTN                     Cr3\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteCr3)\r
+ASM_PFX(AsmWriteCr3):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %cr3\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm
new file mode 100644 (file)
index 0000000..32b05fd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteCr3.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteCr3 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteCr3 (\r
+;   UINTN  Cr3\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteCr3 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     cr3, eax\r
+    ret\r
+AsmWriteCr3 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr3.c b/MdePkg/Library/BaseLib/Ia32/WriteCr3.c
new file mode 100644 (file)
index 0000000..0a1d21e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr3.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteCr3 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteCr3 (\r
+  UINTN  Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     cr3, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.S b/MdePkg/Library/BaseLib/Ia32/WriteCr4.S
new file mode 100644 (file)
index 0000000..f748c18
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteCr4.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteCr4 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteCr4 (\r
+#   IN      UINTN                     Cr4\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteCr4)\r
+ASM_PFX(AsmWriteCr4):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %cr4\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm b/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm
new file mode 100644 (file)
index 0000000..4ed7f61
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteCr4.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteCr4 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteCr4 (\r
+;   UINTN  Cr4\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteCr4 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     cr4, eax\r
+    ret\r
+AsmWriteCr4 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteCr4.c b/MdePkg/Library/BaseLib/Ia32/WriteCr4.c
new file mode 100644 (file)
index 0000000..dcd5577
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteCr4.c
@@ -0,0 +1,33 @@
+/** @file\r
+  AsmWriteCr4 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteCr4 (\r
+  UINTN  Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    _emit  0x0f  // mov  cr4, eax\r
+    _emit  0x22\r
+    _emit  0xE0\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.S b/MdePkg/Library/BaseLib/Ia32/WriteDr0.S
new file mode 100644 (file)
index 0000000..f1fd878
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr0.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr0 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr0 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr0)\r
+ASM_PFX(AsmWriteDr0):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr0\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm
new file mode 100644 (file)
index 0000000..1bd39d5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr0.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr0 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr0 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr0 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     dr0, eax\r
+    ret\r
+AsmWriteDr0 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr0.c b/MdePkg/Library/BaseLib/Ia32/WriteDr0.c
new file mode 100644 (file)
index 0000000..0de4647
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr0.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteDr0 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr0 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     dr0, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.S b/MdePkg/Library/BaseLib/Ia32/WriteDr1.S
new file mode 100644 (file)
index 0000000..291e637
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr1.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr1 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr1 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr1)\r
+ASM_PFX(AsmWriteDr1):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr1\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm
new file mode 100644 (file)
index 0000000..542125b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr1.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr1 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr1 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr1 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     dr1, eax\r
+    ret\r
+AsmWriteDr1 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr1.c b/MdePkg/Library/BaseLib/Ia32/WriteDr1.c
new file mode 100644 (file)
index 0000000..b6634e2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr1.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteDr1 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr1 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     dr1, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.S b/MdePkg/Library/BaseLib/Ia32/WriteDr2.S
new file mode 100644 (file)
index 0000000..6b6a50a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr2.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr2 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr2 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr2)\r
+ASM_PFX(AsmWriteDr2):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr2\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm
new file mode 100644 (file)
index 0000000..7638bab
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr2.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr2 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr2 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr2 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     dr2, eax\r
+    ret\r
+AsmWriteDr2 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr2.c b/MdePkg/Library/BaseLib/Ia32/WriteDr2.c
new file mode 100644 (file)
index 0000000..2d36649
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr2.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteDr2 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr2 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     dr2, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.S b/MdePkg/Library/BaseLib/Ia32/WriteDr3.S
new file mode 100644 (file)
index 0000000..4201c4a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr3.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr3 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr3 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr3)\r
+ASM_PFX(AsmWriteDr3):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr3\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm
new file mode 100644 (file)
index 0000000..69a17b4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr3.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr3 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr3 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr3 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     dr3, eax\r
+    ret\r
+AsmWriteDr3 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr3.c b/MdePkg/Library/BaseLib/Ia32/WriteDr3.c
new file mode 100644 (file)
index 0000000..ffba939
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr3.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteDr3 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr3 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     dr3, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.S b/MdePkg/Library/BaseLib/Ia32/WriteDr4.S
new file mode 100644 (file)
index 0000000..ef76bdd
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr4.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr4 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr4 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr4)\r
+ASM_PFX(AsmWriteDr4):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr4\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm
new file mode 100644 (file)
index 0000000..9c10305
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr4.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr4 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr4 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr4 PROC\r
+    mov     eax, [esp + 4]\r
+    ;\r
+    ; DR4 is alias to DR6 only if DE (in CR4) is cleared. Otherwise, writing to\r
+    ; this register will cause a #UD exception.\r
+    ;\r
+    ; MS assembler doesn't support this instruction since no one would use it\r
+    ; under normal circustances. Here opcode is used.\r
+    ;\r
+    DB      0fh, 23h, 0e0h\r
+    ret\r
+AsmWriteDr4 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr4.c b/MdePkg/Library/BaseLib/Ia32/WriteDr4.c
new file mode 100644 (file)
index 0000000..adc9005
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr4.c
@@ -0,0 +1,33 @@
+/** @file\r
+  AsmWriteDr4 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr4 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    _emit   0x0f         // mov dr4, eax\r
+    _emit   0x23\r
+    _emit   0xe0\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.S b/MdePkg/Library/BaseLib/Ia32/WriteDr5.S
new file mode 100644 (file)
index 0000000..f10b56e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr5.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr5 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr5 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr5)\r
+ASM_PFX(AsmWriteDr5):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr5\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm
new file mode 100644 (file)
index 0000000..e10434e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.asm
@@ -0,0 +1,48 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr5.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr5 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr5 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr5 PROC\r
+    mov     eax, [esp + 4]\r
+    ;\r
+    ; DR5 is alias to DR7 only if DE (in CR4) is cleared. Otherwise, writing to\r
+    ; this register will cause a #UD exception.\r
+    ;\r
+    ; MS assembler doesn't support this instruction since no one would use it\r
+    ; under normal circustances. Here opcode is used.\r
+    ;\r
+    DB      0fh, 23h, 0e8h\r
+    ret\r
+AsmWriteDr5 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr5.c b/MdePkg/Library/BaseLib/Ia32/WriteDr5.c
new file mode 100644 (file)
index 0000000..0798d25
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr5.c
@@ -0,0 +1,33 @@
+/** @file\r
+  AsmWriteDr5 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr5 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    _emit   0x0f         // mov dr5, eax\r
+    _emit   0x23\r
+    _emit   0xe8\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.S b/MdePkg/Library/BaseLib/Ia32/WriteDr6.S
new file mode 100644 (file)
index 0000000..1cdd816
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr6.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr6 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr6 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr6)\r
+ASM_PFX(AsmWriteDr6):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr6\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm
new file mode 100644 (file)
index 0000000..4e5acf5
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr6.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr6 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr6 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr6 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     dr6, eax\r
+    ret\r
+AsmWriteDr6 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr6.c b/MdePkg/Library/BaseLib/Ia32/WriteDr6.c
new file mode 100644 (file)
index 0000000..dcf5e3a
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr6.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteDr6 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr6 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     dr6, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.S b/MdePkg/Library/BaseLib/Ia32/WriteDr7.S
new file mode 100644 (file)
index 0000000..ce1e29b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteDr7.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteDr7 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINTN\r
+# EFIAPI\r
+# AsmWriteDr7 (\r
+#   IN UINTN Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteDr7)\r
+ASM_PFX(AsmWriteDr7):\r
+    movl    4(%esp), %eax\r
+    movl    %eax, %dr7\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm b/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm
new file mode 100644 (file)
index 0000000..10e83d6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteDr7.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteDr7 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINTN\r
+; EFIAPI\r
+; AsmWriteDr7 (\r
+;   IN UINTN Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteDr7 PROC\r
+    mov     eax, [esp + 4]\r
+    mov     dr7, eax\r
+    ret\r
+AsmWriteDr7 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteDr7.c b/MdePkg/Library/BaseLib/Ia32/WriteDr7.c
new file mode 100644 (file)
index 0000000..e53eccb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteDr7.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteDr7 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINTN\r
+EFIAPI\r
+AsmWriteDr7 (\r
+  IN UINTN Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Value\r
+    mov     dr7, eax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.S b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.S
new file mode 100644 (file)
index 0000000..07ec92e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteGdtr.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86WriteGdtr function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86WriteGdtr (\r
+#   OUT IA32_DESCRIPTOR  *Gdtr\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(InternalX86WriteGdtr)\r
+ASM_PFX(InternalX86WriteGdtr):\r
+    movl    4(%esp), %eax\r
+    lgdt    (%eax)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm
new file mode 100644 (file)
index 0000000..f1c7a92
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteGdtr.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteGdtr function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86WriteGdtr (\r
+;   IN      CONST IA32_DESCRIPTOR     *Idtr\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86WriteGdtr  PROC\r
+    mov     eax, [esp + 4]\r
+    lgdt    fword ptr [eax]\r
+    ret\r
+InternalX86WriteGdtr  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c
new file mode 100644 (file)
index 0000000..0664908
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteGdtr.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteGdtr function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+InternalX86WriteGdtr (\r
+  IN      CONST IA32_DESCRIPTOR     *Gdtr\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Gdtr\r
+    lgdt    fword ptr [eax]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.S b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.S
new file mode 100644 (file)
index 0000000..739edde
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteIdtr.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   InternalX86WriteIdtr function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# InternalX86WriteIdtr (\r
+#   OUT IA32_DESCRIPTOR  *Idtr\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(InternalX86WriteIdtr)\r
+ASM_PFX(InternalX86WriteIdtr):\r
+    movl    4(%esp), %eax\r
+    lidt    (%eax)\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm
new file mode 100644 (file)
index 0000000..65fca40
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteIdtr.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteIdtr function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; InternalX86WriteIdtr (\r
+;   IN      CONST IA32_DESCRIPTOR     *Idtr\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalX86WriteIdtr  PROC\r
+    mov     eax, [esp + 4]\r
+    lidt    fword ptr [eax]\r
+    ret\r
+InternalX86WriteIdtr  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c
new file mode 100644 (file)
index 0000000..f642241
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteIdtr.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteIdtr function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+InternalX86WriteIdtr (\r
+  IN      CONST IA32_DESCRIPTOR     *Idtr\r
+  )\r
+{\r
+  _asm {\r
+    mov     eax, Idtr\r
+    lidt    fword ptr [eax]\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.S b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.S
new file mode 100644 (file)
index 0000000..1bb4678
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.S
@@ -0,0 +1,40 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteLdtr.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteLdtr function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteLdtr (\r
+#   IN UINT16 Ldtr\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteLdtr)\r
+ASM_PFX(AsmWriteLdtr):\r
+    movl    4(%esp), %eax\r
+    lldtw   %ax\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm
new file mode 100644 (file)
index 0000000..39f8b2e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteLdtr.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteLdtr function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386p\r
+    .model  flat\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteLdtr (\r
+;   IN UINT16 Ldtr\r
+;   );\r
+;------------------------------------------------------------------------------\r
+_AsmWriteLdtr   PROC\r
+    mov     eax, [esp + 4]\r
+    lldt    ax\r
+    ret\r
+_AsmWriteLdtr   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c
new file mode 100644 (file)
index 0000000..e8ca575
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteLdtr.c
@@ -0,0 +1,32 @@
+/** @file\r
+  AsmWriteLdtr function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteLdtr (\r
+  IN UINT16 Ldtr\r
+  )\r
+{\r
+  _asm {\r
+    xor     eax, eax\r
+    mov     ax, Ldtr\r
+    lldt    ax\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.S b/MdePkg/Library/BaseLib/Ia32/WriteMm0.S
new file mode 100644 (file)
index 0000000..87a2816
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm0.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm0 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm0 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm0)\r
+ASM_PFX(AsmWriteMm0):\r
+    movq    4(%esp), %mm0\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm
new file mode 100644 (file)
index 0000000..15912f6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm0.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm0 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm0 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm0 PROC\r
+    movq    mm0, [esp + 4]\r
+    ret\r
+AsmWriteMm0 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm0.c b/MdePkg/Library/BaseLib/Ia32/WriteMm0.c
new file mode 100644 (file)
index 0000000..b59335e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm0.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteMm0 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm0 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm0, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.S b/MdePkg/Library/BaseLib/Ia32/WriteMm1.S
new file mode 100644 (file)
index 0000000..05182fb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm1.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm1 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm1 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm1)\r
+ASM_PFX(AsmWriteMm1):\r
+    movq    4(%esp), %mm1\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm
new file mode 100644 (file)
index 0000000..097e760
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm1.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm1 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm1 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm1 PROC\r
+    movq    mm1, [esp + 4]\r
+    ret\r
+AsmWriteMm1 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm1.c b/MdePkg/Library/BaseLib/Ia32/WriteMm1.c
new file mode 100644 (file)
index 0000000..39bfa6d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm1.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteMm1 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm1 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm1, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.S b/MdePkg/Library/BaseLib/Ia32/WriteMm2.S
new file mode 100644 (file)
index 0000000..c34cecc
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm2.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm2 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm2 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm2)\r
+ASM_PFX(AsmWriteMm2):\r
+    movq    4(%esp), %mm2\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm
new file mode 100644 (file)
index 0000000..fea7081
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm2.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm2 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm2 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm2 PROC\r
+    movq    mm2, [esp + 4]\r
+    ret\r
+AsmWriteMm2 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm2.c b/MdePkg/Library/BaseLib/Ia32/WriteMm2.c
new file mode 100644 (file)
index 0000000..f997207
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm2.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteMm2 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm2 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm2, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.S b/MdePkg/Library/BaseLib/Ia32/WriteMm3.S
new file mode 100644 (file)
index 0000000..01250e8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm3.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm3.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm3 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm3 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm3)\r
+ASM_PFX(AsmWriteMm3):\r
+    movq    4(%esp), %mm3\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm
new file mode 100644 (file)
index 0000000..1af2490
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm3.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm3.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm3 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm3 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm3 PROC\r
+    movq    mm3, [esp + 4]\r
+    ret\r
+AsmWriteMm3 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm3.c b/MdePkg/Library/BaseLib/Ia32/WriteMm3.c
new file mode 100644 (file)
index 0000000..39a401f
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm3.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteMm3 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm3 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm3, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm4.S b/MdePkg/Library/BaseLib/Ia32/WriteMm4.S
new file mode 100644 (file)
index 0000000..cc6ec7d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm4.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm4.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm4 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm4 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm4)\r
+ASM_PFX(AsmWriteMm4):\r
+    movq    4(%esp), %mm4\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm4.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm4.asm
new file mode 100644 (file)
index 0000000..2cf9da0
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm4.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm4.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm4 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm4 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm4 PROC\r
+    movq    mm4, [esp + 4]\r
+    ret\r
+AsmWriteMm4 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm4.c b/MdePkg/Library/BaseLib/Ia32/WriteMm4.c
new file mode 100644 (file)
index 0000000..1c31d6b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm4.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmWriteMm4 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm4 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm4, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm5.S b/MdePkg/Library/BaseLib/Ia32/WriteMm5.S
new file mode 100644 (file)
index 0000000..b090961
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm5.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm5.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm5 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm5 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm5)\r
+ASM_PFX(AsmWriteMm5):\r
+    movq    4(%esp), %mm5\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm5.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm5.asm
new file mode 100644 (file)
index 0000000..9c9882e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm5.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm5.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm5 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm5 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm5 PROC\r
+    movq    mm5, [esp + 4]\r
+    ret\r
+AsmWriteMm5 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm5.c b/MdePkg/Library/BaseLib/Ia32/WriteMm5.c
new file mode 100644 (file)
index 0000000..48e2eb2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm5.c
@@ -0,0 +1,30 @@
+/** @file\r
+  AsmWriteMm5 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm5 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm5, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm6.S b/MdePkg/Library/BaseLib/Ia32/WriteMm6.S
new file mode 100644 (file)
index 0000000..6d657c6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm6.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm6.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm6 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm6 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm6)\r
+ASM_PFX(AsmWriteMm6):\r
+    movq    4(%esp), %mm6\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm6.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm6.asm
new file mode 100644 (file)
index 0000000..5e0cfad
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm6.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm6.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm6 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm6 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm6 PROC\r
+    movq    mm6, [esp + 4]\r
+    ret\r
+AsmWriteMm6 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm6.c b/MdePkg/Library/BaseLib/Ia32/WriteMm6.c
new file mode 100644 (file)
index 0000000..7a038a4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm6.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteMm6 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm6 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm6, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm7.S b/MdePkg/Library/BaseLib/Ia32/WriteMm7.S
new file mode 100644 (file)
index 0000000..52c599c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm7.S
@@ -0,0 +1,39 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMm7.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMm7 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# EFIAPI\r
+# AsmWriteMm7 (\r
+#   IN UINT64   Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMm7)\r
+ASM_PFX(AsmWriteMm7):\r
+    movq    4(%esp), %mm7\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm7.asm b/MdePkg/Library/BaseLib/Ia32/WriteMm7.asm
new file mode 100644 (file)
index 0000000..faaa23b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm7.asm
@@ -0,0 +1,41 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMm7.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMm7 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586\r
+    .model  flat,C\r
+    .mmx\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; AsmWriteMm7 (\r
+;   IN UINT64   Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMm7 PROC\r
+    movq    mm7, [esp + 4]\r
+    ret\r
+AsmWriteMm7 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMm7.c b/MdePkg/Library/BaseLib/Ia32/WriteMm7.c
new file mode 100644 (file)
index 0000000..044f68c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMm7.c
@@ -0,0 +1,31 @@
+/** @file\r
+  AsmWriteMm7 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+VOID\r
+EFIAPI\r
+AsmWriteMm7 (\r
+  IN UINT64   Value\r
+  )\r
+{\r
+  _asm {\r
+    movq    mm7, qword ptr [Value]\r
+    emms\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMsr64.S b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.S
new file mode 100644 (file)
index 0000000..f310e88
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.S
@@ -0,0 +1,43 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   WriteMsr64.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   AsmWriteMsr64 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#------------------------------------------------------------------------------\r
+# UINT64\r
+# EFIAPI\r
+# AsmWriteMsr64 (\r
+#   IN UINT32  Index,\r
+#   IN UINT64  Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+.globl ASM_PFX(AsmWriteMsr64)\r
+ASM_PFX(AsmWriteMsr64):\r
+    movl    12(%esp), %edx\r
+    movl    8(%esp), %eax\r
+    movl    4(%esp), %ecx\r
+    wrmsr\r
+    ret\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm
new file mode 100644 (file)
index 0000000..14edba6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.asm
@@ -0,0 +1,44 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   WriteMsr64.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   AsmWriteMsr64 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586p\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; UINT64\r
+; EFIAPI\r
+; AsmWriteMsr64 (\r
+;   IN UINT32  Index,\r
+;   IN UINT64  Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+AsmWriteMsr64   PROC\r
+    mov     edx, [esp + 12]\r
+    mov     eax, [esp + 8]\r
+    mov     ecx, [esp + 4]\r
+    wrmsr\r
+    ret\r
+AsmWriteMsr64   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseLib/Ia32/WriteMsr64.c b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.c
new file mode 100644 (file)
index 0000000..1e909d1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/WriteMsr64.c
@@ -0,0 +1,34 @@
+/** @file\r
+  AsmWriteMsr64 function\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+UINT64\r
+EFIAPI\r
+AsmWriteMsr64 (\r
+  IN UINT32  Index,\r
+  IN UINT64  Value\r
+  )\r
+{\r
+  _asm {\r
+    mov     edx, dword ptr [Value + 4]\r
+    mov     eax, dword ptr [Value + 0]\r
+    mov     ecx, Index\r
+    wrmsr\r
+  }\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseLib/LRotU32.c b/MdePkg/Library/BaseLib/LRotU32.c
new file mode 100644 (file)
index 0000000..ad1714d
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LRotU32.c
@@ -0,0 +1,47 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r
+  with the high bits that were rotated.\r
+\r
+  This function rotates the 32-bit value Operand to the left by Count bits. The\r
+  low Count bits are fill with the high Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  If Count is greater than 31, then ASSERT().\r
+\r
+  @param  Operand The 32-bit operand to rotate left.\r
+  @param  Count   The number of bits to rotate left.\r
+\r
+  @return Operand <<< Count\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+LRotU32 (\r
+  IN      UINT32                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  ASSERT (Count < sizeof (Operand) * 8);\r
+  return (Operand << Count) | (Operand >> (32 - Count));\r
+}\r

diff --git a/MdePkg/Library/BaseLib/LRotU64.c b/MdePkg/Library/BaseLib/LRotU64.c
new file mode 100644 (file)
index 0000000..65269a9
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LRotU64.c
@@ -0,0 +1,47 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r
+  with the high bits that were rotated.\r
+\r
+  This function rotates the 64-bit value Operand to the left by Count bits. The\r
+  low Count bits are fill with the high Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  If Count is greater than 63, then ASSERT().\r
+\r
+  @param  Operand The 64-bit operand to rotate left.\r
+  @param  Count   The number of bits to rotate left.\r
+\r
+  @return Operand <<< Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+LRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  ASSERT (Count < sizeof (Operand) * 8);\r
+  return InternalMathLRotU64 (Operand, Count);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/LShiftU64.c b/MdePkg/Library/BaseLib/LShiftU64.c
new file mode 100644 (file)
index 0000000..8142caf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LShiftU64.c
@@ -0,0 +1,46 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r
+  with zeros. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the left by Count bits. The\r
+  low Count bits are set to zero. The shifted value is returned.\r
+\r
+  If Count is greater than 63, then ASSERT().\r
+\r
+  @param  Operand The 64-bit operand to shift left.\r
+  @param  Count   The number of bits to shift left.\r
+\r
+  @return Operand << Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+LShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  ASSERT (Count < sizeof (Operand) * 8);\r
+  return InternalMathLShiftU64 (Operand, Count);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/LinkedList.c b/MdePkg/Library/BaseLib/LinkedList.c
new file mode 100644 (file)
index 0000000..3cbc044
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LinkedList.c
@@ -0,0 +1,470 @@
+/** @file\r
+  Linked List Library Functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  LinkedList.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Worker function that locates the Node in the List\r
+\r
+  By searching the List, finds the location of the Node in List. At the same time,\r
+  verifies the validity of this list.\r
+\r
+  If List is NULL, then ASSERT().\r
+  If List->ForwardLink is NULL, then ASSERT().\r
+  If List->backLink is NULL, then ASSERT().\r
+  If Node is NULL, then ASSERT();\r
+  If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
+  of nodes in ListHead, including the ListHead node, is greater than or\r
+  equal to PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  List  A pointer to a node in a linked list.\r
+  @param  Node  A pointer to one nod.\r
+\r
+  @retval TRUE   Node is in List\r
+  @retval FALSE  Node isn't in List, or List is invalid\r
+\r
+**/\r
+BOOLEAN\r
+IsNodeInList (\r
+  IN      CONST LIST_ENTRY      *List,\r
+  IN      CONST LIST_ENTRY      *Node\r
+  )\r
+{\r
+  UINTN                         Count;\r
+  CONST LIST_ENTRY              *Ptr;\r
+  BOOLEAN                       Found;\r
+\r
+  //\r
+  // Test the validity of List and Node\r
+  //\r
+  ASSERT (List != NULL);\r
+  ASSERT (List->ForwardLink != NULL);\r
+  ASSERT (List->BackLink != NULL);\r
+  ASSERT (Node != NULL);\r
+\r
+  Count = PcdGet32 (PcdMaximumLinkedListLength);\r
+\r
+  Ptr = List;\r
+  do {\r
+    Ptr = Ptr->ForwardLink;\r
+    Count--;\r
+  } while ((Ptr != List) && (Ptr != Node) && (Count > 0));\r
+  Found = (BOOLEAN)(Ptr == Node);\r
+\r
+  if (PcdGet32 (PcdMaximumLinkedListLength) > 0) {\r
+    while ((Count > 0) && (Ptr != List)) {\r
+      Ptr = Ptr->ForwardLink;\r
+      Count--;\r
+    }\r
+    ASSERT (Count > 0);\r
+  }\r
+\r
+  return Found;\r
+}\r
+\r
+/**\r
+  Initializes the head node of a doubly linked list, and returns the pointer to\r
+  the head node of the doubly linked list.\r
+\r
+  Initializes the forward and backward links of a new linked list. After\r
+  initializing a linked list with this function, the other linked list\r
+  functions may be used to add and remove nodes from the linked list. It is up\r
+  to the caller of this function to allocate the memory for ListHead.\r
+\r
+  If ListHead is NULL, then ASSERT().\r
+\r
+  @param  ListHead  A pointer to the head node of a new doubly linked list.\r
+\r
+  @return ListHead\r
+\r
+**/\r
+LIST_ENTRY *\r
+EFIAPI\r
+InitializeListHead (\r
+  IN OUT  LIST_ENTRY            *List\r
+  )\r
+\r
+{\r
+  ASSERT (List != NULL);\r
+\r
+  List->ForwardLink = List;\r
+  List->BackLink = List;\r
+  return List;\r
+}\r
+\r
+/**\r
+  Adds a node to the beginning of a doubly linked list, and returns the pointer\r
+  to the head node of the doubly linked list.\r
+\r
+  Adds the node Entry at the beginning of the doubly linked list denoted by\r
+  ListHead, and returns ListHead.\r
+\r
+  If ListHead is NULL, then ASSERT().\r
+  If Entry is NULL, then ASSERT().\r
+  If ListHead was not initialized with InitializeListHead(), then ASSERT().\r
+  If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
+  of nodes in ListHead, including the ListHead node, is greater than or\r
+  equal to PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  ListHead  A pointer to the head node of a doubly linked list.\r
+  @param  Entry     A pointer to a node that is to be inserted at the beginning\r
+                    of a doubly linked list.\r
+\r
+  @return ListHead\r
+\r
+**/\r
+LIST_ENTRY *\r
+EFIAPI\r
+InsertHeadList (\r
+  IN OUT  LIST_ENTRY            *List,\r
+  IN OUT  LIST_ENTRY            *Entry\r
+  )\r
+{\r
+  //\r
+  // ASSERT List not too long and Entry is not one of the nodes of List\r
+  //\r
+  ASSERT (!IsNodeInList (List, Entry));\r
+\r
+  Entry->ForwardLink = List->ForwardLink;\r
+  Entry->BackLink = List;\r
+  Entry->ForwardLink->BackLink = Entry;\r
+  List->ForwardLink = Entry;\r
+  return List;\r
+}\r
+\r
+/**\r
+  Adds a node to the end of a doubly linked list, and returns the pointer to\r
+  the head node of the doubly linked list.\r
+\r
+  Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r
+  and returns ListHead.\r
+\r
+  If ListHead is NULL, then ASSERT().\r
+  If Entry is NULL, then ASSERT().\r
+  If ListHead was not initialized with InitializeListHead(), then ASSERT().\r
+  If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
+  of nodes in ListHead, including the ListHead node, is greater than or\r
+  equal to PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  ListHead  A pointer to the head node of a doubly linked list.\r
+  @param  Entry     A pointer to a node that is to be added at the end of the\r
+                    doubly linked list.\r
+\r
+  @return ListHead\r
+\r
+**/\r
+LIST_ENTRY *\r
+EFIAPI\r
+InsertTailList (\r
+  IN OUT  LIST_ENTRY            *List,\r
+  IN OUT  LIST_ENTRY            *Entry\r
+  )\r
+{\r
+  //\r
+  // ASSERT List not too long and Entry is not one of the nodes of List\r
+  //\r
+  ASSERT (!IsNodeInList (List, Entry));\r
+\r
+  Entry->ForwardLink = List;\r
+  Entry->BackLink = List->BackLink;\r
+  Entry->BackLink->ForwardLink = Entry;\r
+  List->BackLink = Entry;\r
+  return List;\r
+}\r
+\r
+/**\r
+  Retrieves the first node of a doubly linked list.\r
+\r
+  Returns the first node of a doubly linked list. List must have been\r
+  initialized with InitializeListHead(). If List is empty, then NULL is\r
+  returned.\r
+\r
+  If List is NULL, then ASSERT().\r
+  If List was not initialized with InitializeListHead(), then ASSERT().\r
+  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
+  in List, including the List node, is greater than or equal to\r
+  PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  List  A pointer to the head node of a doubly linked list.\r
+\r
+  @return The first node of a doubly linked list.\r
+  @retval NULL  The list is empty.\r
+\r
+**/\r
+LIST_ENTRY *\r
+EFIAPI\r
+GetFirstNode (\r
+  IN CONST LIST_ENTRY  *List\r
+  )\r
+{\r
+  //\r
+  // ASSERT List not too long\r
+  //\r
+  ASSERT (IsNodeInList (List, List));\r
+\r
+  return List->ForwardLink;\r
+}\r
+\r
+/**\r
+  Retrieves the next node of a doubly linked list.\r
+\r
+  Returns the node of a doubly linked list that follows Node. List must have\r
+  been initialized with InitializeListHead(). If List is empty, then List is\r
+  returned.\r
+\r
+  If List is NULL, then ASSERT().\r
+  If Node is NULL, then ASSERT().\r
+  If List was not initialized with InitializeListHead(), then ASSERT().\r
+  If PcdMaximumLinkedListLenth is not zero, and List contains more than\r
+  PcdMaximumLinkedListLenth nodes, then ASSERT().\r
+  If Node is not a node in List, then ASSERT().\r
+\r
+  @param  List  A pointer to the head node of a doubly linked list.\r
+  @param  Node  A pointer to a node in the doubly linked list.\r
+\r
+  @return Pointer to the next node if one exists. Otherwise a null value which\r
+          is actually List is returned.\r
+\r
+**/\r
+LIST_ENTRY *\r
+EFIAPI\r
+GetNextNode (\r
+  IN CONST LIST_ENTRY  *List,\r
+  IN CONST LIST_ENTRY  *Node\r
+  )\r
+{\r
+  //\r
+  // ASSERT List not too long and Node is one of the nodes of List\r
+  //\r
+  ASSERT (IsNodeInList (List, Node));\r
+\r
+  return Node->ForwardLink;\r
+}\r
+\r
+/**\r
+  Checks to see if a doubly linked list is empty or not.\r
+\r
+  Checks to see if the doubly linked list is empty. If the linked list contains\r
+  zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r
+\r
+  If ListHead is NULL, then ASSERT().\r
+  If ListHead was not initialized with InitializeListHead(), then ASSERT().\r
+  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
+  in List, including the List node, is greater than or equal to\r
+  PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  ListHead  A pointer to the head node of a doubly linked list.\r
+\r
+  @retval TRUE  The linked list is empty.\r
+  @retval FALSE The linked list is not empty.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+IsListEmpty (\r
+  IN      CONST LIST_ENTRY      *List\r
+  )\r
+{\r
+  //\r
+  // ASSERT List not too long\r
+  //\r
+  ASSERT (IsNodeInList (List, List));\r
+\r
+  return (BOOLEAN)(List->ForwardLink == List);\r
+}\r
+\r
+/**\r
+  Determines if a node in a doubly linked list is null.\r
+\r
+  Returns FALSE if Node is one of the nodes in the doubly linked list specified\r
+  by List. Otherwise, TRUE is returned. List must have been initialized with\r
+  InitializeListHead().\r
+\r
+  If List is NULL, then ASSERT().\r
+  If Node is NULL, then ASSERT().\r
+  If List was not initialized with InitializeListHead(), then ASSERT().\r
+  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
+  in List, including the List node, is greater than or equal to\r
+  PcdMaximumLinkedListLength, then ASSERT().\r
+  If Node is not a node in List and Node is not equal to List, then ASSERT().\r
+\r
+  @param  List  A pointer to the head node of a doubly linked list.\r
+  @param  Node  A pointer to a node in the doubly linked list.\r
+\r
+  @retval TRUE  Node is one of the nodes in the doubly linked list.\r
+  @retval FALSE Node is not one of the nodes in the doubly linked list.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+IsNull (\r
+  IN      CONST LIST_ENTRY      *List,\r
+  IN      CONST LIST_ENTRY      *Node\r
+  )\r
+{\r
+  //\r
+  // ASSERT List not too long and Node is one of the nodes of List\r
+  //\r
+  ASSERT (IsNodeInList (List, Node));\r
+\r
+  return (BOOLEAN)(Node == List);\r
+}\r
+\r
+/**\r
+  Determines if a node the last node in a doubly linked list.\r
+\r
+  Returns TRUE if Node is the last node in the doubly linked list specified by\r
+  List. Otherwise, FALSE is returned. List must have been initialized with\r
+  InitializeListHead().\r
+\r
+  If List is NULL, then ASSERT().\r
+  If Node is NULL, then ASSERT().\r
+  If List was not initialized with InitializeListHead(), then ASSERT().\r
+  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
+  in List, including the List node, is greater than or equal to\r
+  PcdMaximumLinkedListLength, then ASSERT().\r
+  If Node is not a node in List, then ASSERT().\r
+\r
+  @param  List  A pointer to the head node of a doubly linked list.\r
+  @param  Node  A pointer to a node in the doubly linked list.\r
+\r
+  @retval TRUE  Node is the last node in the linked list.\r
+  @retval FALSE Node is not the last node in the linked list.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+IsNodeAtEnd (\r
+  IN      CONST LIST_ENTRY      *List,\r
+  IN      CONST LIST_ENTRY      *Node\r
+  )\r
+{\r
+  //\r
+  // ASSERT List not too long and Node is one of the nodes of List\r
+  //\r
+  ASSERT (IsNodeInList (List, Node));\r
+\r
+  return (BOOLEAN)(!IsNull (List, Node) && List->BackLink == Node);\r
+}\r
+\r
+/**\r
+  Swaps the location of two nodes in a doubly linked list, and returns the\r
+  first node after the swap.\r
+\r
+  If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r
+  Otherwise, the location of the FirstEntry node is swapped with the location\r
+  of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r
+  same double linked list as FirstEntry and that double linked list must have\r
+  been initialized with InitializeListHead(). SecondEntry is returned after the\r
+  nodes are swapped.\r
+\r
+  If FirstEntry is NULL, then ASSERT().\r
+  If SecondEntry is NULL, then ASSERT().\r
+  If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r
+  If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
+  linked list containing the FirstEntry and SecondEntry nodes, including\r
+  the FirstEntry and SecondEntry nodes, is greater than or equal to\r
+  PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  FirstEntry  A pointer to a node in a linked list.\r
+  @param  SecondEntry A pointer to another node in the same linked list.\r
+\r
+**/\r
+LIST_ENTRY *\r
+EFIAPI\r
+SwapListEntries (\r
+  IN OUT  LIST_ENTRY            *FirstEntry,\r
+  IN OUT  LIST_ENTRY            *SecondEntry\r
+  )\r
+{\r
+  LIST_ENTRY                    *Ptr;\r
+\r
+  if (FirstEntry == SecondEntry) {\r
+    return SecondEntry;\r
+  }\r
+\r
+  //\r
+  // ASSERT Entry1 and Entry2 are in the same linked list\r
+  //\r
+  ASSERT (IsNodeInList (FirstEntry, SecondEntry));\r
+\r
+  //\r
+  // Ptr is the node pointed to by FirstEntry->ForwardLink\r
+  //\r
+  Ptr = RemoveEntryList (FirstEntry);\r
+\r
+  //\r
+  // If FirstEntry immediately follows SecondEntry, FirstEntry willl be placed\r
+  // immediately in front of SecondEntry\r
+  //\r
+  if (Ptr->BackLink == SecondEntry) {\r
+    return InsertTailList (SecondEntry, FirstEntry);\r
+  }\r
+\r
+  //\r
+  // Ptr == SecondEntry means SecondEntry immediately follows FirstEntry,\r
+  // then there are no further steps necessary\r
+  //\r
+  if (Ptr == InsertHeadList (SecondEntry, FirstEntry)) {\r
+    return Ptr;\r
+  }\r
+\r
+  //\r
+  // Move SecondEntry to the front of Ptr\r
+  //\r
+  RemoveEntryList (SecondEntry);\r
+  InsertTailList (Ptr, SecondEntry);\r
+  return SecondEntry;\r
+}\r
+\r
+/**\r
+  Removes a node from a doubly linked list, and returns the node that follows\r
+  the removed node.\r
+\r
+  Removes the node Entry from a doubly linked list. It is up to the caller of\r
+  this function to release the memory used by this node if that is required. On\r
+  exit, the node following Entry in the doubly linked list is returned. If\r
+  Entry is the only node in the linked list, then the head node of the linked\r
+  list is returned.\r
+\r
+  If Entry is NULL, then ASSERT().\r
+  If Entry is the head node of an empty list, then ASSERT().\r
+  If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
+  linked list containing Entry, including the Entry node, is greater than\r
+  or equal to PcdMaximumLinkedListLength, then ASSERT().\r
+\r
+  @param  Entry A pointer to a node in a linked list\r
+\r
+  @return Entry\r
+\r
+**/\r
+LIST_ENTRY *\r
+EFIAPI\r
+RemoveEntryList (\r
+  IN      CONST LIST_ENTRY      *Entry\r
+  )\r
+{\r
+  ASSERT (!IsListEmpty (Entry));\r
+\r
+  Entry->ForwardLink->BackLink = Entry->BackLink;\r
+  Entry->BackLink->ForwardLink = Entry->ForwardLink;\r
+  return Entry->ForwardLink;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/LongJump.c b/MdePkg/Library/BaseLib/LongJump.c
new file mode 100644 (file)
index 0000000..e39bc32
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LongJump.c
@@ -0,0 +1,50 @@
+/** @file\r
+  Long Jump functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  LongJump.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Restores the CPU context that was saved with SetJump().\r
+\r
+  Restores the CPU context from the buffer specified by JumpBuffer.\r
+  This function never returns to the caller.\r
+  Instead is resumes execution based on the state of JumpBuffer.\r
+\r
+  If JumpBuffer is NULL, then ASSERT().\r
+  For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
+  If Value is 0, then ASSERT().\r
+\r
+  @param  JumpBuffer    A pointer to CPU context buffer.\r
+  @param  Value         The value to return when the SetJump() context is restored.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+LongJump (\r
+  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,\r
+  IN      UINTN                     Value\r
+  )\r
+{\r
+  InternalAssertJumpBuffer (JumpBuffer);\r
+  ASSERT (Value != 0);\r
+\r
+  InternalLongJump (JumpBuffer, Value);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/LowBitSet32.c b/MdePkg/Library/BaseLib/LowBitSet32.c
new file mode 100644 (file)
index 0000000..dde3ad1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LowBitSet32.c
@@ -0,0 +1,49 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Returns the bit position of the lowest bit set in a 32-bit value.\r
+\r
+  This function computes the bit position of the lowest bit set in the 32-bit\r
+  value specified by Operand. If Operand is zero, then -1 is returned.\r
+  Otherwise, a value between 0 and 31 is returned.\r
+\r
+  @param  Operand The 32-bit operand to evaluate.\r
+\r
+  @return Position of the lowest bit set in Operand if found.\r
+  @retval -1 Operand is zero.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+LowBitSet32 (\r
+  IN      UINT32                    Operand\r
+  )\r
+{\r
+  INTN                              BitIndex;\r
+\r
+  if (Operand == 0) {\r
+    return -1;\r
+  }\r
+\r
+  for (BitIndex = 0; (Operand & 1) == 0; BitIndex++, Operand >>= 1);\r
+  return BitIndex;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/LowBitSet64.c b/MdePkg/Library/BaseLib/LowBitSet64.c
new file mode 100644 (file)
index 0000000..bef8390
--- /dev/null
+++ b/MdePkg/Library/BaseLib/LowBitSet64.c
@@ -0,0 +1,51 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Returns the bit position of the lowest bit set in a 64-bit value.\r
+\r
+  This function computes the bit position of the lowest bit set in the 64-bit\r
+  value specified by Operand. If Operand is zero, then -1 is returned.\r
+  Otherwise, a value between 0 and 63 is returned.\r
+\r
+  @param  Operand The 64-bit operand to evaluate.\r
+\r
+  @return Position of the lowest bit set in Operand if found.\r
+  @retval -1  Operand is zero.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+LowBitSet64 (\r
+  IN      UINT64                    Operand\r
+  )\r
+{\r
+  INTN                              BitIndex;\r
+\r
+  if (Operand == 0) {\r
+    return -1;\r
+  }\r
+\r
+  for (BitIndex = 0;\r
+       (Operand & 1) == 0;\r
+       BitIndex++, Operand = RShiftU64 (Operand, 1));\r
+  return BitIndex;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Math64.c b/MdePkg/Library/BaseLib/Math64.c
new file mode 100644 (file)
index 0000000..60f363e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Math64.c
@@ -0,0 +1,376 @@
+/** @file\r
+  Leaf math worker functions that require 64-bit arithmetic support from the\r
+  compiler.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  Math64.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Shifts a 64-bit integer left between 0 and 63 bits. The low bits\r
+  are filled with zeros. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the left by Count bits. The\r
+  low Count bits are set to zero. The shifted value is returned.\r
+\r
+  @param  Operand The 64-bit operand to shift left.\r
+  @param  Count   The number of bits to shift left.\r
+\r
+  @return Operand << Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathLShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  return Operand << Count;\r
+}\r
+\r
+/**\r
+  Shifts a 64-bit integer right between 0 and 63 bits. This high bits\r
+  are filled with zeros. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the right by Count bits. The\r
+  high Count bits are set to zero. The shifted value is returned.\r
+\r
+  @param  Operand The 64-bit operand to shift right.\r
+  @param  Count   The number of bits to shift right.\r
+\r
+  @return Operand >> Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathRShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  return Operand >> Count;\r
+}\r
+\r
+/**\r
+  Shifts a 64-bit integer right between 0 and 63 bits. The high bits\r
+  are filled with original integer's bit 63. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the right by Count bits. The\r
+  high Count bits are set to bit 63 of Operand.  The shifted value is returned.\r
+\r
+  If Count is greater than 63, then ASSERT().\r
+\r
+  @param  Operand The 64-bit operand to shift right.\r
+  @param  Count   The number of bits to shift right.\r
+\r
+  @return Operand arithmetically shifted right by Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathARShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  INTN  TestValue;\r
+\r
+  //\r
+  // Test if this compiler supports arithmetic shift\r
+  //\r
+  TestValue = (((-1) << (sizeof (-1) * 8 - 1)) >> (sizeof (-1) * 8 - 1));\r
+  if (TestValue == -1) {\r
+    //\r
+    // Arithmetic shift is supported\r
+    //\r
+    return (UINT64)((INT64)Operand >> Count);\r
+  }\r
+\r
+  //\r
+  // Arithmetic is not supported\r
+  //\r
+  return (Operand >> Count) |\r
+         ((INTN)Operand < 0 ? ~((UINTN)-1 >> Count) : 0);\r
+}\r
+\r
+\r
+/**\r
+  Rotates a 64-bit integer left between 0 and 63 bits, filling\r
+  the low bits with the high bits that were rotated.\r
+\r
+  This function rotates the 64-bit value Operand to the left by Count bits. The\r
+  low Count bits are fill with the high Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  @param  Operand The 64-bit operand to rotate left.\r
+  @param  Count   The number of bits to rotate left.\r
+\r
+  @return Operand <<< Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathLRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  return (Operand << Count) | (Operand >> (64 - Count));\r
+}\r
+\r
+/**\r
+  Rotates a 64-bit integer right between 0 and 63 bits, filling\r
+  the high bits with the high low bits that were rotated.\r
+\r
+  This function rotates the 64-bit value Operand to the right by Count bits.\r
+  The high Count bits are fill with the low Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  @param  Operand The 64-bit operand to rotate right.\r
+  @param  Count   The number of bits to rotate right.\r
+\r
+  @return Operand >>> Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathRRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  return (Operand >> Count) | (Operand << (64 - Count));\r
+}\r
+\r
+/**\r
+  Switches the endianess of a 64-bit integer.\r
+\r
+  This function swaps the bytes in a 64-bit unsigned value to switch the value\r
+  from little endian to big endian or vice versa. The byte swapped value is\r
+  returned.\r
+\r
+  @param  Operand A 64-bit unsigned value.\r
+\r
+  @return The byte swaped Operand.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathSwapBytes64 (\r
+  IN      UINT64                    Operand\r
+  )\r
+{\r
+  UINT64  LowerBytes;\r
+  UINT64  HigherBytes;\r
+\r
+  LowerBytes  = (UINT64) SwapBytes32 ((UINT32) Operand);\r
+  HigherBytes = (UINT64) SwapBytes32 ((UINT32) (Operand >> 32));\r
+\r
+  return (LowerBytes << 32 | HigherBytes);\r
+}\r
+\r
+/**\r
+  Multiples a 64-bit unsigned integer by a 32-bit unsigned integer\r
+  and generates a 64-bit unsigned result.\r
+\r
+  This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
+  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+  bit unsigned result is returned.\r
+\r
+  @param  Multiplicand  A 64-bit unsigned value.\r
+  @param  Multiplier    A 32-bit unsigned value.\r
+\r
+  @return Multiplicand * Multiplier\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathMultU64x32 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT32                    Multiplier\r
+  )\r
+{\r
+  return Multiplicand * Multiplier;\r
+}\r
+\r
+\r
+/**\r
+  Multiples a 64-bit unsigned integer by a 64-bit unsigned integer\r
+  and generates a 64-bit unsigned result.\r
+\r
+  This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
+  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+  bit unsigned result is returned.\r
+\r
+  @param  Multiplicand  A 64-bit unsigned value.\r
+  @param  Multiplier    A 64-bit unsigned value.\r
+\r
+  @return Multiplicand * Multiplier\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathMultU64x64 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT64                    Multiplier\r
+  )\r
+{\r
+  return Multiplicand * Multiplier;\r
+}\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+  generates a 64-bit unsigned result.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
+  function returns the 64-bit unsigned quotient.\r
+\r
+   @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathDivU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  )\r
+{\r
+  return Dividend / Divisor;\r
+}\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer\r
+  and generates a 32-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 32-bit remainder. This function\r
+  returns the 32-bit unsigned remainder.\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+\r
+  @return Dividend % Divisor\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InternalMathModU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  )\r
+{\r
+  return (UINT32)(Dividend % Divisor);\r
+}\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+  generates a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+  @param  Remainder A pointer to a 32-bit unsigned value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathDivRemU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor,\r
+  OUT     UINT32                    *Remainder  OPTIONAL\r
+  )\r
+{\r
+  if (Remainder != NULL) {\r
+    *Remainder = (UINT32)(Dividend % Divisor);\r
+  }\r
+  return Dividend / Divisor;\r
+}\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 64-bit unsigned integer and\r
+  generates a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 64-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 64-bit unsigned value.\r
+  @param  Remainder A pointer to a 64-bit unsigned value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InternalMathDivRemU64x64 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT64                    Divisor,\r
+  OUT     UINT64                    *Remainder  OPTIONAL\r
+  )\r
+{\r
+  if (Remainder != NULL) {\r
+    *Remainder = Dividend % Divisor;\r
+  }\r
+  return Dividend / Divisor;\r
+}\r
+\r
+/**\r
+  Divides a 64-bit signed integer by a 64-bit signed integer and\r
+  generates a  64-bit signed result and a optional 64-bit signed remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 64-bit\r
+  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
+  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
+  This function returns the 64-bit unsigned quotient.\r
+\r
+  @param  Dividend  A 64-bit signed value.\r
+  @param  Divisor   A 64-bit signed value.\r
+  @param  Remainder A pointer to a 64-bit signed value. This parameter is\r
+                    optional and may be NULL.\r
+\r
+  @return Dividend / Divisor\r
+\r
+**/\r
+INT64\r
+InternalMathDivRemS64x64 (\r
+  IN      INT64                     Dividend,\r
+  IN      INT64                     Divisor,\r
+  OUT     INT64                     *Remainder  OPTIONAL\r
+  )\r
+{\r
+  if (Remainder != NULL) {\r
+    *Remainder = Dividend % Divisor;\r
+  }\r
+  return Dividend / Divisor;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/ModU64x32.c b/MdePkg/Library/BaseLib/ModU64x32.c
new file mode 100644 (file)
index 0000000..e6c0570
--- /dev/null
+++ b/MdePkg/Library/BaseLib/ModU64x32.c
@@ -0,0 +1,47 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
+  a 32-bit unsigned remainder.\r
+\r
+  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
+  unsigned value Divisor and generates a 32-bit remainder. This function\r
+  returns the 32-bit unsigned remainder.\r
+\r
+  If Divisor is 0, then ASSERT().\r
+\r
+  @param  Dividend  A 64-bit unsigned value.\r
+  @param  Divisor   A 32-bit unsigned value.\r
+\r
+  @return Dividend % Divisor\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+ModU64x32 (\r
+  IN      UINT64                    Dividend,\r
+  IN      UINT32                    Divisor\r
+  )\r
+{\r
+  ASSERT (Divisor != 0);\r
+  return InternalMathModU64x32 (Dividend, Divisor);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/MultS64x64.c b/MdePkg/Library/BaseLib/MultS64x64.c
new file mode 100644 (file)
index 0000000..33d2570
--- /dev/null
+++ b/MdePkg/Library/BaseLib/MultS64x64.c
@@ -0,0 +1,46 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r
+  64-bit signed result.\r
+\r
+  This function multiples the 64-bit signed value Multiplicand by the 64-bit\r
+  signed value Multiplier and generates a 64-bit signed result. This 64-bit\r
+  signed result is returned.\r
+\r
+  If the result overflows, then ASSERT().\r
+\r
+  @param  Multiplicand  A 64-bit signed value.\r
+  @param  Multiplier    A 64-bit signed value.\r
+\r
+  @return Multiplicand * Multiplier\r
+\r
+**/\r
+INT64\r
+EFIAPI\r
+MultS64x64 (\r
+  IN      INT64                     Multiplicand,\r
+  IN      INT64                     Multiplier\r
+  )\r
+{\r
+  return (INT64)MultU64x64 (Multiplicand, Multiplier);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/MultU64x32.c b/MdePkg/Library/BaseLib/MultU64x32.c
new file mode 100644 (file)
index 0000000..947d4d2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/MultU64x32.c
@@ -0,0 +1,48 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r
+  generates a 64-bit unsigned result.\r
+\r
+  This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
+  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+  bit unsigned result is returned.\r
+\r
+  @param  Multiplicand  A 64-bit unsigned value.\r
+  @param  Multiplier    A 32-bit unsigned value.\r
+\r
+  @return Multiplicand * Multiplier\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MultU64x32 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT32                    Multiplier\r
+  )\r
+{\r
+  UINT64                            Result;\r
+\r
+  Result = InternalMathMultU64x32 (Multiplicand, Multiplier);\r
+\r
+  return Result;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/MultU64x64.c b/MdePkg/Library/BaseLib/MultU64x64.c
new file mode 100644 (file)
index 0000000..7f6ece1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/MultU64x64.c
@@ -0,0 +1,48 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r
+  generates a 64-bit unsigned result.\r
+\r
+  This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
+  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
+  bit unsigned result is returned.\r
+\r
+  @param  Multiplicand  A 64-bit unsigned value.\r
+  @param  Multiplier    A 64-bit unsigned value.\r
+\r
+  @return Multiplicand * Multiplier\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MultU64x64 (\r
+  IN      UINT64                    Multiplicand,\r
+  IN      UINT64                    Multiplier\r
+  )\r
+{\r
+  UINT64                            Result;\r
+\r
+  Result = InternalMathMultU64x64 (Multiplicand, Multiplier);\r
+\r
+  return Result;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/RRotU32.c b/MdePkg/Library/BaseLib/RRotU32.c
new file mode 100644 (file)
index 0000000..ba66b35
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RRotU32.c
@@ -0,0 +1,47 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r
+  with the low bits that were rotated.\r
+\r
+  This function rotates the 32-bit value Operand to the right by Count bits.\r
+  The high Count bits are fill with the low Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  If Count is greater than 31, then ASSERT().\r
+\r
+  @param  Operand The 32-bit operand to rotate right.\r
+  @param  Count   The number of bits to rotate right.\r
+\r
+  @return Operand >>> Count\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+RRotU32 (\r
+  IN      UINT32                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  ASSERT (Count < sizeof (Operand) * 8);\r
+  return (Operand >> Count) | (Operand << (32 - Count));\r
+}\r

diff --git a/MdePkg/Library/BaseLib/RRotU64.c b/MdePkg/Library/BaseLib/RRotU64.c
new file mode 100644 (file)
index 0000000..b144c18
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RRotU64.c
@@ -0,0 +1,47 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r
+  with the high low bits that were rotated.\r
+\r
+  This function rotates the 64-bit value Operand to the right by Count bits.\r
+  The high Count bits are fill with the low Count bits of Operand. The rotated\r
+  value is returned.\r
+\r
+  If Count is greater than 63, then ASSERT().\r
+\r
+  @param  Operand The 64-bit operand to rotate right.\r
+  @param  Count   The number of bits to rotate right.\r
+\r
+  @return Operand >>> Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+RRotU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  ASSERT (Count < sizeof (Operand) * 8);\r
+  return InternalMathRRotU64 (Operand, Count);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/RShiftU64.c b/MdePkg/Library/BaseLib/RShiftU64.c
new file mode 100644 (file)
index 0000000..3320acf
--- /dev/null
+++ b/MdePkg/Library/BaseLib/RShiftU64.c
@@ -0,0 +1,46 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r
+  filled with zeros. The shifted value is returned.\r
+\r
+  This function shifts the 64-bit value Operand to the right by Count bits. The\r
+  high Count bits are set to zero. The shifted value is returned.\r
+\r
+  If Count is greater than 63, then ASSERT().\r
+\r
+  @param  Operand The 64-bit operand to shift right.\r
+  @param  Count   The number of bits to shift right.\r
+\r
+  @return Operand >> Count\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+RShiftU64 (\r
+  IN      UINT64                    Operand,\r
+  IN      UINTN                     Count\r
+  )\r
+{\r
+  ASSERT (Count < sizeof (Operand) * 8);\r
+  return InternalMathRShiftU64 (Operand, Count);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/SetJump.c b/MdePkg/Library/BaseLib/SetJump.c
new file mode 100644 (file)
index 0000000..92208f6
--- /dev/null
+++ b/MdePkg/Library/BaseLib/SetJump.c
@@ -0,0 +1,45 @@
+/** @file\r
+  Internal ASSERT () functions for SetJump.\r
+\r
+  Copyright (c) 2006, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetJump.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Worker function that checks ASSERT condition for JumpBuffer\r
+\r
+  Checks ASSERT condition for JumpBuffer.\r
+\r
+  If JumpBuffer is NULL, then ASSERT().\r
+  If JumpBuffer is not aligned on a BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT\r
+  boundary, then ASSERT().\r
+\r
+  @param  JumpBuffer    A pointer to CPU context buffer.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+InternalAssertJumpBuffer (\r
+  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer\r
+  )\r
+{\r
+  ASSERT (JumpBuffer != NULL);\r
+\r
+  ASSERT (((UINTN)JumpBuffer & ((BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT - 1) >> 8)) == 0);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/String.c b/MdePkg/Library/BaseLib/String.c
new file mode 100644 (file)
index 0000000..a0d7fac
--- /dev/null
+++ b/MdePkg/Library/BaseLib/String.c
@@ -0,0 +1,2076 @@
+/** @file\r
+  Unicode and ASCII string primatives.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  String.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Copies one Null-terminated Unicode string to another Null-terminated Unicode\r
+  string and returns the new Unicode string.\r
+\r
+  This function copies the contents of the Unicode string Source to the Unicode\r
+  string Destination, and returns Destination. If Source and Destination\r
+  overlap, then the results are undefined.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If Source is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the \r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated Unicode string.\r
+  @param  Source      Pointer to a Null-terminated Unicode string.\r
+\r
+  @return Destiantion\r
+\r
+**/\r
+CHAR16 *\r
+EFIAPI\r
+StrCpy (\r
+  OUT     CHAR16                    *Destination,\r
+  IN      CONST CHAR16              *Source\r
+  )\r
+{\r
+  CHAR16                            *ReturnValue;\r
+\r
+  //\r
+  // Destination cannot be NULL\r
+  //\r
+  ASSERT (Destination != NULL);\r
+  ASSERT (((UINTN) Destination & 0x01) == 0);\r
+\r
+  //\r
+  // Destination and source cannot overlap\r
+  //\r
+  ASSERT ((UINTN)(Destination - Source) > StrLen (Source));\r
+  ASSERT ((UINTN)(Source - Destination) > StrLen (Source));\r
+\r
+  ReturnValue = Destination;\r
+  while (*Source) {\r
+    *(Destination++) = *(Source++);\r
+  }\r
+  *Destination = 0;\r
+  return ReturnValue;\r
+}\r
+\r
+/**\r
+  Copies one Null-terminated Unicode string with a maximum length to another\r
+  Null-terminated Unicode string with a maximum length and returns the new\r
+  Unicode string.\r
+\r
+  This function copies the contents of the Unicode string Source to the Unicode\r
+  string Destination, and returns Destination. At most, Length Unicode\r
+  characters are copied from Source to Destination. If Length is 0, then\r
+  Destination is returned unmodified. If Length is greater that the number of\r
+  Unicode characters in Source, then Destination is padded with Null Unicode\r
+  characters. If Source and Destination overlap, then the results are\r
+  undefined.\r
+\r
+  If Length > 0 and Destination is NULL, then ASSERT().\r
+  If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length > 0 and Source is NULL, then ASSERT().\r
+  If Length > 0 and Source is not aligned on a 16-bit bounadry, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the \r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated Unicode string.\r
+  @param  Source      Pointer to a Null-terminated Unicode string.\r
+  @param  Length      Maximum number of Unicode characters to copy.\r
+\r
+  @return Destination\r
+\r
+**/\r
+CHAR16 *\r
+EFIAPI\r
+StrnCpy (\r
+  OUT     CHAR16                    *Destination,\r
+  IN      CONST CHAR16              *Source,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  CHAR16                            *ReturnValue;\r
+\r
+  if (Length == 0) {\r
+    return Destination;\r
+  }\r
+\r
+  //\r
+  // Destination cannot be NULL if Length is not zero\r
+  //\r
+  ASSERT (Destination != NULL);\r
+  ASSERT (((UINTN) Destination & 0x01) == 0);\r
+\r
+  //\r
+  // Destination and source cannot overlap\r
+  // Q: Does Source have to be NULL-terminated?\r
+  //\r
+  ASSERT ((UINTN)(Destination - Source) > StrLen (Source));\r
+  ASSERT ((UINTN)(Source - Destination) >= Length);\r
+\r
+  ReturnValue = Destination;\r
+\r
+  while ((*Source != L'\0') && (Length > 0)) {\r
+    *(Destination++) = *(Source++);\r
+    Length--;\r
+  }\r
+\r
+  ZeroMem (Destination, Length * sizeof (*Destination));\r
+  return ReturnValue;\r
+}\r
+\r
+/**\r
+  Returns the length of a Null-terminated Unicode string.\r
+\r
+  This function returns the number of Unicode characters in the Null-terminated\r
+  Unicode string specified by String.\r
+\r
+  If String is NULL, then ASSERT().\r
+  If String is not aligned on a 16-bit boundary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the \r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  String  Pointer to a Null-terminated Unicode string.\r
+\r
+  @return The length of String.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+StrLen (\r
+  IN      CONST CHAR16              *String\r
+  )\r
+{\r
+  UINTN                             Length;\r
+\r
+  ASSERT (String != NULL);\r
+  ASSERT (((UINTN) String & 0x01) == 0);\r
+\r
+  for (Length = 0; *String != L'\0'; String++, Length++) {\r
+    //\r
+    // If PcdMaximumUnicodeStringLength is not zero,\r
+    // length should not more than PcdMaximumUnicodeStringLength\r
+    //\r
+    if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {\r
+      ASSERT (Length < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+    }\r
+  }\r
+  return Length;\r
+}\r
+\r
+/**\r
+  Returns the size of a Null-terminated Unicode string in bytes, including the\r
+  Null terminator.\r
+\r
+  This function returns the size, in bytes, of the Null-terminated Unicode\r
+  string specified by String.\r
+\r
+  If String is NULL, then ASSERT().\r
+  If String is not aligned on a 16-bit boundary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the \r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  String  Pointer to a Null-terminated Unicode string.\r
+\r
+  @return The size of String.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+StrSize (\r
+  IN      CONST CHAR16              *String\r
+  )\r
+{\r
+  return (StrLen (String) + 1) * sizeof (*String);\r
+}\r
+\r
+/**\r
+  Compares two Null-terminated Unicode strings, and returns the difference\r
+  between the first mismatched Unicode characters.\r
+\r
+  This function compares the Null-terminated Unicode string FirstString to the\r
+  Null-terminated Unicode string SecondString. If FirstString is identical to\r
+  SecondString, then 0 is returned. Otherwise, the value returned is the first\r
+  mismatched Unicode character in SecondString subtracted from the first\r
+  mismatched Unicode character in FirstString.\r
+\r
+  If FirstString is NULL, then ASSERT().\r
+  If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r
+  If SecondString is NULL, then ASSERT().\r
+  If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
+  than PcdMaximumUnicodeStringLength Unicode characters not including the \r
+  Null-terminator, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
+  than PcdMaximumUnicodeStringLength Unicode characters not including the \r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  FirstString   Pointer to a Null-terminated Unicode string.\r
+  @param  SecondString  Pointer to a Null-terminated Unicode string.\r
+\r
+  @retval 0   FirstString is identical to SecondString.\r
+  @retval !=0 FirstString is not identical to SecondString.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+StrCmp (\r
+  IN      CONST CHAR16              *FirstString,\r
+  IN      CONST CHAR16              *SecondString\r
+  )\r
+{\r
+  //\r
+  // ASSERT both strings are less long than PcdMaximumUnicodeStringLength\r
+  //\r
+  ASSERT (StrSize (FirstString) != 0);\r
+  ASSERT (StrSize (SecondString) != 0);\r
+\r
+  while ((*FirstString != L'\0') && (*FirstString == *SecondString)) {\r
+    FirstString++;\r
+    SecondString++;\r
+  }\r
+  return *FirstString - *SecondString;\r
+}\r
+\r
+/**\r
+  Compares two Null-terminated Unicode strings with maximum lengths, and\r
+  returns the difference between the first mismatched Unicode characters.\r
+\r
+  This function compares the Null-terminated Unicode string FirstString to the\r
+  Null-terminated Unicode string SecondString. At most, Length Unicode\r
+  characters will be compared. If Length is 0, then 0 is returned. If\r
+  FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
+  value returned is the first mismatched Unicode character in SecondString\r
+  subtracted from the first mismatched Unicode character in FirstString.\r
+\r
+  If Length > 0 and FirstString is NULL, then ASSERT().\r
+  If Length > 0 and FirstString is not aligned on a 16-bit bounadary, then ASSERT().\r
+  If Length > 0 and SecondString is NULL, then ASSERT().\r
+  If Length > 0 and SecondString is not aligned on a 16-bit bounadary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
+  than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
+  than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  FirstString   Pointer to a Null-terminated Unicode string.\r
+  @param  SecondString  Pointer to a Null-terminated Unicode string.\r
+  @param  Length        Maximum number of Unicode characters to compare.\r
+\r
+  @retval 0   FirstString is identical to SecondString.\r
+  @retval !=0 FirstString is not identical to SecondString.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+StrnCmp (\r
+  IN      CONST CHAR16              *FirstString,\r
+  IN      CONST CHAR16              *SecondString,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return 0;\r
+  }\r
+\r
+  //\r
+  // ASSERT both strings are less long than PcdMaximumUnicodeStringLength.\r
+  // Length tests are performed inside StrLen().\r
+  //\r
+  ASSERT (StrSize (FirstString) != 0);\r
+  ASSERT (StrSize (SecondString) != 0);\r
+\r
+  while ((*FirstString != L'\0') &&\r
+         (*FirstString == *SecondString) &&\r
+         (Length > 1)) {\r
+    FirstString++;\r
+    SecondString++;\r
+    Length--;\r
+  }\r
+\r
+  return *FirstString - *SecondString;\r
+}\r
+\r
+/**\r
+  Concatenates one Null-terminated Unicode string to another Null-terminated\r
+  Unicode string, and returns the concatenated Unicode string.\r
+\r
+  This function concatenates two Null-terminated Unicode strings. The contents\r
+  of Null-terminated Unicode string Source are concatenated to the end of\r
+  Null-terminated Unicode string Destination. The Null-terminated concatenated\r
+  Unicode String is returned. If Source and Destination overlap, then the\r
+  results are undefined.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
+  than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
+  and Source results in a Unicode string with more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated Unicode string.\r
+  @param  Source      Pointer to a Null-terminated Unicode string.\r
+\r
+  @return Destination\r
+\r
+**/\r
+CHAR16 *\r
+EFIAPI\r
+StrCat (\r
+  IN OUT  CHAR16                    *Destination,\r
+  IN      CONST CHAR16              *Source\r
+  )\r
+{\r
+  StrCpy (Destination + StrLen (Destination), Source);\r
+\r
+  //\r
+  // Size of the resulting string should never be zero.\r
+  // PcdMaximumUnicodeStringLength is tested inside StrLen().\r
+  //\r
+  ASSERT (StrSize (Destination) != 0);\r
+  return Destination;\r
+}\r
+\r
+/**\r
+  Concatenates one Null-terminated Unicode string with a maximum length to the\r
+  end of another Null-terminated Unicode string, and returns the concatenated\r
+  Unicode string.\r
+\r
+  This function concatenates two Null-terminated Unicode strings. The contents\r
+  of Null-terminated Unicode string Source are concatenated to the end of\r
+  Null-terminated Unicode string Destination, and Destination is returned. At\r
+  most, Length Unicode characters are concatenated from Source to the end of\r
+  Destination, and Destination is always Null-terminated. If Length is 0, then\r
+  Destination is returned unmodified. If Source and Destination overlap, then\r
+  the results are undefined.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length > 0 and Source is NULL, then ASSERT().\r
+  If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
+  than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
+  and Source results in a Unicode string with more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated Unicode string.\r
+  @param  Source      Pointer to a Null-terminated Unicode string.\r
+  @param  Length      Maximum number of Unicode characters to concatenate from\r
+                      Source.\r
+\r
+  @return Destination\r
+\r
+**/\r
+CHAR16 *\r
+EFIAPI\r
+StrnCat (\r
+  IN OUT  CHAR16                    *Destination,\r
+  IN      CONST CHAR16              *Source,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  StrnCpy (Destination + StrLen (Destination), Source, Length);\r
+\r
+  //\r
+  // Size of the resulting string should never be zero.\r
+  // PcdMaximumUnicodeStringLength is tested inside StrLen().\r
+  //\r
+  ASSERT (StrSize (Destination) != 0);\r
+  return Destination;\r
+}\r
+\r
+/**\r
+  Returns the first occurance of a Null-terminated Unicode sub-string \r
+  in a Null-terminated Unicode string.\r
+\r
+  This function scans the contents of the Null-terminated Unicode string \r
+  specified by String and returns the first occurrence of SearchString.  \r
+  If SearchString is not found in String, then NULL is returned.  If \r
+  the length of SearchString is zero, then String is \r
+  returned.\r
+  \r
+  If String is NULL, then ASSERT().\r
+  If String is not aligned on a 16-bit boundary, then ASSERT().\r
+  If SearchString is NULL, then ASSERT().\r
+  If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  If PcdMaximumUnicodeStringLength is not zero, and SearchString \r
+  or String contains more than PcdMaximumUnicodeStringLength Unicode \r
+  characters not including the Null-terminator, then ASSERT().\r
+\r
+  @param  String                                 Pointer to a Null-terminated Unicode string.\r
+  @param  SearchString Pointer to a Null-terminated Unicode string to search for.\r
+\r
+  @retval NULL            If the SearchString does not appear in String.\r
+  @retval !NULL           If there is a match.\r
+\r
+**/\r
+CHAR16 *\r
+EFIAPI\r
+StrStr (\r
+  IN      CONST CHAR16               *String,\r
+  IN      CONST CHAR16               *SearchString\r
+  )\r
+{\r
+  CONST CHAR16 *FirstMatch;\r
+  CONST CHAR16 *SearchStringTmp;\r
+\r
+  ASSERT (String != NULL);\r
+  ASSERT (((UINTN) String & 0x01) == 0);\r
+  ASSERT (SearchString != NULL);\r
+  ASSERT (((UINTN) SearchString & 0x01) == 0);\r
+\r
+  //\r
+  // If PcdMaximumUnicodeStringLength is not zero,\r
+  // length of String should not more than PcdMaximumUnicodeStringLength\r
+  //\r
+  if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {\r
+    ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+  }\r
+\r
+  //\r
+  // If PcdMaximumUnicodeStringLength is not zero,\r
+  // length of SearchString should not more than PcdMaximumUnicodeStringLength\r
+  //\r
+  if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {\r
+    ASSERT (StrLen (SearchString) < PcdGet32 (PcdMaximumAsciiStringLength));\r
+  }\r
+\r
+  while (*String != '\0') {\r
+    SearchStringTmp = SearchString;\r
+    FirstMatch = String;\r
+    \r
+    while ((*String == *SearchStringTmp) \r
+            && (*SearchStringTmp != '\0') \r
+            && (*String != '\0')) {\r
+      String++;\r
+      SearchStringTmp++;\r
+    } \r
+    \r
+    if (*SearchStringTmp == '\0') {\r
+      return (CHAR16 *) FirstMatch;\r
+    }\r
+\r
+    if (SearchStringTmp == SearchString) {\r
+      //\r
+      // If no character from SearchString match,\r
+      // move the pointer to the String under search\r
+      // by one character.\r
+      //\r
+      String++;\r
+    }\r
+  }\r
+\r
+  return NULL;\r
+}\r
+\r
+/**\r
+  Check if a Unicode character is a decimal character.\r
+\r
+  This internal function checks if a Unicode character is a \r
+  decimal character. The valid decimal character is from\r
+  L'0' to L'9'.\r
+\r
+\r
+  @param  Char  The character to check against.\r
+\r
+  @retval TRUE  If the Char is a decmial character.\r
+  @retval FALSE Otherwise.\r
+\r
+**/\r
+STATIC\r
+BOOLEAN\r
+InternalIsDecimalDigitCharacter (\r
+  IN      CHAR16                    Char\r
+  )\r
+{\r
+  return (BOOLEAN) (Char >= L'0' && Char <= L'9');\r
+}\r
+\r
+/**\r
+  Convert a Unicode character to upper case only if \r
+  it maps to a valid small-case ASCII character.\r
+\r
+  This internal function only deal with Unicode character\r
+  which maps to a valid small-case ASII character, i.e.\r
+  L'a' to L'z'. For other Unicode character, the input character\r
+  is returned directly.\r
+\r
+\r
+  @param  Char  The character to convert.\r
+\r
+  @retval LowerCharacter   If the Char is with range L'a' to L'z'.\r
+  @retval Unchanged        Otherwise.\r
+\r
+**/\r
+STATIC\r
+CHAR16\r
+InternalCharToUpper (\r
+  IN      CHAR16                    Char\r
+  )\r
+{\r
+  if (Char >= L'a' && Char <= L'z') {\r
+    return (CHAR16) (Char - (L'a' - L'A'));\r
+  }\r
+\r
+  return Char;\r
+}\r
+\r
+/**\r
+  Convert a Unicode character to numerical value.\r
+\r
+  This internal function only deal with Unicode character\r
+  which maps to a valid hexadecimal ASII character, i.e.\r
+  L'0' to L'9', L'a' to L'f' or L'A' to L'F'. For other \r
+  Unicode character, the value returned does not make sense.\r
+\r
+  @param  Char  The character to convert.\r
+\r
+  @retval UINTN   The numerical value converted.\r
+\r
+**/\r
+STATIC\r
+UINTN\r
+InternalHexCharToUintn (\r
+  IN      CHAR16                    Char\r
+  )\r
+{\r
+  if (InternalIsDecimalDigitCharacter (Char)) {\r
+    return Char - L'0';\r
+  }\r
+\r
+  return (UINTN) (10 + InternalCharToUpper (Char) - L'A');\r
+}\r
+\r
+/**\r
+  Check if a Unicode character is a hexadecimal character.\r
+\r
+  This internal function checks if a Unicode character is a \r
+  decimal character.  The valid hexadecimal character is \r
+  L'0' to L'9', L'a' to L'f', or L'A' to L'F'.\r
+\r
+\r
+  @param  Char  The character to check against.\r
+\r
+  @retval TRUE  If the Char is a hexadecmial character.\r
+  @retval FALSE Otherwise.\r
+\r
+**/\r
+STATIC\r
+BOOLEAN\r
+InternalIsHexaDecimalDigitCharacter (\r
+  IN      CHAR16                    Char\r
+  )\r
+{\r
+\r
+  return (BOOLEAN) (InternalIsDecimalDigitCharacter (Char) ||\r
+    (Char >= L'A' && Char <= L'F') ||\r
+    (Char >= L'a' && Char <= L'f'));\r
+}\r
+\r
+/**\r
+  Convert a Null-terminated Unicode decimal string to a value of \r
+  type UINTN.\r
+\r
+  This function returns a value of type UINTN by interpreting the contents \r
+  of the Unicode string specified by String as a decimal number. The format \r
+  of the input Unicode string String is:\r
+  \r
+                  [spaces] [decimal digits].\r
+                  \r
+  The valid decimal digit character is in the range [0-9]. The \r
+  function will ignore the pad space, which includes spaces or \r
+  tab characters, before [decimal digits]. The running zero in the \r
+  beginning of [decimal digits] will be ignored. Then, the function \r
+  stops at the first character that is a not a valid decimal character \r
+  or a Null-terminator, whichever one comes first. \r
+  \r
+  If String is NULL, then ASSERT().\r
+  If String is not aligned in a 16-bit boundary, then ASSERT().  \r
+  If String has only pad spaces, then 0 is returned.\r
+  If String has no pad spaces or valid decimal digits, \r
+  then 0 is returned.\r
+  If the number represented by String overflows according \r
+  to the range defined by UINTN, then ASSERT().\r
+  \r
+  If PcdMaximumUnicodeStringLength is not zero, and String contains \r
+  more than PcdMaximumUnicodeStringLength Unicode characters not including \r
+  the Null-terminator, then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated Unicode string.\r
+\r
+  @retval UINTN           \r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+StrDecimalToUintn (\r
+  IN      CONST CHAR16               *String\r
+  )\r
+{\r
+  UINTN     Result;\r
+  \r
+  ASSERT (String != NULL);\r
+  ASSERT (((UINTN) String & 0x01) == 0);\r
+  ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+\r
+  //\r
+  // Ignore the pad spaces (space or tab)\r
+  //\r
+  while ((*String == L' ') || (*String == L'\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == L'0') {\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+\r
+  while (InternalIsDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+    ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_10) ||\r
+      ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_10) &&\r
+      (*String - L'0') <= REMINDER_MAX_UINTN_DIVIDED_BY_10)\r
+      );\r
+\r
+    Result = Result * 10 + (*String - L'0');\r
+    String++;\r
+  }\r
+  \r
+  return Result;\r
+}\r
+\r
+\r
+/**\r
+  Convert a Null-terminated Unicode decimal string to a value of \r
+  type UINT64.\r
+\r
+  This function returns a value of type UINT64 by interpreting the contents \r
+  of the Unicode string specified by String as a decimal number. The format \r
+  of the input Unicode string String is:\r
+  \r
+                  [spaces] [decimal digits].\r
+                  \r
+  The valid decimal digit character is in the range [0-9]. The \r
+  function will ignore the pad space, which includes spaces or \r
+  tab characters, before [decimal digits]. The running zero in the \r
+  beginning of [decimal digits] will be ignored. Then, the function \r
+  stops at the first character that is a not a valid decimal character \r
+  or a Null-terminator, whichever one comes first. \r
+  \r
+  If String is NULL, then ASSERT().\r
+  If String is not aligned in a 16-bit boundary, then ASSERT().  \r
+  If String has only pad spaces, then 0 is returned.\r
+  If String has no pad spaces or valid decimal digits, \r
+  then 0 is returned.\r
+  If the number represented by String overflows according \r
+  to the range defined by UINT64, then ASSERT().\r
+  \r
+  If PcdMaximumUnicodeStringLength is not zero, and String contains \r
+  more than PcdMaximumUnicodeStringLength Unicode characters not including \r
+  the Null-terminator, then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated Unicode string.\r
+\r
+  @retval UINT64           \r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+StrDecimalToUint64 (\r
+  IN      CONST CHAR16               *String\r
+  )\r
+{\r
+  UINT64     Result;\r
+  \r
+  ASSERT (String != NULL);\r
+  ASSERT (((UINTN) String & 0x01) == 0);\r
+  ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+\r
+  //\r
+  // Ignore the pad spaces (space or tab)\r
+  //\r
+  while ((*String == L' ') || (*String == L'\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == L'0') {\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+\r
+  while (InternalIsDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+    ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_10) || \r
+      ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_10) && \r
+      (*String - L'0') <= REMINDER_MAX_UINT64_DIVIDED_BY_10)\r
+      );\r
+\r
+    Result = MultU64x32 (Result, 10) + (*String - L'0');\r
+    String++;\r
+  }\r
+  \r
+  return Result;\r
+}\r
+\r
+/**\r
+  Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r
+\r
+  This function returns a value of type UINTN by interpreting the contents \r
+  of the Unicode string specified by String as a hexadecimal number. \r
+  The format of the input Unicode string String is:\r
+  \r
+                  [spaces][zeros][x][hexadecimal digits]. \r
+\r
+  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. \r
+  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. \r
+  If "x" appears in the input string, it must be prefixed with at least one 0. \r
+  The function will ignore the pad space, which includes spaces or tab characters, \r
+  before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or \r
+  [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the \r
+  first valid hexadecimal digit. Then, the function stops at the first character that is \r
+  a not a valid hexadecimal character or NULL, whichever one comes first.\r
+\r
+  If String is NULL, then ASSERT().\r
+  If String is not aligned in a 16-bit boundary, then ASSERT().\r
+  If String has only pad spaces, then zero is returned.\r
+  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, \r
+  then zero is returned.\r
+  If the number represented by String overflows according to the range defined by \r
+  UINTN, then ASSERT().\r
+\r
+  If PcdMaximumUnicodeStringLength is not zero, and String contains more than \r
+  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, \r
+  then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated Unicode string.\r
+\r
+  @retval UINTN\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+StrHexToUintn (\r
+  IN      CONST CHAR16               *String\r
+  )\r
+{\r
+  UINTN     Result;\r
+\r
+  ASSERT (String != NULL);\r
+  ASSERT (((UINTN) String & 0x01) == 0);\r
+  ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+  \r
+  //\r
+  // Ignore the pad spaces (space or tab) \r
+  //\r
+  while ((*String == L' ') || (*String == L'\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == L'0') {\r
+    String++;\r
+  }\r
+\r
+  if (InternalCharToUpper (*String) == L'X') {\r
+    ASSERT (*(String - 1)  == L'0');\r
+    if (*(String - 1)  != L'0') {\r
+      return 0;\r
+    }\r
+    //\r
+    // Skip the 'X'\r
+    //\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+  \r
+  while (InternalIsHexaDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the Hex Number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+    ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_16) ||\r
+      ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_16) && \r
+      (InternalHexCharToUintn (*String) <= REMINDER_MAX_UINTN_DIVIDED_BY_16))\r
+      );\r
+\r
+    Result = (Result << 4) + InternalHexCharToUintn (*String);\r
+    String++;\r
+  }\r
+\r
+  return Result;\r
+}\r
+\r
+\r
+/**\r
+  Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r
+\r
+  This function returns a value of type UINT64 by interpreting the contents \r
+  of the Unicode string specified by String as a hexadecimal number. \r
+  The format of the input Unicode string String is \r
+  \r
+                  [spaces][zeros][x][hexadecimal digits]. \r
+\r
+  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. \r
+  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. \r
+  If "x" appears in the input string, it must be prefixed with at least one 0. \r
+  The function will ignore the pad space, which includes spaces or tab characters, \r
+  before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or \r
+  [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the \r
+  first valid hexadecimal digit. Then, the function stops at the first character that is \r
+  a not a valid hexadecimal character or NULL, whichever one comes first.\r
+\r
+  If String is NULL, then ASSERT().\r
+  If String is not aligned in a 16-bit boundary, then ASSERT().\r
+  If String has only pad spaces, then zero is returned.\r
+  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, \r
+  then zero is returned.\r
+  If the number represented by String overflows according to the range defined by \r
+  UINT64, then ASSERT().\r
+\r
+  If PcdMaximumUnicodeStringLength is not zero, and String contains more than \r
+  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, \r
+  then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated Unicode string.\r
+\r
+  @retval UINT64\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+StrHexToUint64 (\r
+  IN      CONST CHAR16               *String\r
+  )\r
+{\r
+  UINT64    Result;\r
+\r
+  ASSERT (String != NULL);\r
+  ASSERT (((UINTN) String & 0x01) == 0);\r
+  ASSERT (StrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+  \r
+  //\r
+  // Ignore the pad spaces (space or tab) \r
+  //\r
+  while ((*String == L' ') || (*String == L'\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == L'0') {\r
+    String++;\r
+  }\r
+\r
+  if (InternalCharToUpper (*String) == L'X') {\r
+    ASSERT (*(String - 1)  == L'0');\r
+    if (*(String - 1)  != L'0') {\r
+      return 0;\r
+    }\r
+    //\r
+    // Skip the 'X'\r
+    //\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+  \r
+  while (InternalIsHexaDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the Hex Number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+    ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_16)|| \r
+      ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_16) && \r
+      (InternalHexCharToUintn (*String) <= REMINDER_MAX_UINT64_DIVIDED_BY_16))\r
+      );\r
+\r
+    Result = LShiftU64 (Result, 4);\r
+    Result = Result + InternalHexCharToUintn (*String);\r
+    String++;\r
+  }\r
+\r
+  return Result;\r
+}\r
+\r
+/**\r
+  Check if a ASCII character is a decimal character.\r
+\r
+  This internal function checks if a Unicode character is a \r
+  decimal character. The valid decimal character is from\r
+  '0' to '9'.\r
+\r
+  @param  Char  The character to check against.\r
+\r
+  @retval TRUE  If the Char is a decmial character.\r
+  @retval FALSE Otherwise.\r
+\r
+**/\r
+STATIC\r
+BOOLEAN\r
+InternalAsciiIsDecimalDigitCharacter (\r
+  IN      CHAR8                     Char\r
+  )\r
+{\r
+  return (BOOLEAN) (Char >= '0' && Char <= '9');\r
+}\r
+\r
+/**\r
+  Check if a ASCII character is a hexadecimal character.\r
+\r
+  This internal function checks if a ASCII character is a \r
+  decimal character.  The valid hexadecimal character is \r
+  L'0' to L'9', L'a' to L'f', or L'A' to L'F'.\r
+\r
+\r
+  @param  Char  The character to check against.\r
+\r
+  @retval TRUE  If the Char is a hexadecmial character.\r
+  @retval FALSE Otherwise.\r
+\r
+**/\r
+STATIC\r
+BOOLEAN\r
+InternalAsciiIsHexaDecimalDigitCharacter (\r
+  IN      CHAR8                    Char\r
+  )\r
+{\r
+\r
+  return (BOOLEAN) (InternalAsciiIsDecimalDigitCharacter (Char) ||\r
+    (Char >= 'A' && Char <= 'F') ||\r
+    (Char >= 'a' && Char <= 'f'));\r
+}\r
+\r
+/**\r
+  Convert a Null-terminated Unicode string to a Null-terminated \r
+  ASCII string and returns the ASCII string.\r
+  \r
+  This function converts the content of the Unicode string Source \r
+  to the ASCII string Destination by copying the lower 8 bits of \r
+  each Unicode character. It returns Destination. The function terminates \r
+  the ASCII string Destination  by appending a Null-terminator character \r
+  at the end. The caller is responsible to make sure Destination points \r
+  to a buffer with size equal or greater than (StrLen (Source) + 1) in bytes.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If Source is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+\r
+  If any Unicode characters in Source contain non-zero value in \r
+  the upper 8 bits, then ASSERT().\r
+  \r
+  If PcdMaximumUnicodeStringLength is not zero, and Source contains \r
+  more than PcdMaximumUnicodeStringLength Unicode characters not including \r
+  the Null-terminator, then ASSERT().\r
+  \r
+  If PcdMaximumAsciiStringLength is not zero, and Source contains more \r
+  than PcdMaximumAsciiStringLength Unicode characters not including the \r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  Source        Pointer to a Null-terminated Unicode string.\r
+  @param  Destination   Pointer to a Null-terminated ASCII string.\r
+\r
+  @reture Destination\r
+\r
+**/\r
+CHAR8 *\r
+EFIAPI\r
+UnicodeStrToAsciiStr (\r
+  IN      CONST CHAR16               *Source,\r
+  OUT    CHAR8                           *Destination\r
+  )\r
+{\r
+  ASSERT (Destination != NULL);\r
+  ASSERT (Source != NULL);\r
+  ASSERT (((UINTN) Source & 0x01) == 0);\r
+\r
+  //\r
+  // Source and Destination should not overlap\r
+  //\r
+  ASSERT ((UINTN) ((CHAR16 *) Destination -  Source) > StrLen (Source));\r
+  ASSERT ((UINTN) ((CHAR8 *) Source - Destination) > StrLen (Source));\r
+\r
+  //\r
+  // If PcdMaximumUnicodeStringLength is not zero,\r
+  // length of Source should not more than PcdMaximumUnicodeStringLength\r
+  //\r
+  if (PcdGet32 (PcdMaximumUnicodeStringLength) != 0) {\r
+    ASSERT (StrLen (Source) < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+  }\r
+\r
+  while (*Source != '\0') {\r
+    //\r
+    // If any Unicode characters in Source contain \r
+    // non-zero value in the upper 8 bits, then ASSERT().\r
+    //\r
+    ASSERT (*Source < 0x100);\r
+    *(Destination++) = (CHAR8) *(Source++);\r
+  }\r
+\r
+  *Destination = '\0';\r
+  \r
+  return Destination;\r
+}\r
+\r
+\r
+/**\r
+  Copies one Null-terminated ASCII string to another Null-terminated ASCII\r
+  string and returns the new ASCII string.\r
+\r
+  This function copies the contents of the ASCII string Source to the ASCII\r
+  string Destination, and returns Destination. If Source and Destination\r
+  overlap, then the results are undefined.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated ASCII string.\r
+  @param  Source      Pointer to a Null-terminated ASCII string.\r
+\r
+  @return Destination\r
+\r
+**/\r
+CHAR8 *\r
+EFIAPI\r
+AsciiStrCpy (\r
+  OUT     CHAR8                     *Destination,\r
+  IN      CONST CHAR8               *Source\r
+  )\r
+{\r
+  CHAR8                             *ReturnValue;\r
+\r
+  //\r
+  // Destination cannot be NULL\r
+  //\r
+  ASSERT (Destination != NULL);\r
+\r
+  //\r
+  // Destination and source cannot overlap\r
+  //\r
+  ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));\r
+  ASSERT ((UINTN)(Source - Destination) > AsciiStrLen (Source));\r
+\r
+  ReturnValue = Destination;\r
+  while (*Source) {\r
+    *(Destination++) = *(Source++);\r
+  }\r
+  *Destination = 0;\r
+  return ReturnValue;\r
+}\r
+\r
+/**\r
+  Copies one Null-terminated ASCII string with a maximum length to another\r
+  Null-terminated ASCII string with a maximum length and returns the new ASCII\r
+  string.\r
+\r
+  This function copies the contents of the ASCII string Source to the ASCII\r
+  string Destination, and returns Destination. At most, Length ASCII characters\r
+  are copied from Source to Destination. If Length is 0, then Destination is\r
+  returned unmodified. If Length is greater that the number of ASCII characters\r
+  in Source, then Destination is padded with Null ASCII characters. If Source\r
+  and Destination overlap, then the results are undefined.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated ASCII string.\r
+  @param  Source      Pointer to a Null-terminated ASCII string.\r
+  @param  Length      Maximum number of ASCII characters to copy.\r
+\r
+  @return Destination\r
+\r
+**/\r
+CHAR8 *\r
+EFIAPI\r
+AsciiStrnCpy (\r
+  OUT     CHAR8                     *Destination,\r
+  IN      CONST CHAR8               *Source,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  CHAR8                             *ReturnValue;\r
+\r
+  if (Length == 0) {\r
+    return Destination;\r
+  }\r
+\r
+  //\r
+  // Destination cannot be NULL\r
+  //\r
+  ASSERT (Destination != NULL);\r
+\r
+  //\r
+  // Destination and source cannot overlap\r
+  //\r
+  ASSERT ((UINTN)(Destination - Source) > AsciiStrLen (Source));\r
+  ASSERT ((UINTN)(Source - Destination) >= Length);\r
+\r
+  ReturnValue = Destination;\r
+\r
+  while (*Source && Length > 0) {\r
+    *(Destination++) = *(Source++);\r
+    Length--;\r
+  }\r
+\r
+  ZeroMem (Destination, Length * sizeof (*Destination));\r
+  return ReturnValue;\r
+}\r
+\r
+/**\r
+  Returns the length of a Null-terminated ASCII string.\r
+\r
+  This function returns the number of ASCII characters in the Null-terminated\r
+  ASCII string specified by String.\r
+\r
+  If String is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and String contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+\r
+  @param  String  Pointer to a Null-terminated ASCII string.\r
+\r
+  @return The length of String.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiStrLen (\r
+  IN      CONST CHAR8               *String\r
+  )\r
+{\r
+  UINTN                             Length;\r
+\r
+  ASSERT (String != NULL);\r
+\r
+  for (Length = 0; *String != '\0'; String++, Length++) {\r
+    //\r
+    // If PcdMaximumUnicodeStringLength is not zero,\r
+    // length should not more than PcdMaximumUnicodeStringLength\r
+    //\r
+    if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {\r
+      ASSERT (Length < PcdGet32 (PcdMaximumAsciiStringLength));\r
+    }\r
+  }\r
+  return Length;\r
+}\r
+\r
+/**\r
+  Returns the size of a Null-terminated ASCII string in bytes, including the\r
+  Null terminator.\r
+\r
+  This function returns the size, in bytes, of the Null-terminated ASCII string\r
+  specified by String.\r
+\r
+  If String is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and String contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+\r
+  @param  String  Pointer to a Null-terminated ASCII string.\r
+\r
+  @return The size of String.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiStrSize (\r
+  IN      CONST CHAR8               *String\r
+  )\r
+{\r
+  return (AsciiStrLen (String) + 1) * sizeof (*String);\r
+}\r
+\r
+/**\r
+  Compares two Null-terminated ASCII strings, and returns the difference\r
+  between the first mismatched ASCII characters.\r
+\r
+  This function compares the Null-terminated ASCII string FirstString to the\r
+  Null-terminated ASCII string SecondString. If FirstString is identical to\r
+  SecondString, then 0 is returned. Otherwise, the value returned is the first\r
+  mismatched ASCII character in SecondString subtracted from the first\r
+  mismatched ASCII character in FirstString.\r
+\r
+  If FirstString is NULL, then ASSERT().\r
+  If SecondString is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
+  than PcdMaximumAsciiStringLength ASCII characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  FirstString   Pointer to a Null-terminated ASCII string.\r
+  @param  SecondString  Pointer to a Null-terminated ASCII string.\r
+\r
+  @retval 0   FirstString is identical to SecondString.\r
+  @retval !=0 FirstString is not identical to SecondString.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+AsciiStrCmp (\r
+  IN      CONST CHAR8               *FirstString,\r
+  IN      CONST CHAR8               *SecondString\r
+  )\r
+{\r
+  //\r
+  // ASSERT both strings are less long than PcdMaximumAsciiStringLength\r
+  //\r
+  ASSERT (AsciiStrSize (FirstString));\r
+  ASSERT (AsciiStrSize (SecondString));\r
+\r
+  while ((*FirstString != '\0') && (*FirstString == *SecondString)) {\r
+    FirstString++;\r
+    SecondString++;\r
+  }\r
+\r
+  return *FirstString - *SecondString;\r
+}\r
+\r
+/**\r
+  Converts a lowercase Ascii character to upper one\r
+\r
+  If Chr is lowercase Ascii character, then converts it to upper one.\r
+\r
+  If Value >= 0xA0, then ASSERT().\r
+  If (Value & 0x0F) >= 0x0A, then ASSERT().\r
+\r
+  @param  chr   one Ascii character\r
+\r
+  @return The uppercase value of Ascii character \r
+\r
+**/\r
+STATIC\r
+CHAR8\r
+AsciiToUpper (\r
+  IN      CHAR8                     Chr\r
+  )\r
+{\r
+  return (UINT8) ((Chr >= 'a' && Chr <= 'z') ? Chr - ('a' - 'A') : Chr);\r
+}\r
+\r
+/**\r
+  Convert a ASCII character to numerical value.\r
+\r
+  This internal function only deal with Unicode character\r
+  which maps to a valid hexadecimal ASII character, i.e.\r
+  '0' to '9', 'a' to 'f' or 'A' to 'F'. For other \r
+  ASCII character, the value returned does not make sense.\r
+\r
+  @param  Char  The character to convert.\r
+\r
+  @retval UINTN   The numerical value converted.\r
+\r
+**/\r
+STATIC\r
+UINTN\r
+InternalAsciiHexCharToUintn (\r
+  IN      CHAR8                    Char\r
+  )\r
+{\r
+  if (InternalIsDecimalDigitCharacter (Char)) {\r
+    return Char - '0';\r
+  }\r
+\r
+  return (UINTN) (10 + AsciiToUpper (Char) - 'A');\r
+}\r
+\r
+\r
+/**\r
+  Performs a case insensitive comparison of two Null-terminated ASCII strings,\r
+  and returns the difference between the first mismatched ASCII characters.\r
+\r
+  This function performs a case insensitive comparison of the Null-terminated\r
+  ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r
+  FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
+  value returned is the first mismatched lower case ASCII character in\r
+  SecondString subtracted from the first mismatched lower case ASCII character\r
+  in FirstString.\r
+\r
+  If FirstString is NULL, then ASSERT().\r
+  If SecondString is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
+  than PcdMaximumAsciiStringLength ASCII characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  FirstString   Pointer to a Null-terminated ASCII string.\r
+  @param  SecondString  Pointer to a Null-terminated ASCII string.\r
+\r
+  @retval 0   FirstString is identical to SecondString using case insensitive\r
+              comparisons.\r
+  @retval !=0 FirstString is not identical to SecondString using case\r
+              insensitive comparisons.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+AsciiStriCmp (\r
+  IN      CONST CHAR8               *FirstString,\r
+  IN      CONST CHAR8               *SecondString\r
+  )\r
+{\r
+  CHAR8  UpperFirstString;\r
+  CHAR8  UpperSecondString;\r
+\r
+  //\r
+  // ASSERT both strings are less long than PcdMaximumAsciiStringLength\r
+  //\r
+  ASSERT (AsciiStrSize (FirstString));\r
+  ASSERT (AsciiStrSize (SecondString));\r
+\r
+  UpperFirstString  = AsciiToUpper (*FirstString);\r
+  UpperSecondString = AsciiToUpper (*SecondString);\r
+  while ((*FirstString != '\0') && (UpperFirstString == UpperSecondString)) {\r
+    FirstString++;\r
+    SecondString++;\r
+    UpperFirstString  = AsciiToUpper (*FirstString);\r
+    UpperSecondString = AsciiToUpper (*SecondString);\r
+  }\r
+\r
+  return UpperFirstString - UpperSecondString;\r
+}\r
+\r
+/**\r
+  Compares two Null-terminated ASCII strings with maximum lengths, and returns\r
+  the difference between the first mismatched ASCII characters.\r
+\r
+  This function compares the Null-terminated ASCII string FirstString to the\r
+  Null-terminated ASCII  string SecondString. At most, Length ASCII characters\r
+  will be compared. If Length is 0, then 0 is returned. If FirstString is\r
+  identical to SecondString, then 0 is returned. Otherwise, the value returned\r
+  is the first mismatched ASCII character in SecondString subtracted from the\r
+  first mismatched ASCII character in FirstString.\r
+\r
+  If FirstString is NULL, then ASSERT().\r
+  If SecondString is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+\r
+  @param  FirstString   Pointer to a Null-terminated ASCII string.\r
+  @param  SecondString  Pointer to a Null-terminated ASCII string.\r
+\r
+  @retval 0   FirstString is identical to SecondString.\r
+  @retval !=0 FirstString is not identical to SecondString.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+AsciiStrnCmp (\r
+  IN      CONST CHAR8               *FirstString,\r
+  IN      CONST CHAR8               *SecondString,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return 0;\r
+  }\r
+\r
+  //\r
+  // ASSERT both strings are less long than PcdMaximumAsciiStringLength\r
+  //\r
+  ASSERT (AsciiStrSize (FirstString));\r
+  ASSERT (AsciiStrSize (SecondString));\r
+\r
+  while ((*FirstString != '\0') &&\r
+         (*FirstString == *SecondString) &&\r
+         (Length > 1)) {\r
+    FirstString++;\r
+    SecondString++;\r
+    Length--;\r
+  }\r
+  return *FirstString - *SecondString;\r
+}\r
+\r
+/**\r
+  Concatenates one Null-terminated ASCII string to another Null-terminated\r
+  ASCII string, and returns the concatenated ASCII string.\r
+\r
+  This function concatenates two Null-terminated ASCII strings. The contents of\r
+  Null-terminated ASCII string Source are concatenated to the end of Null-\r
+  terminated ASCII string Destination. The Null-terminated concatenated ASCII\r
+  String is returned.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r
+  Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
+  ASCII characters, then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated ASCII string.\r
+  @param  Source      Pointer to a Null-terminated ASCII string.\r
+\r
+  @return Destination\r
+\r
+**/\r
+CHAR8 *\r
+EFIAPI\r
+AsciiStrCat (\r
+  IN OUT CHAR8    *Destination,\r
+  IN CONST CHAR8  *Source\r
+  )\r
+{\r
+  AsciiStrCpy (Destination + AsciiStrLen (Destination), Source);\r
+\r
+  //\r
+  // Size of the resulting string should never be zero.\r
+  // PcdMaximumUnicodeStringLength is tested inside StrLen().\r
+  //\r
+  ASSERT (AsciiStrSize (Destination) != 0);\r
+  return Destination;\r
+}\r
+\r
+/**\r
+  Concatenates one Null-terminated ASCII string with a maximum length to the\r
+  end of another Null-terminated ASCII string, and returns the concatenated\r
+  ASCII string.\r
+\r
+  This function concatenates two Null-terminated ASCII strings. The contents\r
+  of Null-terminated ASCII string Source are concatenated to the end of Null-\r
+  terminated ASCII string Destination, and Destination is returned. At most,\r
+  Length ASCII characters are concatenated from Source to the end of\r
+  Destination, and Destination is always Null-terminated. If Length is 0, then\r
+  Destination is returned unmodified. If Source and Destination overlap, then\r
+  the results are undefined.\r
+\r
+  If Destination is NULL, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
+  then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r
+  Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
+  ASCII characters not including the Null-terminator, then ASSERT().\r
+\r
+  @param  Destination Pointer to a Null-terminated ASCII string.\r
+  @param  Source      Pointer to a Null-terminated ASCII string.\r
+  @param  Length      Maximum number of ASCII characters to concatenate from\r
+                      Source.\r
+\r
+  @return Destination\r
+\r
+**/\r
+CHAR8 *\r
+EFIAPI\r
+AsciiStrnCat (\r
+  IN OUT  CHAR8                     *Destination,\r
+  IN      CONST CHAR8               *Source,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  AsciiStrnCpy (Destination + AsciiStrLen (Destination), Source, Length);\r
+\r
+  //\r
+  // Size of the resulting string should never be zero.\r
+  // PcdMaximumUnicodeStringLength is tested inside StrLen().\r
+  //\r
+  ASSERT (AsciiStrSize (Destination) != 0);\r
+  return Destination;\r
+}\r
+\r
+/**\r
+  Returns the first occurance of a Null-terminated ASCII sub-string \r
+  in a Null-terminated ASCII string.\r
+\r
+  This function scans the contents of the ASCII string specified by String \r
+  and returns the first occurrence of SearchString. If SearchString is not \r
+  found in String, then NULL is returned. If the length of SearchString is zero, \r
+  then String is returned.\r
+  \r
+  If String is NULL, then ASSERT().\r
+  If SearchString is NULL, then ASSERT().\r
+\r
+  If PcdMaximumAsciiStringLength is not zero, and SearchString or \r
+  String contains more than PcdMaximumAsciiStringLength Unicode characters \r
+  not including the Null-terminator, then ASSERT().\r
+\r
+  @param  String                                 Pointer to a Null-terminated ASCII string.\r
+  @param  SearchString   Pointer to a Null-terminated ASCII string to search for.\r
+\r
+  @retval NULL            If the SearchString does not appear in String.\r
+  @retval !NULL           If there is a match.\r
+\r
+**/\r
+CHAR8 *\r
+EFIAPI\r
+AsciiStrStr (\r
+  IN      CONST CHAR8                *String,\r
+  IN      CONST CHAR8             *SearchString\r
+  )\r
+{\r
+  CONST CHAR8 *FirstMatch;\r
+  CONST CHAR8 *SearchStringTmp;\r
+\r
+  ASSERT (String != NULL);\r
+  ASSERT (SearchString != NULL);\r
+\r
+  //\r
+  // If PcdMaximumUnicodeStringLength is not zero,\r
+  // length of String should not more than PcdMaximumUnicodeStringLength\r
+  //\r
+  if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {\r
+    ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));\r
+  }\r
+\r
+  //\r
+  // If PcdMaximumUnicodeStringLength is not zero,\r
+  // length of SearchString should not more than PcdMaximumUnicodeStringLength\r
+  //\r
+  if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {\r
+    ASSERT (AsciiStrLen (SearchString) < PcdGet32 (PcdMaximumAsciiStringLength));\r
+  }\r
+\r
+  while (*String != '\0') {\r
+    SearchStringTmp = SearchString;\r
+    FirstMatch = String;\r
+    \r
+    while ((*String == *SearchStringTmp) \r
+            && (*SearchStringTmp != '\0') \r
+            && (*String != '\0')) {\r
+      String++;\r
+      SearchStringTmp++;\r
+    } \r
+    \r
+    if (*SearchStringTmp == '\0') {\r
+      return (CHAR8 *) FirstMatch;\r
+    }\r
+\r
+    if (SearchStringTmp == SearchString) {\r
+      //\r
+      // If no character from SearchString match,\r
+      // move the pointer to the String under search\r
+      // by one character.\r
+      //\r
+      String++;\r
+    }\r
+\r
+  }\r
+\r
+  return NULL;\r
+}\r
+\r
+/**\r
+  Convert a Null-terminated ASCII decimal string to a value of type \r
+  UINTN.\r
+\r
+  This function returns a value of type UINTN by interpreting the contents \r
+  of the ASCII string String as a decimal number. The format of the input \r
+  ASCII string String is:\r
+  \r
+                    [spaces] [decimal digits].\r
+  \r
+  The valid decimal digit character is in the range [0-9]. The function will \r
+  ignore the pad space, which includes spaces or tab characters, before the digits. \r
+  The running zero in the beginning of [decimal digits] will be ignored. Then, the \r
+  function stops at the first character that is a not a valid decimal character or \r
+  Null-terminator, whichever on comes first.\r
+  \r
+  If String has only pad spaces, then 0 is returned.\r
+  If String has no pad spaces or valid decimal digits, then 0 is returned.\r
+  If the number represented by String overflows according to the range defined by \r
+  UINTN, then ASSERT().\r
+  If String is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and String contains more than \r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, \r
+  then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated ASCII string.\r
+\r
+  @retval UINTN           \r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiStrDecimalToUintn (\r
+  IN      CONST CHAR8                  *String\r
+  )\r
+{\r
+  UINTN     Result;\r
+  \r
+  ASSERT (String != NULL);\r
+  ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));\r
+\r
+  //\r
+  // Ignore the pad spaces (space or tab)\r
+  //\r
+  while ((*String == ' ') || (*String == '\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == '0') {\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+\r
+  while (InternalAsciiIsDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+    ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_10) ||\r
+      ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_10) && \r
+      (*String - '0') <= REMINDER_MAX_UINTN_DIVIDED_BY_10)\r
+      );\r
+\r
+    Result = Result * 10 + (*String - '0');\r
+    String++;\r
+  }\r
+  \r
+  return Result;\r
+}\r
+\r
+\r
+/**\r
+  Convert a Null-terminated ASCII decimal string to a value of type \r
+  UINT64.\r
+\r
+  This function returns a value of type UINT64 by interpreting the contents \r
+  of the ASCII string String as a decimal number. The format of the input \r
+  ASCII string String is:\r
+  \r
+                    [spaces] [decimal digits].\r
+  \r
+  The valid decimal digit character is in the range [0-9]. The function will \r
+  ignore the pad space, which includes spaces or tab characters, before the digits. \r
+  The running zero in the beginning of [decimal digits] will be ignored. Then, the \r
+  function stops at the first character that is a not a valid decimal character or \r
+  Null-terminator, whichever on comes first.\r
+  \r
+  If String has only pad spaces, then 0 is returned.\r
+  If String has no pad spaces or valid decimal digits, then 0 is returned.\r
+  If the number represented by String overflows according to the range defined by \r
+  UINT64, then ASSERT().\r
+  If String is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and String contains more than \r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, \r
+  then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated ASCII string.\r
+\r
+  @retval UINT64           \r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsciiStrDecimalToUint64 (\r
+  IN      CONST CHAR8                *String\r
+  )\r
+{\r
+  UINT64     Result;\r
+  \r
+  ASSERT (String != NULL);\r
+  ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));\r
+\r
+  //\r
+  // Ignore the pad spaces (space or tab)\r
+  //\r
+  while ((*String == ' ') || (*String == '\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == '0') {\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+\r
+  while (InternalAsciiIsDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+    ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_10) || \r
+      ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_10) && \r
+      (*String - '0') <= REMINDER_MAX_UINT64_DIVIDED_BY_10)\r
+      );\r
+\r
+    Result = MultU64x32 (Result, 10) + (*String - '0');\r
+    String++;\r
+  }\r
+  \r
+  return Result;\r
+}\r
+\r
+/**\r
+  Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r
+\r
+  This function returns a value of type UINTN by interpreting the contents of \r
+  the ASCII string String as a hexadecimal number. The format of the input ASCII \r
+  string String is:\r
+  \r
+                  [spaces][zeros][x][hexadecimal digits].\r
+                  \r
+  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. \r
+  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x" \r
+  appears in the input string, it must be prefixed with at least one 0. The function \r
+  will ignore the pad space, which includes spaces or tab characters, before [zeros], \r
+  [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits] \r
+  will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal \r
+  digit. Then, the function stops at the first character that is a not a valid \r
+  hexadecimal character or Null-terminator, whichever on comes first.\r
+  \r
+  If String has only pad spaces, then 0 is returned.\r
+  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
+  0 is returned.\r
+\r
+  If the number represented by String overflows according to the range defined by UINTN, \r
+  then ASSERT().\r
+  If String is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, \r
+  and String contains more than PcdMaximumAsciiStringLength ASCII characters not including \r
+  the Null-terminator, then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated ASCII string.\r
+\r
+  @retval UINTN\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiStrHexToUintn (\r
+  IN      CONST CHAR8                *String\r
+  )\r
+{\r
+  UINTN     Result;\r
+\r
+  ASSERT (String != NULL);\r
+  ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumAsciiStringLength));\r
+  \r
+  //\r
+  // Ignore the pad spaces (space or tab) \r
+  //\r
+  while ((*String == ' ') || (*String == '\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == '0') {\r
+    String++;\r
+  }\r
+\r
+  if (AsciiToUpper (*String) == 'X') {\r
+    ASSERT (*(String - 1)  == '0');\r
+    if (*(String - 1)  != '0') {\r
+      return 0;\r
+    }\r
+    //\r
+    // Skip the 'X'\r
+    //\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+  \r
+  while (InternalAsciiIsHexaDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the Hex Number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+     ASSERT ((Result < QUIENT_MAX_UINTN_DIVIDED_BY_16) ||\r
+       ((Result == QUIENT_MAX_UINTN_DIVIDED_BY_16) && \r
+       (InternalAsciiHexCharToUintn (*String) <= REMINDER_MAX_UINTN_DIVIDED_BY_16))\r
+       );\r
+\r
+    Result = (Result << 4) + InternalAsciiHexCharToUintn (*String);\r
+    String++;\r
+  }\r
+\r
+  return Result;\r
+}\r
+\r
+\r
+/**\r
+  Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r
+\r
+  This function returns a value of type UINT64 by interpreting the contents of \r
+  the ASCII string String as a hexadecimal number. The format of the input ASCII \r
+  string String is:\r
+  \r
+                  [spaces][zeros][x][hexadecimal digits].\r
+                  \r
+  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F]. \r
+  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x" \r
+  appears in the input string, it must be prefixed with at least one 0. The function \r
+  will ignore the pad space, which includes spaces or tab characters, before [zeros], \r
+  [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits] \r
+  will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal \r
+  digit. Then, the function stops at the first character that is a not a valid \r
+  hexadecimal character or Null-terminator, whichever on comes first.\r
+  \r
+  If String has only pad spaces, then 0 is returned.\r
+  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
+  0 is returned.\r
+\r
+  If the number represented by String overflows according to the range defined by UINT64, \r
+  then ASSERT().\r
+  If String is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, \r
+  and String contains more than PcdMaximumAsciiStringLength ASCII characters not including \r
+  the Null-terminator, then ASSERT().\r
+\r
+  @param  String                           Pointer to a Null-terminated ASCII string.\r
+\r
+  @retval UINT64\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsciiStrHexToUint64 (\r
+  IN      CONST CHAR8                *String\r
+  )\r
+{\r
+  UINT64    Result;\r
+\r
+  ASSERT (String != NULL);\r
+  ASSERT (AsciiStrLen (String) < PcdGet32 (PcdMaximumUnicodeStringLength));\r
+  \r
+  //\r
+  // Ignore the pad spaces (space or tab) and leading Zeros\r
+  //\r
+  //\r
+  // Ignore the pad spaces (space or tab) \r
+  //\r
+  while ((*String == ' ') || (*String == '\t')) {\r
+    String++;\r
+  }\r
+\r
+  //\r
+  // Ignore leading Zeros after the spaces\r
+  //\r
+  while (*String == '0') {\r
+    String++;\r
+  }\r
+\r
+  if (AsciiToUpper (*String) == 'X') {\r
+    ASSERT (*(String - 1)  == '0');\r
+    if (*(String - 1)  != '0') {\r
+      return 0;\r
+    }\r
+    //\r
+    // Skip the 'X'\r
+    //\r
+    String++;\r
+  }\r
+\r
+  Result = 0;\r
+  \r
+  while (InternalAsciiIsHexaDecimalDigitCharacter (*String)) {\r
+    //\r
+    // If the Hex Number represented by String overflows according \r
+    // to the range defined by UINTN, then ASSERT().\r
+    //\r
+    ASSERT ((Result < QUIENT_MAX_UINT64_DIVIDED_BY_16) ||\r
+      ((Result == QUIENT_MAX_UINT64_DIVIDED_BY_16) && \r
+      (InternalAsciiHexCharToUintn (*String) <= REMINDER_MAX_UINT64_DIVIDED_BY_16))\r
+      );\r
+\r
+    Result = LShiftU64 (Result, 4);\r
+    Result = Result + InternalAsciiHexCharToUintn (*String);\r
+    String++;\r
+  }\r
+\r
+  return Result;\r
+}\r
+\r
+\r
+/**\r
+  Convert one Null-terminated ASCII string to a Null-terminated \r
+  Unicode string and returns the Unicode string.\r
+\r
+  This function converts the contents of the ASCII string Source to the Unicode \r
+  string Destination, and returns Destination.  The function terminates the \r
+  Unicode string Destination by appending a Null-terminator character at the end. \r
+  The caller is responsible to make sure Destination points to a buffer with size \r
+  equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r
+  \r
+  If Destination is NULL, then ASSERT().\r
+  If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Source is NULL, then ASSERT().\r
+  If Source and Destination overlap, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and Source contains more than \r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, \r
+  then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than \r
+  PcdMaximumUnicodeStringLength ASCII characters not including the \r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  Source        Pointer to a Null-terminated ASCII string.\r
+  @param  Destination   Pointer to a Null-terminated Unicode string.\r
+\r
+  @reture Destination\r
+\r
+**/\r
+CHAR16 *\r
+EFIAPI\r
+AsciiStrToUnicodeStr (\r
+  IN      CONST CHAR8                *Source,\r
+  OUT    CHAR16                        *Destination\r
+  )\r
+{\r
+  ASSERT (Destination != NULL);\r
+  ASSERT (Source != NULL);\r
+\r
+  //\r
+  // Source and Destination should not overlap\r
+  //\r
+  ASSERT ((UINTN) ((CHAR8 *) Destination - Source) > AsciiStrLen (Source));\r
+  ASSERT ((UINTN) (Source - (CHAR8 *) Destination) > (AsciiStrLen (Source) * sizeof (CHAR16)));\r
+\r
+  //\r
+  // If PcdMaximumAsciiStringLength is not zero,\r
+  // length of Source should not more than PcdMaximumUnicodeStringLength\r
+  //\r
+  if (PcdGet32 (PcdMaximumAsciiStringLength) != 0) {\r
+    ASSERT (AsciiStrLen (Source) < PcdGet32 (PcdMaximumAsciiStringLength));\r
+  }\r
+\r
+  while (*Source != '\0') {\r
+    *(Destination++) = (CHAR16) *(Source++);\r
+  }\r
+  //\r
+  // End the Destination with a NULL.\r
+  //\r
+  *Destination = '\0';\r
+\r
+  return Destination;\r
+}\r
+\r
+/**\r
+  Converts an 8-bit value to an 8-bit BCD value.\r
+\r
+  Converts the 8-bit value specified by Value to BCD. The BCD value is\r
+  returned.\r
+\r
+  If Value >= 100, then ASSERT().\r
+\r
+  @param  Value The 8-bit value to convert to BCD. Range 0..99.\r
+\r
+  @return The BCD value\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+DecimalToBcd8 (\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  ASSERT (Value < 100);\r
+  return (UINT8) (((Value / 10) << 4) | (Value % 10));\r
+}\r
+\r
+/**\r
+  Converts an 8-bit BCD value to an 8-bit value.\r
+\r
+  Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r
+  value is returned.\r
+\r
+  If Value >= 0xA0, then ASSERT().\r
+  If (Value & 0x0F) >= 0x0A, then ASSERT().\r
+\r
+  @param  Value The 8-bit BCD value to convert to an 8-bit value.\r
+\r
+  @return The 8-bit value is returned.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+BcdToDecimal8 (\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  ASSERT (Value < 0xa0);\r
+  ASSERT ((Value & 0xf) < 0xa);\r
+  return (UINT8) ((Value >> 4) * 10 + (Value & 0xf));\r
+}\r
+\r
+\r

diff --git a/MdePkg/Library/BaseLib/SwapBytes16.c b/MdePkg/Library/BaseLib/SwapBytes16.c
new file mode 100644 (file)
index 0000000..3709f43
--- /dev/null
+++ b/MdePkg/Library/BaseLib/SwapBytes16.c
@@ -0,0 +1,41 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Switches the endianess of a 16-bit integer.\r
+\r
+  This function swaps the bytes in a 16-bit unsigned value to switch the value\r
+  from little endian to big endian or vice versa. The byte swapped value is\r
+  returned.\r
+\r
+  @param  Operand A 16-bit unsigned value.\r
+\r
+  @return The byte swaped Operand.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+SwapBytes16 (\r
+  IN      UINT16                    Operand\r
+  )\r
+{\r
+  return (UINT16) ((Operand << 8) | (Operand >> 8));\r
+}\r

diff --git a/MdePkg/Library/BaseLib/SwapBytes32.c b/MdePkg/Library/BaseLib/SwapBytes32.c
new file mode 100644 (file)
index 0000000..1b1fe78
--- /dev/null
+++ b/MdePkg/Library/BaseLib/SwapBytes32.c
@@ -0,0 +1,47 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Switches the endianess of a 32-bit integer.\r
+\r
+  This function swaps the bytes in a 32-bit unsigned value to switch the value\r
+  from little endian to big endian or vice versa. The byte swapped value is\r
+  returned.\r
+\r
+  @param  Operand A 32-bit unsigned value.\r
+\r
+  @return The byte swaped Operand.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+SwapBytes32 (\r
+  IN      UINT32                    Operand\r
+  )\r
+{\r
+  UINT32  LowerBytes;\r
+  UINT32  HigherBytes;\r
+\r
+  LowerBytes  = (UINT32) SwapBytes16 ((UINT16) Operand);\r
+  HigherBytes = (UINT32) SwapBytes16 ((UINT16) (Operand >> 16));\r
+\r
+  return (LowerBytes << 16 | HigherBytes);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/SwapBytes64.c b/MdePkg/Library/BaseLib/SwapBytes64.c
new file mode 100644 (file)
index 0000000..eaffbeb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/SwapBytes64.c
@@ -0,0 +1,41 @@
+/** @file\r
+  Math worker functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Switches the endianess of a 64-bit integer.\r
+\r
+  This function swaps the bytes in a 64-bit unsigned value to switch the value\r
+  from little endian to big endian or vice versa. The byte swapped value is\r
+  returned.\r
+\r
+  @param  Operand A 64-bit unsigned value.\r
+\r
+  @return The byte swaped Operand.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+SwapBytes64 (\r
+  IN      UINT64                    Operand\r
+  )\r
+{\r
+  return InternalMathSwapBytes64 (Operand);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/SwitchStack.c b/MdePkg/Library/BaseLib/SwitchStack.c
new file mode 100644 (file)
index 0000000..39aec86
--- /dev/null
+++ b/MdePkg/Library/BaseLib/SwitchStack.c
@@ -0,0 +1,71 @@
+/** @file\r
+  Switch Stack functions.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SwitchStack.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include <BaseLibInternals.h>\r
+\r
+/**\r
+  Transfers control to a function starting with a new stack.\r
+\r
+  Transfers control to the function specified by EntryPoint using the\r
+  new stack specified by NewStack and passing in the parameters specified\r
+  by Context1 and Context2.  Context1 and Context2 are optional and may\r
+  be NULL.  The function EntryPoint must never return.  This function\r
+  supports a variable number of arguments following the NewStack parameter.\r
+  These additional arguments are ignored on IA-32, x64, and EBC.\r
+  IPF CPUs expect one additional parameter of type VOID * that specifies\r
+  the new backing store pointer.\r
+\r
+  If EntryPoint is NULL, then ASSERT().\r
+  If NewStack is NULL, then ASSERT().\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SwitchStack (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,  OPTIONAL\r
+  IN      VOID                      *Context2,  OPTIONAL\r
+  IN      VOID                      *NewStack,\r
+  ...\r
+  )\r
+{\r
+  VA_LIST    Marker;\r
+\r
+  ASSERT (EntryPoint != NULL);\r
+  ASSERT (NewStack != NULL);\r
+\r
+  VA_START (Marker, NewStack);\r
+\r
+  InternalSwitchStack (EntryPoint, Context1, Context2, NewStack, Marker);\r
+\r
+  //\r
+  // InternalSwitchStack () will never return\r
+  //\r
+  ASSERT (FALSE);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Synchronization.c b/MdePkg/Library/BaseLib/Synchronization.c
new file mode 100644 (file)
index 0000000..30dabfb
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Synchronization.c
@@ -0,0 +1,363 @@
+/** @file\r
+  Implementation of synchronization functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  Synchronization.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+#define SPIN_LOCK_RELEASED          ((UINTN) 1)\r
+#define SPIN_LOCK_ACQUIRED          ((UINTN) 2)\r
+\r
+/**\r
+  Retrieves the architecture specific spin lock alignment requirements for\r
+  optimal spin lock performance.\r
+\r
+  This function retrieves the spin lock alignment requirements for optimal\r
+  performance on a given CPU architecture. The spin lock alignment must be a\r
+  power of two and is returned by this function. If there are no alignment\r
+  requirements, then 1 must be returned. The spin lock synchronization\r
+  functions must function correctly if the spin lock size and alignment values\r
+  returned by this function are not used at all. These values are hints to the\r
+  consumers of the spin lock synchronization functions to obtain optimal spin\r
+  lock performance.\r
+\r
+  @return The architecture specific spin lock alignment.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+GetSpinLockProperties (\r
+  VOID\r
+  )\r
+{\r
+  // @bug May use a PCD entry to determine this alignment.\r
+  return 32;\r
+}\r
+\r
+/**\r
+  Initializes a spin lock to the released state and returns the spin lock.\r
+\r
+  This function initializes the spin lock specified by SpinLock to the released\r
+  state, and returns SpinLock. Optimal performance can be achieved by calling\r
+  GetSpinLockProperties() to determine the size and alignment requirements for\r
+  SpinLock.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to initialize to the released\r
+                    state.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+InitializeSpinLock (\r
+  OUT     SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  ASSERT (SpinLock != NULL);\r
+  *SpinLock = SPIN_LOCK_RELEASED;\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Waits until a spin lock can be placed in the acquired state.\r
+\r
+  This function checks the state of the spin lock specified by SpinLock. If\r
+  SpinLock is in the released state, then this function places SpinLock in the\r
+  acquired state and returns SpinLock. Otherwise, this function waits\r
+  indefinitely for the spin lock to be released, and then places it in the\r
+  acquired state and returns SpinLock. All state transitions of SpinLock must\r
+  be performed using MP safe mechanisms.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+  If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r
+  PcdSpinLockTimeout microseconds, then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to place in the acquired state.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+AcquireSpinLock (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  UINT64                            Tick;\r
+  UINT64                            Start, End;\r
+  UINT64                            Timeout;\r
+\r
+  Tick = 0;\r
+  Start = 0;\r
+  End = 0;\r
+  if (PcdGet32 (PcdSpinLockTimeout) > 0) {\r
+    Tick = GetPerformanceCounter ();\r
+    Timeout = DivU64x32 (\r
+                MultU64x32 (\r
+                  GetPerformanceCounterProperties (&Start, &End),\r
+                  PcdGet32 (PcdSpinLockTimeout)\r
+                  ),\r
+                1000000\r
+                );\r
+    if (Start < End) {\r
+      Tick += Timeout;\r
+    } else {\r
+      Tick -= Timeout;\r
+    }\r
+  }\r
+\r
+  while (!AcquireSpinLockOrFail (SpinLock)) {\r
+    CpuPause ();\r
+    ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));\r
+  }\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Attempts to place a spin lock in the acquired state.\r
+\r
+  This function checks the state of the spin lock specified by SpinLock. If\r
+  SpinLock is in the released state, then this function places SpinLock in the\r
+  acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r
+  transitions of SpinLock must be performed using MP safe mechanisms.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to place in the acquired state.\r
+\r
+  @retval TRUE  SpinLock was placed in the acquired state.\r
+  @retval FALSE SpinLock could not be acquired.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+AcquireSpinLockOrFail (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  SPIN_LOCK    LockValue;\r
+\r
+  ASSERT (SpinLock != NULL);\r
+\r
+  LockValue = *SpinLock;\r
+  ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);\r
+\r
+  return (BOOLEAN)(\r
+           InterlockedCompareExchangePointer (\r
+             (VOID**)SpinLock,\r
+             (VOID*)SPIN_LOCK_RELEASED,\r
+             (VOID*)SPIN_LOCK_ACQUIRED\r
+             ) == (VOID*)SPIN_LOCK_RELEASED\r
+           );\r
+}\r
+\r
+/**\r
+  Releases a spin lock.\r
+\r
+  This function places the spin lock specified by SpinLock in the release state\r
+  and returns SpinLock.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to release.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+ReleaseSpinLock (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  SPIN_LOCK    LockValue;\r
+\r
+  ASSERT (SpinLock != NULL);\r
+\r
+  LockValue = *SpinLock;\r
+  ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);\r
+\r
+  *SpinLock = SPIN_LOCK_RELEASED;\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Performs an atomic increment of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic increment of the 32-bit unsigned integer specified by\r
+  Value and returns the incremented value. The increment operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value A pointer to the 32-bit value to increment.\r
+\r
+  @return The incremented value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedIncrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncIncrement (Value);\r
+}\r
+\r
+/**\r
+  Performs an atomic decrement of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic decrement of the 32-bit unsigned integer specified by\r
+  Value and returns the decremented value. The decrement operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value A pointer to the 32-bit value to decrement.\r
+\r
+  @return The decremented value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedDecrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncDecrement (Value);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
+  specified by Value.  If Value is equal to CompareValue, then Value is set to \r
+  ExchangeValue and CompareValue is returned.  If Value is not equal to CompareValue,\r
+  then Value is returned.  The compare exchange operation must be performed using \r
+  MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the 32-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  32-bit value used in compare operation.\r
+  @param  ExchangeValue 32-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedCompareExchange32 (\r
+  IN OUT  UINT32                    *Value,\r
+  IN      UINT32                    CompareValue,\r
+  IN      UINT32                    ExchangeValue\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified \r
+  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and \r
+  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned. \r
+  The compare exchange operation must be performed using MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the 64-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  64-bit value used in compare operation.\r
+  @param  ExchangeValue 64-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InterlockedCompareExchange64 (\r
+  IN OUT  UINT64                    *Value,\r
+  IN      UINT64                    CompareValue,\r
+  IN      UINT64                    ExchangeValue\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a pointer value.\r
+\r
+  Performs an atomic compare exchange operation on the pointer value specified\r
+  by Value. If Value is equal to CompareValue, then Value is set to\r
+  ExchangeValue and CompareValue is returned. If Value is not equal to\r
+  CompareValue, then Value is returned. The compare exchange operation must be\r
+  performed using MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the pointer value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  Pointer value used in compare operation.\r
+  @param  ExchangeValue Pointer value used in exchange operation.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InterlockedCompareExchangePointer (\r
+  IN OUT  VOID                      **Value,\r
+  IN      VOID                      *CompareValue,\r
+  IN      VOID                      *ExchangeValue\r
+  )\r
+{\r
+  UINT8  SizeOfValue;\r
+\r
+  SizeOfValue = sizeof (*Value);\r
+\r
+  switch (SizeOfValue) {\r
+    case sizeof (UINT32):\r
+      return (VOID*)(UINTN)InterlockedCompareExchange32 (\r
+                             (UINT32*)Value,\r
+                             (UINT32)(UINTN)CompareValue,\r
+                             (UINT32)(UINTN)ExchangeValue\r
+                             );\r
+    case sizeof (UINT64):\r
+      return (VOID*)(UINTN)InterlockedCompareExchange64 (\r
+                             (UINT64*)Value,\r
+                             (UINT64)(UINTN)CompareValue,\r
+                             (UINT64)(UINTN)ExchangeValue\r
+                             );\r
+    default:\r
+      ASSERT (FALSE);\r
+      return NULL;\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/SynchronizationGcc.c b/MdePkg/Library/BaseLib/SynchronizationGcc.c
new file mode 100644 (file)
index 0000000..85a3531
--- /dev/null
+++ b/MdePkg/Library/BaseLib/SynchronizationGcc.c
@@ -0,0 +1,378 @@
+/** @file\r
+  Implementation of synchronization functions.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SynchronizationGcc.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+//\r
+// GCC inline assembly for Read Write Barrier  \r
+//\r
+#define _ReadWriteBarrier() do { asm volatile ("": : : "memory"); } while(0)\r
+\r
+#define SPIN_LOCK_RELEASED          ((UINTN) 1)\r
+#define SPIN_LOCK_ACQUIRED          ((UINTN) 2)\r
+\r
+/**\r
+  Retrieves the architecture specific spin lock alignment requirements for\r
+  optimal spin lock performance.\r
+\r
+  This function retrieves the spin lock alignment requirements for optimal\r
+  performance on a given CPU architecture. The spin lock alignment must be a\r
+  power of two and is returned by this function. If there are no alignment\r
+  requirements, then 1 must be returned. The spin lock synchronization\r
+  functions must function correctly if the spin lock size and alignment values\r
+  returned by this function are not used at all. These values are hints to the\r
+  consumers of the spin lock synchronization functions to obtain optimal spin\r
+  lock performance.\r
+\r
+  @return The architecture specific spin lock alignment.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+GetSpinLockProperties (\r
+  VOID\r
+  )\r
+{\r
+  // @bug May use a PCD entry to determine this alignment.\r
+  return 32;\r
+}\r
+\r
+/**\r
+  Initializes a spin lock to the released state and returns the spin lock.\r
+\r
+  This function initializes the spin lock specified by SpinLock to the released\r
+  state, and returns SpinLock. Optimal performance can be achieved by calling\r
+  GetSpinLockProperties() to determine the size and alignment requirements for\r
+  SpinLock.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to initialize to the released\r
+                    state.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+InitializeSpinLock (\r
+  OUT     SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  ASSERT (SpinLock != NULL);\r
+\r
+  _ReadWriteBarrier();\r
+  *SpinLock = SPIN_LOCK_RELEASED;\r
+  _ReadWriteBarrier();\r
+\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Waits until a spin lock can be placed in the acquired state.\r
+\r
+  This function checks the state of the spin lock specified by SpinLock. If\r
+  SpinLock is in the released state, then this function places SpinLock in the\r
+  acquired state and returns SpinLock. Otherwise, this function waits\r
+  indefinitely for the spin lock to be released, and then places it in the\r
+  acquired state and returns SpinLock. All state transitions of SpinLock must\r
+  be performed using MP safe mechanisms.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+  If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r
+  PcdSpinLockTimeout microseconds, then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to place in the acquired state.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+AcquireSpinLock (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  UINT64                            Tick;\r
+  UINT64                            Start, End;\r
+  UINT64                            Timeout;\r
+\r
+  Tick = 0;\r
+  Start = 0;\r
+  End = 0;\r
+  if (PcdGet32 (PcdSpinLockTimeout) > 0) {\r
+    Tick = GetPerformanceCounter ();\r
+    Timeout = DivU64x32 (\r
+                MultU64x32 (\r
+                  GetPerformanceCounterProperties (&Start, &End),\r
+                  PcdGet32 (PcdSpinLockTimeout)\r
+                  ),\r
+                1000000\r
+                );\r
+    if (Start < End) {\r
+      Tick += Timeout;\r
+    } else {\r
+      Tick -= Timeout;\r
+    }\r
+  }\r
+\r
+  while (!AcquireSpinLockOrFail (SpinLock)) {\r
+    CpuPause ();\r
+    ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));\r
+  }\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Attempts to place a spin lock in the acquired state.\r
+\r
+  This function checks the state of the spin lock specified by SpinLock. If\r
+  SpinLock is in the released state, then this function places SpinLock in the\r
+  acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r
+  transitions of SpinLock must be performed using MP safe mechanisms.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to place in the acquired state.\r
+\r
+  @retval TRUE  SpinLock was placed in the acquired state.\r
+  @retval FALSE SpinLock could not be acquired.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+AcquireSpinLockOrFail (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  SPIN_LOCK   LockValue;\r
+  VOID        *Result;\r
+  \r
+  ASSERT (SpinLock != NULL);\r
+\r
+  LockValue = *SpinLock;\r
+  ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);\r
+\r
+  _ReadWriteBarrier ();\r
+  Result = InterlockedCompareExchangePointer (\r
+             (VOID**)SpinLock,\r
+             (VOID*)SPIN_LOCK_RELEASED,\r
+             (VOID*)SPIN_LOCK_ACQUIRED\r
+           );\r
+\r
+  _ReadWriteBarrier ();\r
+  return (BOOLEAN) (Result == (VOID*) SPIN_LOCK_RELEASED);\r
+}\r
+\r
+/**\r
+  Releases a spin lock.\r
+\r
+  This function places the spin lock specified by SpinLock in the release state\r
+  and returns SpinLock.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to release.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+ReleaseSpinLock (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  SPIN_LOCK    LockValue;\r
+\r
+  ASSERT (SpinLock != NULL);\r
+\r
+  LockValue = *SpinLock;\r
+  ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);\r
+\r
+  _ReadWriteBarrier ();\r
+  *SpinLock = SPIN_LOCK_RELEASED;\r
+  _ReadWriteBarrier ();\r
+\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Performs an atomic increment of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic increment of the 32-bit unsigned integer specified by\r
+  Value and returns the incremented value. The increment operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value A pointer to the 32-bit value to increment.\r
+\r
+  @return The incremented value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedIncrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncIncrement (Value);\r
+}\r
+\r
+/**\r
+  Performs an atomic decrement of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic decrement of the 32-bit unsigned integer specified by\r
+  Value and returns the decremented value. The decrement operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value A pointer to the 32-bit value to decrement.\r
+\r
+  @return The decremented value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedDecrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncDecrement (Value);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
+  specified by Value.  If Value is equal to CompareValue, then Value is set to \r
+  ExchangeValue and CompareValue is returned.  If Value is not equal to CompareValue,\r
+  then Value is returned.  The compare exchange operation must be performed using \r
+  MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the 32-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  32-bit value used in compare operation.\r
+  @param  ExchangeValue 32-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedCompareExchange32 (\r
+  IN OUT  UINT32                    *Value,\r
+  IN      UINT32                    CompareValue,\r
+  IN      UINT32                    ExchangeValue\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified \r
+  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and \r
+  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned. \r
+  The compare exchange operation must be performed using MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the 64-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  64-bit value used in compare operation.\r
+  @param  ExchangeValue 64-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InterlockedCompareExchange64 (\r
+  IN OUT  UINT64                    *Value,\r
+  IN      UINT64                    CompareValue,\r
+  IN      UINT64                    ExchangeValue\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a pointer value.\r
+\r
+  Performs an atomic compare exchange operation on the pointer value specified\r
+  by Value. If Value is equal to CompareValue, then Value is set to\r
+  ExchangeValue and CompareValue is returned. If Value is not equal to\r
+  CompareValue, then Value is returned. The compare exchange operation must be\r
+  performed using MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the pointer value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  Pointer value used in compare operation.\r
+  @param  ExchangeValue Pointer value used in exchange operation.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InterlockedCompareExchangePointer (\r
+  IN OUT  VOID                      **Value,\r
+  IN      VOID                      *CompareValue,\r
+  IN      VOID                      *ExchangeValue\r
+  )\r
+{\r
+  UINT8  SizeOfValue;\r
+\r
+  SizeOfValue = sizeof (*Value);\r
+\r
+  switch (SizeOfValue) {\r
+    case sizeof (UINT32):\r
+      return (VOID*)(UINTN)InterlockedCompareExchange32 (\r
+                             (UINT32*)Value,\r
+                             (UINT32)(UINTN)CompareValue,\r
+                             (UINT32)(UINTN)ExchangeValue\r
+                             );\r
+    case sizeof (UINT64):\r
+      return (VOID*)(UINTN)InterlockedCompareExchange64 (\r
+                             (UINT64*)Value,\r
+                             (UINT64)(UINTN)CompareValue,\r
+                             (UINT64)(UINTN)ExchangeValue\r
+                             );\r
+    default:\r
+      ASSERT (FALSE);\r
+      return NULL;\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/SynchronizationMsc.c b/MdePkg/Library/BaseLib/SynchronizationMsc.c
new file mode 100644 (file)
index 0000000..29f1717
--- /dev/null
+++ b/MdePkg/Library/BaseLib/SynchronizationMsc.c
@@ -0,0 +1,380 @@
+/** @file\r
+  Implementation of synchronization functions.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SynchronizationMsc.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+//\r
+// Microsoft Visual Studio 7.1 Function Prototypes for read write barrier Intrinsics\r
+//\r
+void    _ReadWriteBarrier (void);\r
+#pragma intrinsic(_ReadWriteBarrier)\r
+\r
+\r
+#define SPIN_LOCK_RELEASED          ((UINTN) 1)\r
+#define SPIN_LOCK_ACQUIRED          ((UINTN) 2)\r
+\r
+/**\r
+  Retrieves the architecture specific spin lock alignment requirements for\r
+  optimal spin lock performance.\r
+\r
+  This function retrieves the spin lock alignment requirements for optimal\r
+  performance on a given CPU architecture. The spin lock alignment must be a\r
+  power of two and is returned by this function. If there are no alignment\r
+  requirements, then 1 must be returned. The spin lock synchronization\r
+  functions must function correctly if the spin lock size and alignment values\r
+  returned by this function are not used at all. These values are hints to the\r
+  consumers of the spin lock synchronization functions to obtain optimal spin\r
+  lock performance.\r
+\r
+  @return The architecture specific spin lock alignment.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+GetSpinLockProperties (\r
+  VOID\r
+  )\r
+{\r
+  // @bug May use a PCD entry to determine this alignment.\r
+  return 32;\r
+}\r
+\r
+/**\r
+  Initializes a spin lock to the released state and returns the spin lock.\r
+\r
+  This function initializes the spin lock specified by SpinLock to the released\r
+  state, and returns SpinLock. Optimal performance can be achieved by calling\r
+  GetSpinLockProperties() to determine the size and alignment requirements for\r
+  SpinLock.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to initialize to the released\r
+                    state.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+InitializeSpinLock (\r
+  OUT     SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  ASSERT (SpinLock != NULL);\r
+\r
+  _ReadWriteBarrier();\r
+  *SpinLock = SPIN_LOCK_RELEASED;\r
+  _ReadWriteBarrier();\r
+\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Waits until a spin lock can be placed in the acquired state.\r
+\r
+  This function checks the state of the spin lock specified by SpinLock. If\r
+  SpinLock is in the released state, then this function places SpinLock in the\r
+  acquired state and returns SpinLock. Otherwise, this function waits\r
+  indefinitely for the spin lock to be released, and then places it in the\r
+  acquired state and returns SpinLock. All state transitions of SpinLock must\r
+  be performed using MP safe mechanisms.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+  If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r
+  PcdSpinLockTimeout microseconds, then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to place in the acquired state.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+AcquireSpinLock (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  UINT64                            Tick;\r
+  UINT64                            Start, End;\r
+  UINT64                            Timeout;\r
+\r
+  Tick = 0;\r
+  Start = 0;\r
+  End = 0;\r
+  if (PcdGet32 (PcdSpinLockTimeout) > 0) {\r
+    Tick = GetPerformanceCounter ();\r
+    Timeout = DivU64x32 (\r
+                MultU64x32 (\r
+                  GetPerformanceCounterProperties (&Start, &End),\r
+                  PcdGet32 (PcdSpinLockTimeout)\r
+                  ),\r
+                1000000\r
+                );\r
+    if (Start < End) {\r
+      Tick += Timeout;\r
+    } else {\r
+      Tick -= Timeout;\r
+    }\r
+  }\r
+\r
+  while (!AcquireSpinLockOrFail (SpinLock)) {\r
+    CpuPause ();\r
+    ASSERT ((Start < End) ^ (Tick <= GetPerformanceCounter ()));\r
+  }\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Attempts to place a spin lock in the acquired state.\r
+\r
+  This function checks the state of the spin lock specified by SpinLock. If\r
+  SpinLock is in the released state, then this function places SpinLock in the\r
+  acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r
+  transitions of SpinLock must be performed using MP safe mechanisms.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to place in the acquired state.\r
+\r
+  @retval TRUE  SpinLock was placed in the acquired state.\r
+  @retval FALSE SpinLock could not be acquired.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+AcquireSpinLockOrFail (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  SPIN_LOCK   LockValue;\r
+  VOID        *Result;\r
+  \r
+  ASSERT (SpinLock != NULL);\r
+\r
+  LockValue = *SpinLock;\r
+  ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);\r
+\r
+  _ReadWriteBarrier ();\r
+  Result = InterlockedCompareExchangePointer (\r
+             (VOID**)SpinLock,\r
+             (VOID*)SPIN_LOCK_RELEASED,\r
+             (VOID*)SPIN_LOCK_ACQUIRED\r
+           );\r
+\r
+  _ReadWriteBarrier ();\r
+  return (BOOLEAN) (Result == (VOID*) SPIN_LOCK_RELEASED);\r
+}\r
+\r
+/**\r
+  Releases a spin lock.\r
+\r
+  This function places the spin lock specified by SpinLock in the release state\r
+  and returns SpinLock.\r
+\r
+  If SpinLock is NULL, then ASSERT().\r
+  If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r
+\r
+  @param  SpinLock  A pointer to the spin lock to release.\r
+\r
+  @return SpinLock\r
+\r
+**/\r
+SPIN_LOCK *\r
+EFIAPI\r
+ReleaseSpinLock (\r
+  IN OUT  SPIN_LOCK                 *SpinLock\r
+  )\r
+{\r
+  SPIN_LOCK    LockValue;\r
+\r
+  ASSERT (SpinLock != NULL);\r
+\r
+  LockValue = *SpinLock;\r
+  ASSERT (LockValue == SPIN_LOCK_ACQUIRED || LockValue == SPIN_LOCK_RELEASED);\r
+\r
+  _ReadWriteBarrier ();\r
+  *SpinLock = SPIN_LOCK_RELEASED;\r
+  _ReadWriteBarrier ();\r
+\r
+  return SpinLock;\r
+}\r
+\r
+/**\r
+  Performs an atomic increment of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic increment of the 32-bit unsigned integer specified by\r
+  Value and returns the incremented value. The increment operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value A pointer to the 32-bit value to increment.\r
+\r
+  @return The incremented value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedIncrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncIncrement (Value);\r
+}\r
+\r
+/**\r
+  Performs an atomic decrement of an 32-bit unsigned integer.\r
+\r
+  Performs an atomic decrement of the 32-bit unsigned integer specified by\r
+  Value and returns the decremented value. The decrement operation must be\r
+  performed using MP safe mechanisms. The state of the return value is not\r
+  guaranteed to be MP safe.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value A pointer to the 32-bit value to decrement.\r
+\r
+  @return The decremented value.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedDecrement (\r
+  IN      UINT32                    *Value\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncDecrement (Value);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 32-bit unsigned integer\r
+  specified by Value.  If Value is equal to CompareValue, then Value is set to \r
+  ExchangeValue and CompareValue is returned.  If Value is not equal to CompareValue,\r
+  then Value is returned.  The compare exchange operation must be performed using \r
+  MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the 32-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  32-bit value used in compare operation.\r
+  @param  ExchangeValue 32-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+InterlockedCompareExchange32 (\r
+  IN OUT  UINT32                    *Value,\r
+  IN      UINT32                    CompareValue,\r
+  IN      UINT32                    ExchangeValue\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncCompareExchange32 (Value, CompareValue, ExchangeValue);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r
+\r
+  Performs an atomic compare exchange operation on the 64-bit unsigned integer specified \r
+  by Value.  If Value is equal to CompareValue, then Value is set to ExchangeValue and \r
+  CompareValue is returned.  If Value is not equal to CompareValue, then Value is returned. \r
+  The compare exchange operation must be performed using MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the 64-bit value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  64-bit value used in compare operation.\r
+  @param  ExchangeValue 64-bit value used in exchange operation.\r
+\r
+  @return The original *Value before exchange.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+InterlockedCompareExchange64 (\r
+  IN OUT  UINT64                    *Value,\r
+  IN      UINT64                    CompareValue,\r
+  IN      UINT64                    ExchangeValue\r
+  )\r
+{\r
+  ASSERT (Value != NULL);\r
+  return InternalSyncCompareExchange64 (Value, CompareValue, ExchangeValue);\r
+}\r
+\r
+/**\r
+  Performs an atomic compare exchange operation on a pointer value.\r
+\r
+  Performs an atomic compare exchange operation on the pointer value specified\r
+  by Value. If Value is equal to CompareValue, then Value is set to\r
+  ExchangeValue and CompareValue is returned. If Value is not equal to\r
+  CompareValue, then Value is returned. The compare exchange operation must be\r
+  performed using MP safe mechanisms.\r
+\r
+  If Value is NULL, then ASSERT().\r
+\r
+  @param  Value         A pointer to the pointer value for the compare exchange\r
+                        operation.\r
+  @param  CompareValue  Pointer value used in compare operation.\r
+  @param  ExchangeValue Pointer value used in exchange operation.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InterlockedCompareExchangePointer (\r
+  IN OUT  VOID                      **Value,\r
+  IN      VOID                      *CompareValue,\r
+  IN      VOID                      *ExchangeValue\r
+  )\r
+{\r
+  UINT8  SizeOfValue;\r
+\r
+  SizeOfValue = sizeof (*Value);\r
+\r
+  switch (SizeOfValue) {\r
+    case sizeof (UINT32):\r
+      return (VOID*)(UINTN)InterlockedCompareExchange32 (\r
+                             (UINT32*)Value,\r
+                             (UINT32)(UINTN)CompareValue,\r
+                             (UINT32)(UINTN)ExchangeValue\r
+                             );\r
+    case sizeof (UINT64):\r
+      return (VOID*)(UINTN)InterlockedCompareExchange64 (\r
+                             (UINT64*)Value,\r
+                             (UINT64)(UINTN)CompareValue,\r
+                             (UINT64)(UINTN)ExchangeValue\r
+                             );\r
+    default:\r
+      ASSERT (FALSE);\r
+      return NULL;\r
+  }\r
+}\r

diff --git a/MdePkg/Library/BaseLib/Unaligned.c b/MdePkg/Library/BaseLib/Unaligned.c
new file mode 100644 (file)
index 0000000..fef8343
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Unaligned.c
@@ -0,0 +1,225 @@
+/** @file\r
+  Unaligned access functions of BaseLib.\r
+\r
+  Copyright (c) 2006, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  Unaligned.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Reads a 16-bit value from memory that may be unaligned.\r
+\r
+  This function returns the 16-bit value pointed to by Buffer. The function\r
+  guarantees that the read operation does not produce an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 16-bit value that may be unaligned.\r
+\r
+  @return *Uint16\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+ReadUnaligned16 (\r
+  IN      CONST UINT16              *Buffer\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  return *Buffer;\r
+}\r
+\r
+/**\r
+  Writes a 16-bit value to memory that may be unaligned.\r
+\r
+  This function writes the 16-bit value specified by Value to Buffer. Value is\r
+  returned. The function guarantees that the write operation does not produce\r
+  an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 16-bit value that may be unaligned.\r
+  @param  Value   16-bit value to write to Buffer.\r
+\r
+  @return Value\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+WriteUnaligned16 (\r
+  OUT     UINT16                    *Buffer,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  return *Buffer = Value;\r
+}\r
+\r
+/**\r
+  Reads a 24-bit value from memory that may be unaligned.\r
+\r
+  This function returns the 24-bit value pointed to by Buffer. The function\r
+  guarantees that the read operation does not produce an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 24-bit value that may be unaligned.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+ReadUnaligned24 (\r
+  IN      CONST UINT32              *Buffer\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  return *Buffer & 0xffffff;\r
+}\r
+\r
+/**\r
+  Writes a 24-bit value to memory that may be unaligned.\r
+\r
+  This function writes the 24-bit value specified by Value to Buffer. Value is\r
+  returned. The function guarantees that the write operation does not produce\r
+  an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 24-bit value that may be unaligned.\r
+  @param  Value   24-bit value to write to Buffer.\r
+\r
+  @return The value written.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+WriteUnaligned24 (\r
+  OUT     UINT32                    *Buffer,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  *Buffer = BitFieldWrite32 (*Buffer, 0, 23, Value);\r
+  return Value;\r
+}\r
+\r
+/**\r
+  Reads a 32-bit value from memory that may be unaligned.\r
+\r
+  This function returns the 32-bit value pointed to by Buffer. The function\r
+  guarantees that the read operation does not produce an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 32-bit value that may be unaligned.\r
+\r
+  @return *Uint32\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+ReadUnaligned32 (\r
+  IN      CONST UINT32              *Buffer\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  return *Buffer;\r
+}\r
+\r
+/**\r
+  Writes a 32-bit value to memory that may be unaligned.\r
+\r
+  This function writes the 32-bit value specified by Value to Buffer. Value is\r
+  returned. The function guarantees that the write operation does not produce\r
+  an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 32-bit value that may be unaligned.\r
+  @param  Value   32-bit value to write to Buffer.\r
+\r
+  @return Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+WriteUnaligned32 (\r
+  OUT     UINT32                    *Buffer,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  return *Buffer = Value;\r
+}\r
+\r
+/**\r
+  Reads a 64-bit value from memory that may be unaligned.\r
+\r
+  This function returns the 64-bit value pointed to by Buffer. The function\r
+  guarantees that the read operation does not produce an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 64-bit value that may be unaligned.\r
+\r
+  @return *Uint64\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+ReadUnaligned64 (\r
+  IN      CONST UINT64              *Buffer\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  return *Buffer;\r
+}\r
+\r
+/**\r
+  Writes a 64-bit value to memory that may be unaligned.\r
+\r
+  This function writes the 64-bit value specified by Value to Buffer. Value is\r
+  returned. The function guarantees that the write operation does not produce\r
+  an alignment fault.\r
+\r
+  If the Buffer is NULL, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a 64-bit value that may be unaligned.\r
+  @param  Value   64-bit value to write to Buffer.\r
+\r
+  @return Value\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+WriteUnaligned64 (\r
+  OUT     UINT64                    *Buffer,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+\r
+  return *Buffer = Value;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86DisablePaging32.c b/MdePkg/Library/BaseLib/x86DisablePaging32.c
new file mode 100644 (file)
index 0000000..9e72141
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86DisablePaging32.c
@@ -0,0 +1,70 @@
+/** @file\r
+  IA-32/x64 AsmDisablePaging32()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86DisablePaging32.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Disables the 32-bit paging mode on the CPU.\r
+\r
+  Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
+  mode. This function assumes the current execution mode is 32-paged protected\r
+  mode. This function is only available on IA-32. After the 32-bit paging mode\r
+  is disabled, control is transferred to the function specified by EntryPoint\r
+  using the new stack specified by NewStack and passing in the parameters\r
+  specified by Context1 and Context2. Context1 and Context2 are optional and\r
+  may be NULL. The function EntryPoint must never return.\r
+\r
+  If the current execution mode is not 32-bit paged mode, then ASSERT().\r
+  If EntryPoint is NULL, then ASSERT().\r
+  If NewStack is NULL, then ASSERT().\r
+\r
+  There are a number of constraints that must be followed before calling this\r
+  function:\r
+  1)  Interrupts must be disabled.\r
+  2)  The caller must be in 32-bit paged mode.\r
+  3)  CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
+  4)  CR3 must point to valid page tables that guarantee that the pages for\r
+      this function and the stack are identity mapped.\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack after\r
+                      paging is disabled.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function as the first parameter after paging is disabled.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function as the second parameter after paging is\r
+                      disabled.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function after paging is disabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmDisablePaging32 (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,  OPTIONAL\r
+  IN      VOID                      *Context2,  OPTIONAL\r
+  IN      VOID                      *NewStack\r
+  )\r
+{\r
+  ASSERT (EntryPoint != NULL);\r
+  ASSERT (NewStack != NULL);\r
+  InternalX86DisablePaging32 (EntryPoint, Context1, Context2, NewStack);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86DisablePaging64.c b/MdePkg/Library/BaseLib/x86DisablePaging64.c
new file mode 100644 (file)
index 0000000..527950e
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86DisablePaging64.c
@@ -0,0 +1,67 @@
+/** @file\r
+  IA-32/x64 AsmDisablePaging64()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86DisablePaging64.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Disables the 64-bit paging mode on the CPU.\r
+\r
+  Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
+  mode. This function assumes the current execution mode is 64-paging mode.\r
+  This function is only available on X64. After the 64-bit paging mode is\r
+  disabled, control is transferred to the function specified by EntryPoint\r
+  using the new stack specified by NewStack and passing in the parameters\r
+  specified by Context1 and Context2. Context1 and Context2 are optional and\r
+  may be 0. The function EntryPoint must never return.\r
+\r
+  If the current execution mode is not 64-bit paged mode, then ASSERT().\r
+  If EntryPoint is 0, then ASSERT().\r
+  If NewStack is 0, then ASSERT().\r
+\r
+  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
+                      is called. The descriptor in the GDT that this selector\r
+                      references must be setup for 32-bit protected mode.\r
+  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
+                      the new stack after paging is disabled.\r
+  @param  Context1    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the first parameter after\r
+                      paging is disabled.\r
+  @param  Context2    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the second parameter after\r
+                      paging is disabled.\r
+  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
+                      the EntryPoint function after paging is disabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmDisablePaging64 (\r
+  IN      UINT16                    Cs,\r
+  IN      UINT32                    EntryPoint,\r
+  IN      UINT32                    Context1,  OPTIONAL\r
+  IN      UINT32                    Context2,  OPTIONAL\r
+  IN      UINT32                    NewStack\r
+  )\r
+{\r
+  ASSERT (EntryPoint != 0);\r
+  ASSERT (NewStack != 0);\r
+  InternalX86DisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86EnablePaging32.c b/MdePkg/Library/BaseLib/x86EnablePaging32.c
new file mode 100644 (file)
index 0000000..9efacb4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86EnablePaging32.c
@@ -0,0 +1,73 @@
+/** @file\r
+  IA-32/x64 AsmEnablePaging32()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86EnablePaging32.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Enables the 32-bit paging mode on the CPU.\r
+\r
+  Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
+  must be properly initialized prior to calling this service. This function\r
+  assumes the current execution mode is 32-bit protected mode. This function is\r
+  only available on IA-32. After the 32-bit paging mode is enabled, control is\r
+  transferred to the function specified by EntryPoint using the new stack\r
+  specified by NewStack and passing in the parameters specified by Context1 and\r
+  Context2. Context1 and Context2 are optional and may be NULL. The function\r
+  EntryPoint must never return.\r
+\r
+  If the current execution mode is not 32-bit protected mode, then ASSERT().\r
+  If EntryPoint is NULL, then ASSERT().\r
+  If NewStack is NULL, then ASSERT().\r
+\r
+  There are a number of constraints that must be followed before calling this\r
+  function:\r
+  1)  Interrupts must be disabled.\r
+  2)  The caller must be in 32-bit protected mode with flat descriptors. This\r
+      means all descriptors must have a base of 0 and a limit of 4GB.\r
+  3)  CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
+      descriptors.\r
+  4)  CR3 must point to valid page tables that will be used once the transition\r
+      is complete, and those page tables must guarantee that the pages for this\r
+      function and the stack are identity mapped.\r
+\r
+  @param  EntryPoint  A pointer to function to call with the new stack after\r
+                      paging is enabled.\r
+  @param  Context1    A pointer to the context to pass into the EntryPoint\r
+                      function as the first parameter after paging is enabled.\r
+  @param  Context2    A pointer to the context to pass into the EntryPoint\r
+                      function as the second parameter after paging is enabled.\r
+  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
+                      function after paging is enabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmEnablePaging32 (\r
+  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
+  IN      VOID                      *Context1,  OPTIONAL\r
+  IN      VOID                      *Context2,  OPTIONAL\r
+  IN      VOID                      *NewStack\r
+  )\r
+{\r
+  ASSERT (EntryPoint != NULL);\r
+  ASSERT (NewStack != NULL);\r
+  InternalX86EnablePaging32 (EntryPoint, Context1, Context2, NewStack);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86EnablePaging64.c b/MdePkg/Library/BaseLib/x86EnablePaging64.c
new file mode 100644 (file)
index 0000000..75647d7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86EnablePaging64.c
@@ -0,0 +1,69 @@
+/** @file\r
+  IA-32/x64 AsmEnablePaging64()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86EnablePaging64.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Enables the 64-bit paging mode on the CPU.\r
+\r
+  Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
+  must be properly initialized prior to calling this service. This function\r
+  assumes the current execution mode is 32-bit protected mode with flat\r
+  descriptors. This function is only available on IA-32. After the 64-bit\r
+  paging mode is enabled, control is transferred to the function specified by\r
+  EntryPoint using the new stack specified by NewStack and passing in the\r
+  parameters specified by Context1 and Context2. Context1 and Context2 are\r
+  optional and may be 0. The function EntryPoint must never return.\r
+\r
+  If the current execution mode is not 32-bit protected mode with flat\r
+  descriptors, then ASSERT().\r
+  If EntryPoint is 0, then ASSERT().\r
+  If NewStack is 0, then ASSERT().\r
+\r
+  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
+                      is called. The descriptor in the GDT that this selector\r
+                      references must be setup for long mode.\r
+  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
+                      the new stack after paging is enabled.\r
+  @param  Context1    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the first parameter after\r
+                      paging is enabled.\r
+  @param  Context2    The 64-bit virtual address of the context to pass into\r
+                      the EntryPoint function as the second parameter after\r
+                      paging is enabled.\r
+  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
+                      the EntryPoint function after paging is enabled.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmEnablePaging64 (\r
+  IN      UINT16                    Cs,\r
+  IN      UINT64                    EntryPoint,\r
+  IN      UINT64                    Context1,  OPTIONAL\r
+  IN      UINT64                    Context2,  OPTIONAL\r
+  IN      UINT64                    NewStack\r
+  )\r
+{\r
+  ASSERT (EntryPoint != 0);\r
+  ASSERT (NewStack != 0);\r
+  InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86FxRestore.c b/MdePkg/Library/BaseLib/x86FxRestore.c
new file mode 100644 (file)
index 0000000..c3f76d4
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86FxRestore.c
@@ -0,0 +1,53 @@
+/** @file\r
+  IA-32/x64 AsmFxRestore()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86FxRestore.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Restores the current floating point/SSE/SSE2 context from a buffer.\r
+\r
+  Restores the current floating point/SSE/SSE2 state from the buffer specified\r
+  by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
+  only available on IA-32 and X64.\r
+\r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
+  If Buffer was not saved with AsmFxSave(), then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmFxRestore (\r
+  IN CONST IA32_FX_BUFFER  *Buffer\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & 0xf) == 0);\r
+\r
+  //\r
+  // Check the flag recorded by AsmFxSave()\r
+  //\r
+  ASSERT (*(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) == 0xAA5555AA);\r
+\r
+  InternalX86FxRestore (Buffer);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86FxSave.c b/MdePkg/Library/BaseLib/x86FxSave.c
new file mode 100644 (file)
index 0000000..2ccbe48
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86FxSave.c
@@ -0,0 +1,52 @@
+/** @file\r
+  IA-32/x64 AsmFxSave()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86FxSave.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Save the current floating point/SSE/SSE2 context to a buffer.\r
+\r
+  Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
+  Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
+  available on IA-32 and X64.\r
+\r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmFxSave (\r
+  OUT     IA32_FX_BUFFER            *Buffer\r
+  )\r
+{\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & 0xf) == 0);\r
+\r
+  InternalX86FxSave (Buffer);\r
+\r
+  //\r
+  // Mark one flag at end of Buffer, it will be check by AsmFxRestor()\r
+  //\r
+  *(UINT32 *) (&Buffer[sizeof (IA32_FX_BUFFER) - 4]) = 0xAA5555AA;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86GetInterruptState.c b/MdePkg/Library/BaseLib/x86GetInterruptState.c
new file mode 100644 (file)
index 0000000..fd108e1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86GetInterruptState.c
@@ -0,0 +1,44 @@
+/** @file\r
+  IA-32/x64 GetInterruptState()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86GetInterruptState.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Retrieves the current CPU interrupt state.\r
+\r
+  Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r
+  currently enabled. Otherwise returns FALSE.\r
+\r
+  @retval TRUE  CPU interrupts are enabled.\r
+  @retval FALSE CPU interrupts are disabled.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+GetInterruptState (\r
+  VOID\r
+  )\r
+{\r
+  IA32_EFLAGS32                     EFlags;\r
+\r
+  EFlags.UintN = AsmReadEflags ();\r
+  return (BOOLEAN)(EFlags.Bits.IF == 1);\r
+}\r
+\r
+\r

diff --git a/MdePkg/Library/BaseLib/x86MemoryFence.c b/MdePkg/Library/BaseLib/x86MemoryFence.c
new file mode 100644 (file)
index 0000000..4c824d2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86MemoryFence.c
@@ -0,0 +1,36 @@
+/** @file\r
+  IA-32/x64 MemoryFence().\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86MemoryFence.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Used to serialize load and store operations.\r
+\r
+  All loads and stores that proceed calls to this function are guaranteed to be\r
+  globally visible when this function returns.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+MemoryFence (\r
+  VOID\r
+  )\r
+{\r
+  return;\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86Msr.c b/MdePkg/Library/BaseLib/x86Msr.c
new file mode 100644 (file)
index 0000000..a9ad242
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86Msr.c
@@ -0,0 +1,654 @@
+/** @file\r
+  IA-32/x64 MSR functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86Msr.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Returns the lower 32-bits of a Machine Specific Register(MSR).\r
+\r
+  Reads and returns the lower 32-bits of the MSR specified by Index.\r
+  No parameter checking is performed on Index, and some Index values may cause\r
+  CPU exceptions. The caller must either guarantee that Index is valid, or the\r
+  caller must set up exception handlers to catch the exceptions. This function\r
+  is only available on IA-32 and X64.\r
+\r
+  @param  Index The 32-bit MSR index to read.\r
+\r
+  @return The lower 32 bits of the MSR identified by Index.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmReadMsr32 (\r
+  IN      UINT32                    Index\r
+  )\r
+{\r
+  return (UINT32)AsmReadMsr64 (Index);\r
+}\r
+\r
+/**\r
+  Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).\r
+\r
+  Writes the 32-bit value specified by Value to the MSR specified by Index. The\r
+  upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r
+  the MSR is returned. No parameter checking is performed on Index or Value,\r
+  and some of these may cause CPU exceptions. The caller must either guarantee\r
+  that Index and Value are valid, or the caller must establish proper exception\r
+  handlers. This function is only available on IA-32 and X64.\r
+\r
+  @param  Index The 32-bit MSR index to write.\r
+  @param  Value The 32-bit value to write to the MSR.\r
+\r
+  @return Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmWriteMsr32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  return (UINT32)AsmWriteMsr64 (Index, Value);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r
+  writes the result back to the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+  between the lower 32-bits of the read result and the value specified by\r
+  OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
+  32-bits of the value written to the MSR is returned. No parameter checking is\r
+  performed on Index or OrData, and some of these may cause CPU exceptions. The\r
+  caller must either guarantee that Index and OrData are valid, or the caller\r
+  must establish proper exception handlers. This function is only available on\r
+  IA-32 and X64.\r
+\r
+  @param  Index   The 32-bit MSR index to write.\r
+  @param  OrData  The value to OR with the read value from the MSR.\r
+\r
+  @return The lower 32-bit value written to the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrOr32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return (UINT32)AsmMsrOr64 (Index, OrData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r
+  the result back to the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
+  lower 32-bits of the read result and the value specified by AndData, and\r
+  writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r
+  the value written to the MSR is returned. No parameter checking is performed\r
+  on Index or AndData, and some of these may cause CPU exceptions. The caller\r
+  must either guarantee that Index and AndData are valid, or the caller must\r
+  establish proper exception handlers. This function is only available on IA-32\r
+  and X64.\r
+\r
+  @param  Index   The 32-bit MSR index to write.\r
+  @param  AndData The value to AND with the read value from the MSR.\r
+\r
+  @return The lower 32-bit value written to the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrAnd32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return (UINT32)AsmMsrAnd64 (Index, AndData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r
+  on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
+  lower 32-bits of the read result and the value specified by AndData\r
+  preserving the upper 32-bits, performs a bitwise inclusive OR between the\r
+  result of the AND operation and the value specified by OrData, and writes the\r
+  result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
+  written to the MSR is returned. No parameter checking is performed on Index,\r
+  AndData, or OrData, and some of these may cause CPU exceptions. The caller\r
+  must either guarantee that Index, AndData, and OrData are valid, or the\r
+  caller must establish proper exception handlers. This function is only\r
+  available on IA-32 and X64.\r
+\r
+  @param  Index   The 32-bit MSR index to write.\r
+  @param  AndData The value to AND with the read value from the MSR.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The lower 32-bit value written to the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrAndThenOr32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of an MSR.\r
+\r
+  Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned. The caller must either guarantee that Index is valid, or the caller\r
+  must set up exception handlers to catch the exceptions. This function is only\r
+  available on IA-32 and X64.\r
+\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The bit field read from the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrBitFieldRead32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to an MSR.\r
+\r
+  Writes Value to a bit field in the lower 32-bits of a  64-bit MSR. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination MSR are preserved. The lower 32-bits of the MSR written is\r
+  returned. Extra left bits in Value are stripped. The caller must either\r
+  guarantee that Index and the data written is valid, or the caller must set up\r
+  exception handlers to catch the exceptions. This function is only available\r
+  on IA-32 and X64.\r
+\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The lower 32-bit of the value written to the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrBitFieldWrite32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (Value) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
+  result back to the bit field in the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
+  written to the MSR are returned. Extra left bits in OrData are stripped. The\r
+  caller must either guarantee that Index and the data written is valid, or\r
+  the caller must set up exception handlers to catch the exceptions. This\r
+  function is only available on IA-32 and X64.\r
+\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with the read value from the MSR.\r
+\r
+  @return The lower 32-bit of the value written to the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrBitFieldOr32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (OrData) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
+  result back to the bit field in the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
+  read result and the value specified by AndData, and writes the result to the\r
+  64-bit MSR specified by Index. The lower 32-bits of the value written to the\r
+  MSR are returned. Extra left bits in AndData are stripped. The caller must\r
+  either guarantee that Index and the data written is valid, or the caller must\r
+  set up exception handlers to catch the exceptions. This function is only\r
+  available on IA-32 and X64.\r
+\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the read value from the MSR.\r
+\r
+  @return The lower 32-bit of the value written to the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrBitFieldAnd32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (AndData) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  AndData, and writes the result to the 64-bit MSR specified by Index. The\r
+  lower 32-bits of the value written to the MSR are returned. Extra left bits\r
+  in both AndData and OrData are stripped. The caller must either guarantee\r
+  that Index and the data written is valid, or the caller must set up exception\r
+  handlers to catch the exceptions. This function is only available on IA-32\r
+  and X64.\r
+\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the read value from the MSR.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The lower 32-bit of the value written to the MSR.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+AsmMsrBitFieldAndThenOr32 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT (EndBit < sizeof (AndData) * 8);\r
+  ASSERT (StartBit <= EndBit);\r
+  return (UINT32)AsmMsrBitFieldAndThenOr64 (\r
+                   Index,\r
+                   StartBit,\r
+                   EndBit,\r
+                   AndData,\r
+                   OrData\r
+                   );\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r
+  back to the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 64-bit MSR specified by Index. The value written to the MSR is\r
+  returned. No parameter checking is performed on Index or OrData, and some of\r
+  these may cause CPU exceptions. The caller must either guarantee that Index\r
+  and OrData are valid, or the caller must establish proper exception handlers.\r
+  This function is only available on IA-32 and X64.\r
+\r
+  @param  Index   The 32-bit MSR index to write.\r
+  @param  OrData  The value to OR with the read value from the MSR.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrOr64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r
+  64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
+  read result and the value specified by OrData, and writes the result to the\r
+  64-bit MSR specified by Index. The value written to the MSR is returned. No\r
+  parameter checking is performed on Index or OrData, and some of these may\r
+  cause CPU exceptions. The caller must either guarantee that Index and OrData\r
+  are valid, or the caller must establish proper exception handlers. This\r
+  function is only available on IA-32 and X64.\r
+\r
+  @param  Index   The 32-bit MSR index to write.\r
+  @param  AndData The value to AND with the read value from the MSR.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrAnd64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINT64                    AndData\r
+  )\r
+{\r
+  return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);\r
+}\r
+\r
+/**\r
+  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r
+  OR, and writes the result back to the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
+  result and the value specified by AndData, performs a bitwise inclusive OR\r
+  between the result of the AND operation and the value specified by OrData,\r
+  and writes the result to the 64-bit MSR specified by Index. The value written\r
+  to the MSR is returned. No parameter checking is performed on Index, AndData,\r
+  or OrData, and some of these may cause CPU exceptions. The caller must either\r
+  guarantee that Index, AndData, and OrData are valid, or the caller must\r
+  establish proper exception handlers. This function is only available on IA-32\r
+  and X64.\r
+\r
+  @param  Index   The 32-bit MSR index to write.\r
+  @param  AndData The value to AND with the read value from the MSR.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrAndThenOr64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINT64                    AndData,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of an MSR.\r
+\r
+  Reads the bit field in the 64-bit MSR. The bit field is specified by the\r
+  StartBit and the EndBit. The value of the bit field is returned. The caller\r
+  must either guarantee that Index is valid, or the caller must set up\r
+  exception handlers to catch the exceptions. This function is only available\r
+  on IA-32 and X64.\r
+\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrBitFieldRead64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to an MSR.\r
+\r
+  Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
+  the StartBit and the EndBit. All other bits in the destination MSR are\r
+  preserved. The MSR written is returned. Extra left bits in Value are\r
+  stripped. The caller must either guarantee that Index and the data written is\r
+  valid, or the caller must set up exception handlers to catch the exceptions.\r
+  This function is only available on IA-32 and X64.\r
+\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrBitFieldWrite64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  return AsmWriteMsr64 (\r
+           Index,\r
+           BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r
+  writes the result back to the bit field in the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
+  between the read result and the value specified by OrData, and writes the\r
+  result to the 64-bit MSR specified by Index. The value written to the MSR is\r
+  returned. Extra left bits in OrData are stripped. The caller must either\r
+  guarantee that Index and the data written is valid, or the caller must set up\r
+  exception handlers to catch the exceptions. This function is only available\r
+  on IA-32 and X64.\r
+\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  OrData    The value to OR with the read value from the bit field.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrBitFieldOr64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return AsmWriteMsr64 (\r
+           Index,\r
+           BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
+  result back to the bit field in the 64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
+  read result and the value specified by AndData, and writes the result to the\r
+  64-bit MSR specified by Index. The value written to the MSR is returned.\r
+  Extra left bits in AndData are stripped. The caller must either guarantee\r
+  that Index and the data written is valid, or the caller must set up exception\r
+  handlers to catch the exceptions. This function is only available on IA-32\r
+  and X64.\r
+\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with the read value from the bit field.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrBitFieldAnd64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData\r
+  )\r
+{\r
+  return AsmWriteMsr64 (\r
+           Index,\r
+           BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  64-bit MSR.\r
+\r
+  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
+  a bitwise inclusive OR between the read result and the value specified by\r
+  AndData, and writes the result to the 64-bit MSR specified by Index. The\r
+  value written to the MSR is returned. Extra left bits in both AndData and\r
+  OrData are stripped. The caller must either guarantee that Index and the data\r
+  written is valid, or the caller must set up exception handlers to catch the\r
+  exceptions. This function is only available on IA-32 and X64.\r
+\r
+  If StartBit is greater than 63, then ASSERT().\r
+  If EndBit is greater than 63, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Index     The 32-bit MSR index to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..63.\r
+  @param  AndData   The value to AND with the read value from the bit field.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the MSR.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+AsmMsrBitFieldAndThenOr64 (\r
+  IN      UINT32                    Index,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT64                    AndData,\r
+  IN      UINT64                    OrData\r
+  )\r
+{\r
+  return AsmWriteMsr64 (\r
+           Index,\r
+           BitFieldAndThenOr64 (\r
+             AsmReadMsr64 (Index),\r
+             StartBit,\r
+             EndBit,\r
+             AndData,\r
+             OrData\r
+             )\r
+           );\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86ReadGdtr.c b/MdePkg/Library/BaseLib/x86ReadGdtr.c
new file mode 100644 (file)
index 0000000..c1b75d1
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86ReadGdtr.c
@@ -0,0 +1,43 @@
+/** @file\r
+  IA-32/x64 AsmReadGdtr()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86ReadGdtr.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
+\r
+  Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
+  function is only available on IA-32 and X64.\r
+\r
+  If Gdtr is NULL, then ASSERT().\r
+\r
+  @param  Gdtr  Pointer to a GDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmReadGdtr (\r
+  OUT     IA32_DESCRIPTOR           *Gdtr\r
+  )\r
+{\r
+  ASSERT (Gdtr != NULL);\r
+  InternalX86ReadGdtr (Gdtr);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86ReadIdtr.c b/MdePkg/Library/BaseLib/x86ReadIdtr.c
new file mode 100644 (file)
index 0000000..c5a0d65
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86ReadIdtr.c
@@ -0,0 +1,43 @@
+/** @file\r
+  IA-32/x64 AsmReadIdtr()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86ReadIdtr.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
+\r
+  Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
+  function is only available on IA-32 and X64.\r
+\r
+  If Idtr is NULL, then ASSERT().\r
+\r
+  @param  Idtr  Pointer to a IDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmReadIdtr (\r
+  OUT     IA32_DESCRIPTOR           *Idtr\r
+  )\r
+{\r
+  ASSERT (Idtr != NULL);\r
+  InternalX86ReadIdtr (Idtr);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86Thunk.c b/MdePkg/Library/BaseLib/x86Thunk.c
new file mode 100644 (file)
index 0000000..44b452c
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86Thunk.c
@@ -0,0 +1,248 @@
+/** @file\r
+  Real Mode Thunk Functions for IA32 and X64.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86Thunk.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+//\r
+// Byte packed structure for a segment descriptor in a GDT/LDT\r
+//\r
+typedef union {\r
+  struct {\r
+    UINT32  LimitLow:16;\r
+    UINT32  BaseLow:16;\r
+    UINT32  BaseMid:8;\r
+    UINT32  Type:4;\r
+    UINT32  S:1;\r
+    UINT32  DPL:2;\r
+    UINT32  P:1;\r
+    UINT32  LimitHigh:4;\r
+    UINT32  AVL:1;\r
+    UINT32  L:1;\r
+    UINT32  DB:1;\r
+    UINT32  G:1;\r
+    UINT32  BaseHigh:8;\r
+  } Bits;\r
+  UINT64  Uint64;\r
+} IA32_SEGMENT_DESCRIPTOR;\r
+\r
+extern CONST UINT8                  m16Start;\r
+extern CONST UINT16                 m16Size;\r
+extern CONST UINT16                 mThunk16Attr;\r
+extern CONST UINT16                 m16Gdt;\r
+extern CONST UINT16                 m16GdtrBase;\r
+extern CONST UINT16                 mTransition;\r
+\r
+/**\r
+  Invokes 16-bit code in big real mode and returns the updated register set.\r
+\r
+  This function transfers control to the 16-bit code specified by CS:EIP using\r
+  the stack specified by SS:ESP in RegisterSet. The updated registers are saved\r
+  on the real mode stack and the starting address of the save area is returned.\r
+\r
+  @param  RegisterSet Values of registers before invocation of 16-bit code.\r
+  @param  Transition  Pointer to the transition code under 1MB.\r
+\r
+  @return The pointer to a IA32_REGISTER_SET structure containing the updated\r
+          register values.\r
+\r
+**/\r
+IA32_REGISTER_SET *\r
+EFIAPI\r
+InternalAsmThunk16 (\r
+  IN      IA32_REGISTER_SET         *RegisterSet,\r
+  IN OUT  VOID                      *Transition\r
+  );\r
+\r
+/**\r
+  Retrieves the properties for 16-bit thunk functions.\r
+\r
+  Computes the size of the buffer and stack below 1MB required to use the\r
+  AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r
+  buffer size is returned in RealModeBufferSize, and the stack size is returned\r
+  in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
+  then the actual minimum stack size is ExtraStackSize plus the maximum number\r
+  of bytes that need to be passed to the 16-bit real mode code.\r
+\r
+  If RealModeBufferSize is NULL, then ASSERT().\r
+  If ExtraStackSize is NULL, then ASSERT().\r
+\r
+  @param  RealModeBufferSize  A pointer to the size of the buffer below 1MB\r
+                              required to use the 16-bit thunk functions.\r
+  @param  ExtraStackSize      A pointer to the extra size of stack below 1MB\r
+                              that the 16-bit thunk functions require for\r
+                              temporary storage in the transition to and from\r
+                              16-bit real mode.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmGetThunk16Properties (\r
+  OUT     UINT32                    *RealModeBufferSize,\r
+  OUT     UINT32                    *ExtraStackSize\r
+  )\r
+{\r
+  ASSERT (RealModeBufferSize != NULL);\r
+  ASSERT (ExtraStackSize != NULL);\r
+\r
+  *RealModeBufferSize = m16Size;\r
+\r
+  //\r
+  // Extra 4 bytes for return address, and another 4 bytes for mode transition\r
+  //\r
+  *ExtraStackSize = sizeof (IA32_DWORD_REGS) + 8;\r
+}\r
+\r
+/**\r
+  Prepares all structures a code required to use AsmThunk16().\r
+\r
+  Prepares all structures and code required to use AsmThunk16().\r
+\r
+  If ThunkContext is NULL, then ASSERT().\r
+\r
+  @param  ThunkContext  A pointer to the context structure that describes the\r
+                        16-bit real mode code to call.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmPrepareThunk16 (\r
+  OUT     THUNK_CONTEXT             *ThunkContext\r
+  )\r
+{\r
+  IA32_SEGMENT_DESCRIPTOR           *RealModeGdt;\r
+\r
+  ASSERT (ThunkContext != NULL);\r
+  ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);\r
+  ASSERT (ThunkContext->RealModeBufferSize >= m16Size);\r
+  ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);\r
+\r
+  CopyMem (ThunkContext->RealModeBuffer, &m16Start, m16Size);\r
+\r
+  //\r
+  // Point RealModeGdt to the GDT to be used in transition\r
+  //\r
+  // RealModeGdt[0]: Reserved as NULL descriptor\r
+  // RealModeGdt[1]: Code Segment\r
+  // RealModeGdt[2]: Data Segment\r
+  // RealModeGdt[3]: Call Gate\r
+  //\r
+  RealModeGdt = (IA32_SEGMENT_DESCRIPTOR*)(\r
+                  (UINTN)ThunkContext->RealModeBuffer + m16Gdt);\r
+\r
+  //\r
+  // Update Code & Data Segment Descriptor\r
+  //\r
+  RealModeGdt[1].Bits.BaseLow =\r
+    (UINT32)(UINTN)ThunkContext->RealModeBuffer & ~0xf;\r
+  RealModeGdt[1].Bits.BaseMid =\r
+    (UINT32)(UINTN)ThunkContext->RealModeBuffer >> 16;\r
+\r
+  //\r
+  // Update transition code entry point offset\r
+  //\r
+  *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mTransition) +=\r
+    (UINT32)(UINTN)ThunkContext->RealModeBuffer & 0xf;\r
+\r
+  //\r
+  // Update Segment Limits for both Code and Data Segment Descriptors\r
+  //\r
+  if ((ThunkContext->ThunkAttributes & THUNK_ATTRIBUTE_BIG_REAL_MODE) == 0) {\r
+    //\r
+    // Set segment limits to 64KB\r
+    //\r
+    RealModeGdt[1].Bits.LimitHigh = 0;\r
+    RealModeGdt[1].Bits.G = 0;\r
+    RealModeGdt[2].Bits.LimitHigh = 0;\r
+    RealModeGdt[2].Bits.G = 0;\r
+  }\r
+\r
+  //\r
+  // Update GDTBASE for this thunk context\r
+  //\r
+  *(VOID**)((UINTN)ThunkContext->RealModeBuffer + m16GdtrBase) = RealModeGdt;\r
+\r
+  //\r
+  // Update Thunk Attributes\r
+  //\r
+  *(UINT32*)((UINTN)ThunkContext->RealModeBuffer + mThunk16Attr) =\r
+    ThunkContext->ThunkAttributes;\r
+}\r
+\r
+/**\r
+  Transfers control to a 16-bit real mode entry point and returns the results.\r
+\r
+  Transfers control to a 16-bit real mode entry point and returns the results.\r
+  AsmPrepareThunk16() must be called with ThunkContext before this function is\r
+  used. This function must be called with interrupts disabled.\r
+\r
+  If ThunkContext is NULL, then ASSERT().\r
+  If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r
+\r
+  @param  ThunkContext  A pointer to the context structure that describes the\r
+                        16-bit real mode code to call.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmThunk16 (\r
+  IN OUT  THUNK_CONTEXT             *ThunkContext\r
+  )\r
+{\r
+  IA32_REGISTER_SET                 *UpdatedRegs;\r
+\r
+  ASSERT (ThunkContext != NULL);\r
+  ASSERT ((UINTN)ThunkContext->RealModeBuffer < 0x100000);\r
+  ASSERT (ThunkContext->RealModeBufferSize >= m16Size);\r
+  ASSERT ((UINTN)ThunkContext->RealModeBuffer + m16Size <= 0x100000);\r
+\r
+  UpdatedRegs = InternalAsmThunk16 (\r
+                  ThunkContext->RealModeState,\r
+                  ThunkContext->RealModeBuffer\r
+                  );\r
+\r
+  CopyMem (ThunkContext->RealModeState, UpdatedRegs, sizeof (*UpdatedRegs));\r
+}\r
+\r
+/**\r
+  Prepares all structures and code for a 16-bit real mode thunk, transfers\r
+  control to a 16-bit real mode entry point, and returns the results.\r
+\r
+  Prepares all structures and code for a 16-bit real mode thunk, transfers\r
+  control to a 16-bit real mode entry point, and returns the results. If the\r
+  caller only need to perform a single 16-bit real mode thunk, then this\r
+  service should be used. If the caller intends to make more than one 16-bit\r
+  real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r
+  once and AsmThunk16() can be called for each 16-bit real mode thunk. This\r
+  function must be called with interrupts disabled.\r
+\r
+  If ThunkContext is NULL, then ASSERT().\r
+\r
+  @param  ThunkContext  A pointer to the context structure that describes the\r
+                        16-bit real mode code to call.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmPrepareAndThunk16 (\r
+  IN OUT  THUNK_CONTEXT             *ThunkContext\r
+  )\r
+{\r
+  AsmPrepareThunk16 (ThunkContext);\r
+  AsmThunk16 (ThunkContext);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86WriteGdtr.c b/MdePkg/Library/BaseLib/x86WriteGdtr.c
new file mode 100644 (file)
index 0000000..20982ae
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86WriteGdtr.c
@@ -0,0 +1,43 @@
+/** @file\r
+  IA-32/x64 AsmWriteGdtr()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86GetInterruptState.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
+\r
+  Writes and the current GDTR descriptor specified by Gdtr. This function is\r
+  only available on IA-32 and X64.\r
+\r
+  If Gdtr is NULL, then ASSERT().\r
+\r
+  @param  Gdtr  Pointer to a GDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmWriteGdtr (\r
+  IN      CONST IA32_DESCRIPTOR     *Gdtr\r
+  )\r
+{\r
+  ASSERT (Gdtr != NULL);\r
+  InternalX86WriteGdtr (Gdtr);\r
+}\r

diff --git a/MdePkg/Library/BaseLib/x86WriteIdtr.c b/MdePkg/Library/BaseLib/x86WriteIdtr.c
new file mode 100644 (file)
index 0000000..3188aa2
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86WriteIdtr.c
@@ -0,0 +1,43 @@
+/** @file\r
+  IA-32/x64 AsmWriteIdtr()\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  x86WriteIdtr.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseLibInternals.h"\r
+\r
+/**\r
+  Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
+\r
+  Writes the current IDTR descriptor and returns it in Idtr. This function is\r
+  only available on IA-32 and X64.\r
+\r
+  If Idtr is NULL, then ASSERT().\r
+\r
+  @param  Idtr  Pointer to a IDTR descriptor.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmWriteIdtr (\r
+  IN      CONST IA32_DESCRIPTOR     *Idtr\r
+  )\r
+{\r
+  ASSERT (Idtr != NULL);\r
+  InternalX86WriteIdtr (Idtr);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
new file mode 100644 (file)
index 0000000..9082ddc
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
@@ -0,0 +1,96 @@
+#/** @file\r
+# Component description file for Base Memory Library\r
+#\r
+# Base Memory Library implementation - no ASM.\r
+# Copyright (c) 2007, Intel Corporation\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseMemoryLib\r
+  FILE_GUID                      = fd44e603-002a-4b29-9f5f-529e815b6165\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = BaseMemoryLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  SetMem.c\r
+  ScanMem64Wrapper.c\r
+  ScanMem32Wrapper.c\r
+  ScanMem16Wrapper.c\r
+  ScanMem8Wrapper.c\r
+  ZeroMemWrapper.c\r
+  CompareMemWrapper.c\r
+  SetMem64Wrapper.c\r
+  SetMem32Wrapper.c\r
+  SetMem16Wrapper.c\r
+  SetMemWrapper.c\r
+  CopyMemWrapper.c\r
+  MemLibGeneric.c\r
+  MemLibGuid.c\r
+  CopyMem.c\r
+  MemLibInternals.h\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+  BaseLib\r
+\r

diff --git a/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa
new file mode 100644 (file)
index 0000000..52fe3bb
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/BaseMemoryLib.msa
@@ -0,0 +1,60 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BaseMemoryLib</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>fd44e603-002a-4b29-9f5f-529e815b6165</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Base Memory Library</Abstract>\r
+    <Description>Base Memory Library implementation – no ASM.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BaseMemoryLib</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>BaseMemoryLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>BaseLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>MemLibInternals.h</Filename>\r
+    <Filename>CopyMem.c</Filename>\r
+    <Filename>MemLibGuid.c</Filename>\r
+    <Filename>MemLibGeneric.c</Filename>\r
+    <Filename>CopyMemWrapper.c</Filename>\r
+    <Filename>SetMemWrapper.c</Filename>\r
+    <Filename>SetMem16Wrapper.c</Filename>\r
+    <Filename>SetMem32Wrapper.c</Filename>\r
+    <Filename>SetMem64Wrapper.c</Filename>\r
+    <Filename>CompareMemWrapper.c</Filename>\r
+    <Filename>ZeroMemWrapper.c</Filename>\r
+    <Filename>ScanMem8Wrapper.c</Filename>\r
+    <Filename>ScanMem16Wrapper.c</Filename>\r
+    <Filename>ScanMem32Wrapper.c</Filename>\r
+    <Filename>ScanMem64Wrapper.c</Filename>\r
+    <Filename>SetMem.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BaseMemoryLib/CommonHeader.h b/MdePkg/Library/BaseMemoryLib/CommonHeader.h
new file mode 100644 (file)
index 0000000..68b4d94
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseMemoryLib/CompareMemWrapper.c b/MdePkg/Library/BaseMemoryLib/CompareMemWrapper.c
new file mode 100644 (file)
index 0000000..b816af7
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/CompareMemWrapper.c
@@ -0,0 +1,72 @@
+/** @file\r
+  CompareMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  CompareMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Compares the contents of two buffers.\r
+\r
+  This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer.\r
+  If all Length bytes of the two buffers are identical, then 0 is returned.  Otherwise, the\r
+  value returned is the first mismatched byte in SourceBuffer subtracted from the first\r
+  mismatched byte in DestinationBuffer.\r
+  If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT().\r
+  If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+\r
+  @param  DestinationBuffer Pointer to the destination buffer to compare.\r
+  @param  SourceBuffer      Pointer to the source buffer to compare.\r
+  @param  Length            Number of bytes to compare.\r
+\r
+  @return 0                 All Length bytes of the two buffers are identical.\r
+  @retval Non-zero          The first mismatched byte in SourceBuffer subtracted from the first\r
+                            mismatched byte in DestinationBuffer.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+CompareMem (\r
+  IN CONST VOID  *DestinationBuffer,\r
+  IN CONST VOID  *SourceBuffer,\r
+  IN UINTN       Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return 0;\r
+  }\r
+  ASSERT (DestinationBuffer != NULL);\r
+  ASSERT (SourceBuffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));\r
+\r
+  return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/CopyMem.c b/MdePkg/Library/BaseMemoryLib/CopyMem.c
new file mode 100644 (file)
index 0000000..df5258c
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/CopyMem.c
@@ -0,0 +1,67 @@
+/** @file\r
+  Implementation of the EfiCopyMem routine. This function is broken\r
+  out into its own source file so that it can be excluded from a\r
+  build for a particular platform easily if an optimized version\r
+  is desired.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  EfiCopyMem.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Copy Length bytes from Source to Destination.\r
+\r
+  @param  Destination Target of copy\r
+  @param  Source Place to copy from\r
+  @param  Length Number of bytes to copy\r
+\r
+  @return Destination\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemCopyMem (\r
+  OUT     VOID                      *Destination,\r
+  IN      CONST VOID                *Source,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  //\r
+  // Declare the local variables that actually move the data elements as\r
+  // volatile to prevent the optimizer from replacing this function with\r
+  // the intrinsic memcpy()\r
+  //\r
+  volatile UINT8                    *Destination8;\r
+  CONST UINT8                       *Source8;\r
+\r
+  if (Source > Destination) {\r
+    Destination8 = (UINT8*)Destination;\r
+    Source8 = (CONST UINT8*)Source;\r
+    while (Length-- != 0) {\r
+      *(Destination8++) = *(Source8++);\r
+    }\r
+  } else if (Source < Destination) {\r
+    Destination8 = (UINT8*)Destination + Length;\r
+    Source8 = (CONST UINT8*)Source + Length;\r
+    while (Length-- != 0) {\r
+      *(--Destination8) = *(--Source8);\r
+    }\r
+  }\r
+  return Destination;\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/CopyMemWrapper.c b/MdePkg/Library/BaseMemoryLib/CopyMemWrapper.c
new file mode 100644 (file)
index 0000000..b0449b1
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/CopyMemWrapper.c
@@ -0,0 +1,67 @@
+/** @file\r
+  CopyMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  CopyMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Copies a source buffer to a destination buffer, and returns the destination buffer.\r
+\r
+  This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns\r
+  DestinationBuffer.  The implementation must be reentrant, and it must handle the case\r
+  where SourceBuffer overlaps DestinationBuffer.\r
+  If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+  @param  DestinationBuffer   Pointer to the destination buffer of the memory copy.\r
+  @param  SourceBuffer        Pointer to the source buffer of the memory copy.\r
+  @param  Length              Number of bytes to copy from SourceBuffer to DestinationBuffer.\r
+\r
+  @return DestinationBuffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+CopyMem (\r
+  OUT VOID       *DestinationBuffer,\r
+  IN CONST VOID  *SourceBuffer,\r
+  IN UINTN       Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return DestinationBuffer;\r
+  }\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));\r
+\r
+  if (DestinationBuffer == SourceBuffer) {\r
+    return DestinationBuffer;\r
+  }\r
+  return InternalMemCopyMem (DestinationBuffer, SourceBuffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c b/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c
new file mode 100644 (file)
index 0000000..93d5f80
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/MemLibGeneric.c
@@ -0,0 +1,266 @@
+/** @file\r
+  Architecture Independent Base Memory Library Implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  MemLibGeneric.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem16 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  do {\r
+    ((UINT16*)Buffer)[--Length] = Value;\r
+  } while (Length != 0);\r
+  return Buffer;\r
+}\r
+\r
+/**\r
+  Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem32 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  do {\r
+    ((UINT32*)Buffer)[--Length] = Value;\r
+  } while (Length != 0);\r
+  return Buffer;\r
+}\r
+\r
+/**\r
+  Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem64 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  do {\r
+    ((UINT64*)Buffer)[--Length] = Value;\r
+  } while (Length != 0);\r
+  return Buffer;\r
+}\r
+\r
+/**\r
+  Set Buffer to 0 for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemZeroMem (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  return InternalMemSetMem (Buffer, Length, 0);\r
+}\r
+\r
+/**\r
+  Compares two memory buffers of a given length.\r
+\r
+  @param  DestinationBuffer First memory buffer\r
+  @param  SourceBuffer      Second memory buffer\r
+  @param  Length            Length of DestinationBuffer and SourceBuffer memory\r
+                            regions to compare. Must be non-zero.\r
+\r
+  @retval 0     if MemOne == MemTwo\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+InternalMemCompareMem (\r
+  IN      CONST VOID                *DestinationBuffer,\r
+  IN      CONST VOID                *SourceBuffer,\r
+  IN      UINTN                     Length\r
+  )\r
+{\r
+  while ((--Length != 0) &&\r
+         (*(INT8*)DestinationBuffer == *(INT8*)SourceBuffer)) {\r
+    DestinationBuffer = (INT8*)DestinationBuffer + 1;\r
+    SourceBuffer = (INT8*)SourceBuffer + 1;\r
+  }\r
+  return (INTN)*(UINT8*)DestinationBuffer - (INTN)*(UINT8*)SourceBuffer;\r
+}\r
+\r
+/**\r
+  Scans a target buffer for an 8-bit value, and returns a pointer to the\r
+  matching 8-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem8 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  CONST UINT8                       *Pointer;\r
+\r
+  Pointer = (CONST UINT8*)Buffer;\r
+  do {\r
+    if (*(Pointer++) == Value) {\r
+      return Pointer;\r
+    }\r
+  } while (--Length != 0);\r
+  return NULL;\r
+}\r
+\r
+/**\r
+  Scans a target buffer for a 16-bit value, and returns a pointer to the\r
+  matching 16-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem16 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  CONST UINT16                      *Pointer;\r
+\r
+  Pointer = (CONST UINT16*)Buffer;\r
+  do {\r
+    if (*(Pointer++) == Value) {\r
+      return Pointer;\r
+    }\r
+  } while (--Length != 0);\r
+  return NULL;\r
+}\r
+\r
+/**\r
+  Scans a target buffer for a 32-bit value, and returns a pointer to the\r
+  matching 32-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem32 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  CONST UINT32                      *Pointer;\r
+\r
+  Pointer = (CONST UINT32*)Buffer;\r
+  do {\r
+    if (*(Pointer++) == Value) {\r
+      return Pointer;\r
+    }\r
+  } while (--Length != 0);\r
+  return NULL;\r
+}\r
+\r
+/**\r
+  Scans a target buffer for a 64-bit value, and returns a pointer to the\r
+  matching 64-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem64 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  )\r
+{\r
+  CONST UINT64                      *Pointer;\r
+\r
+  Pointer = (CONST UINT64*)Buffer;\r
+  do {\r
+    if (*(Pointer++) == Value) {\r
+      return Pointer;\r
+    }\r
+  } while (--Length != 0);\r
+  return NULL;\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/MemLibGuid.c b/MdePkg/Library/BaseMemoryLib/MemLibGuid.c
new file mode 100644 (file)
index 0000000..6e9682d
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/MemLibGuid.c
@@ -0,0 +1,142 @@
+/** @file\r
+  Implementation of GUID functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  MemLibGuid.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Copies a source GUID to a destination GUID.\r
+\r
+  This function copies the contents of the 128-bit GUID specified by SourceGuid to\r
+  DestinationGuid, and returns DestinationGuid.\r
+  If DestinationGuid is NULL, then ASSERT().\r
+  If SourceGuid is NULL, then ASSERT().\r
+\r
+  @param  DestinationGuid   Pointer to the destination GUID.\r
+  @param  SourceGuid        Pointer to the source GUID.\r
+\r
+  @return DestinationGuid.\r
+\r
+**/\r
+GUID *\r
+EFIAPI\r
+CopyGuid (\r
+  OUT GUID       *DestinationGuid,\r
+  IN CONST GUID  *SourceGuid\r
+  )\r
+{\r
+  WriteUnaligned64 (\r
+    (UINT64*)DestinationGuid,\r
+    ReadUnaligned64 ((CONST UINT64*)SourceGuid)\r
+    );\r
+  WriteUnaligned64 (\r
+    (UINT64*)DestinationGuid + 1,\r
+    ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)\r
+    );\r
+  return DestinationGuid;\r
+}\r
+\r
+/**\r
+  Compares two GUIDs.\r
+\r
+  This function compares Guid1 to Guid2.  If the GUIDs are identical then TRUE is returned.\r
+  If there are any bit differences in the two GUIDs, then FALSE is returned.\r
+  If Guid1 is NULL, then ASSERT().\r
+  If Guid2 is NULL, then ASSERT().\r
+\r
+  @param  Guid1       A pointer to a 128 bit GUID.\r
+  @param  Guid2       A pointer to a 128 bit GUID.\r
+\r
+  @retval TRUE        Guid1 and Guid2 are identical.\r
+  @retval FALSE       Guid1 and Guid2 are not identical.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+CompareGuid (\r
+  IN CONST GUID  *Guid1,\r
+  IN CONST GUID  *Guid2\r
+  )\r
+{\r
+  UINT64  LowPartOfGuid1;\r
+  UINT64  LowPartOfGuid2;\r
+  UINT64  HighPartOfGuid1;\r
+  UINT64  HighPartOfGuid2;\r
+\r
+  LowPartOfGuid1  = ReadUnaligned64 ((CONST UINT64*) Guid1);\r
+  LowPartOfGuid2  = ReadUnaligned64 ((CONST UINT64*) Guid2);\r
+  HighPartOfGuid1 = ReadUnaligned64 ((CONST UINT64*) Guid1 + 1);\r
+  HighPartOfGuid2 = ReadUnaligned64 ((CONST UINT64*) Guid2 + 1);\r
+\r
+  return (BOOLEAN) (LowPartOfGuid1 == LowPartOfGuid2 && HighPartOfGuid1 == HighPartOfGuid2);\r
+}\r
+\r
+/**\r
+  Scans a target buffer for a GUID, and returns a pointer to the matching GUID\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from\r
+  the lowest address to the highest address at 128-bit increments for the 128-bit\r
+  GUID value that matches Guid.  If a match is found, then a pointer to the matching\r
+  GUID in the target buffer is returned.  If no match is found, then NULL is returned.\r
+  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 128-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan.\r
+  @param  Guid    Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching Guid in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanGuid (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN CONST GUID  *Guid\r
+  )\r
+{\r
+  CONST GUID                        *GuidPtr;\r
+\r
+  ASSERT (((UINTN)Buffer & (sizeof (Guid->Data1) - 1)) == 0);\r
+  ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));\r
+  ASSERT ((Length & (sizeof (*GuidPtr) - 1)) == 0);\r
+\r
+  GuidPtr = (GUID*)Buffer;\r
+  Buffer  = GuidPtr + Length / sizeof (*GuidPtr);\r
+  while (GuidPtr < (CONST GUID*)Buffer) {\r
+    if (CompareGuid (GuidPtr, Guid)) {\r
+      return (VOID*)GuidPtr;\r
+    }\r
+    GuidPtr++;\r
+  }\r
+  return NULL;\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/MemLibInternals.h b/MdePkg/Library/BaseMemoryLib/MemLibInternals.h
new file mode 100644 (file)
index 0000000..2bd034d
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/MemLibInternals.h
@@ -0,0 +1,235 @@
+/** @file\r
+  Declaration of internal functions for Base Memory Library.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  MemLibInternals.h\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+#ifndef __MEM_LIB_INTERNALS__\r
+#define __MEM_LIB_INTERNALS__\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Copy Length bytes from Source to Destination.\r
+\r
+  @param  Destination Target of copy\r
+  @param  Source Place to copy from\r
+  @param  Length Number of bytes to copy\r
+\r
+  @return Destination\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemCopyMem (\r
+  OUT     VOID                      *DestinationBuffer,\r
+  IN      CONST VOID                *SourceBuffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Set Buffer to Value for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+  @param  Value Value of the set operation.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT8                     Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem16 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem32 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem64 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  );\r
+\r
+/**\r
+  Set Buffer to 0 for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemZeroMem (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Compares two memory buffers of a given length.\r
+\r
+  @param  DestinationBuffer First memory buffer\r
+  @param  SourceBuffer      Second memory buffer\r
+  @param  Length            Length of DestinationBuffer and SourceBuffer memory\r
+                            regions to compare. Must be non-zero.\r
+\r
+  @retval 0     if MemOne == MemTwo\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+InternalMemCompareMem (\r
+  IN      CONST VOID                *DestinationBuffer,\r
+  IN      CONST VOID                *SourceBuffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for an 8-bit value, and returns a pointer to the\r
+  matching 8-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem8 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT8                     Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 16-bit value, and returns a pointer to the\r
+  matching 16-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem16 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 32-bit value, and returns a pointer to the\r
+  matching 32-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem32 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 64-bit value, and returns a pointer to the\r
+  matching 64-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem64 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  );\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem16Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem16Wrapper.c
new file mode 100644 (file)
index 0000000..f0ca471
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/ScanMem16Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem16() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem16Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 16-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem16 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT16      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem16 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem32Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem32Wrapper.c
new file mode 100644 (file)
index 0000000..7a0ebcd
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/ScanMem32Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem32() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem32Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 32-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem32 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT32      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem32 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem64Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem64Wrapper.c
new file mode 100644 (file)
index 0000000..dd1a82f
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/ScanMem64Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem64() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem64Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 64-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem64 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT64      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem64 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/ScanMem8Wrapper.c b/MdePkg/Library/BaseMemoryLib/ScanMem8Wrapper.c
new file mode 100644 (file)
index 0000000..685563e
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/ScanMem8Wrapper.c
@@ -0,0 +1,66 @@
+/** @file\r
+  ScanMem8() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem8Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for an 8-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem8 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT8       Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+ \r
+  return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/SetMem.c b/MdePkg/Library/BaseMemoryLib/SetMem.c
new file mode 100644 (file)
index 0000000..3378a23
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/SetMem.c
@@ -0,0 +1,57 @@
+/** @file\r
+  Implementation of the EfiSetMem routine. This function is broken\r
+  out into its own source file so that it can be excluded from a\r
+  build for a particular platform easily if an optimized version\r
+  is desired.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Set Buffer to Value for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+  @param  Value Value of the set operation.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem (\r
+  IN      VOID                      *Buffer,\r
+  IN      UINTN                     Size,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  //\r
+  // Declare the local variables that actually move the data elements as\r
+  // volatile to prevent the optimizer from replacing this function with\r
+  // the intrinsic memset()\r
+  //\r
+  volatile UINT8                    *Pointer;\r
+\r
+  Pointer = (UINT8*)Buffer;\r
+  while (Size-- != 0) {\r
+    *(Pointer++) = Value;\r
+  }\r
+  return Buffer;\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/SetMem16Wrapper.c b/MdePkg/Library/BaseMemoryLib/SetMem16Wrapper.c
new file mode 100644 (file)
index 0000000..5e58eb9
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/SetMem16Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem16() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem16Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 16-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 16-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem16 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT16  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem16 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/SetMem32Wrapper.c b/MdePkg/Library/BaseMemoryLib/SetMem32Wrapper.c
new file mode 100644 (file)
index 0000000..f4927f7
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/SetMem32Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem32() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem32Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 32-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 32-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem32 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT32  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem32 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/SetMem64Wrapper.c b/MdePkg/Library/BaseMemoryLib/SetMem64Wrapper.c
new file mode 100644 (file)
index 0000000..e845563
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/SetMem64Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem64() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem64Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 64-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 64-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem64 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT64  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem64 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/SetMemWrapper.c b/MdePkg/Library/BaseMemoryLib/SetMemWrapper.c
new file mode 100644 (file)
index 0000000..84a7d62
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/SetMemWrapper.c
@@ -0,0 +1,61 @@
+/** @file\r
+  SetMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a byte value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with Value, and returns Buffer.\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer    Memory to set.\r
+  @param  Length    Number of bytes to set.\r
+  @param  Value     Value of the set operation.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem (\r
+  OUT VOID  *Buffer,\r
+  IN UINTN  Length,\r
+  IN UINT8  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+\r
+  return InternalMemSetMem (Buffer, Length, Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLib/ZeroMemWrapper.c b/MdePkg/Library/BaseMemoryLib/ZeroMemWrapper.c
new file mode 100644 (file)
index 0000000..886c934
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLib/ZeroMemWrapper.c
@@ -0,0 +1,56 @@
+/** @file\r
+  ZeroMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ZeroMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with zeros, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with zeros, and returns Buffer.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().\r
+\r
+  @param  Buffer      Pointer to the target buffer to fill with zeros.\r
+  @param  Length      Number of bytes in Buffer to fill with zeros.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ZeroMem (\r
+  OUT VOID  *Buffer,\r
+  IN UINTN  Length\r
+  )\r
+{\r
+  ASSERT (!(Buffer == NULL && Length > 0));\r
+  ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));\r
+  return InternalMemZeroMem (Buffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
new file mode 100644 (file)
index 0000000..3190f3c
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
@@ -0,0 +1,143 @@
+#/** @file\r
+# Component description file for RepStr Base Memory Library\r
+#\r
+# Base Memory Library that uses REP string instructions for\r
+#  high performance and small size. Optimized for use in PEI.\r
+# Copyright (c) 2007, Intel Corporation\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseMemoryLibRepStr\r
+  FILE_GUID                      = e7884bf4-51a1-485b-982a-ff89129983bc\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = BaseMemoryLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  MemLibInternals.h\r
+  CommonHeader.h\r
+\r
+[Sources.Ia32]\r
+  Ia32/ScanMem64.S\r
+  Ia32/ScanMem32.S\r
+  Ia32/ScanMem16.S\r
+  Ia32/ScanMem8.S\r
+  Ia32/CompareMem.S\r
+  Ia32/ZeroMem.S\r
+  Ia32/SetMem64.S\r
+  Ia32/SetMem32.S\r
+  Ia32/SetMem16.S\r
+  Ia32/SetMem.S\r
+  Ia32/CopyMem.S\r
+  Ia32/ScanMem64.asm\r
+  Ia32/ScanMem32.asm\r
+  Ia32/ScanMem16.asm\r
+  Ia32/ScanMem8.asm\r
+  Ia32/CompareMem.asm\r
+  Ia32/ZeroMem.asm\r
+  Ia32/SetMem64.asm\r
+  Ia32/SetMem32.asm\r
+  Ia32/SetMem16.asm\r
+  Ia32/SetMem.asm\r
+  Ia32/CopyMem.asm\r
+  ScanMem64Wrapper.c\r
+  ScanMem32Wrapper.c\r
+  ScanMem16Wrapper.c\r
+  ScanMem8Wrapper.c\r
+  ZeroMemWrapper.c\r
+  CompareMemWrapper.c\r
+  SetMem64Wrapper.c\r
+  SetMem32Wrapper.c\r
+  SetMem16Wrapper.c\r
+  SetMemWrapper.c\r
+  CopyMemWrapper.c\r
+  MemLibGuid.c\r
+\r
+[Sources.X64]\r
+  x64/ScanMem64.asm\r
+  x64/ScanMem32.asm\r
+  x64/ScanMem16.asm\r
+  x64/ScanMem8.asm\r
+  x64/CompareMem.asm\r
+  x64/ZeroMem.asm\r
+  x64/SetMem64.asm\r
+  x64/SetMem32.asm\r
+  x64/SetMem16.asm\r
+  x64/SetMem.asm\r
+  x64/CopyMem.asm\r
+  ScanMem64Wrapper.c\r
+  ScanMem32Wrapper.c\r
+  ScanMem16Wrapper.c\r
+  ScanMem8Wrapper.c\r
+  ZeroMemWrapper.c\r
+  CompareMemWrapper.c\r
+  SetMem64Wrapper.c\r
+  SetMem32Wrapper.c\r
+  SetMem16Wrapper.c\r
+  SetMemWrapper.c\r
+  CopyMemWrapper.c\r
+  MemLibGuid.c\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+  BaseLib\r
+\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa
new file mode 100644 (file)
index 0000000..0d98031
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.msa
@@ -0,0 +1,103 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">\r
+  <MsaHeader>\r
+    <ModuleName>BaseMemoryLibRepStr</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>e7884bf4-51a1-485b-982a-ff89129983bc</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for RepStr Base Memory Library</Abstract>\r
+    <Description>Base Memory Library that uses REP string instructions for
+      high performance and small size.  Optimized for use in PEI.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials
+      are licensed and made available under the terms and conditions of the BSD License
+      which accompanies this distribution.  The full text of the license may be found at
+      http://opensource.org/licenses/bsd-license.php
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BaseMemoryLibRepStr</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>BaseMemoryLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>BaseLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>MemLibInternals.h</Filename>\r
+    <Filename SupArchList="IA32">MemLibGuid.c</Filename>\r
+    <Filename SupArchList="IA32">CopyMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">CompareMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ZeroMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem8Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CopyMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem16.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem32.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem64.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ZeroMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CompareMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem8.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem16.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem32.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem64.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CopyMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem16.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem32.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem64.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ZeroMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CompareMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem8.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem16.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem32.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem64.S</Filename>\r
+    <Filename SupArchList="X64">MemLibGuid.c</Filename>\r
+    <Filename SupArchList="X64">CopyMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">CompareMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">ZeroMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem8Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">x64/CopyMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem16.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem32.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem64.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ZeroMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/CompareMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem8.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem16.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem32.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem64.asm</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/CommonHeader.h b/MdePkg/Library/BaseMemoryLibRepStr/CommonHeader.h
new file mode 100644 (file)
index 0000000..68b4d94
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/CompareMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/CompareMemWrapper.c
new file mode 100644 (file)
index 0000000..b816af7
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/CompareMemWrapper.c
@@ -0,0 +1,72 @@
+/** @file\r
+  CompareMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  CompareMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Compares the contents of two buffers.\r
+\r
+  This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer.\r
+  If all Length bytes of the two buffers are identical, then 0 is returned.  Otherwise, the\r
+  value returned is the first mismatched byte in SourceBuffer subtracted from the first\r
+  mismatched byte in DestinationBuffer.\r
+  If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT().\r
+  If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+\r
+  @param  DestinationBuffer Pointer to the destination buffer to compare.\r
+  @param  SourceBuffer      Pointer to the source buffer to compare.\r
+  @param  Length            Number of bytes to compare.\r
+\r
+  @return 0                 All Length bytes of the two buffers are identical.\r
+  @retval Non-zero          The first mismatched byte in SourceBuffer subtracted from the first\r
+                            mismatched byte in DestinationBuffer.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+CompareMem (\r
+  IN CONST VOID  *DestinationBuffer,\r
+  IN CONST VOID  *SourceBuffer,\r
+  IN UINTN       Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return 0;\r
+  }\r
+  ASSERT (DestinationBuffer != NULL);\r
+  ASSERT (SourceBuffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));\r
+\r
+  return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c
new file mode 100644 (file)
index 0000000..b0449b1
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/CopyMemWrapper.c
@@ -0,0 +1,67 @@
+/** @file\r
+  CopyMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  CopyMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Copies a source buffer to a destination buffer, and returns the destination buffer.\r
+\r
+  This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns\r
+  DestinationBuffer.  The implementation must be reentrant, and it must handle the case\r
+  where SourceBuffer overlaps DestinationBuffer.\r
+  If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+  @param  DestinationBuffer   Pointer to the destination buffer of the memory copy.\r
+  @param  SourceBuffer        Pointer to the source buffer of the memory copy.\r
+  @param  Length              Number of bytes to copy from SourceBuffer to DestinationBuffer.\r
+\r
+  @return DestinationBuffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+CopyMem (\r
+  OUT VOID       *DestinationBuffer,\r
+  IN CONST VOID  *SourceBuffer,\r
+  IN UINTN       Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return DestinationBuffer;\r
+  }\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));\r
+\r
+  if (DestinationBuffer == SourceBuffer) {\r
+    return DestinationBuffer;\r
+  }\r
+  return InternalMemCopyMem (DestinationBuffer, SourceBuffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.S
new file mode 100644 (file)
index 0000000..3968604
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.S
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CompareMem.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   CompareMem function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemCompareMem\r
+\r
+#------------------------------------------------------------------------------\r
+# INTN\r
+# EFIAPI\r
+# InternalMemCompareMem (\r
+#   IN      CONST VOID                *DestinationBuffer,\r
+#   IN      CONST VOID                *SourceBuffer,\r
+#   IN      UINTN                     Length\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemCompareMem:\r
+    push    %esi\r
+    push    %edi\r
+    movl    12(%esp), %esi\r
+    movl    16(%esp), %edi\r
+    movl    20(%esp), %ecx\r
+    repe    cmpsb\r
+    movzbl  -1(%esi), %eax\r
+    movzbl  -1(%edi), %edx\r
+    subl    %edx, %eax\r
+    pop     %edi\r
+    pop     %esi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm
new file mode 100644 (file)
index 0000000..dabd337
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CompareMem.asm
@@ -0,0 +1,59 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CompareMem.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   CompareMem function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; INTN\r
+; EFIAPI\r
+; InternalMemCompareMem (\r
+;   IN      CONST VOID                *DestinationBuffer,\r
+;   IN      CONST VOID                *SourceBuffer,\r
+;   IN      UINTN                     Length\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemCompareMem   PROC    USES    esi edi\r
+    mov     esi, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+    mov     ecx, [esp + 20]\r
+    repe    cmpsb\r
+    movzx   eax, byte ptr [esi - 1]\r
+    movzx   edx, byte ptr [edi - 1]\r
+    sub     eax, edx\r
+    ret\r
+InternalMemCompareMem   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.S
new file mode 100644 (file)
index 0000000..a83fc04
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.S
@@ -0,0 +1,70 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CopyMem.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   CopyMem function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemCopyMem\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  EFIAPI\r
+#  InternalMemCopyMem (\r
+#    IN VOID   *Destination,\r
+#    IN VOID   *Source,\r
+#    IN UINTN  Count\r
+#    );\r
+#------------------------------------------------------------------------------\r
+_InternalMemCopyMem:\r
+    push    %esi\r
+    push    %edi\r
+    movl    16(%esp), %esi              # esi <- Source\r
+    movl    12(%esp), %edi              # edi <- Destination\r
+    movl    20(%esp), %edx              # edx <- Count\r
+    leal    -1(%esi, %edx), %eax        # eax <- End of Source\r
+    cmpl    %edi, %esi\r
+    jae     L0\r
+    cmpl    %edi, %eax\r
+    jae     L_CopyBackward              # Copy backward if overlapped\r
+L0:\r
+    movl    %edx, %ecx\r
+    andl    $3, %edx\r
+    shrl    $2, %ecx\r
+    rep\r
+    movsl                               # Copy as many Dwords as possible\r
+    jmp     L_CopyBytes\r
+L_CopyBackward:\r
+    movl    %eax, %esi                  # esi <- End of Source\r
+    leal    -1(%edi, %edx), %edi        # edi <- End of Destination\r
+    std\r
+L_CopyBytes:\r
+    movl    %edx, %ecx\r
+    rep\r
+    movsb                               # Copy bytes backward\r
+    cld\r
+    movl    12(%esp), %eax              # eax <- Destination as return value\r
+    pop     %edi\r
+    pop     %esi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm
new file mode 100644 (file)
index 0000000..08f3676
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/CopyMem.asm
@@ -0,0 +1,68 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CopyMem.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   CopyMem function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  InternalMemCopyMem (\r
+;    IN VOID   *Destination,\r
+;    IN VOID   *Source,\r
+;    IN UINTN  Count\r
+;    )\r
+;------------------------------------------------------------------------------\r
+InternalMemCopyMem  PROC    USES    esi edi\r
+    mov     esi, [esp + 16]             ; esi <- Source\r
+    mov     edi, [esp + 12]             ; edi <- Destination\r
+    mov     edx, [esp + 20]             ; edx <- Count\r
+    lea     eax, [esi + edx - 1]        ; eax <- End of Source\r
+    cmp     esi, edi\r
+    jae     @F\r
+    cmp     eax, edi\r
+    jae     @CopyBackward               ; Copy backward if overlapped\r
+@@:\r
+    mov     ecx, edx\r
+    and     edx, 3\r
+    shr     ecx, 2\r
+    rep     movsd                       ; Copy as many Dwords as possible\r
+    jmp     @CopyBytes\r
+@CopyBackward:\r
+    mov     esi, eax                    ; esi <- End of Source\r
+    lea     edi, [edi + edx - 1]        ; edi <- End of Destination\r
+    std\r
+@CopyBytes:\r
+    mov     ecx, edx\r
+    rep     movsb                       ; Copy bytes backward\r
+    cld\r
+    mov     eax, [esp + 12]             ; eax <- Destination as return value\r
+    ret\r
+InternalMemCopyMem  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.S
new file mode 100644 (file)
index 0000000..276b4ff
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.S
@@ -0,0 +1,55 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem16.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem16 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem16\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem16 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT16                    Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem16:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    8(%esp), %edi\r
+    movl    16(%esp), %eax\r
+    repne   scasw\r
+    leal    -2(%edi), %eax\r
+    cmovnz  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm
new file mode 100644 (file)
index 0000000..a6d0330
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem16.asm
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem16.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem16 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem16 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT16                    Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem16    PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    mov     eax, [esp + 16]\r
+    repne   scasw\r
+    lea     eax, [edi - 2]\r
+    cmovnz  eax, ecx\r
+    ret\r
+InternalMemScanMem16    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.S
new file mode 100644 (file)
index 0000000..fced1b2
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.S
@@ -0,0 +1,55 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem32.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem32 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem32\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem32 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT32                    Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem32:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    8(%esp), %edi\r
+    movl    16(%esp), %eax\r
+    repne   scasl\r
+    leal    -4(%edi), %eax\r
+    cmovnz  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm
new file mode 100644 (file)
index 0000000..46a8011
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem32.asm
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem32.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem32 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem32 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT32                    Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem32    PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    mov     eax, [esp + 16]\r
+    repne   scasd\r
+    lea     eax, [edi - 4]\r
+    cmovnz  eax, ecx\r
+    ret\r
+InternalMemScanMem32    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.S
new file mode 100644 (file)
index 0000000..37dc3bb
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.S
@@ -0,0 +1,64 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem64.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem64 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem64\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem64 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT64                    Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem64:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    16(%esp), %eax\r
+    movl    20(%esp), %edx\r
+    movl    8(%esp), %edi\r
+L0:\r
+    cmpl    (%edi), %eax\r
+    leal    8(%edi), %edi\r
+    loopne  L0\r
+    jne     L1\r
+    cmpl    -4(%edi), %edx\r
+    jecxz   L1\r
+    jne     L0\r
+L1:\r
+    leal    -8(%edi), %eax\r
+    cmovne  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm
new file mode 100644 (file)
index 0000000..c19ed98
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem64.asm
@@ -0,0 +1,67 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem64.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem64 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem64 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT64                    Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem64    PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     eax, [esp + 16]\r
+    mov     edx, [esp + 20]\r
+    mov     edi, [esp + 8]\r
+@@:\r
+    cmp     eax, [edi]\r
+    lea     edi, [edi + 8]\r
+    loopne  @B\r
+    jne     @F\r
+    cmp     edx, [edi - 4]\r
+    jecxz   @F\r
+    jne     @B\r
+@@:\r
+    lea     eax, [edi - 8]\r
+    cmovne  eax, ecx\r
+    ret\r
+InternalMemScanMem64    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.S
new file mode 100644 (file)
index 0000000..e7d2a26
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.S
@@ -0,0 +1,55 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem8.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem8 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem8\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem8 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT8                     Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem8:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    8(%esp), %edi\r
+    movb    16(%esp), %al\r
+    repne   scasb\r
+    leal    -1(%edi), %eax\r
+    cmovnz  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm
new file mode 100644 (file)
index 0000000..def2690
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ScanMem8.asm
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem8.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem8 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem8 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT8                     Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem8 PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    mov     al, [esp + 16]\r
+    repne   scasb\r
+    lea     eax, [edi - 1]\r
+    cmovnz  eax, ecx\r
+    ret\r
+InternalMemScanMem8 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.S
new file mode 100644 (file)
index 0000000..4602995
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.S
@@ -0,0 +1,51 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+    .386:\r
+    .code:\r
+\r
+.globl _InternalMemSetMem\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  InternalMemSetMem (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT8  Value\r
+#    )\r
+#------------------------------------------------------------------------------\r
+_InternalMemSetMem:\r
+    push    %edi\r
+    movl    16(%esp),%eax\r
+    movl    8(%esp),%edi\r
+    movl    12(%esp),%ecx\r
+    rep\r
+    stosb\r
+    movl    8(%esp),%eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm
new file mode 100644 (file)
index 0000000..d88d1fd
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem.asm
@@ -0,0 +1,50 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  InternalMemSetMem (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT8  Value\r
+;    )\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem   PROC    USES    edi\r
+    mov     eax, [esp + 16]\r
+    mov     edi, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    rep     stosb\r
+    mov     eax, [esp + 8]\r
+    ret\r
+InternalMemSetMem   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.S
new file mode 100644 (file)
index 0000000..ff62e94
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.S
@@ -0,0 +1,48 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem16.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem16 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemSetMem16\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  InternalMemSetMem16 (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT16 Value\r
+#    )\r
+#------------------------------------------------------------------------------\r
+_InternalMemSetMem16:\r
+    push    %edi\r
+    movl    16(%esp), %eax\r
+    movl    8(%esp), %edi\r
+    movl    12(%esp), %ecx\r
+    rep\r
+    stosw\r
+    movl    8(%esp), %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm
new file mode 100644 (file)
index 0000000..414ed7c
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem16.asm
@@ -0,0 +1,50 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem16.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem16 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  InternalMemSetMem16 (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT16 Value\r
+;    )\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem16 PROC    USES    edi\r
+    mov     eax, [esp + 16]\r
+    mov     edi, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    rep     stosw\r
+    mov     eax, [esp + 8]\r
+    ret\r
+InternalMemSetMem16 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.S
new file mode 100644 (file)
index 0000000..8b94d56
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.S
@@ -0,0 +1,48 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem32.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem32 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemSetMem32\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  InternalMemSetMem32 (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT32 Value\r
+#    )\r
+#------------------------------------------------------------------------------\r
+_InternalMemSetMem32:\r
+    push    %edi\r
+    movl    16(%esp),%eax\r
+    movl    8(%esp),%edi\r
+    movl    12(%esp),%ecx\r
+    rep\r
+    stosl\r
+    movl    8(%esp),%eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm
new file mode 100644 (file)
index 0000000..020bb79
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem32.asm
@@ -0,0 +1,50 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem32.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem32 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  InternalMemSetMem32 (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT32 Value\r
+;    )\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem32 PROC    USES    edi\r
+    mov     eax, [esp + 16]\r
+    mov     edi, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    rep     stosd\r
+    mov     eax, [esp + 8]\r
+    ret\r
+InternalMemSetMem32 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.S
new file mode 100644 (file)
index 0000000..68418cc
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.S
@@ -0,0 +1,51 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem64.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem64 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemSetMem64\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  InternalMemSetMem64 (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT64 Value\r
+#    )\r
+#------------------------------------------------------------------------------\r
+_InternalMemSetMem64:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    16(%esp), %eax\r
+    movl    20(%esp), %edx\r
+    movl    8(%esp), %edi\r
+L0:\r
+    mov     %eax, -8(%edi, %ecx, 8)\r
+    mov     %edx, -4(%edi, %ecx, 8)\r
+    loop    L0\r
+    movl    %edi, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm
new file mode 100644 (file)
index 0000000..c9a51ae
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/SetMem64.asm
@@ -0,0 +1,54 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem64.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem64 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  InternalMemSetMem64 (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT64 Value\r
+;    )\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem64 PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     eax, [esp + 16]\r
+    mov     edx, [esp + 20]\r
+    mov     edi, [esp + 8]\r
+@@:\r
+    mov     [edi + ecx*8 - 8], eax\r
+    mov     [edi + ecx*8 - 4], edx\r
+    loop    @B\r
+    mov     eax, edi\r
+    ret\r
+InternalMemSetMem64 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.S b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.S
new file mode 100644 (file)
index 0000000..9551c1a
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.S
@@ -0,0 +1,54 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ZeroMem.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ZeroMem function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemZeroMem\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  InternalMemZeroMem (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count\r
+#    );\r
+#------------------------------------------------------------------------------\r
+_InternalMemZeroMem:\r
+    push    %edi\r
+    xorl    %eax,%eax\r
+    movl    8(%esp),%edi\r
+    movl    12(%esp),%ecx\r
+    movl    %ecx,%edx\r
+    shrl    $2,%ecx\r
+    andl    $3,%edx\r
+    pushl   %edi\r
+    rep\r
+    stosl\r
+    movl    %edx,%ecx\r
+    rep\r
+    stosb\r
+    popl    %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm
new file mode 100644 (file)
index 0000000..26137f7
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/Ia32/ZeroMem.asm
@@ -0,0 +1,55 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ZeroMem.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ZeroMem function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .386\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  InternalMemZeroMem (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count\r
+;    );\r
+;------------------------------------------------------------------------------\r
+InternalMemZeroMem  PROC    USES    edi\r
+    xor     eax, eax\r
+    mov     edi, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     edx, ecx\r
+    shr     ecx, 2\r
+    and     edx, 3\r
+    push    edi\r
+    rep     stosd\r
+    mov     ecx, edx\r
+    rep     stosb\r
+    pop     eax\r
+    ret\r
+InternalMemZeroMem  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c b/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c
new file mode 100644 (file)
index 0000000..2434358
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/MemLibGuid.c
@@ -0,0 +1,137 @@
+/** @file\r
+  Implementation of GUID functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  MemLibGuid.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Copies a source GUID to a destination GUID.\r
+\r
+  This function copies the contents of the 128-bit GUID specified by SourceGuid to\r
+  DestinationGuid, and returns DestinationGuid.\r
+  If DestinationGuid is NULL, then ASSERT().\r
+  If SourceGuid is NULL, then ASSERT().\r
+\r
+  @param  DestinationGuid   Pointer to the destination GUID.\r
+  @param  SourceGuid        Pointer to the source GUID.\r
+\r
+  @return DestinationGuid.\r
+\r
+**/\r
+GUID *\r
+EFIAPI\r
+CopyGuid (\r
+  OUT GUID       *DestinationGuid,\r
+  IN CONST GUID  *SourceGuid\r
+  )\r
+{\r
+  WriteUnaligned64 (\r
+    (UINT64*)DestinationGuid,\r
+    ReadUnaligned64 ((CONST UINT64*)SourceGuid)\r
+    );\r
+  WriteUnaligned64 (\r
+    (UINT64*)DestinationGuid + 1,\r
+    ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)\r
+    );\r
+  return DestinationGuid;\r
+}\r
+\r
+/**\r
+  Compares two GUIDs.\r
+\r
+  This function compares Guid1 to Guid2.  If the GUIDs are identical then TRUE is returned.\r
+  If there are any bit differences in the two GUIDs, then FALSE is returned.\r
+  If Guid1 is NULL, then ASSERT().\r
+  If Guid2 is NULL, then ASSERT().\r
+\r
+  @param  Guid1       A pointer to a 128 bit GUID.\r
+  @param  Guid2       A pointer to a 128 bit GUID.\r
+\r
+  @retval TRUE        Guid1 and Guid2 are identical.\r
+  @retval FALSE       Guid1 and Guid2 are not identical.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+CompareGuid (\r
+  IN CONST GUID  *Guid1,\r
+  IN CONST GUID  *Guid2\r
+  )\r
+{\r
+  return (BOOLEAN)(\r
+           ReadUnaligned64 ((CONST UINT64*)Guid1)\r
+             == ReadUnaligned64 ((CONST UINT64*)Guid2) &&\r
+           ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)\r
+             == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)\r
+           );\r
+}\r
+\r
+/**\r
+  Scans a target buffer for a GUID, and returns a pointer to the matching GUID\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from\r
+  the lowest address to the highest address at 128-bit increments for the 128-bit\r
+  GUID value that matches Guid.  If a match is found, then a pointer to the matching\r
+  GUID in the target buffer is returned.  If no match is found, then NULL is returned.\r
+  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 128-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan.\r
+  @param  Guid    Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching Guid in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanGuid (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN CONST GUID  *Guid\r
+  )\r
+{\r
+  CONST GUID                        *GuidPtr;\r
+\r
+  ASSERT (((UINTN)Buffer & (sizeof (Guid->Data1) - 1)) == 0);\r
+  ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));\r
+  ASSERT ((Length & (sizeof (*GuidPtr) - 1)) == 0);\r
+\r
+  GuidPtr = (GUID*)Buffer;\r
+  Buffer  = GuidPtr + Length / sizeof (*GuidPtr);\r
+  while (GuidPtr < (CONST GUID*)Buffer) {\r
+    if (CompareGuid (GuidPtr, Guid)) {\r
+      return (VOID*)GuidPtr;\r
+    }\r
+    GuidPtr++;\r
+  }\r
+  return NULL;\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/MemLibInternals.h b/MdePkg/Library/BaseMemoryLibRepStr/MemLibInternals.h
new file mode 100644 (file)
index 0000000..2bd034d
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/MemLibInternals.h
@@ -0,0 +1,235 @@
+/** @file\r
+  Declaration of internal functions for Base Memory Library.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  MemLibInternals.h\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+#ifndef __MEM_LIB_INTERNALS__\r
+#define __MEM_LIB_INTERNALS__\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Copy Length bytes from Source to Destination.\r
+\r
+  @param  Destination Target of copy\r
+  @param  Source Place to copy from\r
+  @param  Length Number of bytes to copy\r
+\r
+  @return Destination\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemCopyMem (\r
+  OUT     VOID                      *DestinationBuffer,\r
+  IN      CONST VOID                *SourceBuffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Set Buffer to Value for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+  @param  Value Value of the set operation.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT8                     Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem16 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem32 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem64 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  );\r
+\r
+/**\r
+  Set Buffer to 0 for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemZeroMem (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Compares two memory buffers of a given length.\r
+\r
+  @param  DestinationBuffer First memory buffer\r
+  @param  SourceBuffer      Second memory buffer\r
+  @param  Length            Length of DestinationBuffer and SourceBuffer memory\r
+                            regions to compare. Must be non-zero.\r
+\r
+  @retval 0     if MemOne == MemTwo\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+InternalMemCompareMem (\r
+  IN      CONST VOID                *DestinationBuffer,\r
+  IN      CONST VOID                *SourceBuffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for an 8-bit value, and returns a pointer to the\r
+  matching 8-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem8 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT8                     Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 16-bit value, and returns a pointer to the\r
+  matching 16-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem16 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 32-bit value, and returns a pointer to the\r
+  matching 32-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem32 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 64-bit value, and returns a pointer to the\r
+  matching 64-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem64 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  );\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem16Wrapper.c
new file mode 100644 (file)
index 0000000..f0ca471
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem16Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem16() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem16Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 16-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem16 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT16      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem16 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem32Wrapper.c
new file mode 100644 (file)
index 0000000..7a0ebcd
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem32Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem32() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem32Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 32-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem32 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT32      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem32 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem64Wrapper.c
new file mode 100644 (file)
index 0000000..dd1a82f
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem64Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem64() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem64Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 64-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem64 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT64      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem64 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ScanMem8Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem8Wrapper.c
new file mode 100644 (file)
index 0000000..685563e
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/ScanMem8Wrapper.c
@@ -0,0 +1,66 @@
+/** @file\r
+  ScanMem8() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem8Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for an 8-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem8 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT8       Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+ \r
+  return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMem16Wrapper.c
new file mode 100644 (file)
index 0000000..5e58eb9
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMem16Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem16() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem16Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 16-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 16-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem16 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT16  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem16 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMem32Wrapper.c
new file mode 100644 (file)
index 0000000..f4927f7
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMem32Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem32() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem32Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 32-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 32-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem32 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT32  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem32 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMem64Wrapper.c
new file mode 100644 (file)
index 0000000..e845563
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMem64Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem64() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem64Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 64-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 64-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem64 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT64  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem64 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/SetMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/SetMemWrapper.c
new file mode 100644 (file)
index 0000000..84a7d62
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/SetMemWrapper.c
@@ -0,0 +1,61 @@
+/** @file\r
+  SetMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a byte value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with Value, and returns Buffer.\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer    Memory to set.\r
+  @param  Length    Number of bytes to set.\r
+  @param  Value     Value of the set operation.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem (\r
+  OUT VOID  *Buffer,\r
+  IN UINTN  Length,\r
+  IN UINT8  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+\r
+  return InternalMemSetMem (Buffer, Length, Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c b/MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c
new file mode 100644 (file)
index 0000000..886c934
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibRepStr/ZeroMemWrapper.c
@@ -0,0 +1,56 @@
+/** @file\r
+  ZeroMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ZeroMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with zeros, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with zeros, and returns Buffer.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().\r
+\r
+  @param  Buffer      Pointer to the target buffer to fill with zeros.\r
+  @param  Length      Number of bytes in Buffer to fill with zeros.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ZeroMem (\r
+  OUT VOID  *Buffer,\r
+  IN UINTN  Length\r
+  )\r
+{\r
+  ASSERT (!(Buffer == NULL && Length > 0));\r
+  ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));\r
+  return InternalMemZeroMem (Buffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf
new file mode 100644 (file)
index 0000000..8a7c787
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf
@@ -0,0 +1,143 @@
+#/** @file\r
+# Component description file for SSE2 Base Memory Library\r
+#\r
+# Base Memory Library that uses XMM registers for high performance.\r
+#  Optimized for use in DXE.\r
+# Copyright (c) 2007, Intel Corporation\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseMemoryLibSse2\r
+  FILE_GUID                      = 65a18235-5096-4032-8c63-214f0249ce8d\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = BaseMemoryLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  MemLibInternals.h\r
+  CommonHeader.h\r
+\r
+[Sources.Ia32]\r
+  Ia32/ScanMem64.S\r
+  Ia32/ScanMem32.S\r
+  Ia32/ScanMem16.S\r
+  Ia32/ScanMem8.S\r
+  Ia32/CompareMem.S\r
+  Ia32/ZeroMem.S\r
+  Ia32/SetMem64.S\r
+  Ia32/SetMem32.S\r
+  Ia32/SetMem16.S\r
+  Ia32/SetMem.S\r
+  Ia32/CopyMem.S\r
+  Ia32/ScanMem64.asm\r
+  Ia32/ScanMem32.asm\r
+  Ia32/ScanMem16.asm\r
+  Ia32/ScanMem8.asm\r
+  Ia32/CompareMem.asm\r
+  Ia32/ZeroMem.asm\r
+  Ia32/SetMem64.asm\r
+  Ia32/SetMem32.asm\r
+  Ia32/SetMem16.asm\r
+  Ia32/SetMem.asm\r
+  Ia32/CopyMem.asm\r
+  ScanMem64Wrapper.c\r
+  ScanMem32Wrapper.c\r
+  ScanMem16Wrapper.c\r
+  ScanMem8Wrapper.c\r
+  ZeroMemWrapper.c\r
+  CompareMemWrapper.c\r
+  SetMem64Wrapper.c\r
+  SetMem32Wrapper.c\r
+  SetMem16Wrapper.c\r
+  SetMemWrapper.c\r
+  CopyMemWrapper.c\r
+  MemLibGuid.c\r
+\r
+[Sources.X64]\r
+  x64/ScanMem64.asm\r
+  x64/ScanMem32.asm\r
+  x64/ScanMem16.asm\r
+  x64/ScanMem8.asm\r
+  x64/CompareMem.asm\r
+  x64/ZeroMem.asm\r
+  x64/SetMem64.asm\r
+  x64/SetMem32.asm\r
+  x64/SetMem16.asm\r
+  x64/SetMem.asm\r
+  x64/CopyMem.asm\r
+  ScanMem64Wrapper.c\r
+  ScanMem32Wrapper.c\r
+  ScanMem16Wrapper.c\r
+  ScanMem8Wrapper.c\r
+  ZeroMemWrapper.c\r
+  CompareMemWrapper.c\r
+  SetMem64Wrapper.c\r
+  SetMem32Wrapper.c\r
+  SetMem16Wrapper.c\r
+  SetMemWrapper.c\r
+  CopyMemWrapper.c\r
+  MemLibGuid.c\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+  BaseLib\r
+\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa
new file mode 100644 (file)
index 0000000..5415b3d
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.msa
@@ -0,0 +1,103 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BaseMemoryLibSse2</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>65a18235-5096-4032-8c63-214f0249ce8d</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for SSE2 Base Memory Library</Abstract>\r
+    <Description>Base Memory Library that uses XMM registers for high performance.\r
+      Optimized for use in DXE.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BaseMemoryLibSse2</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>BaseMemoryLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>BaseLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>MemLibInternals.h</Filename>\r
+    <Filename SupArchList="IA32">MemLibGuid.c</Filename>\r
+    <Filename SupArchList="IA32">CopyMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">SetMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">CompareMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ZeroMemWrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem8Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">ScanMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CopyMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem16.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem32.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem64.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ZeroMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CompareMem.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem8.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem16.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem32.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem64.asm</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CopyMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem16.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem32.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/SetMem64.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ZeroMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/CompareMem.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem8.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem16.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem32.S</Filename>\r
+    <Filename SupArchList="IA32">Ia32/ScanMem64.S</Filename>\r
+    <Filename SupArchList="X64">MemLibGuid.c</Filename>\r
+    <Filename SupArchList="X64">CopyMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">SetMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">CompareMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">ZeroMemWrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem8Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem16Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem32Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">ScanMem64Wrapper.c</Filename>\r
+    <Filename SupArchList="X64">x64/CopyMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem16.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem32.asm</Filename>\r
+    <Filename SupArchList="X64">x64/SetMem64.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ZeroMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/CompareMem.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem8.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem16.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem32.asm</Filename>\r
+    <Filename SupArchList="X64">x64/ScanMem64.asm</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/CommonHeader.h b/MdePkg/Library/BaseMemoryLibSse2/CommonHeader.h
new file mode 100644 (file)
index 0000000..68b4d94
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/CompareMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/CompareMemWrapper.c
new file mode 100644 (file)
index 0000000..b816af7
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/CompareMemWrapper.c
@@ -0,0 +1,72 @@
+/** @file\r
+  CompareMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  CompareMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Compares the contents of two buffers.\r
+\r
+  This function compares Length bytes of SourceBuffer to Length bytes of DestinationBuffer.\r
+  If all Length bytes of the two buffers are identical, then 0 is returned.  Otherwise, the\r
+  value returned is the first mismatched byte in SourceBuffer subtracted from the first\r
+  mismatched byte in DestinationBuffer.\r
+  If Length > 0 and DestinationBuffer is NULL and Length > 0, then ASSERT().\r
+  If Length > 0 and SourceBuffer is NULL and Length > 0, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+\r
+  @param  DestinationBuffer Pointer to the destination buffer to compare.\r
+  @param  SourceBuffer      Pointer to the source buffer to compare.\r
+  @param  Length            Number of bytes to compare.\r
+\r
+  @return 0                 All Length bytes of the two buffers are identical.\r
+  @retval Non-zero          The first mismatched byte in SourceBuffer subtracted from the first\r
+                            mismatched byte in DestinationBuffer.\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+CompareMem (\r
+  IN CONST VOID  *DestinationBuffer,\r
+  IN CONST VOID  *SourceBuffer,\r
+  IN UINTN       Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return 0;\r
+  }\r
+  ASSERT (DestinationBuffer != NULL);\r
+  ASSERT (SourceBuffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));\r
+\r
+  return InternalMemCompareMem (DestinationBuffer, SourceBuffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/CopyMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/CopyMemWrapper.c
new file mode 100644 (file)
index 0000000..b0449b1
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/CopyMemWrapper.c
@@ -0,0 +1,67 @@
+/** @file\r
+  CopyMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  CopyMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Copies a source buffer to a destination buffer, and returns the destination buffer.\r
+\r
+  This function copies Length bytes from SourceBuffer to DestinationBuffer, and returns\r
+  DestinationBuffer.  The implementation must be reentrant, and it must handle the case\r
+  where SourceBuffer overlaps DestinationBuffer.\r
+  If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then ASSERT(). \r
+  If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT(). \r
+\r
+  @param  DestinationBuffer   Pointer to the destination buffer of the memory copy.\r
+  @param  SourceBuffer        Pointer to the source buffer of the memory copy.\r
+  @param  Length              Number of bytes to copy from SourceBuffer to DestinationBuffer.\r
+\r
+  @return DestinationBuffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+CopyMem (\r
+  OUT VOID       *DestinationBuffer,\r
+  IN CONST VOID  *SourceBuffer,\r
+  IN UINTN       Length\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return DestinationBuffer;\r
+  }\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)DestinationBuffer));\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)SourceBuffer));\r
+\r
+  if (DestinationBuffer == SourceBuffer) {\r
+    return DestinationBuffer;\r
+  }\r
+  return InternalMemCopyMem (DestinationBuffer, SourceBuffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.S
new file mode 100644 (file)
index 0000000..3968604
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.S
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CompareMem.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   CompareMem function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemCompareMem\r
+\r
+#------------------------------------------------------------------------------\r
+# INTN\r
+# EFIAPI\r
+# InternalMemCompareMem (\r
+#   IN      CONST VOID                *DestinationBuffer,\r
+#   IN      CONST VOID                *SourceBuffer,\r
+#   IN      UINTN                     Length\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemCompareMem:\r
+    push    %esi\r
+    push    %edi\r
+    movl    12(%esp), %esi\r
+    movl    16(%esp), %edi\r
+    movl    20(%esp), %ecx\r
+    repe    cmpsb\r
+    movzbl  -1(%esi), %eax\r
+    movzbl  -1(%edi), %edx\r
+    subl    %edx, %eax\r
+    pop     %edi\r
+    pop     %esi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.asm
new file mode 100644 (file)
index 0000000..dabd337
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CompareMem.asm
@@ -0,0 +1,59 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CompareMem.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   CompareMem function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; INTN\r
+; EFIAPI\r
+; InternalMemCompareMem (\r
+;   IN      CONST VOID                *DestinationBuffer,\r
+;   IN      CONST VOID                *SourceBuffer,\r
+;   IN      UINTN                     Length\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemCompareMem   PROC    USES    esi edi\r
+    mov     esi, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+    mov     ecx, [esp + 20]\r
+    repe    cmpsb\r
+    movzx   eax, byte ptr [esi - 1]\r
+    movzx   edx, byte ptr [edi - 1]\r
+    sub     eax, edx\r
+    ret\r
+InternalMemCompareMem   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.S
new file mode 100644 (file)
index 0000000..82a2b94
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.S
@@ -0,0 +1,90 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   CopyMem.asm\r
+#\r
+# Abstract:\r
+#\r
+#   CopyMem function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemCopyMem\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  EFIAPI\r
+#  InternalMemCopyMem (\r
+#    IN VOID   *Destination,\r
+#    IN VOID   *Source,\r
+#    IN UINTN  Count\r
+#    );\r
+#------------------------------------------------------------------------------\r
+_InternalMemCopyMem:\r
+    push    %esi\r
+    push    %edi\r
+    movl    16(%esp), %esi              # esi <- Source\r
+    movl    12(%esp), %edi              # edi <- Destination\r
+    movl    20(%esp), %edx              # edx <- Count\r
+    leal    -1(%esi,%edx,), %eax        # eax <- End of Source\r
+    cmpl    %edi, %esi\r
+    jae     L0\r
+    cmpl    %edi, %eax                  # Overlapped?\r
+    jae     L_CopyBackward               # Copy backward if overlapped\r
+L0:\r
+    xorl    %ecx, %ecx\r
+    subl    %edi, %ecx\r
+    andl    $15, %ecx                   # ecx + edi aligns on 16-byte boundary\r
+    jz      L1\r
+    cmpl    %edx, %ecx\r
+    cmova   %edx, %ecx\r
+    subl    %ecx, %edx                  # edx <- remaining bytes to copy\r
+    rep\r
+    movsb\r
+L1:\r
+    movl    %edx, %ecx\r
+    andl    $15, %edx\r
+    shrl    $4, %ecx                    # ecx <- # of DQwords to copy\r
+    jz      L_CopyBytes\r
+    addl    $-16, %esp\r
+    movdqu  %xmm0, (%esp)\r
+L2:\r
+    movdqu  (%esi), %xmm0\r
+    movntdq %xmm0, (%edi)\r
+    addl    $16, %esi\r
+    addl    $16, %edi\r
+    loop    L2\r
+    mfence\r
+    movdqu  (%esp),%xmm0\r
+    addl    $16, %esp                   # stack cleanup\r
+    jmp     L_CopyBytes\r
+L_CopyBackward:\r
+    movl    %eax, %esi                  # esi <- Last byte in Source\r
+    leal    -1(%edi,%edx,), %edi        # edi <- Last byte in Destination\r
+    std\r
+L_CopyBytes:\r
+    movl    %edx, %ecx\r
+    rep\r
+    movsb\r
+    cld\r
+    movl    12(%esp), %eax              # eax <- Destination as return value\r
+    pop     %edi\r
+    pop     %esi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.asm
new file mode 100644 (file)
index 0000000..d8b80db
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/CopyMem.asm
@@ -0,0 +1,89 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   CopyMem.asm\r
+;\r
+; Abstract:\r
+;\r
+;   CopyMem function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  InternalMemCopyMem (\r
+;    IN VOID   *Destination,\r
+;    IN VOID   *Source,\r
+;    IN UINTN  Count\r
+;    );\r
+;------------------------------------------------------------------------------\r
+InternalMemCopyMem  PROC    USES    esi edi\r
+    mov     esi, [esp + 16]             ; esi <- Source\r
+    mov     edi, [esp + 12]             ; edi <- Destination\r
+    mov     edx, [esp + 20]             ; edx <- Count\r
+    lea     eax, [esi + edx - 1]        ; eax <- End of Source\r
+    cmp     esi, edi\r
+    jae     @F\r
+    cmp     eax, edi                    ; Overlapped?\r
+    jae     @CopyBackward               ; Copy backward if overlapped\r
+@@:\r
+    xor     ecx, ecx\r
+    sub     ecx, edi\r
+    and     ecx, 15                     ; ecx + edi aligns on 16-byte boundary\r
+    jz      @F\r
+    cmp     ecx, edx\r
+    cmova   ecx, edx\r
+    sub     edx, ecx                    ; edx <- remaining bytes to copy\r
+    rep     movsb\r
+@@:\r
+    mov     ecx, edx\r
+    and     edx, 15\r
+    shr     ecx, 4                      ; ecx <- # of DQwords to copy\r
+    jz      @CopyBytes\r
+    add     esp, -16\r
+    movdqu  [esp], xmm0                 ; save xmm0\r
+@@:\r
+    movdqu  xmm0, [esi]                 ; esi may not be 16-bytes aligned\r
+    movntdq [edi], xmm0                 ; edi should be 16-bytes aligned\r
+    add     esi, 16\r
+    add     edi, 16\r
+    loop    @B\r
+    mfence\r
+    movdqu  xmm0, [esp]                 ; restore xmm0\r
+    add     esp, 16                     ; stack cleanup\r
+    jmp     @CopyBytes\r
+@CopyBackward:\r
+    mov     esi, eax                    ; esi <- Last byte in Source\r
+    lea     edi, [edi + edx - 1]        ; edi <- Last byte in Destination\r
+    std\r
+@CopyBytes:\r
+    mov     ecx, edx\r
+    rep     movsb\r
+    cld\r
+    mov     eax, [esp + 12]             ; eax <- Destination as return value\r
+    ret\r
+InternalMemCopyMem  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.S
new file mode 100644 (file)
index 0000000..276b4ff
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.S
@@ -0,0 +1,55 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem16.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem16 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem16\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem16 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT16                    Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem16:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    8(%esp), %edi\r
+    movl    16(%esp), %eax\r
+    repne   scasw\r
+    leal    -2(%edi), %eax\r
+    cmovnz  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.asm
new file mode 100644 (file)
index 0000000..a6d0330
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem16.asm
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem16.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem16 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem16 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT16                    Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem16    PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    mov     eax, [esp + 16]\r
+    repne   scasw\r
+    lea     eax, [edi - 2]\r
+    cmovnz  eax, ecx\r
+    ret\r
+InternalMemScanMem16    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.S
new file mode 100644 (file)
index 0000000..fced1b2
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.S
@@ -0,0 +1,55 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem32.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem32 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem32\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem32 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT32                    Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem32:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    8(%esp), %edi\r
+    movl    16(%esp), %eax\r
+    repne   scasl\r
+    leal    -4(%edi), %eax\r
+    cmovnz  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.asm
new file mode 100644 (file)
index 0000000..46a8011
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem32.asm
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem32.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem32 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem32 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT32                    Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem32    PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    mov     eax, [esp + 16]\r
+    repne   scasd\r
+    lea     eax, [edi - 4]\r
+    cmovnz  eax, ecx\r
+    ret\r
+InternalMemScanMem32    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.S
new file mode 100644 (file)
index 0000000..37dc3bb
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.S
@@ -0,0 +1,64 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem64.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem64 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem64\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem64 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT64                    Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem64:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    16(%esp), %eax\r
+    movl    20(%esp), %edx\r
+    movl    8(%esp), %edi\r
+L0:\r
+    cmpl    (%edi), %eax\r
+    leal    8(%edi), %edi\r
+    loopne  L0\r
+    jne     L1\r
+    cmpl    -4(%edi), %edx\r
+    jecxz   L1\r
+    jne     L0\r
+L1:\r
+    leal    -8(%edi), %eax\r
+    cmovne  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.asm
new file mode 100644 (file)
index 0000000..c19ed98
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem64.asm
@@ -0,0 +1,67 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem64.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem64 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem64 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT64                    Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem64    PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     eax, [esp + 16]\r
+    mov     edx, [esp + 20]\r
+    mov     edi, [esp + 8]\r
+@@:\r
+    cmp     eax, [edi]\r
+    lea     edi, [edi + 8]\r
+    loopne  @B\r
+    jne     @F\r
+    cmp     edx, [edi - 4]\r
+    jecxz   @F\r
+    jne     @B\r
+@@:\r
+    lea     eax, [edi - 8]\r
+    cmovne  eax, ecx\r
+    ret\r
+InternalMemScanMem64    ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.S
new file mode 100644 (file)
index 0000000..e7d2a26
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.S
@@ -0,0 +1,55 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ScanMem8.Asm\r
+#\r
+# Abstract:\r
+#\r
+#   ScanMem8 function\r
+#\r
+# Notes:\r
+#\r
+#   The following BaseMemoryLib instances share the same version of this file:\r
+#\r
+#       BaseMemoryLibRepStr\r
+#       BaseMemoryLibMmx\r
+#       BaseMemoryLibSse2\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemScanMem8\r
+\r
+#------------------------------------------------------------------------------\r
+# CONST VOID *\r
+# EFIAPI\r
+# InternalMemScanMem8 (\r
+#   IN      CONST VOID                *Buffer,\r
+#   IN      UINTN                     Length,\r
+#   IN      UINT8                     Value\r
+#   );\r
+#------------------------------------------------------------------------------\r
+_InternalMemScanMem8:\r
+    push    %edi\r
+    movl    12(%esp), %ecx\r
+    movl    8(%esp), %edi\r
+    movb    16(%esp), %al\r
+    repne   scasb\r
+    leal    -1(%edi), %eax\r
+    cmovnz  %ecx, %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.asm
new file mode 100644 (file)
index 0000000..def2690
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ScanMem8.asm
@@ -0,0 +1,58 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ScanMem8.Asm\r
+;\r
+; Abstract:\r
+;\r
+;   ScanMem8 function\r
+;\r
+; Notes:\r
+;\r
+;   The following BaseMemoryLib instances share the same version of this file:\r
+;\r
+;       BaseMemoryLibRepStr\r
+;       BaseMemoryLibMmx\r
+;       BaseMemoryLibSse2\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+; CONST VOID *\r
+; EFIAPI\r
+; InternalMemScanMem8 (\r
+;   IN      CONST VOID                *Buffer,\r
+;   IN      UINTN                     Length,\r
+;   IN      UINT8                     Value\r
+;   );\r
+;------------------------------------------------------------------------------\r
+InternalMemScanMem8 PROC    USES    edi\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    mov     al, [esp + 16]\r
+    repne   scasb\r
+    lea     eax, [edi - 1]\r
+    cmovnz  eax, ecx\r
+    ret\r
+InternalMemScanMem8 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.S
new file mode 100644 (file)
index 0000000..aa6f59f
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.S
@@ -0,0 +1,81 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem.asm\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+    .686:\r
+    #.MODEL flat,C\r
+    .xmm:\r
+    .code:\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  _mem_SetMem (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT8  Value\r
+#    );\r
+#------------------------------------------------------------------------------\r
+.globl _InternalMemSetMem\r
+_InternalMemSetMem:\r
+    push    %edi\r
+    movl    12(%esp), %edx              # edx <- Count\r
+    movl    8(%esp), %edi               # edi <- Buffer\r
+    movb    16(%esp), %al               # al <- Value\r
+    xorl    %ecx, %ecx\r
+    subl    %edi, %ecx\r
+    andl    $15, %ecx                   # ecx + edi aligns on 16-byte boundary\r
+    jz      L0\r
+    cmpl    %edx, %ecx\r
+    cmova   %edx, %ecx\r
+    subl    %ecx, %edx\r
+    rep\r
+    stosb\r
+L0:\r
+    movl    %edx, %ecx\r
+    andl    $15, %edx\r
+    shrl    $4, %ecx                    # ecx <- # of DQwords to set\r
+    jz      L_SetBytes\r
+    movb    %al, %ah                    # ax <- Value | (Value << 8)\r
+    addl    $-16, %esp\r
+    movdqu  %xmm0, (%esp)\r
+    movd    %eax, %xmm0\r
+    pshuflw $0, %xmm0, %xmm0\r
+    movlhps %xmm0, %xmm0\r
+L1:\r
+    movntdq %xmm0, (%edi)\r
+    addl    $16, %edi\r
+    loop   L1\r
+    mfence\r
+    movdqu  (%esp), %xmm0\r
+    addl    $16, %esp                   # stack cleanup\r
+L_SetBytes:\r
+    movl    %edx, %ecx\r
+    rep\r
+    stosb\r
+    movl    8(%esp), %eax               # eax <- Buffer as return value\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.asm
new file mode 100644 (file)
index 0000000..f41d19c
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.asm
@@ -0,0 +1,80 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem.asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  EFIAPI\r
+;  InternalMemSetMem (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT8  Value\r
+;    );\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem   PROC    USES    edi\r
+    mov     edx, [esp + 12]             ; edx <- Count\r
+    mov     edi, [esp + 8]              ; edi <- Buffer\r
+    mov     al, [esp + 16]              ; al <- Value\r
+    xor     ecx, ecx\r
+    sub     ecx, edi\r
+    and     ecx, 15                     ; ecx + edi aligns on 16-byte boundary\r
+    jz      @F\r
+    cmp     ecx, edx\r
+    cmova   ecx, edx\r
+    sub     edx, ecx\r
+    rep     stosb\r
+@@:\r
+    mov     ecx, edx\r
+    and     edx, 15\r
+    shr     ecx, 4                      ; ecx <- # of DQwords to set\r
+    jz      @SetBytes\r
+    mov     ah, al                      ; ax <- Value | (Value << 8)\r
+    add     esp, -16\r
+    movdqu  [esp], xmm0                 ; save xmm0\r
+    movd    xmm0, eax\r
+    pshuflw xmm0, xmm0, 0               ; xmm0[0..63] <- Value repeats 8 times\r
+    movlhps xmm0, xmm0                  ; xmm0 <- Value repeats 16 times\r
+@@:\r
+    movntdq [edi], xmm0                 ; edi should be 16-byte aligned\r
+    add     edi, 16\r
+    loop    @B\r
+    mfence\r
+    movdqu  xmm0, [esp]                 ; restore xmm0\r
+    add     esp, 16                     ; stack cleanup\r
+@SetBytes:\r
+    mov     ecx, edx\r
+    rep     stosb\r
+    mov     eax, [esp + 8]              ; eax <- Buffer as return value\r
+    ret\r
+InternalMemSetMem   ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.S
new file mode 100644 (file)
index 0000000..fac9a72
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.S
@@ -0,0 +1,74 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem16.asm\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem16 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemSetMem16\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  EFIAPI\r
+#  InternalMemSetMem16 (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT16 Value\r
+#    )\r
+#------------------------------------------------------------------------------\r
+_InternalMemSetMem16:\r
+    push    %edi\r
+    movl    12(%esp), %edx\r
+    movl    8(%esp), %edi\r
+    xorl    %ecx, %ecx\r
+    subl    %edi, %ecx\r
+    andl    $15, %ecx                   # ecx + edi aligns on 16-byte boundary\r
+    movl    16(%esp), %eax\r
+    jz      L0\r
+    shrl    %ecx\r
+    cmpl    %edx, %ecx\r
+    cmova   %edx, %ecx\r
+    subl    %ecx, %edx\r
+    rep\r
+    stosw\r
+L0:\r
+    movl    %edx, %ecx\r
+    andl    $7, %edx\r
+    shrl    $3, %ecx\r
+    jz      L_SetWords\r
+    movd    %eax, %xmm0\r
+    pshuflw $0, %xmm0, %xmm0\r
+    movlhps %xmm0, %xmm0\r
+L1:\r
+    movntdq %xmm0, (%edi)\r
+    addl    $16, %edi\r
+    loop    L1\r
+    mfence\r
+L_SetWords:\r
+    movl    %edx, %ecx\r
+    rep\r
+    stosw\r
+    movl    8(%esp), %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.asm
new file mode 100644 (file)
index 0000000..93ce0af
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.asm
@@ -0,0 +1,76 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem16.asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem16 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  EFIAPI\r
+;  InternalMemSetMem16 (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT16 Value\r
+;    );\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem16 PROC    USES    edi\r
+    mov     edx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    xor     ecx, ecx\r
+    sub     ecx, edi\r
+    and     ecx, 15                     ; ecx + edi aligns on 16-byte boundary\r
+    mov     eax, [esp + 16]\r
+    jz      @F\r
+    shr     ecx, 1\r
+    cmp     ecx, edx\r
+    cmova   ecx, edx\r
+    sub     edx, ecx\r
+    rep     stosw\r
+@@:\r
+    mov     ecx, edx\r
+    and     edx, 7\r
+    shr     ecx, 3\r
+    jz      @SetWords\r
+    movd    xmm0, eax\r
+    pshuflw xmm0, xmm0, 0\r
+    movlhps xmm0, xmm0\r
+@@:\r
+    movntdq [edi], xmm0                 ; edi should be 16-byte aligned\r
+    add     edi, 16\r
+    loop    @B\r
+    mfence\r
+@SetWords:\r
+    mov     ecx, edx\r
+    rep     stosw\r
+    mov     eax, [esp + 8]\r
+    ret\r
+InternalMemSetMem16 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.S
new file mode 100644 (file)
index 0000000..8b0095a
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.S
@@ -0,0 +1,73 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem32.asm\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem32 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemSetMem32\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  EFIAPI\r
+#  InternalMemSetMem32 (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT32 Value\r
+#    );\r
+#------------------------------------------------------------------------------\r
+_InternalMemSetMem32:\r
+    push    %edi\r
+    movl    12(%esp), %edx\r
+    movl    8(%esp), %edi\r
+    xorl    %ecx, %ecx\r
+    subl    %edi, %ecx\r
+    andl    $15, %ecx                   # ecx + edi aligns on 16-byte boundary\r
+    movl    16(%esp), %eax\r
+    jz      L0\r
+    shrl    $2, %ecx\r
+    cmpl    %edx, %ecx\r
+    cmova   %edx, %ecx\r
+    subl    %ecx, %edx\r
+    rep\r
+    stosl\r
+L0:\r
+    movl    %edx, %ecx\r
+    andl    $3, %edx\r
+    shrl    $2, %ecx\r
+    jz      L_SetDwords\r
+    movd    %eax, %xmm0\r
+    pshufd  $0, %xmm0, %xmm0\r
+L1:\r
+    movntdq %xmm0, (%edi)\r
+    addl    $16, %edi\r
+    loop    L1\r
+    mfence\r
+L_SetDwords:\r
+    movl    %edx, %ecx\r
+    rep\r
+    stosl\r
+    movl    8(%esp), %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.asm
new file mode 100644 (file)
index 0000000..3aea7b1
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.asm
@@ -0,0 +1,75 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem32.asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem32 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  EFIAPI\r
+;  InternalMemSetMem32 (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT32 Value\r
+;    );\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem32 PROC    USES    edi\r
+    mov     edx, [esp + 12]\r
+    mov     edi, [esp + 8]\r
+    xor     ecx, ecx\r
+    sub     ecx, edi\r
+    and     ecx, 15                     ; ecx + edi aligns on 16-byte boundary\r
+    mov     eax, [esp + 16]\r
+    jz      @F\r
+    shr     ecx, 2\r
+    cmp     ecx, edx\r
+    cmova   ecx, edx\r
+    sub     edx, ecx\r
+    rep     stosd\r
+@@:\r
+    mov     ecx, edx\r
+    and     edx, 3\r
+    shr     ecx, 2\r
+    jz      @SetDwords\r
+    movd    xmm0, eax\r
+    pshufd  xmm0, xmm0, 0\r
+@@:\r
+    movntdq [edi], xmm0\r
+    add     edi, 16\r
+    loop    @B\r
+    mfence\r
+@SetDwords:\r
+    mov     ecx, edx\r
+    rep     stosd\r
+    mov     eax, [esp + 8]\r
+    ret\r
+InternalMemSetMem32 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.S
new file mode 100644 (file)
index 0000000..bf42354
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.S
@@ -0,0 +1,63 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   SetMem64.S\r
+#\r
+# Abstract:\r
+#\r
+#   SetMem64 function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemSetMem64\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  EFIAPI\r
+#  InternalMemSetMem64 (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count,\r
+#    IN UINT64 Value\r
+#    );\r
+#------------------------------------------------------------------------------\r
+_InternalMemSetMem64:\r
+    movl    4(%esp), %eax\r
+    movl    8(%esp), %ecx\r
+    testb   $8, %al\r
+    movl    %eax, %edx\r
+    movq    0xc(%esp), %xmm0\r
+    jz      L1\r
+    movq    %xmm0, (%edx)\r
+    addl    $8, %edx\r
+    decl    %ecx\r
+L1:\r
+    shrl    %ecx\r
+    jz      L_SetQwords\r
+    movlhps %xmm0, %xmm0\r
+L2:\r
+    movntdq %xmm0, (%edx)\r
+    leal    16(%edx), %edx\r
+    loop    L2\r
+    mfence\r
+L_SetQwords:\r
+    jnc     L3\r
+    movq    %xmm0, (%edx)\r
+L3:\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.asm
new file mode 100644 (file)
index 0000000..8f1ebe4
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.asm
@@ -0,0 +1,69 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   SetMem64.asm\r
+;\r
+; Abstract:\r
+;\r
+;   SetMem64 function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  EFIAPI\r
+;  InternalMemSetMem64 (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count,\r
+;    IN UINT64 Value\r
+;    )\r
+;------------------------------------------------------------------------------\r
+InternalMemSetMem64 PROC\r
+    mov     eax, [esp + 4]              ; eax <- Buffer\r
+    mov     ecx, [esp + 8]              ; ecx <- Count\r
+    test    al, 8\r
+    mov     edx, eax\r
+    movq    xmm0, [esp + 12]\r
+    jz      @F\r
+    movq    [edx], xmm0\r
+    add     edx, 8\r
+    dec     ecx\r
+@@:\r
+    shr     ecx, 1\r
+    jz      @SetQwords\r
+    movlhps xmm0, xmm0\r
+@@:\r
+    movntdq [edx], xmm0\r
+    lea     edx, [edx + 16]\r
+    loop    @B\r
+    mfence\r
+@SetQwords:\r
+    jnc     @F\r
+    movq    [edx], xmm0\r
+@@:\r
+    ret\r
+InternalMemSetMem64 ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.S b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.S
new file mode 100644 (file)
index 0000000..657584d
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.S
@@ -0,0 +1,70 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#------------------------------------------------------------------------------\r
+#\r
+# Copyright (c) 2006, Intel Corporation\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution.  The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+# Module Name:\r
+#\r
+#   ZeroMem.asm\r
+#\r
+# Abstract:\r
+#\r
+#   ZeroMem function\r
+#\r
+# Notes:\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+.globl _InternalMemZeroMem\r
+\r
+#------------------------------------------------------------------------------\r
+#  VOID *\r
+#  EFIAPI\r
+#  InternalMemZeroMem (\r
+#    IN VOID   *Buffer,\r
+#    IN UINTN  Count\r
+#    );\r
+#------------------------------------------------------------------------------\r
+_InternalMemZeroMem:\r
+    push    %edi\r
+    movl    8(%esp), %edi\r
+    movl    12(%esp), %edx\r
+    xorl    %ecx, %ecx\r
+    subl    %edi, %ecx\r
+    xorl    %eax, %eax\r
+    andl    $15, %ecx\r
+    jz      L0\r
+    cmpl    %edx, %ecx\r
+    cmova   %edx, %ecx\r
+    subl    %ecx, %edx\r
+    rep\r
+    stosb\r
+L0:\r
+    movl    %edx, %ecx\r
+    andl    $15, %edx\r
+    shrl    $4, %ecx\r
+    jz      L_ZeroBytes\r
+    pxor    %xmm0, %xmm0\r
+L1:\r
+    movntdq %xmm0, (%edi)\r
+    addl    $16, %edi\r
+    loop    L1\r
+    mfence\r
+L_ZeroBytes:\r
+    movl    %edx, %ecx\r
+    rep\r
+    stosb\r
+    movl    8(%esp), %eax\r
+    pop     %edi\r
+    ret\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.asm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.asm
new file mode 100644 (file)
index 0000000..2f06ee1
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.asm
@@ -0,0 +1,72 @@
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006, Intel Corporation\r
+; All rights reserved. This program and the accompanying materials\r
+; are licensed and made available under the terms and conditions of the BSD License\r
+; which accompanies this distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+; Module Name:\r
+;\r
+;   ZeroMem.asm\r
+;\r
+; Abstract:\r
+;\r
+;   ZeroMem function\r
+;\r
+; Notes:\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .686\r
+    .model  flat,C\r
+    .xmm\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID *\r
+;  EFIAPI\r
+;  InternalMemZeroMem (\r
+;    IN VOID   *Buffer,\r
+;    IN UINTN  Count\r
+;    );\r
+;------------------------------------------------------------------------------\r
+InternalMemZeroMem  PROC    USES    edi\r
+    mov     edi, [esp + 8]\r
+    mov     edx, [esp + 12]\r
+    xor     ecx, ecx\r
+    sub     ecx, edi\r
+    xor     eax, eax\r
+    and     ecx, 15\r
+    jz      @F\r
+    cmp     ecx, edx\r
+    cmova   ecx, edx\r
+    sub     edx, ecx\r
+    rep     stosb\r
+@@:\r
+    mov     ecx, edx\r
+    and     edx, 15\r
+    shr     ecx, 4\r
+    jz      @ZeroBytes\r
+    pxor    xmm0, xmm0\r
+@@:\r
+    movntdq [edi], xmm0\r
+    add     edi, 16\r
+    loop    @B\r
+    mfence\r
+@ZeroBytes:\r
+    mov     ecx, edx\r
+    rep     stosb\r
+    mov     eax, [esp + 8]\r
+    ret\r
+InternalMemZeroMem  ENDP\r
+\r
+    END\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c b/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c
new file mode 100644 (file)
index 0000000..2434358
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/MemLibGuid.c
@@ -0,0 +1,137 @@
+/** @file\r
+  Implementation of GUID functions.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  MemLibGuid.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Copies a source GUID to a destination GUID.\r
+\r
+  This function copies the contents of the 128-bit GUID specified by SourceGuid to\r
+  DestinationGuid, and returns DestinationGuid.\r
+  If DestinationGuid is NULL, then ASSERT().\r
+  If SourceGuid is NULL, then ASSERT().\r
+\r
+  @param  DestinationGuid   Pointer to the destination GUID.\r
+  @param  SourceGuid        Pointer to the source GUID.\r
+\r
+  @return DestinationGuid.\r
+\r
+**/\r
+GUID *\r
+EFIAPI\r
+CopyGuid (\r
+  OUT GUID       *DestinationGuid,\r
+  IN CONST GUID  *SourceGuid\r
+  )\r
+{\r
+  WriteUnaligned64 (\r
+    (UINT64*)DestinationGuid,\r
+    ReadUnaligned64 ((CONST UINT64*)SourceGuid)\r
+    );\r
+  WriteUnaligned64 (\r
+    (UINT64*)DestinationGuid + 1,\r
+    ReadUnaligned64 ((CONST UINT64*)SourceGuid + 1)\r
+    );\r
+  return DestinationGuid;\r
+}\r
+\r
+/**\r
+  Compares two GUIDs.\r
+\r
+  This function compares Guid1 to Guid2.  If the GUIDs are identical then TRUE is returned.\r
+  If there are any bit differences in the two GUIDs, then FALSE is returned.\r
+  If Guid1 is NULL, then ASSERT().\r
+  If Guid2 is NULL, then ASSERT().\r
+\r
+  @param  Guid1       A pointer to a 128 bit GUID.\r
+  @param  Guid2       A pointer to a 128 bit GUID.\r
+\r
+  @retval TRUE        Guid1 and Guid2 are identical.\r
+  @retval FALSE       Guid1 and Guid2 are not identical.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+CompareGuid (\r
+  IN CONST GUID  *Guid1,\r
+  IN CONST GUID  *Guid2\r
+  )\r
+{\r
+  return (BOOLEAN)(\r
+           ReadUnaligned64 ((CONST UINT64*)Guid1)\r
+             == ReadUnaligned64 ((CONST UINT64*)Guid2) &&\r
+           ReadUnaligned64 ((CONST UINT64*)Guid1 + 1)\r
+             == ReadUnaligned64 ((CONST UINT64*)Guid2 + 1)\r
+           );\r
+}\r
+\r
+/**\r
+  Scans a target buffer for a GUID, and returns a pointer to the matching GUID\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from\r
+  the lowest address to the highest address at 128-bit increments for the 128-bit\r
+  GUID value that matches Guid.  If a match is found, then a pointer to the matching\r
+  GUID in the target buffer is returned.  If no match is found, then NULL is returned.\r
+  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 128-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan.\r
+  @param  Guid    Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching Guid in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanGuid (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN CONST GUID  *Guid\r
+  )\r
+{\r
+  CONST GUID                        *GuidPtr;\r
+\r
+  ASSERT (((UINTN)Buffer & (sizeof (Guid->Data1) - 1)) == 0);\r
+  ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));\r
+  ASSERT ((Length & (sizeof (*GuidPtr) - 1)) == 0);\r
+\r
+  GuidPtr = (GUID*)Buffer;\r
+  Buffer  = GuidPtr + Length / sizeof (*GuidPtr);\r
+  while (GuidPtr < (CONST GUID*)Buffer) {\r
+    if (CompareGuid (GuidPtr, Guid)) {\r
+      return (VOID*)GuidPtr;\r
+    }\r
+    GuidPtr++;\r
+  }\r
+  return NULL;\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/MemLibInternals.h b/MdePkg/Library/BaseMemoryLibSse2/MemLibInternals.h
new file mode 100644 (file)
index 0000000..2bd034d
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/MemLibInternals.h
@@ -0,0 +1,235 @@
+/** @file\r
+  Declaration of internal functions for Base Memory Library.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  MemLibInternals.h\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+#ifndef __MEM_LIB_INTERNALS__\r
+#define __MEM_LIB_INTERNALS__\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Copy Length bytes from Source to Destination.\r
+\r
+  @param  Destination Target of copy\r
+  @param  Source Place to copy from\r
+  @param  Length Number of bytes to copy\r
+\r
+  @return Destination\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemCopyMem (\r
+  OUT     VOID                      *DestinationBuffer,\r
+  IN      CONST VOID                *SourceBuffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Set Buffer to Value for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+  @param  Value Value of the set operation.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT8                     Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem16 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem32 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  );\r
+\r
+/**\r
+  Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemSetMem64 (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  );\r
+\r
+/**\r
+  Set Buffer to 0 for Size bytes.\r
+\r
+  @param  Buffer Memory to set.\r
+  @param  Size Number of bytes to set\r
+\r
+  @return Buffer\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+InternalMemZeroMem (\r
+  OUT     VOID                      *Buffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Compares two memory buffers of a given length.\r
+\r
+  @param  DestinationBuffer First memory buffer\r
+  @param  SourceBuffer      Second memory buffer\r
+  @param  Length            Length of DestinationBuffer and SourceBuffer memory\r
+                            regions to compare. Must be non-zero.\r
+\r
+  @retval 0     if MemOne == MemTwo\r
+\r
+**/\r
+INTN\r
+EFIAPI\r
+InternalMemCompareMem (\r
+  IN      CONST VOID                *DestinationBuffer,\r
+  IN      CONST VOID                *SourceBuffer,\r
+  IN      UINTN                     Length\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for an 8-bit value, and returns a pointer to the\r
+  matching 8-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem8 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT8                     Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 16-bit value, and returns a pointer to the\r
+  matching 16-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem16 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT16                    Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 32-bit value, and returns a pointer to the\r
+  matching 32-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem32 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT32                    Value\r
+  );\r
+\r
+/**\r
+  Scans a target buffer for a 64-bit value, and returns a pointer to the\r
+  matching 64-bit value in the target buffer.\r
+\r
+  @param  Buffer  Pointer to the target buffer to scan.\r
+  @param  Length  Number of bytes in Buffer to scan. Must be non-zero.\r
+  @param  Value   Value to search for in the target buffer.\r
+\r
+  @return Pointer to the first occurrence or NULL if not found.\r
+\r
+**/\r
+CONST VOID *\r
+EFIAPI\r
+InternalMemScanMem64 (\r
+  IN      CONST VOID                *Buffer,\r
+  IN      UINTN                     Length,\r
+  IN      UINT64                    Value\r
+  );\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem16Wrapper.c
new file mode 100644 (file)
index 0000000..f0ca471
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem16Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem16() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem16Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 16-bit value, and returns a pointer to the matching 16-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 16-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem16 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT16      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem16 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem32Wrapper.c
new file mode 100644 (file)
index 0000000..7a0ebcd
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem32Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem32() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem32Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 32-bit value, and returns a pointer to the matching 32-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 32-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem32 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT32      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem32 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem64Wrapper.c
new file mode 100644 (file)
index 0000000..dd1a82f
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem64Wrapper.c
@@ -0,0 +1,71 @@
+/** @file\r
+  ScanMem64() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem64Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for a 64-bit value, and returns a pointer to the matching 64-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for a 64-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem64 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT64      Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (((UINTN)Buffer & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return (VOID*)InternalMemScanMem64 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/ScanMem8Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ScanMem8Wrapper.c
new file mode 100644 (file)
index 0000000..685563e
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/ScanMem8Wrapper.c
@@ -0,0 +1,66 @@
+/** @file\r
+  ScanMem8() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ScanMem8Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Scans a target buffer for an 8-bit value, and returns a pointer to the matching 8-bit value\r
+  in the target buffer.\r
+\r
+  This function searches target the buffer specified by Buffer and Length from the lowest\r
+  address to the highest address for an 8-bit value that matches Value.  If a match is found,\r
+  then a pointer to the matching byte in the target buffer is returned.  If no match is found,\r
+  then NULL is returned.  If Length is 0, then NULL is returned.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer      Pointer to the target buffer to scan.\r
+  @param  Length      Number of bytes in Buffer to scan.\r
+  @param  Value       Value to search for in the target buffer.\r
+\r
+  @return A pointer to the matching byte in the target buffer or NULL otherwise.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ScanMem8 (\r
+  IN CONST VOID  *Buffer,\r
+  IN UINTN       Length,\r
+  IN UINT8       Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return NULL;\r
+  }\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+ \r
+  return (VOID*)InternalMemScanMem8 (Buffer, Length, Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMem16Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMem16Wrapper.c
new file mode 100644 (file)
index 0000000..5e58eb9
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/SetMem16Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem16() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem16Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 16-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 16-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 16-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem16 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT16  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem16 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMem32Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMem32Wrapper.c
new file mode 100644 (file)
index 0000000..f4927f7
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/SetMem32Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem32() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem32Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 32-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 32-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 32-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem32 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT32  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem32 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMem64Wrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMem64Wrapper.c
new file mode 100644 (file)
index 0000000..e845563
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/SetMem64Wrapper.c
@@ -0,0 +1,70 @@
+/** @file\r
+  SetMem64() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMem64Wrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a 64-bit value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with the 64-bit value specified by\r
+  Value, and returns Buffer. Value is repeated every 64-bits in for Length\r
+  bytes of Buffer.\r
+\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
+  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
+  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
+\r
+  @param  Buffer  Pointer to the target buffer to fill.\r
+  @param  Length  Number of bytes in Buffer to fill.\r
+  @param  Value   Value with which to fill Length bytes of Buffer.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem64 (\r
+  OUT VOID   *Buffer,\r
+  IN UINTN   Length,\r
+  IN UINT64  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+  ASSERT ((((UINTN)Buffer) & (sizeof (Value) - 1)) == 0);\r
+  ASSERT ((Length & (sizeof (Value) - 1)) == 0);\r
+\r
+  return InternalMemSetMem64 (Buffer, Length / sizeof (Value), Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/SetMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/SetMemWrapper.c
new file mode 100644 (file)
index 0000000..84a7d62
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/SetMemWrapper.c
@@ -0,0 +1,61 @@
+/** @file\r
+  SetMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  SetMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with a byte value, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with Value, and returns Buffer.\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). \r
+\r
+  @param  Buffer    Memory to set.\r
+  @param  Length    Number of bytes to set.\r
+  @param  Value     Value of the set operation.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+SetMem (\r
+  OUT VOID  *Buffer,\r
+  IN UINTN  Length,\r
+  IN UINT8  Value\r
+  )\r
+{\r
+  if (Length == 0) {\r
+    return Buffer;\r
+  }\r
+\r
+  ASSERT ((Length - 1) <= (MAX_ADDRESS - (UINTN)Buffer));\r
+\r
+  return InternalMemSetMem (Buffer, Length, Value);\r
+}\r

diff --git a/MdePkg/Library/BaseMemoryLibSse2/ZeroMemWrapper.c b/MdePkg/Library/BaseMemoryLibSse2/ZeroMemWrapper.c
new file mode 100644 (file)
index 0000000..886c934
--- /dev/null
+++ b/MdePkg/Library/BaseMemoryLibSse2/ZeroMemWrapper.c
@@ -0,0 +1,56 @@
+/** @file\r
+  ZeroMem() implementation.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  ZeroMemWrapper.c\r
+\r
+  The following BaseMemoryLib instances share the same version of this file:\r
+\r
+    BaseMemoryLib\r
+    BaseMemoryLibMmx\r
+    BaseMemoryLibSse2\r
+    BaseMemoryLibRepStr\r
+    PeiMemoryLib\r
+    DxeMemoryLib\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "MemLibInternals.h"\r
+\r
+/**\r
+  Fills a target buffer with zeros, and returns the target buffer.\r
+\r
+  This function fills Length bytes of Buffer with zeros, and returns Buffer.\r
+  If Length > 0 and Buffer is NULL, then ASSERT().\r
+  If Length is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT().\r
+\r
+  @param  Buffer      Pointer to the target buffer to fill with zeros.\r
+  @param  Length      Number of bytes in Buffer to fill with zeros.\r
+\r
+  @return Buffer.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+ZeroMem (\r
+  OUT VOID  *Buffer,\r
+  IN UINTN  Length\r
+  )\r
+{\r
+  ASSERT (!(Buffer == NULL && Length > 0));\r
+  ASSERT (Length <= (MAX_ADDRESS - (UINTN)Buffer + 1));\r
+  return InternalMemZeroMem (Buffer, Length);\r
+}\r

diff --git a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
new file mode 100644 (file)
index 0000000..2814b59
--- /dev/null
+++ b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
@@ -0,0 +1,82 @@
+#/** @file\r
+# Component description file for Base PCI Cf8 Library.\r
+#\r
+# PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.\r
+#  Layers on top of an I/O Library instance.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePciCf8Lib\r
+  FILE_GUID                      = 472ab06d-9810-4c00-bb7f-dad1828fc1ab\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PciCf8Lib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PciLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+  IoLib\r
+\r

diff --git a/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa
new file mode 100644 (file)
index 0000000..aa6309b
--- /dev/null
+++ b/MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.msa
@@ -0,0 +1,46 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePciCf8Lib</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>472ab06d-9810-4c00-bb7f-dad1828fc1ab</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Base PCI Cf8 Library.</Abstract>\r
+    <Description>PCI CF8 Library that uses I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles.\r
+      Layers on top of an I/O Library instance.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePciCf8Lib</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PciCf8Lib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>IoLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PciLib.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePciCf8Lib/CommonHeader.h b/MdePkg/Library/BasePciCf8Lib/CommonHeader.h
new file mode 100644 (file)
index 0000000..01be6d5
--- /dev/null
+++ b/MdePkg/Library/BasePciCf8Lib/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PciCf8Lib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePciCf8Lib/PciLib.c b/MdePkg/Library/BasePciCf8Lib/PciLib.c
new file mode 100644 (file)
index 0000000..77676b7
--- /dev/null
+++ b/MdePkg/Library/BasePciCf8Lib/PciLib.c
@@ -0,0 +1,1466 @@
+/** @file\r
+  PCI Library.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PciLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+//\r
+// Declare I/O Ports used to perform PCI Confguration Cycles\r
+//\r
+#define PCI_CONFIGURATION_ADDRESS_PORT  0xCF8\r
+#define PCI_CONFIGURATION_DATA_PORT     0xCFC\r
+\r
+//\r
+// Declare macro to convert PCI Library formatted address to CF8 formatted address\r
+//\r
+// PCI Library formatted address    CF8 Formatted Address\r
+// =============================    ======================\r
+//    Bits 00..11  Register           Bits 00..07  Register\r
+//    Bits 12..14  Function           Bits 08..10  Function\r
+//    Bits 15..19  Device             Bits 11..15  Device\r
+//    Bits 20..27  Bus                Bits 16..23  Bus\r
+//    Bits 28..31  Reserved(MBZ)      Bits 24..30  Reserved(MBZ)\r
+//                                    Bits 31..31  Must be 1\r
+//\r
+\r
+/**\r
+  Assert the validity of a PCI address. A valid PCI address should contain 1's\r
+  only in the low 28 bits.\r
+\r
+  @param  A The address to validate.\r
+  @param  M Additional bits to assert to be zero.\r
+\r
+**/\r
+#define ASSERT_INVALID_PCI_ADDRESS(A,M) \\r
+  ASSERT (((A) & (~0xffff0ff | (M))) == 0)\r
+\r
+/**\r
+  Convert a PCI Express address to PCI CF8 address.\r
+\r
+  @param  A The address to convert.\r
+\r
+  @retval The coverted address.\r
+\r
+**/\r
+#define PCI_TO_CF8_ADDRESS(A) \\r
+  ((UINT32) ((((A) >> 4) & 0x00ffff00) | ((A) & 0xfc) | 0x80000000))\r
+\r
+/**\r
+  Reads an 8-bit PCI configuration register.\r
+\r
+  Reads and returns the 8-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8Read8 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoRead8 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3));\r
+}\r
+\r
+/**\r
+  Writes an 8-bit PCI configuration register.\r
+\r
+  Writes the 8-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8Write8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoWrite8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+  an 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8Or8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoOr8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8And8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoAnd8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value, followed a  bitwise inclusive OR with another 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8AndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoAndThenOr8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldRead8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldRead8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           StartBit,\r
+           EndBit\r
+           );\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  8-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldWrite8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           StartBit,\r
+           EndBit,\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldOr8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 8-bit register.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldAnd8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           StartBit,\r
+           EndBit,\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciCf8BitFieldAndThenOr8(\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 0);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldAndThenOr8 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 3),\r
+           StartBit,\r
+           EndBit,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 16-bit PCI configuration register.\r
+\r
+  Reads and returns the 16-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8Read16 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoRead16 (PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2));\r
+}\r
+\r
+/**\r
+  Writes a 16-bit PCI configuration register.\r
+\r
+  Writes the 16-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8Write16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoWrite16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+  a 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8Or16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoOr16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8And16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoAnd16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value, followed a  bitwise inclusive OR with another 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8AndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoAndThenOr16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldRead16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldRead16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           StartBit,\r
+           EndBit\r
+           );\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  16-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldWrite16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           StartBit,\r
+           EndBit,\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldOr16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 16-bit register.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldAnd16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           StartBit,\r
+           EndBit,\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciCf8BitFieldAndThenOr16(\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 1);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldAndThenOr16 (\r
+           PCI_CONFIGURATION_DATA_PORT + (UINT16)(Address & 2),\r
+           StartBit,\r
+           EndBit,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 32-bit PCI configuration register.\r
+\r
+  Reads and returns the 32-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8Read32 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoRead32 (PCI_CONFIGURATION_DATA_PORT);\r
+}\r
+\r
+/**\r
+  Writes a 32-bit PCI configuration register.\r
+\r
+  Writes the 32-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8Write32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoWrite32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+  a 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8Or32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoOr32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8And32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoAnd32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value, followed a  bitwise inclusive OR with another 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8AndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoAndThenOr32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldRead32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldRead32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           StartBit,\r
+           EndBit\r
+           );\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  32-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldWrite32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           StartBit,\r
+           EndBit,\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldOr32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 32-bit register.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldAnd32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           StartBit,\r
+           EndBit,\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If the register specified by Address >= 0x100, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciCf8BitFieldAndThenOr32(\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address, 3);\r
+  IoWrite32 (PCI_CONFIGURATION_ADDRESS_PORT, PCI_TO_CF8_ADDRESS (Address));\r
+  return IoBitFieldAndThenOr32 (\r
+           PCI_CONFIGURATION_DATA_PORT,\r
+           StartBit,\r
+           EndBit,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+  Reads the range of PCI configuration registers specified by StartAddress and\r
+  Size into the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be read. Size is\r
+  returned. When possible 32-bit PCI configuration read cycles are used to read\r
+  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+  end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by StartAddress >= 0x100, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer receiving the data read.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciCf8ReadBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  UINTN                             ReturnValue;\r
+\r
+  ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
+  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);\r
+\r
+  if (Size == 0) {\r
+    return Size;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+\r
+  //\r
+  // Save Size for return\r
+  //\r
+  ReturnValue = Size;\r
+\r
+  if ((StartAddress & 1) != 0) {\r
+    //\r
+    // Read a byte if StartAddress is byte aligned\r
+    //\r
+    *(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);\r
+    StartAddress += sizeof (UINT8);\r
+    Size -= sizeof (UINT8);\r
+    Buffer = (UINT8*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {\r
+    //\r
+    // Read a word if StartAddress is word aligned\r
+    //\r
+    *(volatile UINT16 *)Buffer = PciCf8Read16 (StartAddress);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  while (Size >= sizeof (UINT32)) {\r
+    //\r
+    // Read as many double words as possible\r
+    //\r
+    *(volatile UINT32 *)Buffer = PciCf8Read32 (StartAddress);\r
+    StartAddress += sizeof (UINT32);\r
+    Size -= sizeof (UINT32);\r
+    Buffer = (UINT32*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16)) {\r
+    //\r
+    // Read the last remaining word if exist\r
+    //\r
+    *(volatile UINT16 *)Buffer = PciCf8Read16 (StartAddress);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT8)) {\r
+    //\r
+    // Read the last remaining byte if exist\r
+    //\r
+    *(volatile UINT8 *)Buffer = PciCf8Read8 (StartAddress);\r
+  }\r
+\r
+  return ReturnValue;\r
+}\r
+\r
+/**\r
+  Copies the data in a caller supplied buffer to a specified range of PCI\r
+  configuration space.\r
+\r
+  Writes the range of PCI configuration registers specified by StartAddress and\r
+  Size from the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be written. Size is\r
+  returned. When possible 32-bit PCI configuration write cycles are used to\r
+  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+  and the end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If the register specified by StartAddress >= 0x100, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer containing the data to write.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciCf8WriteBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  UINTN                             ReturnValue;\r
+\r
+  ASSERT_INVALID_PCI_ADDRESS (StartAddress, 0);\r
+  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x100);\r
+\r
+  if (Size == 0) {\r
+    return 0;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+\r
+  //\r
+  // Save Size for return\r
+  //\r
+  ReturnValue = Size;\r
+\r
+  if ((StartAddress & 1) != 0) {\r
+    //\r
+    // Write a byte if StartAddress is byte aligned\r
+    //\r
+    PciCf8Write8 (StartAddress, *(UINT8*)Buffer);\r
+    StartAddress += sizeof (UINT8);\r
+    Size -= sizeof (UINT8);\r
+    Buffer = (UINT8*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {\r
+    //\r
+    // Write a word if StartAddress is word aligned\r
+    //\r
+    PciCf8Write16 (StartAddress, *(UINT16*)Buffer);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  while (Size >= sizeof (UINT32)) {\r
+    //\r
+    // Write as many double words as possible\r
+    //\r
+    PciCf8Write32 (StartAddress, *(UINT32*)Buffer);\r
+    StartAddress += sizeof (UINT32);\r
+    Size -= sizeof (UINT32);\r
+    Buffer = (UINT32*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16)) {\r
+    //\r
+    // Write the last remaining word if exist\r
+    //\r
+    PciCf8Write16 (StartAddress, *(UINT16*)Buffer);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT8)) {\r
+    //\r
+    // Write the last remaining byte if exist\r
+    //\r
+    PciCf8Write8 (StartAddress, *(UINT8*)Buffer);\r
+  }\r
+\r
+  return ReturnValue;\r
+}\r

diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
new file mode 100644 (file)
index 0000000..18868b9
--- /dev/null
+++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
@@ -0,0 +1,93 @@
+#/** @file\r
+# Component description file for Base PCI Express Library.\r
+#\r
+# PCI Express Library that uses the 256 MB PCI Express MMIO window to perform\r
+#  PCI Configuration cycles. Layers on top of an I/O Library instance.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePciExpressLib\r
+  FILE_GUID                      = 287e50f4-a188-4699-b907-3e4080ca5688\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PciExpressLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PciLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  PcdLib\r
+  DebugLib\r
+  IoLib\r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd DYNAMIC - list of PCDs that this module is coded for.\r
+#\r
+################################################################################\r
+\r
+[PcdsDynamic.common]\r
+  PcdPciExpressBaseAddress|gEfiMdePkgTokenSpaceGuid\r
+\r

diff --git a/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa
new file mode 100644 (file)
index 0000000..cd46cc6
--- /dev/null
+++ b/MdePkg/Library/BasePciExpressLib/BasePciExpressLib.msa
@@ -0,0 +1,56 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePciExpressLib</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>287e50f4-a188-4699-b907-3e4080ca5688</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Base PCI Express Library.</Abstract>\r
+    <Description>PCI Express Library that uses the 256 MB PCI Express MMIO window to perform\r
+      PCI Configuration cycles.  Layers on top of an I/O Library instance.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePciExpressLib</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PciExpressLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>IoLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>PcdLib</Keyword>\r
+    </LibraryClass>    \r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PciLib.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+  <PcdCoded>\r
+    <PcdEntry PcdItemType="DYNAMIC">\r
+      <C_Name>PcdPciExpressBaseAddress</C_Name>\r
+          <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>\r
+      <HelpText>The base address of PCI Express MMIO window.</HelpText>\r
+    </PcdEntry>\r
+  </PcdCoded>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePciExpressLib/CommonHeader.h b/MdePkg/Library/BasePciExpressLib/CommonHeader.h
new file mode 100644 (file)
index 0000000..0f71c42
--- /dev/null
+++ b/MdePkg/Library/BasePciExpressLib/CommonHeader.h
@@ -0,0 +1,34 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PciExpressLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePciExpressLib/PciLib.c b/MdePkg/Library/BasePciExpressLib/PciLib.c
new file mode 100644 (file)
index 0000000..a98e66d
--- /dev/null
+++ b/MdePkg/Library/BasePciExpressLib/PciLib.c
@@ -0,0 +1,1371 @@
+/** @file\r
+  PCI Library.\r
+\r
+  Functions in this library instance make use of MMIO functions in IoLib to\r
+  access memory mapped PCI configuration space.\r
+\r
+  All assertions for I/O operations are handled in MMIO functions in the IoLib\r
+  Library.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PciLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Assert the validity of a PCI address. A valid PCI address should contain 1's\r
+  only in the low 28 bits.\r
+\r
+  @param  A The address to validate.\r
+\r
+**/\r
+#define ASSERT_INVALID_PCI_ADDRESS(A) \\r
+  ASSERT (((A) & ~0xfffffff) == 0)\r
+\r
+\r
+/**\r
+  Gets the base address of PCI Express.\r
+  \r
+  This internal functions retrieves PCI Express Base Address via a PCD entry\r
+  PcdPciExpressBaseAddress.\r
+  \r
+  @return The base address of PCI Express.\r
+\r
+**/\r
+STATIC\r
+volatile VOID*\r
+GetPciExpressBaseAddress (\r
+  VOID\r
+  )\r
+{\r
+  return (VOID*)(UINTN) PcdGet64 (PcdPciExpressBaseAddress);\r
+}\r
+\r
+/**\r
+  Reads an 8-bit PCI configuration register.\r
+\r
+  Reads and returns the 8-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressRead8 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioRead8 ((UINTN) GetPciExpressBaseAddress () + Address);\r
+}\r
+\r
+/**\r
+  Writes an 8-bit PCI configuration register.\r
+\r
+  Writes the 8-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioWrite8 ((UINTN) GetPciExpressBaseAddress () + Address, Value);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+  an 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioOr8 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioAnd8 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value, followed a  bitwise inclusive OR with another 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioAndThenOr8 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldRead8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldRead8 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit\r
+           );\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  8-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldWrite8 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldOr8 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 8-bit register.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldAnd8 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciExpressBitFieldAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldAndThenOr8 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 16-bit PCI configuration register.\r
+\r
+  Reads and returns the 16-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressRead16 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioRead16 ((UINTN) GetPciExpressBaseAddress () + Address);\r
+}\r
+\r
+/**\r
+  Writes a 16-bit PCI configuration register.\r
+\r
+  Writes the 16-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioWrite16 ((UINTN) GetPciExpressBaseAddress () + Address, Value);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+  a 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioOr16 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioAnd16 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value, followed a  bitwise inclusive OR with another 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioAndThenOr16 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldRead16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldRead16 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit\r
+           );\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  16-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldWrite16 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldOr16 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 16-bit register.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldAnd16 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 16-bit boundary, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciExpressBitFieldAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldAndThenOr16 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a 32-bit PCI configuration register.\r
+\r
+  Reads and returns the 32-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressRead32 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioRead32 ((UINTN) GetPciExpressBaseAddress () + Address);\r
+}\r
+\r
+/**\r
+  Writes a 32-bit PCI configuration register.\r
+\r
+  Writes the 32-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioWrite32 ((UINTN) GetPciExpressBaseAddress () + Address, Value);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+  a 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioOr32 ((UINTN) GetPciExpressBaseAddress () + Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioAnd32 ((UINTN) GetPciExpressBaseAddress () + Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value, followed a  bitwise inclusive OR with another 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioAndThenOr32 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldRead32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldRead32 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit\r
+           );\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  32-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldWrite32 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           Value\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldOr32 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 32-bit register.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldAnd32 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           AndData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If Address is not aligned on a 32-bit boundary, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciExpressBitFieldAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  ASSERT_INVALID_PCI_ADDRESS (Address);\r
+  return MmioBitFieldAndThenOr32 (\r
+           (UINTN) GetPciExpressBaseAddress () + Address,\r
+           StartBit,\r
+           EndBit,\r
+           AndData,\r
+           OrData\r
+           );\r
+}\r
+\r
+/**\r
+  Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+  Reads the range of PCI configuration registers specified by StartAddress and\r
+  Size into the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be read. Size is\r
+  returned. When possible 32-bit PCI configuration read cycles are used to read\r
+  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+  end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer receiving the data read.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciExpressReadBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  UINTN                             ReturnValue;\r
+\r
+  ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
+  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
+\r
+  if (Size == 0) {\r
+    return Size;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+\r
+  //\r
+  // Save Size for return\r
+  //\r
+  ReturnValue = Size;\r
+\r
+  if ((StartAddress & 1) != 0) {\r
+    //\r
+    // Read a byte if StartAddress is byte aligned\r
+    //\r
+    *(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);\r
+    StartAddress += sizeof (UINT8);\r
+    Size -= sizeof (UINT8);\r
+    Buffer = (UINT8*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {\r
+    //\r
+    // Read a word if StartAddress is word aligned\r
+    //\r
+    *(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  while (Size >= sizeof (UINT32)) {\r
+    //\r
+    // Read as many double words as possible\r
+    //\r
+    *(volatile UINT32 *)Buffer = PciExpressRead32 (StartAddress);\r
+    StartAddress += sizeof (UINT32);\r
+    Size -= sizeof (UINT32);\r
+    Buffer = (UINT32*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16)) {\r
+    //\r
+    // Read the last remaining word if exist\r
+    //\r
+    *(volatile UINT16 *)Buffer = PciExpressRead16 (StartAddress);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT8)) {\r
+    //\r
+    // Read the last remaining byte if exist\r
+    //\r
+    *(volatile UINT8 *)Buffer = PciExpressRead8 (StartAddress);\r
+  }\r
+\r
+  return ReturnValue;\r
+}\r
+\r
+/**\r
+  Copies the data in a caller supplied buffer to a specified range of PCI\r
+  configuration space.\r
+\r
+  Writes the range of PCI configuration registers specified by StartAddress and\r
+  Size from the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be written. Size is\r
+  returned. When possible 32-bit PCI configuration write cycles are used to\r
+  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+  and the end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer containing the data to write.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciExpressWriteBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  UINTN                             ReturnValue;\r
+\r
+  ASSERT_INVALID_PCI_ADDRESS (StartAddress);\r
+  ASSERT (((StartAddress & 0xFFF) + Size) <= 0x1000);\r
+\r
+  if (Size == 0) {\r
+    return 0;\r
+  }\r
+\r
+  ASSERT (Buffer != NULL);\r
+\r
+  //\r
+  // Save Size for return\r
+  //\r
+  ReturnValue = Size;\r
+\r
+  if ((StartAddress & 1) != 0) {\r
+    //\r
+    // Write a byte if StartAddress is byte aligned\r
+    //\r
+    PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);\r
+    StartAddress += sizeof (UINT8);\r
+    Size -= sizeof (UINT8);\r
+    Buffer = (UINT8*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16) && (StartAddress & 2) != 0) {\r
+    //\r
+    // Write a word if StartAddress is word aligned\r
+    //\r
+    PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  while (Size >= sizeof (UINT32)) {\r
+    //\r
+    // Write as many double words as possible\r
+    //\r
+    PciExpressWrite32 (StartAddress, *(UINT32*)Buffer);\r
+    StartAddress += sizeof (UINT32);\r
+    Size -= sizeof (UINT32);\r
+    Buffer = (UINT32*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT16)) {\r
+    //\r
+    // Write the last remaining word if exist\r
+    //\r
+    PciExpressWrite16 (StartAddress, *(UINT16*)Buffer);\r
+    StartAddress += sizeof (UINT16);\r
+    Size -= sizeof (UINT16);\r
+    Buffer = (UINT16*)Buffer + 1;\r
+  }\r
+\r
+  if (Size >= sizeof (UINT8)) {\r
+    //\r
+    // Write the last remaining byte if exist\r
+    //\r
+    PciExpressWrite8 (StartAddress, *(UINT8*)Buffer);\r
+  }\r
+\r
+  return ReturnValue;\r
+}\r

diff --git a/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
new file mode 100644 (file)
index 0000000..5914d4d
--- /dev/null
+++ b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
@@ -0,0 +1,81 @@
+#/** @file\r
+# Component description file for PCI CF8 Base PCI Library\r
+#\r
+# PCI Library that uses I/O ports 0xCF8 and 0xCFC to perform\r
+#  PCI Configuration cycles. Layers on top of an I/O Library instance.\r
+# Copyright (c) 2007 - 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePciLibCf8\r
+  FILE_GUID                      = 28bde99c-e8a7-4e3e-9a8a-e66cd64f31c6\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PciLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PciLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  PciCf8Lib\r
+\r

diff --git a/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa
new file mode 100644 (file)
index 0000000..85edbba
--- /dev/null
+++ b/MdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa
@@ -0,0 +1,43 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePciLibCf8</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>28bde99c-e8a7-4e3e-9a8a-e66cd64f31c6</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for PCI CF8 Base PCI Library</Abstract>\r
+    <Description>PCI Library that uses I/O ports 0xCF8 and 0xCFC to perform\r
+      PCI Configuration cycles.  Layers on top of an I/O Library instance.</Description>\r
+    <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePciLibCf8</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PciLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>PciCf8Lib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PciLib.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePciLibCf8/CommonHeader.h b/MdePkg/Library/BasePciLibCf8/CommonHeader.h
new file mode 100644 (file)
index 0000000..07c1b07
--- /dev/null
+++ b/MdePkg/Library/BasePciLibCf8/CommonHeader.h
@@ -0,0 +1,32 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007 - 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PciLib.h>\r
+#include <Library/PciCf8Lib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePciLibCf8/PciLib.c b/MdePkg/Library/BasePciLibCf8/PciLib.c
new file mode 100644 (file)
index 0000000..1bf9c87
--- /dev/null
+++ b/MdePkg/Library/BasePciLibCf8/PciLib.c
@@ -0,0 +1,1073 @@
+/** @file\r
+  PCI Library using Port CF8/CFC access.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PciLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Reads an 8-bit PCI configuration register.\r
+\r
+  Reads and returns the 8-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciRead8 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return PciCf8Read8 (Address);\r
+}\r
+\r
+/**\r
+  Writes an 8-bit PCI configuration register.\r
+\r
+  Writes the 8-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     Data\r
+  )\r
+{\r
+  return PciCf8Write8 (Address, Data);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+  an 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciCf8Or8 (Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return PciCf8And8 (Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value, followed a  bitwise inclusive OR with another 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciCf8AndThenOr8 (Address, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldRead8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return PciCf8BitFieldRead8 (Address, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  8-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  return PciCf8BitFieldWrite8 (Address, StartBit, EndBit, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciCf8BitFieldOr8 (Address, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 8-bit register.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return PciCf8BitFieldAnd8 (Address, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciCf8BitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a 16-bit PCI configuration register.\r
+\r
+  Reads and returns the 16-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciRead16 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return PciCf8Read16 (Address);\r
+}\r
+\r
+/**\r
+  Writes a 16-bit PCI configuration register.\r
+\r
+  Writes the 16-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    Data\r
+  )\r
+{\r
+  return PciCf8Write16 (Address, Data);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+  a 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciCf8Or16 (Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return PciCf8And16 (Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value, followed a  bitwise inclusive OR with another 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciCf8AndThenOr16 (Address, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldRead16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return PciCf8BitFieldRead16 (Address, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  16-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  return PciCf8BitFieldWrite16 (Address, StartBit, EndBit, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciCf8BitFieldOr16 (Address, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 16-bit register.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return PciCf8BitFieldAnd16 (Address, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciCf8BitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit PCI configuration register.\r
+\r
+  Reads and returns the 32-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciRead32 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return PciCf8Read32 (Address);\r
+}\r
+\r
+/**\r
+  Writes a 32-bit PCI configuration register.\r
+\r
+  Writes the 32-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    Data\r
+  )\r
+{\r
+  return PciCf8Write32 (Address, Data);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+  a 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciCf8Or32 (Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return PciCf8And32 (Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value, followed a  bitwise inclusive OR with another 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciCf8AndThenOr32 (Address, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldRead32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return PciCf8BitFieldRead32 (Address, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  32-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  return PciCf8BitFieldWrite32 (Address, StartBit, EndBit, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciCf8BitFieldOr32 (Address, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 32-bit register.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return PciCf8BitFieldAnd32 (Address, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciCf8BitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+  Reads the range of PCI configuration registers specified by StartAddress and\r
+  Size into the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be read. Size is\r
+  returned. When possible 32-bit PCI configuration read cycles are used to read\r
+  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+  end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer receiving the data read.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciReadBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  return PciCf8ReadBuffer (StartAddress, Size, Buffer);\r
+}\r
+\r
+/**\r
+  Copies the data in a caller supplied buffer to a specified range of PCI\r
+  configuration space.\r
+\r
+  Writes the range of PCI configuration registers specified by StartAddress and\r
+  Size from the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be written. Size is\r
+  returned. When possible 32-bit PCI configuration write cycles are used to\r
+  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+  and the end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer containing the data to write.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciWriteBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  return PciCf8WriteBuffer (StartAddress, Size, Buffer);\r
+}\r

diff --git a/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
new file mode 100644 (file)
index 0000000..91ea0ee
--- /dev/null
+++ b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
@@ -0,0 +1,81 @@
+#/** @file\r
+# Component description file for PCI Express Base PCI Library.\r
+#\r
+# PCI Library that uses the 256 MB PCI Express MMIO window to perform PCI\r
+#  Configuration cycles. Layers on top of an I/O Library instance.\r
+# Copyright (c) 2007 - 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePciLibPciExpress\r
+  FILE_GUID                      = 8987081e-daeb-44a9-8bef-a195b22d9417\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PciLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PciLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  PciExpressLib\r
+\r

diff --git a/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa
new file mode 100644 (file)
index 0000000..b39faa8
--- /dev/null
+++ b/MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.msa
@@ -0,0 +1,43 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">\r
+  <MsaHeader>\r
+    <ModuleName>BasePciLibPciExpress</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>8987081e-daeb-44a9-8bef-a195b22d9417</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for PCI Express Base PCI Library.</Abstract>\r
+    <Description>PCI Library that uses the 256 MB PCI Express MMIO window to perform PCI\r
+      Configuration cycles.  Layers on top of an I/O Library instance.</Description>\r
+    <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePciLibPciExpress</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PciLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>PciExpressLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PciLib.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePciLibPciExpress/CommonHeader.h b/MdePkg/Library/BasePciLibPciExpress/CommonHeader.h
new file mode 100644 (file)
index 0000000..b101e3f
--- /dev/null
+++ b/MdePkg/Library/BasePciLibPciExpress/CommonHeader.h
@@ -0,0 +1,32 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007 - 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PciLib.h>\r
+#include <Library/PciExpressLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePciLibPciExpress/PciLib.c b/MdePkg/Library/BasePciLibPciExpress/PciLib.c
new file mode 100644 (file)
index 0000000..0b828dd
--- /dev/null
+++ b/MdePkg/Library/BasePciLibPciExpress/PciLib.c
@@ -0,0 +1,1073 @@
+/** @file\r
+  PCI Library using PC Express access.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PciLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Reads an 8-bit PCI configuration register.\r
+\r
+  Reads and returns the 8-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciRead8 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return PciExpressRead8 (Address);\r
+}\r
+\r
+/**\r
+  Writes an 8-bit PCI configuration register.\r
+\r
+  Writes the 8-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     Data\r
+  )\r
+{\r
+  return PciExpressWrite8 (Address, Data);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of an 8-bit PCI configuration register with\r
+  an 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciExpressOr8 (Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return PciExpressAnd8 (Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit\r
+  value, followed a  bitwise inclusive OR with another 8-bit value.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciExpressAndThenOr8 (Address, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in an 8-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldRead8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return PciExpressBitFieldRead8 (Address, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  8-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldWrite8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     Value\r
+  )\r
+{\r
+  return PciExpressBitFieldWrite8 (Address, StartBit, EndBit, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 8-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciExpressBitFieldOr8 (Address, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 8-bit register.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 8-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldAnd8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData\r
+  )\r
+{\r
+  return PciExpressBitFieldAnd8 (Address, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  8-bit port.\r
+\r
+  Reads the 8-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 8-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 7, then ASSERT().\r
+  If EndBit is greater than 7, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..7.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PciBitFieldAndThenOr8 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT8                     AndData,\r
+  IN      UINT8                     OrData\r
+  )\r
+{\r
+  return PciExpressBitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a 16-bit PCI configuration register.\r
+\r
+  Reads and returns the 16-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciRead16 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return PciExpressRead16 (Address);\r
+}\r
+\r
+/**\r
+  Writes a 16-bit PCI configuration register.\r
+\r
+  Writes the 16-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    Data\r
+  )\r
+{\r
+  return PciExpressWrite16 (Address, Data);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 16-bit PCI configuration register with\r
+  a 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciExpressOr16 (Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return PciExpressAnd16 (Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit\r
+  value, followed a  bitwise inclusive OR with another 16-bit value.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciExpressAndThenOr16 (Address, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 16-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldRead16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return PciExpressBitFieldRead16 (Address, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  16-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldWrite16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    Value\r
+  )\r
+{\r
+  return PciExpressBitFieldWrite16 (Address, StartBit, EndBit, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 16-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciExpressBitFieldOr16 (Address, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 16-bit register.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 16-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldAnd16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData\r
+  )\r
+{\r
+  return PciExpressBitFieldAnd16 (Address, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  16-bit port.\r
+\r
+  Reads the 16-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 16-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 15, then ASSERT().\r
+  If EndBit is greater than 15, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..15.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PciBitFieldAndThenOr16 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT16                    AndData,\r
+  IN      UINT16                    OrData\r
+  )\r
+{\r
+  return PciExpressBitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit PCI configuration register.\r
+\r
+  Reads and returns the 32-bit PCI configuration register specified by Address.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+\r
+  @return The read value from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciRead32 (\r
+  IN      UINTN                     Address\r
+  )\r
+{\r
+  return PciExpressRead32 (Address);\r
+}\r
+\r
+/**\r
+  Writes a 32-bit PCI configuration register.\r
+\r
+  Writes the 32-bit PCI configuration register specified by Address with the\r
+  value specified by Value. Value is returned. This function must guarantee\r
+  that all PCI read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  Value   The value to write.\r
+\r
+  @return The value written to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    Data\r
+  )\r
+{\r
+  return PciExpressWrite32 (Address, Data);\r
+}\r
+\r
+/**\r
+  Performs a bitwise inclusive OR of a 32-bit PCI configuration register with\r
+  a 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  OrData  The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciExpressOr32 (Address, OrData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return PciExpressAnd32 (Address, AndData);\r
+}\r
+\r
+/**\r
+  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit\r
+  value, followed a  bitwise inclusive OR with another 32-bit value.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData,\r
+  performs a bitwise inclusive OR between the result of the AND operation and\r
+  the value specified by OrData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+\r
+  @param  Address Address that encodes the PCI Bus, Device, Function and\r
+                  Register.\r
+  @param  AndData The value to AND with the PCI configuration register.\r
+  @param  OrData  The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciExpressAndThenOr32 (Address, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field of a PCI configuration register.\r
+\r
+  Reads the bit field in a 32-bit PCI configuration register. The bit field is\r
+  specified by the StartBit and the EndBit. The value of the bit field is\r
+  returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to read.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+\r
+  @return The value of the bit field read from the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldRead32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit\r
+  )\r
+{\r
+  return PciExpressBitFieldRead32 (Address, StartBit, EndBit);\r
+}\r
+\r
+/**\r
+  Writes a bit field to a PCI configuration register.\r
+\r
+  Writes Value to the bit field of the PCI configuration register. The bit\r
+  field is specified by the StartBit and the EndBit. All other bits in the\r
+  destination PCI configuration register are preserved. The new value of the\r
+  32-bit register is returned.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  Value     New value of the bit field.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldWrite32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    Value\r
+  )\r
+{\r
+  return PciExpressBitFieldWrite32 (Address, StartBit, EndBit, Value);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and\r
+  writes the result back to the bit field in the 32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise inclusive OR between the read result and the value specified by\r
+  OrData, and writes the result to the 32-bit PCI configuration register\r
+  specified by Address. The value written to the PCI configuration register is\r
+  returned. This function must guarantee that all PCI read and write operations\r
+  are serialized. Extra left bits in OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  OrData    The value to OR with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciExpressBitFieldOr32 (Address, StartBit, EndBit, OrData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit PCI configuration register, performs a bitwise\r
+  AND, and writes the result back to the bit field in the 32-bit register.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND between the read result and the value specified by AndData, and\r
+  writes the result to the 32-bit PCI configuration register specified by\r
+  Address. The value written to the PCI configuration register is returned.\r
+  This function must guarantee that all PCI read and write operations are\r
+  serialized. Extra left bits in AndData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldAnd32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData\r
+  )\r
+{\r
+  return PciExpressBitFieldAnd32 (Address, StartBit, EndBit, AndData);\r
+}\r
+\r
+/**\r
+  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r
+  bitwise inclusive OR, and writes the result back to the bit field in the\r
+  32-bit port.\r
+\r
+  Reads the 32-bit PCI configuration register specified by Address, performs a\r
+  bitwise AND followed by a bitwise inclusive OR between the read result and\r
+  the value specified by AndData, and writes the result to the 32-bit PCI\r
+  configuration register specified by Address. The value written to the PCI\r
+  configuration register is returned. This function must guarantee that all PCI\r
+  read and write operations are serialized. Extra left bits in both AndData and\r
+  OrData are stripped.\r
+\r
+  If Address > 0x0FFFFFFF, then ASSERT().\r
+  If StartBit is greater than 31, then ASSERT().\r
+  If EndBit is greater than 31, then ASSERT().\r
+  If EndBit is less than StartBit, then ASSERT().\r
+\r
+  @param  Address   PCI configuration register to write.\r
+  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
+                    Range 0..31.\r
+  @param  AndData   The value to AND with the PCI configuration register.\r
+  @param  OrData    The value to OR with the result of the AND operation.\r
+\r
+  @return The value written back to the PCI configuration register.\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PciBitFieldAndThenOr32 (\r
+  IN      UINTN                     Address,\r
+  IN      UINTN                     StartBit,\r
+  IN      UINTN                     EndBit,\r
+  IN      UINT32                    AndData,\r
+  IN      UINT32                    OrData\r
+  )\r
+{\r
+  return PciExpressBitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);\r
+}\r
+\r
+/**\r
+  Reads a range of PCI configuration registers into a caller supplied buffer.\r
+\r
+  Reads the range of PCI configuration registers specified by StartAddress and\r
+  Size into the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be read. Size is\r
+  returned. When possible 32-bit PCI configuration read cycles are used to read\r
+  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit\r
+  and 16-bit PCI configuration read cycles may be used at the beginning and the\r
+  end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer receiving the data read.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciReadBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  return PciExpressReadBuffer (StartAddress, Size, Buffer);\r
+}\r
+\r
+/**\r
+  Copies the data in a caller supplied buffer to a specified range of PCI\r
+  configuration space.\r
+\r
+  Writes the range of PCI configuration registers specified by StartAddress and\r
+  Size from the buffer specified by Buffer. This function only allows the PCI\r
+  configuration registers from a single PCI function to be written. Size is\r
+  returned. When possible 32-bit PCI configuration write cycles are used to\r
+  write from StartAdress to StartAddress + Size. Due to alignment restrictions,\r
+  8-bit and 16-bit PCI configuration write cycles may be used at the beginning\r
+  and the end of the range.\r
+\r
+  If StartAddress > 0x0FFFFFFF, then ASSERT().\r
+  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().\r
+  If Size > 0 and Buffer is NULL, then ASSERT().\r
+\r
+  @param  StartAddress  Starting address that encodes the PCI Bus, Device,\r
+                        Function and Register.\r
+  @param  Size          Size in bytes of the transfer.\r
+  @param  Buffer        Pointer to a buffer containing the data to write.\r
+\r
+  @return Size\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+PciWriteBuffer (\r
+  IN      UINTN                     StartAddress,\r
+  IN      UINTN                     Size,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  return PciExpressWriteBuffer (StartAddress, Size, Buffer);\r
+}\r

diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
new file mode 100644 (file)
index 0000000..99bb3f7
--- /dev/null
+++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
@@ -0,0 +1,80 @@
+#/** @file\r
+# Component description file Base PE/Coff Get Entry Point Library\r
+#\r
+# PE/COFF Entry Point Library implementation.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePeCoffGetEntryPointLib\r
+  FILE_GUID                      = be490364-73d2-420d-950e-f6450ca75dfb\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PeCoffGetEntryPointLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PeCoffGetEntryPoint.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+\r

diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa
new file mode 100644 (file)
index 0000000..5512f6c
--- /dev/null
+++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.msa
@@ -0,0 +1,42 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePeCoffGetEntryPointLib</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>be490364-73d2-420d-950e-f6450ca75dfb</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file Base PE/Coff Get Entry Point Library</Abstract>\r
+    <Description>PE/COFF Entry Point Library implementation.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePeCoffGetEntryPointLib</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PeCoffGetEntryPointLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PeCoffGetEntryPoint.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/CommonHeader.h b/MdePkg/Library/BasePeCoffGetEntryPointLib/CommonHeader.h
new file mode 100644 (file)
index 0000000..fcc8d3e
--- /dev/null
+++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/CommonHeader.h
@@ -0,0 +1,32 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PeCoffGetEntryPointLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c
new file mode 100644 (file)
index 0000000..057a171
--- /dev/null
+++ b/MdePkg/Library/BasePeCoffGetEntryPointLib/PeCoffGetEntryPoint.c
@@ -0,0 +1,249 @@
+/** @file\r
+  Tiano PE/COFF loader.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PeCoffGetEntryPoint.c\r
+\r
+**/\r
+\r
+\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+#include <Include/IndustryStandard/PeImage.h>\r
+\r
+/**\r
+  Retrieves and returns a pointer to the entry point to a PE/COFF image that has been loaded\r
+  into system memory with the PE/COFF Loader Library functions.\r
+\r
+  Retrieves the entry point to the PE/COFF image specified by Pe32Data and returns this entry\r
+  point in EntryPoint.  If the entry point could not be retrieved from the PE/COFF image, then\r
+  return RETURN_INVALID_PARAMETER.  Otherwise return RETURN_SUCCESS.\r
+  If Pe32Data is NULL, then ASSERT().\r
+  If EntryPoint is NULL, then ASSERT().\r
+\r
+  @param  Pe32Data                  Pointer to the PE/COFF image that is loaded in system memory.\r
+  @param  EntryPoint                Pointer to entry point to the PE/COFF image to return.\r
+\r
+  @retval RETURN_SUCCESS            EntryPoint was returned.\r
+  @retval RETURN_INVALID_PARAMETER  The entry point could not be found in the PE/COFF image.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+PeCoffLoaderGetEntryPoint (\r
+  IN  VOID  *Pe32Data,\r
+  OUT VOID  **EntryPoint\r
+  )\r
+{\r
+  EFI_IMAGE_DOS_HEADER                  *DosHeader;\r
+  EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION   Header;\r
+\r
+  ASSERT (Pe32Data   != NULL);\r
+  ASSERT (EntryPoint != NULL);\r
+\r
+  DosHeader = (EFI_IMAGE_DOS_HEADER *)Pe32Data;\r
+  if (DosHeader->e_magic == EFI_IMAGE_DOS_SIGNATURE) {\r
+    //\r
+    // DOS image header is present, so read the PE header after the DOS image header.\r
+    //\r
+    Header.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN) Pe32Data + (UINTN) ((DosHeader->e_lfanew) & 0x0ffff));\r
+  } else {\r
+    //\r
+    // DOS image header is not present, so PE header is at the image base.\r
+    //\r
+    Header.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)Pe32Data;\r
+  }\r
+\r
+  //\r
+  // Calculate the entry point relative to the start of the image.\r
+  // AddressOfEntryPoint is common for PE32 & PE32+\r
+  //\r
+  *EntryPoint = (VOID *)((UINTN)Pe32Data + (UINTN)(Header.Pe32->OptionalHeader.AddressOfEntryPoint & 0x0ffffffff));\r
+  return RETURN_SUCCESS;\r
+}\r
+\r
+\r
+/**\r
+  Returns the machine type of a PE/COFF image.\r
+\r
+  Returns the machine type from the PE/COFF image specified by Pe32Data.\r
+  If Pe32Data is NULL, then ASSERT().\r
+\r
+  @param  Pe32Data   Pointer to the PE/COFF image that is loaded in system\r
+                     memory.\r
+\r
+  @return Machine type or zero if not a valid iamge.\r
+\r
+**/\r
+UINT16\r
+EFIAPI\r
+PeCoffLoaderGetMachineType (\r
+  IN VOID  *Pe32Data\r
+  )\r
+{\r
+  EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION  Hdr;\r
+  EFI_IMAGE_DOS_HEADER                 *DosHdr;\r
+\r
+  DosHdr = (EFI_IMAGE_DOS_HEADER  *)Pe32Data;\r
+  if (DosHdr->e_magic == EFI_IMAGE_DOS_SIGNATURE) {\r
+    Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)Pe32Data + DosHdr->e_lfanew);\r
+  } else {\r
+    Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN)Pe32Data);\r
+  }\r
+\r
+  if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE)  {\r
+    return Hdr.Pe32->FileHeader.Machine;\r
+  }\r
+\r
+  return 0x0000;\r
+}\r
+\r
+/**\r
+  Returns a pointer to the PDB file name for a PE/COFF image that has been\r
+  loaded into system memory with the PE/COFF Loader Library functions.\r
+\r
+  Returns the PDB file name for the PE/COFF image specified by Pe32Data.  If\r
+  the PE/COFF image specified by Pe32Data is not a valid, then NULL is\r
+  returned.  If the PE/COFF image specified by Pe32Data does not contain a\r
+  debug directory entry, then NULL is returned.  If the debug directory entry\r
+  in the PE/COFF image specified by Pe32Data does not contain a PDB file name,\r
+  then NULL is returned.\r
+  If Pe32Data is NULL, then ASSERT().\r
+\r
+  @param  Pe32Data   Pointer to the PE/COFF image that is loaded in system\r
+                     memory.\r
+\r
+  @return The PDB file name for the PE/COFF image specified by Pe32Data or NULL\r
+          if it cannot be retrieved.\r
+\r
+**/\r
+VOID *\r
+EFIAPI\r
+PeCoffLoaderGetPdbPointer (\r
+  IN VOID  *Pe32Data\r
+  )\r
+{\r
+  EFI_IMAGE_DOS_HEADER                  *DosHeader;\r
+  EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION   Hdr;\r
+  EFI_IMAGE_DATA_DIRECTORY              *DirectoryEntry;\r
+  EFI_IMAGE_DEBUG_DIRECTORY_ENTRY       *DebugEntry;\r
+  UINTN                                 DirCount;\r
+  VOID                                  *CodeViewEntryPointer;\r
+  INTN                                  TEImageAdjust;\r
+  UINT32                                NumberOfRvaAndSizes;\r
+  UINT16                                Magic;\r
+\r
+  ASSERT (Pe32Data   != NULL);\r
+\r
+  TEImageAdjust       = 0;\r
+  DirectoryEntry      = NULL;\r
+  DebugEntry          = NULL;\r
+  NumberOfRvaAndSizes = 0;\r
+\r
+  DosHeader = (EFI_IMAGE_DOS_HEADER *)Pe32Data;\r
+  if (DosHeader->e_magic == EFI_IMAGE_DOS_SIGNATURE) {\r
+    //\r
+    // DOS image header is present, so read the PE header after the DOS image header.\r
+    //\r
+    Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)((UINTN) Pe32Data + (UINTN) ((DosHeader->e_lfanew) & 0x0ffff));\r
+  } else {\r
+    //\r
+    // DOS image header is not present, so PE header is at the image base.\r
+    //\r
+    Hdr.Pe32 = (EFI_IMAGE_NT_HEADERS32 *)Pe32Data;\r
+  }\r
+\r
+  if (Hdr.Te->Signature == EFI_TE_IMAGE_HEADER_SIGNATURE) {\r
+    if (Hdr.Te->DataDirectory[EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG].VirtualAddress != 0) {\r
+      DirectoryEntry  = &Hdr.Te->DataDirectory[EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG];\r
+      TEImageAdjust   = sizeof (EFI_TE_IMAGE_HEADER) - Hdr.Te->StrippedSize;\r
+      DebugEntry = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *)((UINTN) Hdr.Te +\r
+                    Hdr.Te->DataDirectory[EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG].VirtualAddress +\r
+                    TEImageAdjust);\r
+    }\r
+  } else if (Hdr.Pe32->Signature == EFI_IMAGE_NT_SIGNATURE) {\r
+    //\r
+    // NOTE: We use Machine field to identify PE32/PE32+, instead of Magic.\r
+    //       It is due to backward-compatibility, for some system might\r
+    //       generate PE32+ image with PE32 Magic.\r
+    //\r
+    switch (Hdr.Pe32->FileHeader.Machine) {\r
+    case EFI_IMAGE_MACHINE_IA32:\r
+      //\r
+      // Assume PE32 image with IA32 Machine field.\r
+      //\r
+      Magic = EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC;\r
+      break;\r
+    case EFI_IMAGE_MACHINE_X64:\r
+    case EFI_IMAGE_MACHINE_IPF:\r
+      //\r
+      // Assume PE32+ image with X64 or IPF Machine field\r
+      //\r
+      Magic = EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC;\r
+      break;\r
+    default:\r
+      //\r
+      // For unknow Machine field, use Magic in optional Header\r
+      //\r
+      Magic = Hdr.Pe32->OptionalHeader.Magic;\r
+    }\r
+\r
+    if (Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) {\r
+      //\r
+      // Use PE32 offset get Debug Directory Entry\r
+      //\r
+      NumberOfRvaAndSizes = Hdr.Pe32->OptionalHeader.NumberOfRvaAndSizes;\r
+      DirectoryEntry = (EFI_IMAGE_DATA_DIRECTORY *)&(Hdr.Pe32->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG]);\r
+      DebugEntry     = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *) ((UINTN) Pe32Data + DirectoryEntry->VirtualAddress);\r
+    } else if (Hdr.Pe32->OptionalHeader.Magic == EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) {\r
+      //\r
+      // Use PE32+ offset get Debug Directory Entry\r
+      //\r
+      NumberOfRvaAndSizes = Hdr.Pe32Plus->OptionalHeader.NumberOfRvaAndSizes;\r
+      DirectoryEntry = (EFI_IMAGE_DATA_DIRECTORY *)&(Hdr.Pe32Plus->OptionalHeader.DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_DEBUG]);\r
+      DebugEntry     = (EFI_IMAGE_DEBUG_DIRECTORY_ENTRY *) ((UINTN) Pe32Data + DirectoryEntry->VirtualAddress);\r
+    }\r
+\r
+    if (NumberOfRvaAndSizes <= EFI_IMAGE_DIRECTORY_ENTRY_DEBUG) {\r
+      DirectoryEntry = NULL;\r
+      DebugEntry = NULL;\r
+    }\r
+  } else {\r
+    return NULL;\r
+  }\r
+\r
+  if (DebugEntry == NULL || DirectoryEntry == NULL) {\r
+    return NULL;\r
+  }\r
+\r
+  for (DirCount = 0; DirCount < DirectoryEntry->Size; DirCount++, DebugEntry++) {\r
+    if (DebugEntry->Type == EFI_IMAGE_DEBUG_TYPE_CODEVIEW) {\r
+      if (DebugEntry->SizeOfData > 0) {\r
+        CodeViewEntryPointer = (VOID *) ((UINTN) DebugEntry->RVA + ((UINTN)Pe32Data) + (UINTN)TEImageAdjust);\r
+        switch (* (UINT32 *) CodeViewEntryPointer) {\r
+        case CODEVIEW_SIGNATURE_NB10:\r
+          return (VOID *) ((CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY));\r
+        case CODEVIEW_SIGNATURE_RSDS:\r
+          return (VOID *) ((CHAR8 *)CodeViewEntryPointer + sizeof (EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY));\r
+        default:\r
+          break;\r
+        }\r
+      }\r
+    }\r
+  }\r
+\r
+  return NULL;\r
+}\r
+\r
+\r

diff --git a/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
new file mode 100644 (file)
index 0000000..9f50ecd
--- /dev/null
+++ b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
@@ -0,0 +1,92 @@
+#/** @file\r
+# Component description file for NULL Performance Library\r
+#\r
+# Performance Library that layers on top of the Base Library to measure start\r
+#  and end times using CPU specific timer services if they are available.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePerformanceLibNull\r
+  FILE_GUID                      = FC120ED3-40E1-46dc-8C9C-AAE3CA139ACF\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PerformanceLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PerformanceLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  PcdLib\r
+  DebugLib\r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.\r
+#\r
+################################################################################\r
+\r
+[PcdsFixedAtBuild.common]\r
+  PcdPerformanceLibraryPropertyMask|gEfiMdePkgTokenSpaceGuid\r
+\r

diff --git a/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa
new file mode 100644 (file)
index 0000000..0026b44
--- /dev/null
+++ b/MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.msa
@@ -0,0 +1,54 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePerformanceLibNull</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>FC120ED3-40E1-46dc-8C9C-AAE3CA139ACF</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for NULL Performance Library</Abstract>\r
+    <Description>Performance Library that layers on top of the Base Library to measure start\r
+      and end times using CPU specific timer services if they are available.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePerformanceLibNull</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PerformanceLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>PcdLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PerformanceLib.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+  <PcdCoded>\r
+    <PcdEntry PcdItemType="FIXED_AT_BUILD">\r
+      <C_Name>PcdPerformanceLibraryPropertyMask</C_Name>\r
+          <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>\r
+      <HelpText>The bitmask of flags that specify the enable/disable of\r
+                Performance Measurement.</HelpText>\r
+    </PcdEntry>\r
+  </PcdCoded>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePerformanceLibNull/CommonHeader.h b/MdePkg/Library/BasePerformanceLibNull/CommonHeader.h
new file mode 100644 (file)
index 0000000..17bcd31
--- /dev/null
+++ b/MdePkg/Library/BasePerformanceLibNull/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PerformanceLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c b/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c
new file mode 100644 (file)
index 0000000..1785bab
--- /dev/null
+++ b/MdePkg/Library/BasePerformanceLibNull/PerformanceLib.c
@@ -0,0 +1,165 @@
+/** @file\r
+  Base Performance Library which provides no service.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PerformanceLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Creates a record for the beginning of a performance measurement. \r
+  \r
+  Creates a record that contains the Handle, Token, and Module.\r
+  If TimeStamp is not zero, then TimeStamp is added to the record as the start time.\r
+  If TimeStamp is zero, then this function reads the current time stamp\r
+  and adds that time stamp value to the record as the start time.\r
+\r
+  @param  Handle                  Pointer to environment specific context used\r
+                                  to identify the component being measured.\r
+  @param  Token                   Pointer to a Null-terminated ASCII string\r
+                                  that identifies the component being measured.\r
+  @param  Module                  Pointer to a Null-terminated ASCII string\r
+                                  that identifies the module being measured.\r
+  @param  TimeStamp               64-bit time stamp.\r
+\r
+  @retval RETURN_SUCCESS          The start of the measurement was recorded.\r
+  @retval RETURN_OUT_OF_RESOURCES There are not enough resources to record the measurement.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+StartPerformanceMeasurement (\r
+  IN CONST VOID   *Handle,  OPTIONAL\r
+  IN CONST CHAR8  *Token,\r
+  IN CONST CHAR8  *Module,\r
+  IN UINT64       TimeStamp\r
+  )\r
+{\r
+  return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+  Fills in the end time of a performance measurement. \r
+  \r
+  Looks up the record that matches Handle, Token, and Module.\r
+  If the record can not be found then return RETURN_NOT_FOUND.\r
+  If the record is found and TimeStamp is not zero,\r
+  then TimeStamp is added to the record as the end time.\r
+  If the record is found and TimeStamp is zero, then this function reads\r
+  the current time stamp and adds that time stamp value to the record as the end time.\r
+  If this function is called multiple times for the same record, then the end time is overwritten.\r
+\r
+  @param  Handle                  Pointer to environment specific context used\r
+                                  to identify the component being measured.\r
+  @param  Token                   Pointer to a Null-terminated ASCII string\r
+                                  that identifies the component being measured.\r
+  @param  Module                  Pointer to a Null-terminated ASCII string\r
+                                  that identifies the module being measured.\r
+  @param  TimeStamp               64-bit time stamp.\r
+\r
+  @retval RETURN_SUCCESS          The end of  the measurement was recorded.\r
+  @retval RETURN_NOT_FOUND        The specified measurement record could not be found.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+EndPerformanceMeasurement (\r
+  IN CONST VOID   *Handle,  OPTIONAL\r
+  IN CONST CHAR8  *Token,\r
+  IN CONST CHAR8  *Module,\r
+  IN UINT64       TimeStamp\r
+  )\r
+{\r
+  return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+  Attempts to retrieve a performance measurement log entry from the performance measurement log. \r
+  \r
+  Attempts to retrieve the performance log entry specified by LogEntryKey.  If LogEntryKey is\r
+  zero on entry, then an attempt is made to retrieve the first entry from the performance log,\r
+  and the key for the second entry in the log is returned.  If the performance log is empty,\r
+  then no entry is retrieved and zero is returned.  If LogEntryKey is not zero, then the performance\r
+  log entry associated with LogEntryKey is retrieved, and the key for the next entry in the log is\r
+  returned.  If LogEntryKey is the key for the last entry in the log, then the last log entry is\r
+  retrieved and an implementation specific non-zero key value that specifies the end of the performance\r
+  log is returned.  If LogEntryKey is equal this implementation specific non-zero key value, then no entry\r
+  is retrieved and zero is returned.  In the cases where a performance log entry can be returned,\r
+  the log entry is returned in Handle, Token, Module, StartTimeStamp, and EndTimeStamp.\r
+  If LogEntryKey is not a valid log entry key for the performance measurement log, then ASSERT().\r
+  If Handle is NULL, then ASSERT().\r
+  If Token is NULL, then ASSERT().\r
+  If Module is NULL, then ASSERT().\r
+  If StartTimeStamp is NULL, then ASSERT().\r
+  If EndTimeStamp is NULL, then ASSERT().\r
+\r
+  @param  LogEntryKey             On entry, the key of the performance measurement log entry to retrieve.\r
+                                  0, then the first performance measurement log entry is retrieved.\r
+                                  On exit, the key of the next performance lof entry entry.\r
+  @param  Handle                  Pointer to environment specific context used to identify the component\r
+                                  being measured.  \r
+  @param  Token                   Pointer to a Null-terminated ASCII string that identifies the component\r
+                                  being measured. \r
+  @param  Module                  Pointer to a Null-terminated ASCII string that identifies the module\r
+                                  being measured.\r
+  @param  StartTimeStamp          Pointer to the 64-bit time stamp that was recorded when the measurement\r
+                                  was started.\r
+  @param  EndTimeStamp            Pointer to the 64-bit time stamp that was recorded when the measurement\r
+                                  was ended.\r
+\r
+  @return The key for the next performance log entry (in general case).\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+GetPerformanceMeasurement (\r
+  IN  UINTN       LogEntryKey, \r
+  OUT CONST VOID  **Handle,\r
+  OUT CONST CHAR8 **Token,\r
+  OUT CONST CHAR8 **Module,\r
+  OUT UINT64      *StartTimeStamp,\r
+  OUT UINT64      *EndTimeStamp\r
+  )\r
+{\r
+  ASSERT (Handle != NULL);\r
+  ASSERT (Token != NULL);\r
+  ASSERT (Module != NULL);\r
+  ASSERT (StartTimeStamp != NULL);\r
+  ASSERT (EndTimeStamp != NULL);\r
+\r
+  return 0;\r
+}\r
+\r
+/**\r
+  Returns TRUE if the performance measurement macros are enabled. \r
+  \r
+  This function returns TRUE if the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of\r
+  PcdPerformanceLibraryPropertyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval TRUE                    The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of\r
+                                  PcdPerformanceLibraryPropertyMask is set.\r
+  @retval FALSE                   The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of\r
+                                  PcdPerformanceLibraryPropertyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PerformanceMeasurementEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return (BOOLEAN) ((PcdGet8(PcdPerformanceLibraryPropertyMask) & PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED) != 0);\r
+}\r

diff --git a/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf
new file mode 100644 (file)
index 0000000..bc8e36d
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.inf
@@ -0,0 +1,91 @@
+#/** @file\r
+# Component description file for Debug Base Post Code Library.\r
+#\r
+# Post Code Library that layers on top of a Debug Library instance.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePostCodeLibDebug\r
+  FILE_GUID                      = 19e3bbba-beb1-43e8-b32d-9acbb22c7639\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PostCodeLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PostCode.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  PcdLib\r
+  DebugLib\r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.\r
+#\r
+################################################################################\r
+\r
+[PcdsFixedAtBuild.common]\r
+  PcdPostCodePropertyMask|gEfiMdePkgTokenSpaceGuid\r
+\r

diff --git a/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.msa b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.msa
new file mode 100644 (file)
index 0000000..f4095f3
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibDebug/BasePostCodeLibDebug.msa
@@ -0,0 +1,53 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePostCodeLibDebug</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>19e3bbba-beb1-43e8-b32d-9acbb22c7639</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Debug Base Post Code Library.</Abstract>\r
+    <Description>Post Code Library that layers on top of a Debug Library instance.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePostCodeLibDebug</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PostCodeLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>PcdLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PostCode.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+  <PcdCoded>\r
+    <PcdEntry PcdItemType="FIXED_AT_BUILD">\r
+      <C_Name>PcdPostCodePropertyMask</C_Name>\r
+          <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>\r
+      <HelpText>The bitmask of flags that specify the enable/disable of Post\r
+                Code, Post Code Description.</HelpText>\r
+    </PcdEntry>\r
+  </PcdCoded>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePostCodeLibDebug/CommonHeader.h b/MdePkg/Library/BasePostCodeLibDebug/CommonHeader.h
new file mode 100644 (file)
index 0000000..7d68ffe
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibDebug/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PostCodeLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePostCodeLibDebug/PostCode.c b/MdePkg/Library/BasePostCodeLibDebug/PostCode.c
new file mode 100644 (file)
index 0000000..f929ba8
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibDebug/PostCode.c
@@ -0,0 +1,127 @@
+/** @file\r
+  Report Status Code Library Post Code functions for DXE Phase.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials                          \r
+  are licensed and made available under the terms and conditions of the BSD License         \r
+  which accompanies this distribution.  The full text of the license may be found at        \r
+  http://opensource.org/licenses/bsd-license.php                                            \r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+\r
+**/\r
+\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Sends an 32-bit value to a POST card.\r
+\r
+  Sends the 32-bit value specified by Value to a POST card, and returns Value.  \r
+  Some implementations of this library function may perform I/O operations \r
+  directly to a POST card device.  Other implementations may send Value to \r
+  ReportStatusCode(), and the status code reporting mechanism will eventually \r
+  display the 32-bit value on the status reporting device.\r
+  \r
+  PostCode() must actively prevent recursion.  If PostCode() is called while \r
+  processing another any other Report Status Code Library function, then \r
+  PostCode() must return Value immediately.\r
+\r
+  @param  Value  The 32-bit value to write to the POST card.\r
+\r
+  @return  Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PostCode (\r
+  IN UINT32  Value\r
+  )\r
+{\r
+  DEBUG((EFI_D_INFO, "POST %08x\n", Value));\r
+  return Value;\r
+}\r
+\r
+\r
+/**\r
+  Sends an 32-bit value to a POST and associated ASCII string.\r
+\r
+  Sends the 32-bit value specified by Value to a POST card, and returns Value.\r
+  If Description is not NULL, then the ASCII string specified by Description is \r
+  also passed to the handler that displays the POST card value.  Some \r
+  implementations of this library function may perform I/O operations directly \r
+  to a POST card device.  Other implementations may send Value to ReportStatusCode(), \r
+  and the status code reporting mechanism will eventually display the 32-bit \r
+  value on the status reporting device.  \r
+\r
+  PostCodeWithDescription()must actively prevent recursion.  If \r
+  PostCodeWithDescription() is called while processing another any other Report \r
+  Status Code Library function, then PostCodeWithDescription() must return Value \r
+  immediately.\r
+\r
+  @param  Value        The 32-bit value to write to the POST card.\r
+  @param  Description  Pointer to an ASCII string that is a description of the \r
+                       POST code value.  This is an optional parameter that may \r
+                       be NULL.\r
+\r
+  @return  Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PostCodeWithDescription (\r
+  IN UINT32       Value,\r
+  IN CONST CHAR8  *Description  OPTIONAL\r
+  )\r
+{\r
+  DEBUG((EFI_D_INFO, "POST %08x - %s\n", Value, Description));\r
+  return Value;\r
+}\r
+\r
+\r
+/**\r
+  Returns TRUE if POST Codes are enabled.\r
+\r
+  This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED \r
+  bit of PcdPostCodePropertyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE   The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+                  PcdPostCodeProperyMask is set.\r
+  @retval  FALSE  The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+                  PcdPostCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PostCodeEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);\r
+}\r
+\r
+\r
+/**\r
+  Returns TRUE if POST code descriptions are enabled.\r
+\r
+  This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED\r
+  bit of PcdPostCodePropertyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE   The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of\r
+                  PcdPostCodeProperyMask is set.\r
+  @retval  FALSE  The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of\r
+                  PcdPostCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PostCodeDescriptionEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);\r
+}\r

diff --git a/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.inf b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.inf
new file mode 100644 (file)
index 0000000..b43a006
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.inf
@@ -0,0 +1,91 @@
+#/** @file\r
+# Component description file for Port 80 Base Post Code Library.\r
+#\r
+# Post Code Library that writes post code values to I/O port 0x80.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePostCodeLibPort80\r
+  FILE_GUID                      = b6e9a733-eb75-41b6-b30c-009bcf3801c8\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PostCodeLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PostCode.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  IoLib\r
+  PcdLib\r
+\r
+\r
+################################################################################\r
+#\r
+# Pcd FIXED_AT_BUILD - list of PCDs that this module is coded for.\r
+#\r
+################################################################################\r
+\r
+[PcdsFixedAtBuild.common]\r
+  PcdPostCodePropertyMask|gEfiMdePkgTokenSpaceGuid\r
+\r

diff --git a/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.msa b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.msa
new file mode 100644 (file)
index 0000000..7677762
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibPort80/BasePostCodeLibPort80.msa
@@ -0,0 +1,53 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePostCodeLibPort80</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>b6e9a733-eb75-41b6-b30c-009bcf3801c8</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Port 80 Base Post Code Library.</Abstract>\r
+    <Description>Post Code Library that writes post code values to I/O port 0x80.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePostCodeLibPort80</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PostCodeLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>PcdLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>IoLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PostCode.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+  <PcdCoded>\r
+    <PcdEntry PcdItemType="FIXED_AT_BUILD">\r
+      <C_Name>PcdPostCodePropertyMask</C_Name>\r
+          <TokenSpaceGuidCName>gEfiMdePkgTokenSpaceGuid</TokenSpaceGuidCName>\r
+      <HelpText>The bitmask of flags that specify the enable/disable of Post\r
+                Code, Post Code Description.</HelpText>\r
+    </PcdEntry>\r
+  </PcdCoded>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePostCodeLibPort80/CommonHeader.h b/MdePkg/Library/BasePostCodeLibPort80/CommonHeader.h
new file mode 100644 (file)
index 0000000..12ef16f
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibPort80/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PostCodeLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePostCodeLibPort80/PostCode.c b/MdePkg/Library/BasePostCodeLibPort80/PostCode.c
new file mode 100644 (file)
index 0000000..a5e8a65
--- /dev/null
+++ b/MdePkg/Library/BasePostCodeLibPort80/PostCode.c
@@ -0,0 +1,128 @@
+/** @file\r
+  Report Status Code Library Post Code functions for DXE Phase.\r
+\r
+  Copyright (c) 2006, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials                          \r
+  are licensed and made available under the terms and conditions of the BSD License         \r
+  which accompanies this distribution.  The full text of the license may be found at        \r
+  http://opensource.org/licenses/bsd-license.php                                            \r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+\r
+**/\r
+\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Sends an 32-bit value to a POST card.\r
+\r
+  Sends the 32-bit value specified by Value to a POST card, and returns Value.  \r
+  Some implementations of this library function may perform I/O operations \r
+  directly to a POST card device.  Other implementations may send Value to \r
+  ReportStatusCode(), and the status code reporting mechanism will eventually \r
+  display the 32-bit value on the status reporting device.\r
+  \r
+  PostCode() must actively prevent recursion.  If PostCode() is called while \r
+  processing another any other Report Status Code Library function, then \r
+  PostCode() must return Value immediately.\r
+\r
+  @param  Value  The 32-bit value to write to the POST card.\r
+\r
+  @return  Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PostCode (\r
+  IN UINT32  Value\r
+  )\r
+{\r
+  IoWrite8 (0x80, (UINT8)(Value));\r
+  return Value;\r
+}\r
+\r
+\r
+/**\r
+  Sends an 32-bit value to a POST and associated ASCII string.\r
+\r
+  Sends the 32-bit value specified by Value to a POST card, and returns Value.\r
+  If Description is not NULL, then the ASCII string specified by Description is \r
+  also passed to the handler that displays the POST card value.  Some \r
+  implementations of this library function may perform I/O operations directly \r
+  to a POST card device.  Other implementations may send Value to ReportStatusCode(), \r
+  and the status code reporting mechanism will eventually display the 32-bit \r
+  value on the status reporting device.  \r
+\r
+  PostCodeWithDescription()must actively prevent recursion.  If \r
+  PostCodeWithDescription() is called while processing another any other Report \r
+  Status Code Library function, then PostCodeWithDescription() must return Value \r
+  immediately.\r
+\r
+  @param  Value        The 32-bit value to write to the POST card.\r
+  @param  Description  Pointer to an ASCII string that is a description of the \r
+                       POST code value.  This is an optional parameter that may \r
+                       be NULL.\r
+\r
+  @return  Value\r
+\r
+**/\r
+UINT32\r
+EFIAPI\r
+PostCodeWithDescription (\r
+  IN UINT32       Value,\r
+  IN CONST CHAR8  *Description  OPTIONAL\r
+  )\r
+{\r
+  IoWrite8 (0x80, (UINT8)(Value));\r
+  return Value;\r
+}\r
+\r
+\r
+/**\r
+  Returns TRUE if POST Codes are enabled.\r
+\r
+  This function returns TRUE if the POST_CODE_PROPERTY_POST_CODE_ENABLED \r
+  bit of PcdPostCodePropertyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE   The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+                  PcdPostCodeProperyMask is set.\r
+  @retval  FALSE  The POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+                  PcdPostCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PostCodeEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);\r
+}\r
+\r
+\r
+/**\r
+  Returns TRUE if POST code descriptions are enabled.\r
+\r
+  This function returns TRUE if the \r
+  POST_CODE_PROPERTY_POST_CODE_ENABLED bit of \r
+  PcdPostCodePropertyMask is set.  Otherwise FALSE is returned.\r
+\r
+  @retval  TRUE   The POST_CODE_PROPERTY_POST_CODE_ENABLED \r
+                  bit of PcdPostCodeProperyMask is set.\r
+  @retval  FALSE  The POST_CODE_PROPERTY_POST_CODE_ENABLED \r
+                  bit of PcdPostCodeProperyMask is clear.\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+PostCodeDescriptionEnabled (\r
+  VOID\r
+  )\r
+{\r
+  return (BOOLEAN) ((PcdGet8(PcdPostCodePropertyMask) & POST_CODE_PROPERTY_POST_CODE_ENABLED) != 0);\r
+}\r

diff --git a/MdePkg/Library/BasePrintLib/BasePrintLib.inf b/MdePkg/Library/BasePrintLib/BasePrintLib.inf
new file mode 100644 (file)
index 0000000..340b148
--- /dev/null
+++ b/MdePkg/Library/BasePrintLib/BasePrintLib.inf
@@ -0,0 +1,83 @@
+#/** @file\r
+# Component description file for Base Print Library.\r
+#\r
+# Print Library implementation.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BasePrintLib\r
+  FILE_GUID                      = a86fbfca-0183-4eeb-aa8a-762e3b7da1f3\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PrintLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  PrintLibInternal.h\r
+  PrintLibInternal.c\r
+  PrintLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+  BaseLib\r
+\r

diff --git a/MdePkg/Library/BasePrintLib/BasePrintLib.msa b/MdePkg/Library/BasePrintLib/BasePrintLib.msa
new file mode 100644 (file)
index 0000000..6e6865a
--- /dev/null
+++ b/MdePkg/Library/BasePrintLib/BasePrintLib.msa
@@ -0,0 +1,47 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">\r
+  <MsaHeader>\r
+    <ModuleName>BasePrintLib</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>a86fbfca-0183-4eeb-aa8a-762e3b7da1f3</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Base Print Library.</Abstract>\r
+    <Description>Print Library implementation.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials\r
+      are licensed and made available under the terms and conditions of the BSD License\r
+      which accompanies this distribution.  The full text of the license may be found at\r
+      http://opensource.org/licenses/bsd-license.php\r
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BasePrintLib</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>PrintLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>BaseLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>PrintLib.c</Filename>\r
+    <Filename>PrintLibInternal.c</Filename>\r
+    <Filename>PrintLibInternal.h</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BasePrintLib/CommonHeader.h b/MdePkg/Library/BasePrintLib/CommonHeader.h
new file mode 100644 (file)
index 0000000..c6d7f41
--- /dev/null
+++ b/MdePkg/Library/BasePrintLib/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/PrintLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BasePrintLib/PrintLib.c b/MdePkg/Library/BasePrintLib/PrintLib.c
new file mode 100644 (file)
index 0000000..764e384
--- /dev/null
+++ b/MdePkg/Library/BasePrintLib/PrintLib.c
@@ -0,0 +1,1085 @@
+/** @file\r
+  Print Library.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PrintLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "PrintLibInternal.h"\r
+\r
+#define WARNING_STATUS_NUMBER         4\r
+#define ERROR_STATUS_NUMBER           24\r
+#define ASSERT_UNICODE_BUFFER(Buffer) ASSERT ((((UINTN) (Buffer)) & 0x01) == 0)\r
+\r
+GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8 *StatusString [] = {\r
+  "Success",                      //  RETURN_SUCCESS                = 0\r
+  "Warning Unknown Glyph",        //  RETURN_WARN_UNKNOWN_GLYPH     = 1\r
+  "Warning Delete Failure",       //  RETURN_WARN_DELETE_FAILURE    = 2\r
+  "Warning Write Failure",        //  RETURN_WARN_WRITE_FAILURE     = 3\r
+  "Warning Buffer Too Small",     //  RETURN_WARN_BUFFER_TOO_SMALL  = 4\r
+  "Load Error",                   //  RETURN_LOAD_ERROR             = 1  | MAX_BIT\r
+  "Invalid Parameter",            //  RETURN_INVALID_PARAMETER      = 2  | MAX_BIT\r
+  "Unsupported",                  //  RETURN_UNSUPPORTED            = 3  | MAX_BIT\r
+  "Bad Buffer Size",              //  RETURN_BAD_BUFFER_SIZE        = 4  | MAX_BIT\r
+  "Buffer Too Small",             //  RETURN_BUFFER_TOO_SMALL,      = 5  | MAX_BIT\r
+  "Not Ready",                    //  RETURN_NOT_READY              = 6  | MAX_BIT\r
+  "Device Error",                 //  RETURN_DEVICE_ERROR           = 7  | MAX_BIT\r
+  "Write Protected",              //  RETURN_WRITE_PROTECTED        = 8  | MAX_BIT\r
+  "Out of Resources",             //  RETURN_OUT_OF_RESOURCES       = 9  | MAX_BIT\r
+  "Volume Corrupt",               //  RETURN_VOLUME_CORRUPTED       = 10 | MAX_BIT\r
+  "Volume Full",                  //  RETURN_VOLUME_FULL            = 11 | MAX_BIT\r
+  "No Media",                     //  RETURN_NO_MEDIA               = 12 | MAX_BIT\r
+  "Media changed",                //  RETURN_MEDIA_CHANGED          = 13 | MAX_BIT\r
+  "Not Found",                    //  RETURN_NOT_FOUND              = 14 | MAX_BIT\r
+  "Access Denied",                //  RETURN_ACCESS_DENIED          = 15 | MAX_BIT\r
+  "No Response",                  //  RETURN_NO_RESPONSE            = 16 | MAX_BIT\r
+  "No mapping",                   //  RETURN_NO_MAPPING             = 17 | MAX_BIT\r
+  "Time out",                     //  RETURN_TIMEOUT                = 18 | MAX_BIT\r
+  "Not started",                  //  RETURN_NOT_STARTED            = 19 | MAX_BIT\r
+  "Already started",              //  RETURN_ALREADY_STARTED        = 20 | MAX_BIT\r
+  "Aborted",                      //  RETURN_ABORTED                = 21 | MAX_BIT\r
+  "ICMP Error",                   //  RETURN_ICMP_ERROR             = 22 | MAX_BIT\r
+  "TFTP Error",                   //  RETURN_TFTP_ERROR             = 23 | MAX_BIT\r
+  "Protocol Error"                //  RETURN_PROTOCOL_ERROR         = 24 | MAX_BIT\r
+};\r
+\r
+/**\r
+  Worker function that produces a Null-terminated string in an output buffer \r
+  based on a Null-terminated format string and a VA_LIST argument list.\r
+\r
+  VSPrint function to process format and place the results in Buffer. Since a \r
+  VA_LIST is used this rountine allows the nesting of Vararg routines. Thus \r
+  this is the main print working routine.\r
+\r
+  @param  Buffer      Character buffer to print the results of the parsing\r
+                      of Format into.\r
+  @param  BufferSize  Maximum number of characters to put into buffer.\r
+  @param  Flags       Intial flags value.\r
+                      Can only have FORMAT_UNICODE and OUTPUT_UNICODE set.\r
+  @param  Format      Null-terminated format string.\r
+  @param  Marker      Vararg list consumed by processing Format.\r
+\r
+  @return Number of characters printed not including the Null-terminator.\r
+\r
+**/\r
+UINTN\r
+BasePrintLibVSPrint (\r
+  OUT CHAR8        *Buffer,\r
+  IN  UINTN        BufferSize,\r
+  IN  UINTN        Flags,\r
+  IN  CONST CHAR8  *Format,\r
+  IN  VA_LIST      Marker\r
+  )\r
+{\r
+  CHAR8           *OriginalBuffer;\r
+  CHAR8           *EndBuffer;\r
+  CHAR8           ValueBuffer[MAXIMUM_VALUE_CHARACTERS];\r
+  UINTN           BytesPerOutputCharacter;\r
+  UINTN           BytesPerFormatCharacter;\r
+  UINTN           FormatMask;\r
+  UINTN           FormatCharacter;\r
+  UINTN           Width;\r
+  UINTN           Precision;\r
+  INT64           Value;\r
+  CONST CHAR8     *ArgumentString;\r
+  UINTN           Character;\r
+  GUID            *TmpGuid;\r
+  TIME            *TmpTime;\r
+  UINTN           Count;\r
+  UINTN           ArgumentMask;\r
+  INTN            BytesPerArgumentCharacter;\r
+  UINTN           ArgumentCharacter;\r
+  BOOLEAN         Done;\r
+  UINTN           Index;\r
+  CHAR8           Prefix;\r
+  BOOLEAN         ZeroPad;\r
+  BOOLEAN         Comma;\r
+  UINTN           Digits;\r
+  UINTN           Radix;\r
+  RETURN_STATUS   Status;\r
+\r
+  if (BufferSize == 0) {\r
+    return 0;\r
+  }\r
+  ASSERT (Buffer != NULL);\r
+\r
+  if ((Flags & OUTPUT_UNICODE) != 0) {\r
+    BytesPerOutputCharacter = 2;\r
+  } else {\r
+    BytesPerOutputCharacter = 1;\r
+  }\r
+\r
+  //\r
+  // Reserve space for the Null terminator.\r
+  //\r
+  BufferSize--;\r
+  OriginalBuffer = Buffer;\r
+  //\r
+  // Set the tag for the end of the input Buffer.\r
+  //\r
+  EndBuffer      = Buffer + BufferSize * BytesPerOutputCharacter;\r
+\r
+  if ((Flags & FORMAT_UNICODE) != 0) {\r
+    //\r
+    // Make sure format string cannot contain more than PcdMaximumUnicodeStringLength\r
+    // Unicode characters if PcdMaximumUnicodeStringLength is not zero. \r
+    //\r
+    ASSERT (StrSize ((CHAR16 *) Format) != 0);\r
+    BytesPerFormatCharacter = 2;\r
+    FormatMask = 0xffff;\r
+  } else {\r
+    //\r
+    // Make sure format string cannot contain more than PcdMaximumAsciiStringLength\r
+    // Ascii characters if PcdMaximumAsciiStringLength is not zero. \r
+    //\r
+    ASSERT (AsciiStrSize (Format) != 0);\r
+    BytesPerFormatCharacter = 1;\r
+    FormatMask = 0xff;\r
+  }\r
+\r
+\r
+\r
+  //\r
+  // Get the first character from the format string\r
+  //\r
+  FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;\r
+\r
+  //\r
+  // Loop until the end of the format string is reached or the output buffer is full\r
+  //\r
+  while (FormatCharacter != 0 && Buffer < EndBuffer) {\r
+    //\r
+    // Clear all the flag bits except those that may have been passed in\r
+    //\r
+    Flags &= (OUTPUT_UNICODE | FORMAT_UNICODE);\r
+\r
+    //\r
+    // Set the default width to zero, and the default precision to 1\r
+    //\r
+    Width     = 0;\r
+    Precision = 1;\r
+    Prefix    = 0;\r
+    Comma     = FALSE;\r
+    ZeroPad   = FALSE;\r
+    Count     = 0;\r
+    Digits    = 0;\r
+\r
+    switch (FormatCharacter) {\r
+    case '%':\r
+      //\r
+      // Parse Flags and Width\r
+      //\r
+      for (Done = FALSE; !Done; ) {\r
+        Format += BytesPerFormatCharacter;\r
+        FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;\r
+        switch (FormatCharacter) {\r
+        case '.': \r
+          Flags |= PRECISION; \r
+          break;\r
+        case '-': \r
+          Flags |= LEFT_JUSTIFY; \r
+          break;\r
+        case '+': \r
+          Flags |= PREFIX_SIGN;  \r
+          break;\r
+        case ' ': \r
+          Flags |= PREFIX_BLANK; \r
+          break;\r
+        case ',': \r
+          Flags |= COMMA_TYPE; \r
+          break;\r
+        case 'L':\r
+        case 'l': \r
+          Flags |= LONG_TYPE;    \r
+          break;\r
+        case '*':\r
+          if ((Flags & PRECISION) == 0) {\r
+            Flags |= PAD_TO_WIDTH;\r
+            Width = VA_ARG (Marker, UINTN);\r
+          } else {\r
+            Precision = VA_ARG (Marker, UINTN);\r
+          }\r
+          break;\r
+        case '0':\r
+          if ((Flags & PRECISION) == 0) {\r
+            Flags |= PREFIX_ZERO;\r
+          }\r
+        case '1':\r
+        case '2':\r
+        case '3':\r
+        case '4':\r
+        case '5':\r
+        case '6':\r
+        case '7':\r
+        case '8':\r
+        case '9':\r
+          for (Count = 0; ((FormatCharacter >= '0') &&  (FormatCharacter <= '9')); ){\r
+            Count = (Count * 10) + FormatCharacter - '0';\r
+            Format += BytesPerFormatCharacter;\r
+            FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;\r
+          }\r
+          Format -= BytesPerFormatCharacter;\r
+          if ((Flags & PRECISION) == 0) {\r
+            Flags |= PAD_TO_WIDTH;\r
+            Width = Count;\r
+          } else {\r
+            Precision = Count;\r
+          }\r
+          break;\r
+       \r
+        case '\0':\r
+          //\r
+          // Make no output if Format string terminates unexpectedly when\r
+          // looking up for flag, width, precision and type. \r
+          //\r
+          Format   -= BytesPerFormatCharacter;\r
+          Precision = 0;\r
+          //\r
+          // break skipped on purpose.\r
+          //\r
+        default:\r
+          Done = TRUE;\r
+          break;\r
+        }\r
+      } \r
+\r
+      //\r
+      // Handle each argument type\r
+      //\r
+      switch (FormatCharacter) {\r
+      case 'p':\r
+        //\r
+        // Flag space, +, 0, L & l are invalid for type p.\r
+        //\r
+        Flags &= ~(PREFIX_BLANK | PREFIX_SIGN | PREFIX_ZERO | LONG_TYPE);\r
+        if (sizeof (VOID *) > 4) {\r
+          Flags |= LONG_TYPE;\r
+        }\r
+      case 'X':\r
+        Flags |= PREFIX_ZERO;\r
+        //\r
+        // break skipped on purpose\r
+        //\r
+      case 'x':\r
+        Flags |= RADIX_HEX;\r
+        //\r
+        // break skipped on purpose\r
+        //\r
+      case 'd':\r
+        if ((Flags & LONG_TYPE) == 0) {\r
+          Value = (VA_ARG (Marker, int));\r
+        } else {\r
+          Value = VA_ARG (Marker, INT64);\r
+        }\r
+        if ((Flags & PREFIX_BLANK) != 0) {\r
+          Prefix = ' ';\r
+        }\r
+        if ((Flags & PREFIX_SIGN) != 0) {\r
+          Prefix = '+';\r
+        }\r
+        if ((Flags & COMMA_TYPE) != 0) {\r
+          Comma = TRUE;\r
+        }\r
+        if ((Flags & RADIX_HEX) == 0) {\r
+          Radix = 10;\r
+          if (Comma) {\r
+            Flags &= (~PREFIX_ZERO);\r
+            Precision = 1;\r
+          }\r
+          if (Value < 0) {\r
+            Flags |= PREFIX_SIGN;\r
+            Prefix = '-';\r
+            Value = -Value;\r
+          }\r
+        } else {\r
+          Radix = 16;\r
+          Comma = FALSE;\r
+          if ((Flags & LONG_TYPE) == 0 && Value < 0) {\r
+            Value = (unsigned int)Value;\r
+          }\r
+        }\r
+        //\r
+        // Convert Value to a reversed string\r
+        //\r
+        Count = BasePrintLibValueToString (ValueBuffer, Value, Radix);\r
+        if (Value == 0 && Precision == 0) {\r
+          Count = 0;\r
+        }\r
+        ArgumentString = (CHAR8 *)ValueBuffer + Count;\r
+        \r
+        Digits = Count % 3;\r
+        if (Digits != 0) {\r
+          Digits = 3 - Digits;\r
+        }\r
+        if (Comma && Count != 0) {\r
+          Count += ((Count - 1) / 3);\r
+        }\r
+        if (Prefix != 0) {\r
+          Count++;\r
+          Precision++;\r
+        }\r
+        Flags |= ARGUMENT_REVERSED;\r
+        ZeroPad = TRUE;\r
+        if ((Flags & PREFIX_ZERO) != 0) {\r
+          if ((Flags & LEFT_JUSTIFY) == 0) {\r
+            if ((Flags & PAD_TO_WIDTH) != 0) {\r
+              if ((Flags & PRECISION) == 0) {\r
+                Precision = Width;\r
+              }\r
+            }\r
+          }\r
+        }\r
+        break;\r
+\r
+      case 's':\r
+      case 'S':\r
+        Flags |= ARGUMENT_UNICODE;\r
+        //\r
+        // break skipped on purpose\r
+        //\r
+      case 'a':\r
+        ArgumentString = (CHAR8 *)VA_ARG (Marker, CHAR8 *);\r
+        if (ArgumentString == NULL) {\r
+          Flags &= (~ARGUMENT_UNICODE);\r
+          ArgumentString = "<null string>";\r
+        }\r
+        break;\r
+\r
+      case 'c':\r
+        Character = VA_ARG (Marker, UINTN) & 0xffff;\r
+        ArgumentString = (CHAR8 *)&Character;\r
+        Flags |= ARGUMENT_UNICODE;\r
+        break;\r
+\r
+      case 'g':\r
+        TmpGuid = VA_ARG (Marker, GUID *);\r
+        if (TmpGuid == NULL) {\r
+          ArgumentString = "<null guid>";\r
+        } else {\r
+          BasePrintLibSPrint (\r
+            ValueBuffer,\r
+            MAXIMUM_VALUE_CHARACTERS, \r
+            0,\r
+            "%08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x",\r
+            TmpGuid->Data1,\r
+            TmpGuid->Data2,\r
+            TmpGuid->Data3,\r
+            TmpGuid->Data4[0],\r
+            TmpGuid->Data4[1],\r
+            TmpGuid->Data4[2],\r
+            TmpGuid->Data4[3],\r
+            TmpGuid->Data4[4],\r
+            TmpGuid->Data4[5],\r
+            TmpGuid->Data4[6],\r
+            TmpGuid->Data4[7]\r
+            );\r
+          ArgumentString = ValueBuffer;\r
+        }\r
+        break;\r
+\r
+      case 't':\r
+        TmpTime = VA_ARG (Marker, TIME *); \r
+        if (TmpTime == NULL) {\r
+          ArgumentString = "<null time>";\r
+        } else {\r
+          BasePrintLibSPrint (\r
+            ValueBuffer,\r
+            MAXIMUM_VALUE_CHARACTERS,\r
+            0,\r
+            "%02d/%02d/%04d  %02d:%02d",\r
+            TmpTime->Month,\r
+            TmpTime->Day,\r
+            TmpTime->Year,\r
+            TmpTime->Hour,\r
+            TmpTime->Minute\r
+            );\r
+          ArgumentString = ValueBuffer;\r
+        }\r
+        break;\r
+\r
+      case 'r':\r
+        Status = VA_ARG (Marker, RETURN_STATUS);\r
+        ArgumentString = ValueBuffer;\r
+        if (RETURN_ERROR (Status)) {\r
+          //\r
+          // Clear error bit\r
+          //\r
+          Index = Status & ~MAX_BIT;\r
+          if (Index > 0 && Index <= ERROR_STATUS_NUMBER) {\r
+            ArgumentString = StatusString [Index + WARNING_STATUS_NUMBER];\r
+          }\r
+        } else {\r
+          Index = Status;\r
+          if (Index <= WARNING_STATUS_NUMBER) {\r
+            ArgumentString = StatusString [Index];\r
+          }\r
+        }\r
+        if (ArgumentString == ValueBuffer) {\r
+          BasePrintLibSPrint ((CHAR8 *) ValueBuffer, MAXIMUM_VALUE_CHARACTERS, 0, "%08X", Status);\r
+        }\r
+        break;\r
+\r
+      case '\n':\r
+        ArgumentString = "\n\r";\r
+        break;\r
+\r
+      case '%':\r
+      default:\r
+        //\r
+        // if the type is '%' or unknown, then print it to the screen\r
+        //\r
+        ArgumentString = (CHAR8 *)&FormatCharacter;\r
+        Flags |= ARGUMENT_UNICODE;\r
+        break;\r
+      }\r
+      break;\r
+ \r
+    case '\n':\r
+      ArgumentString = "\n\r";\r
+      break;\r
+\r
+    default:\r
+      ArgumentString = (CHAR8 *)&FormatCharacter;\r
+      Flags |= ARGUMENT_UNICODE;\r
+      break;\r
+    }\r
+\r
+    //\r
+    // Retrieve the ArgumentString attriubutes\r
+    //\r
+    if ((Flags & ARGUMENT_UNICODE) != 0) {\r
+      ArgumentMask = 0xffff;\r
+      BytesPerArgumentCharacter = 2;\r
+    } else {\r
+      ArgumentMask = 0xff;\r
+      BytesPerArgumentCharacter = 1;\r
+    }\r
+    if ((Flags & ARGUMENT_REVERSED) != 0) {\r
+      BytesPerArgumentCharacter = -BytesPerArgumentCharacter;\r
+    } else {\r
+      //\r
+      // Compute the number of characters in ArgumentString and store it in Count\r
+      // ArgumentString is either null-terminated, or it contains Precision characters\r
+      //\r
+      for (Count = 0; Count < Precision || ((Flags & PRECISION) == 0); Count++) {\r
+        ArgumentCharacter = ((ArgumentString[Count * BytesPerArgumentCharacter] & 0xff) | ((ArgumentString[Count * BytesPerArgumentCharacter + 1]) << 8)) & ArgumentMask;\r
+        if (ArgumentCharacter == 0) {\r
+          break;\r
+        }\r
+      }\r
+    }\r
+\r
+    if (Precision < Count) {\r
+      Precision = Count;\r
+    }\r
+\r
+    //\r
+    // Pad before the string\r
+    //\r
+    if ((Flags & (PAD_TO_WIDTH | LEFT_JUSTIFY)) == (PAD_TO_WIDTH)) {\r
+      Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Width - Precision, ' ', BytesPerOutputCharacter);\r
+    }\r
+\r
+    if (ZeroPad) {\r
+      if (Prefix != 0) {\r
+        Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, Prefix, BytesPerOutputCharacter);\r
+      }\r
+      Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Precision - Count, '0', BytesPerOutputCharacter);\r
+    } else {\r
+      Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Precision - Count, ' ', BytesPerOutputCharacter);\r
+      if (Prefix != 0) {\r
+        Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, Prefix, BytesPerOutputCharacter);\r
+      }\r
+    }\r
+\r
+    //\r
+    // Output the Prefix character if it is present\r
+    //\r
+    Index = 0;\r
+    if (Prefix != 0) {\r
+      Index++;\r
+    }\r
+\r
+    //\r
+    // Copy the string into the output buffer performing the required type conversions\r
+    //\r
+    while (Index < Count) {\r
+      ArgumentCharacter = ((*ArgumentString & 0xff) | (*(ArgumentString + 1) << 8)) & ArgumentMask;\r
+\r
+      Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ArgumentCharacter, BytesPerOutputCharacter);\r
+      ArgumentString    += BytesPerArgumentCharacter;\r
+      Index++;\r
+      if (Comma) {\r
+        Digits++;\r
+        if (Digits == 3) {\r
+          Digits = 0;\r
+          Index++;\r
+          if (Index < Count) {\r
+            Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ',', BytesPerOutputCharacter);\r
+          }\r
+        }\r
+      }\r
+    }\r
+\r
+    //\r
+    // Pad after the string\r
+    //\r
+    if ((Flags & (PAD_TO_WIDTH | LEFT_JUSTIFY)) == (PAD_TO_WIDTH | LEFT_JUSTIFY)) {\r
+      Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Width - Precision, ' ', BytesPerOutputCharacter);\r
+    }\r
+\r
+    //\r
+    // Get the next character from the format string\r
+    //\r
+    Format += BytesPerFormatCharacter;\r
+\r
+    //\r
+    // Get the next character from the format string\r
+    //\r
+    FormatCharacter = (*Format | (*(Format + 1) << 8)) & FormatMask;\r
+  }\r
+\r
+  //\r
+  // Null terminate the Unicode or ASCII string\r
+  //\r
+  BasePrintLibFillBuffer (Buffer, EndBuffer + BytesPerOutputCharacter, 1, 0, BytesPerOutputCharacter);\r
+  //\r
+  // Make sure output buffer cannot contain more than PcdMaximumUnicodeStringLength\r
+  // Unicode characters if PcdMaximumUnicodeStringLength is not zero. \r
+  //\r
+  ASSERT ((((Flags & OUTPUT_UNICODE) == 0)) || (StrSize ((CHAR16 *) OriginalBuffer) != 0));\r
+  //\r
+  // Make sure output buffer cannot contain more than PcdMaximumAsciiStringLength\r
+  // ASCII characters if PcdMaximumAsciiStringLength is not zero. \r
+  //\r
+  ASSERT ((((Flags & OUTPUT_UNICODE) != 0)) || (AsciiStrSize (OriginalBuffer) != 0));\r
+\r
+  return ((Buffer - OriginalBuffer) / BytesPerOutputCharacter);\r
+}\r
+\r
+/**\r
+  Worker function that produces a Null-terminated string in an output buffer \r
+  based on a Null-terminated format string and variable argument list.\r
+\r
+  VSPrint function to process format and place the results in Buffer. Since a \r
+  VA_LIST is used this rountine allows the nesting of Vararg routines. Thus \r
+  this is the main print working routine.\r
+\r
+  @param  Buffer        Character buffer to print the results of the parsing\r
+                        of Format into.\r
+  @param  BufferSize    Maximum number of characters to put into buffer.\r
+                        Zero means no limit.\r
+  @param  Flags         Intial flags value.\r
+                        Can only have FORMAT_UNICODE and OUTPUT_UNICODE set\r
+  @param  FormatString  Null-terminated format string.\r
+\r
+  @return Number of characters printed not including the Null-terminator.\r
+\r
+**/\r
+UINTN\r
+BasePrintLibSPrint (\r
+  OUT CHAR8        *StartOfBuffer,\r
+  IN  UINTN        BufferSize,\r
+  IN  UINTN        Flags,\r
+  IN  CONST CHAR8  *FormatString,\r
+  ...\r
+  )\r
+{\r
+  VA_LIST  Marker;\r
+\r
+  VA_START (Marker, FormatString);\r
+  return BasePrintLibVSPrint (StartOfBuffer, BufferSize, Flags, FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated Unicode string in an output buffer based on \r
+  a Null-terminated Unicode format string and a VA_LIST argument list\r
+  \r
+  Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.  \r
+  The Unicode string is produced by parsing the format string specified by FormatString.  \r
+  Arguments are pulled from the variable argument list specified by Marker based on the \r
+  contents of the format string.  \r
+  The number of Unicode characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If BufferSize > 1 and FormatString is NULL, then ASSERT().\r
+  If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than \r
+  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string\r
+  contains more than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          Unicode string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  @param  Marker          VA_LIST marker for the variable argument list.\r
+  \r
+  @return The number of Unicode characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+UnicodeVSPrint (\r
+  OUT CHAR16        *StartOfBuffer,\r
+  IN  UINTN         BufferSize,\r
+  IN  CONST CHAR16  *FormatString,\r
+  IN  VA_LIST       Marker\r
+  )\r
+{\r
+  ASSERT_UNICODE_BUFFER(StartOfBuffer);\r
+  ASSERT_UNICODE_BUFFER(FormatString);\r
+  return BasePrintLibVSPrint ((CHAR8 *)StartOfBuffer, BufferSize >> 1, FORMAT_UNICODE | OUTPUT_UNICODE, (CHAR8 *)FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated \r
+  Unicode format string and variable argument list.\r
+  \r
+  Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.\r
+  The Unicode string is produced by parsing the format string specified by FormatString.\r
+  Arguments are pulled from the variable argument list based on the contents of the format string.\r
+  The number of Unicode characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If BufferSize > 1 and FormatString is NULL, then ASSERT().\r
+  If BufferSize > 1 and FormatString is not aligned on a 16-bit boundary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than \r
+  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string\r
+  contains more than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          Unicode string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  \r
+  @return The number of Unicode characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+UnicodeSPrint (\r
+  OUT CHAR16        *StartOfBuffer,\r
+  IN  UINTN         BufferSize,\r
+  IN  CONST CHAR16  *FormatString,\r
+  ...\r
+  )\r
+{\r
+  VA_LIST Marker;\r
+\r
+  VA_START (Marker, FormatString);\r
+  return UnicodeVSPrint (StartOfBuffer, BufferSize, FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated\r
+  ASCII format string and a VA_LIST argument list\r
+  \r
+  Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.\r
+  The Unicode string is produced by parsing the format string specified by FormatString.\r
+  Arguments are pulled from the variable argument list specified by Marker based on the \r
+  contents of the format string.\r
+  The number of Unicode characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If BufferSize > 1 and FormatString is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string\r
+  contains more than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          Unicode string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  @param  Marker          VA_LIST marker for the variable argument list.\r
+  \r
+  @return The number of Unicode characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+UnicodeVSPrintAsciiFormat (\r
+  OUT CHAR16       *StartOfBuffer,\r
+  IN  UINTN        BufferSize,\r
+  IN  CONST CHAR8  *FormatString,\r
+  IN  VA_LIST      Marker\r
+  )\r
+{\r
+  ASSERT_UNICODE_BUFFER(StartOfBuffer);\r
+  return BasePrintLibVSPrint ((CHAR8 *)StartOfBuffer, BufferSize >> 1, OUTPUT_UNICODE,FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated Unicode string in an output buffer based on a Null-terminated \r
+  ASCII format string and  variable argument list.\r
+  \r
+  Produces a Null-terminated Unicode string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.\r
+  The Unicode string is produced by parsing the format string specified by FormatString.\r
+  Arguments are pulled from the variable argument list based on the contents of the \r
+  format string.\r
+  The number of Unicode characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0 or 1, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 1 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 1 and StartOfBuffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If BufferSize > 1 and FormatString is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and produced Null-terminated Unicode string\r
+  contains more than PcdMaximumUnicodeStringLength Unicode characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          Unicode string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  \r
+  @return The number of Unicode characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+UnicodeSPrintAsciiFormat (\r
+  OUT CHAR16       *StartOfBuffer,\r
+  IN  UINTN        BufferSize,\r
+  IN  CONST CHAR8  *FormatString,\r
+  ...\r
+  )\r
+{\r
+  VA_LIST Marker;\r
+\r
+  VA_START (Marker, FormatString);\r
+  return UnicodeVSPrintAsciiFormat (StartOfBuffer, BufferSize, FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Converts a decimal value to a Null-terminated Unicode string.\r
+  \r
+  Converts the decimal number specified by Value to a Null-terminated Unicode \r
+  string specified by Buffer containing at most Width characters. No padding of spaces \r
+  is ever performed. If Width is 0 then a width of MAXIMUM_VALUE_CHARACTERS is assumed.\r
+  The number of Unicode characters in Buffer is returned not including the Null-terminator.\r
+  If the conversion contains more than Width characters, then only the first\r
+  Width characters are returned, and the total number of characters \r
+  required to perform the conversion is returned.\r
+  Additional conversion parameters are specified in Flags.  \r
+  \r
+  The Flags bit LEFT_JUSTIFY is always ignored.\r
+  All conversions are left justified in Buffer.\r
+  If Width is 0, PREFIX_ZERO is ignored in Flags.\r
+  If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas\r
+  are inserted every 3rd digit starting from the right.\r
+  If HEX_RADIX is set in Flags, then the output buffer will be \r
+  formatted in hexadecimal format.\r
+  If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.\r
+  If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored, \r
+  then Buffer is padded with '0' characters so the combination of the optional '-' \r
+  sign character, '0' characters, digit characters for Value, and the Null-terminator\r
+  add up to Width characters.\r
+  If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().\r
+  If Buffer is NULL, then ASSERT().\r
+  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
+  If unsupported bits are set in Flags, then ASSERT().\r
+  If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().\r
+  If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()\r
+\r
+  @param  Buffer  Pointer to the output buffer for the produced Null-terminated\r
+                  Unicode string.\r
+  @param  Flags   The bitmask of flags that specify left justification, zero pad, and commas.\r
+  @param  Value   The 64-bit signed value to convert to a string.\r
+  @param  Width   The maximum number of Unicode characters to place in Buffer, not including\r
+                  the Null-terminator.\r
+  \r
+  @return The number of Unicode characters in Buffer not including the Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+UnicodeValueToString (\r
+  IN OUT CHAR16  *Buffer,\r
+  IN UINTN       Flags,\r
+  IN INT64       Value,\r
+  IN UINTN       Width\r
+  )\r
+{\r
+  ASSERT_UNICODE_BUFFER(Buffer);\r
+  return BasePrintLibConvertValueToString ((CHAR8 *)Buffer, Flags, Value, Width, 2);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated\r
+  ASCII format string and a VA_LIST argument list.\r
+  \r
+  Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.\r
+  The ASCII string is produced by parsing the format string specified by FormatString.\r
+  Arguments are pulled from the variable argument list specified by Marker based on \r
+  the contents of the format string.\r
+  The number of ASCII characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 0 and FormatString is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string\r
+  contains more than PcdMaximumAsciiStringLength ASCII characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          ASCII string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  @param  Marker          VA_LIST marker for the variable argument list.\r
+  \r
+  @return The number of ASCII characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiVSPrint (\r
+  OUT CHAR8         *StartOfBuffer,\r
+  IN  UINTN         BufferSize,\r
+  IN  CONST CHAR8   *FormatString,\r
+  IN  VA_LIST       Marker\r
+  )\r
+{\r
+  return BasePrintLibVSPrint (StartOfBuffer, BufferSize, 0, FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated\r
+  ASCII format string and  variable argument list.\r
+  \r
+  Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.\r
+  The ASCII string is produced by parsing the format string specified by FormatString.\r
+  Arguments are pulled from the variable argument list based on the contents of the \r
+  format string.\r
+  The number of ASCII characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 0 and FormatString is NULL, then ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and FormatString contains more than\r
+  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string\r
+  contains more than PcdMaximumAsciiStringLength ASCII characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          ASCII string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  \r
+  @return The number of ASCII characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiSPrint (\r
+  OUT CHAR8        *StartOfBuffer,\r
+  IN  UINTN        BufferSize,\r
+  IN  CONST CHAR8  *FormatString,\r
+  ...\r
+  )\r
+{\r
+  VA_LIST Marker;\r
+\r
+  VA_START (Marker, FormatString);\r
+  return AsciiVSPrint (StartOfBuffer, BufferSize, FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated\r
+  ASCII format string and a VA_LIST argument list.\r
+  \r
+  Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.\r
+  The ASCII string is produced by parsing the format string specified by FormatString.\r
+  Arguments are pulled from the variable argument list specified by Marker based on \r
+  the contents of the format string.\r
+  The number of ASCII characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 0 and FormatString is NULL, then ASSERT().\r
+  If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string\r
+  contains more than PcdMaximumAsciiStringLength ASCII characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          ASCII string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  @param  Marker          VA_LIST marker for the variable argument list.\r
+  \r
+  @return The number of ASCII characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiVSPrintUnicodeFormat (\r
+  OUT CHAR8         *StartOfBuffer,\r
+  IN  UINTN         BufferSize,\r
+  IN  CONST CHAR16  *FormatString,\r
+  IN  VA_LIST       Marker\r
+  )\r
+{\r
+  ASSERT_UNICODE_BUFFER (FormatString);\r
+  return BasePrintLibVSPrint (StartOfBuffer, BufferSize, FORMAT_UNICODE, (CHAR8 *)FormatString, Marker);\r
+}\r
+\r
+/**\r
+  Produces a Null-terminated ASCII string in an output buffer based on a Null-terminated\r
+  ASCII format string and  variable argument list.\r
+  \r
+  Produces a Null-terminated ASCII string in the output buffer specified by StartOfBuffer\r
+  and BufferSize.\r
+  The ASCII string is produced by parsing the format string specified by FormatString.\r
+  Arguments are pulled from the variable argument list based on the contents of the \r
+  format string.\r
+  The number of ASCII characters in the produced output buffer is returned not including\r
+  the Null-terminator.\r
+  If BufferSize is 0, then no output buffer is produced and 0 is returned.\r
+\r
+  If BufferSize > 0 and StartOfBuffer is NULL, then ASSERT().\r
+  If BufferSize > 0 and FormatString is NULL, then ASSERT().\r
+  If BufferSize > 0 and FormatString is not aligned on a 16-bit boundary, then ASSERT().\r
+  If PcdMaximumUnicodeStringLength is not zero, and FormatString contains more than\r
+  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator, then\r
+  ASSERT().\r
+  If PcdMaximumAsciiStringLength is not zero, and produced Null-terminated ASCII string\r
+  contains more than PcdMaximumAsciiStringLength ASCII characters not including the\r
+  Null-terminator, then ASSERT().\r
+\r
+  @param  StartOfBuffer   A pointer to the output buffer for the produced Null-terminated \r
+                          ASCII string.\r
+  @param  BufferSize      The size, in bytes, of the output buffer specified by StartOfBuffer.\r
+  @param  FormatString    Null-terminated Unicode format string.\r
+  \r
+  @return The number of ASCII characters in the produced output buffer not including the\r
+          Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiSPrintUnicodeFormat (\r
+  OUT CHAR8         *StartOfBuffer,\r
+  IN  UINTN         BufferSize,\r
+  IN  CONST CHAR16  *FormatString,\r
+  ...\r
+  )\r
+{\r
+  VA_LIST Marker;\r
+\r
+  VA_START (Marker, FormatString);\r
+  return AsciiVSPrintUnicodeFormat (StartOfBuffer, BufferSize, FormatString, Marker);\r
+}\r
+\r
+\r
+/**\r
+  Converts a decimal value to a Null-terminated ASCII string.\r
+  \r
+  Converts the decimal number specified by Value to a Null-terminated ASCII string \r
+  specified by Buffer containing at most Width characters. No padding of spaces \r
+  is ever performed.\r
+  If Width is 0 then a width of  MAXIMUM_VALUE_CHARACTERS is assumed.\r
+  The number of ASCII characters in Buffer is returned not including the Null-terminator.\r
+  If the conversion contains more than Width characters, then only the first Width\r
+  characters are returned, and the total number of characters required to perform\r
+  the conversion is returned.\r
+  Additional conversion parameters are specified in Flags.  \r
+  The Flags bit LEFT_JUSTIFY is always ignored.\r
+  All conversions are left justified in Buffer.\r
+  If Width is 0, PREFIX_ZERO is ignored in Flags.\r
+  If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas\r
+  are inserted every 3rd digit starting from the right.\r
+  If HEX_RADIX is set in Flags, then the output buffer will be \r
+  formatted in hexadecimal format.\r
+  If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.\r
+  If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored, \r
+  then Buffer is padded with '0' characters so the combination of the optional '-' \r
+  sign character, '0' characters, digit characters for Value, and the Null-terminator\r
+  add up to Width characters.\r
+  \r
+  If Buffer is NULL, then ASSERT().\r
+  If unsupported bits are set in Flags, then ASSERT().\r
+  If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().\r
+  If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()\r
+\r
+  @param  Buffer  Pointer to the output buffer for the produced Null-terminated\r
+                  ASCII string.\r
+  @param  Flags   The bitmask of flags that specify left justification, zero pad, and commas.\r
+  @param  Value   The 64-bit signed value to convert to a string.\r
+  @param  Width   The maximum number of ASCII characters to place in Buffer, not including\r
+                  the Null-terminator.\r
+  \r
+  @return The number of ASCII characters in Buffer not including the Null-terminator.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+AsciiValueToString (\r
+  IN OUT CHAR8  *Buffer,\r
+  IN UINTN      Flags,\r
+  IN INT64      Value,\r
+  IN UINTN      Width\r
+  )\r
+{\r
+  return BasePrintLibConvertValueToString (Buffer, Flags, Value, Width, 1);\r
+}\r
+\r

diff --git a/MdePkg/Library/BasePrintLib/PrintLibInternal.c b/MdePkg/Library/BasePrintLib/PrintLibInternal.c
new file mode 100644 (file)
index 0000000..72c05e4
--- /dev/null
+++ b/MdePkg/Library/BasePrintLib/PrintLibInternal.c
@@ -0,0 +1,214 @@
+/** @file\r
+  Print Library worker functions.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PrintLibInternal.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "PrintLibInternal.h"\r
+\r
+GLOBAL_REMOVE_IF_UNREFERENCED CONST CHAR8 mHexStr[] = {'0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F'};\r
+\r
+\r
+/**\r
+  Internal function that places the character into the Buffer.\r
+\r
+  Internal function that places ASCII or Unicode character into the Buffer.\r
+\r
+  @param  Buffer      Buffer to place the Unicode or ASCII string.\r
+  @param  EndBuffer   The end of the input Buffer. No characters will be\r
+                      placed after that. \r
+  @param  Length      Count of character to be placed into Buffer.\r
+  @param  Character   Character to be placed into Buffer.\r
+  @param  Increment   Character increment in Buffer.\r
+\r
+  @return Number of characters printed.\r
+\r
+**/\r
+CHAR8 *\r
+BasePrintLibFillBuffer (\r
+  CHAR8   *Buffer,\r
+  CHAR8   *EndBuffer,\r
+  INTN    Length,\r
+  UINTN   Character,\r
+  INTN    Increment\r
+  )\r
+{\r
+  INTN  Index;\r
+\r
+  for (Index = 0; Index < Length && Buffer < EndBuffer; Index++) {\r
+    *Buffer       =  (CHAR8) Character;\r
+    *(Buffer + 1) =  (CHAR8) (Character >> 8);\r
+    Buffer        += Increment;\r
+  }\r
+  return Buffer;\r
+}\r
+\r
+/**\r
+  Internal function that convert a decimal number to a string in Buffer.\r
+\r
+  Print worker function that convert a decimal number to a string in Buffer.\r
+\r
+  @param  Buffer    Location to place the Unicode or ASCII string of Value.\r
+  @param  Value     Value to convert to a Decimal or Hexidecimal string in Buffer.\r
+  @param  Radix     Radix of the value\r
+\r
+  @return Number of characters printed.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+BasePrintLibValueToString (\r
+  IN OUT CHAR8  *Buffer,\r
+  IN INT64      Value,\r
+  IN UINTN      Radix\r
+  )\r
+{\r
+  UINTN   Digits;\r
+  UINT32  Remainder;\r
+\r
+  //\r
+  // Loop to convert one digit at a time in reverse order\r
+  //\r
+  *(Buffer++) = 0;\r
+  Digits = 0;\r
+  do {\r
+    Value = (INT64)DivU64x32Remainder ((UINT64)Value, (UINT32)Radix, &Remainder);\r
+    *(Buffer++) = mHexStr[Remainder];\r
+    Digits++;\r
+  } while (Value != 0);\r
+  return Digits;\r
+}\r
+\r
+/**\r
+  Internal function that converts a decimal value to a Null-terminated string.\r
+  \r
+  Converts the decimal number specified by Value to a Null-terminated  \r
+  string specified by Buffer containing at most Width characters.\r
+  If Width is 0 then a width of  MAXIMUM_VALUE_CHARACTERS is assumed.\r
+  The number of characters in Buffer is returned not including the Null-terminator.\r
+  If the conversion contains more than Width characters, then only the first\r
+  Width characters are returned, and the total number of characters \r
+  required to perform the conversion is returned.\r
+  Additional conversion parameters are specified in Flags.  \r
+  The Flags bit LEFT_JUSTIFY is always ignored.\r
+  All conversions are left justified in Buffer.\r
+  If Width is 0, PREFIX_ZERO is ignored in Flags.\r
+  If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas\r
+  are inserted every 3rd digit starting from the right.\r
+  If HEX_RADIX is set in Flags, then the output buffer will be formatted in hexadecimal format.\r
+  If Value is < 0 and HEX_RADIX is not set in Flags, then the fist character in Buffer is a '-'.\r
+  If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored, \r
+  then Buffer is padded with '0' characters so the combination of the optional '-' \r
+  sign character, '0' characters, digit characters for Value, and the Null-terminator\r
+  add up to Width characters.\r
+  If both COMMA_TYPE and HEX_RADIX are set in Flags, then ASSERT().\r
+\r
+  If Buffer is NULL, then ASSERT().\r
+  If unsupported bits are set in Flags, then ASSERT().\r
+  If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()\r
+\r
+  @param  Buffer    Pointer to the output buffer for the produced Null-terminated\r
+                    string.\r
+  @param  Flags     The bitmask of flags that specify left justification, zero pad,\r
+                    and commas.\r
+  @param  Value     The 64-bit signed value to convert to a string.\r
+  @param  Width     The maximum number of characters to place in Buffer, not including\r
+                    the Null-terminator.\r
+  @param  Increment Character increment in Buffer.\r
+  \r
+  @return The number of characters in Buffer not including the Null-terminator.\r
+\r
+**/\r
+UINTN\r
+BasePrintLibConvertValueToString (\r
+  IN OUT CHAR8   *Buffer,\r
+  IN UINTN       Flags,\r
+  IN INT64       Value,\r
+  IN UINTN       Width,\r
+  IN UINTN       Increment\r
+  )\r
+{\r
+  CHAR8  *OriginalBuffer;\r
+  CHAR8  *EndBuffer;\r
+  CHAR8  ValueBuffer[MAXIMUM_VALUE_CHARACTERS];\r
+  UINTN  Count;\r
+  UINTN  Digits;\r
+  UINTN  Index;\r
+  UINTN  Radix;\r
+\r
+  ASSERT (Buffer != NULL);\r
+  ASSERT (Width < MAXIMUM_VALUE_CHARACTERS);\r
+  //\r
+  // Make sure Flags can only contain supported bits.\r
+  //\r
+  ASSERT ((Flags & ~(LEFT_JUSTIFY | COMMA_TYPE | PREFIX_ZERO | RADIX_HEX)) == 0);\r
+\r
+  //\r
+  // If both COMMA_TYPE and HEX_RADIX are set, then ASSERT ()\r
+  //\r
+  ASSERT (((Flags & COMMA_TYPE) != 0 && (Flags & RADIX_HEX) != 0) == FALSE);\r
+\r
+  OriginalBuffer = Buffer;\r
+\r
+  if (Width == 0 || (Flags & COMMA_TYPE) != 0) {\r
+    Flags &= (~PREFIX_ZERO);\r
+  }\r
+\r
+  if (Width == 0) {\r
+    Width = MAXIMUM_VALUE_CHARACTERS - 1;\r
+  }\r
+  //\r
+  // Set the tag for the end of the input Buffer.\r
+  //\r
+  EndBuffer = Buffer + Width * Increment;\r
+\r
+  if ((Value < 0) && ((Flags & RADIX_HEX) == 0)) {\r
+    Value = -Value;\r
+    Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, '-', Increment);\r
+    Width--;\r
+  }\r
+\r
+  Radix = ((Flags & RADIX_HEX) == 0)? 10 : 16;\r
+  Count = BasePrintLibValueToString (ValueBuffer, Value, Radix);\r
+\r
+  if ((Flags & PREFIX_ZERO) != 0) {\r
+    Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, Width - Count, '0', Increment);\r
+  }\r
+\r
+  Digits = Count % 3;\r
+  if (Digits != 0) {\r
+    Digits = 3 - Digits;\r
+  }\r
+  for (Index = 0; Index < Count; Index++) {\r
+    Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ValueBuffer[Count - Index], Increment);\r
+    if ((Flags & COMMA_TYPE) != 0) {\r
+      Digits++;\r
+      if (Digits == 3) {\r
+        Digits = 0;\r
+        if ((Index + 1) < Count) {\r
+          Buffer = BasePrintLibFillBuffer (Buffer, EndBuffer, 1, ',', Increment);\r
+        }\r
+      }\r
+    }\r
+  }\r
+\r
+  BasePrintLibFillBuffer (Buffer, EndBuffer + Increment, 1, 0, Increment);\r
+\r
+  return ((Buffer - OriginalBuffer) / Increment);\r
+}\r
+\r

diff --git a/MdePkg/Library/BasePrintLib/PrintLibInternal.h b/MdePkg/Library/BasePrintLib/PrintLibInternal.h
new file mode 100644 (file)
index 0000000..164de3c
--- /dev/null
+++ b/MdePkg/Library/BasePrintLib/PrintLibInternal.h
@@ -0,0 +1,206 @@
+/** @file\r
+  Print Library Internal Functions.\r
+\r
+  Copyright (c) 2006 - 2007, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  PrintLibInternal.h\r
+\r
+**/\r
+\r
+#ifndef __PRINT_LIB_INTERNAL_H\r
+#define __PRINT_LIB_INTERNAL_H\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+//\r
+// Print primitives\r
+//\r
+//#define LEFT_JUSTIFY      0x01\r
+#define PREFIX_SIGN       0x02\r
+#define PREFIX_BLANK      0x04\r
+//#define COMMA_TYPE        0x08\r
+#define LONG_TYPE         0x10\r
+//#define PREFIX_ZERO       0x20\r
+#define OUTPUT_UNICODE    0x40\r
+//#define RADIX_HEX         0x80\r
+#define FORMAT_UNICODE    0x100\r
+#define PAD_TO_WIDTH      0x200\r
+#define ARGUMENT_UNICODE  0x400\r
+#define PRECISION         0x800\r
+#define ARGUMENT_REVERSED 0x1000\r
+\r
+//\r
+// Record date and time information\r
+//\r
+typedef struct {\r
+  UINT16  Year;\r
+  UINT8   Month;\r
+  UINT8   Day;\r
+  UINT8   Hour;\r
+  UINT8   Minute;\r
+  UINT8   Second;\r
+  UINT8   Pad1;\r
+  UINT32  Nanosecond;\r
+  INT16   TimeZone;\r
+  UINT8   Daylight;\r
+  UINT8   Pad2;\r
+} TIME;\r
+\r
+/**\r
+  Worker function that produces a Null-terminated string in an output buffer \r
+  based on a Null-terminated format string and a VA_LIST argument list.\r
+\r
+  VSPrint function to process format and place the results in Buffer. Since a \r
+  VA_LIST is used this rountine allows the nesting of Vararg routines. Thus \r
+  this is the main print working routine.\r
+\r
+  @param  Buffer      Character buffer to print the results of the parsing\r
+                      of Format into.\r
+  @param  BufferSize  Maximum number of characters to put into buffer.\r
+  @param  Flags       Intial flags value.\r
+                      Can only have FORMAT_UNICODE and OUTPUT_UNICODE set.\r
+  @param  Format      Null-terminated format string.\r
+  @param  Marker      Vararg list consumed by processing Format.\r
+\r
+  @return Number of characters printed not including the Null-terminator.\r
+\r
+**/\r
+UINTN\r
+BasePrintLibVSPrint (\r
+  OUT CHAR8        *Buffer,\r
+  IN  UINTN        BufferSize,\r
+  IN  UINTN        Flags,\r
+  IN  CONST CHAR8  *Format,\r
+  IN  VA_LIST      Marker\r
+  );\r
+\r
+/**\r
+  Worker function that produces a Null-terminated string in an output buffer \r
+  based on a Null-terminated format string and variable argument list.\r
+\r
+  VSPrint function to process format and place the results in Buffer. Since a \r
+  VA_LIST is used this rountine allows the nesting of Vararg routines. Thus \r
+  this is the main print working routine\r
+\r
+  @param  Buffer        Character buffer to print the results of the parsing\r
+                        of Format into.\r
+  @param  BufferSize    Maximum number of characters to put into buffer.\r
+                        Zero means no limit.\r
+  @param  Flags         Intial flags value.\r
+                        Can only have FORMAT_UNICODE and OUTPUT_UNICODE set\r
+  @param  FormatString  Null-terminated format string.\r
+\r
+  @return Number of characters printed.\r
+\r
+**/\r
+UINTN\r
+BasePrintLibSPrint (\r
+  OUT CHAR8        *Buffer,\r
+  IN  UINTN        BufferSize,\r
+  IN  UINTN        Flags,\r
+  IN  CONST CHAR8  *FormatString,\r
+  ...\r
+  );\r
+\r
+/**\r
+  Internal function that places the character into the Buffer.\r
+\r
+  Internal function that places ASCII or Unicode character into the Buffer.\r
+\r
+  @param  Buffer      Buffer to place the Unicode or ASCII string.\r
+  @param  EndBuffer   The end of the input Buffer. No characters will be\r
+                      placed after that. \r
+  @param  Length      Count of character to be placed into Buffer.\r
+  @param  Character   Character to be placed into Buffer.\r
+  @param  Increment   Character increment in Buffer.\r
+\r
+  @return Number of characters printed.\r
+\r
+**/\r
+CHAR8 *\r
+BasePrintLibFillBuffer (\r
+  CHAR8   *Buffer,\r
+  CHAR8   *EndBuffer,\r
+  INTN    Length,\r
+  UINTN   Character,\r
+  INTN    Increment\r
+  );\r
+\r
+/**\r
+  Internal function that convert a decimal number to a string in Buffer.\r
+\r
+  Print worker function that convert a decimal number to a string in Buffer.\r
+\r
+  @param  Buffer    Location to place the Unicode or ASCII string of Value.\r
+  @param  Value     Value to convert to a Decimal or Hexidecimal string in Buffer.\r
+  @param  Radix     Radix of the value\r
+\r
+  @return Number of characters printed.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+BasePrintLibValueToString (\r
+  IN OUT CHAR8  *Buffer, \r
+  IN INT64      Value, \r
+  IN UINTN      Radix\r
+  );\r
+\r
+/**\r
+  Internal function that converts a decimal value to a Null-terminated string.\r
+  \r
+  Converts the decimal number specified by Value to a Null-terminated  \r
+  string specified by Buffer containing at most Width characters.\r
+  If Width is 0 then a width of  MAXIMUM_VALUE_CHARACTERS is assumed.\r
+  The total number of characters placed in Buffer is returned.\r
+  If the conversion contains more than Width characters, then only the first\r
+  Width characters are returned, and the total number of characters \r
+  required to perform the conversion is returned.\r
+  Additional conversion parameters are specified in Flags.  \r
+  The Flags bit LEFT_JUSTIFY is always ignored.\r
+  All conversions are left justified in Buffer.\r
+  If Width is 0, PREFIX_ZERO is ignored in Flags.\r
+  If COMMA_TYPE is set in Flags, then PREFIX_ZERO is ignored in Flags, and commas\r
+  are inserted every 3rd digit starting from the right.\r
+  If Value is < 0, then the fist character in Buffer is a '-'.\r
+  If PREFIX_ZERO is set in Flags and PREFIX_ZERO is not being ignored, \r
+  then Buffer is padded with '0' characters so the combination of the optional '-' \r
+  sign character, '0' characters, digit characters for Value, and the Null-terminator\r
+  add up to Width characters.\r
+\r
+  If Buffer is NULL, then ASSERT().\r
+  If unsupported bits are set in Flags, then ASSERT().\r
+  If Width >= MAXIMUM_VALUE_CHARACTERS, then ASSERT()\r
+\r
+  @param  Buffer    Pointer to the output buffer for the produced Null-terminated\r
+                    string.\r
+  @param  Flags     The bitmask of flags that specify left justification, zero pad,\r
+                    and commas.\r
+  @param  Value     The 64-bit signed value to convert to a string.\r
+  @param  Width     The maximum number of characters to place in Buffer, not including\r
+                    the Null-terminator.\r
+  @param  Increment Character increment in Buffer.\r
+  \r
+  @return Total number of characters required to perform the conversion.\r
+\r
+**/\r
+UINTN\r
+BasePrintLibConvertValueToString (\r
+  IN OUT CHAR8   *Buffer,\r
+  IN UINTN       Flags,\r
+  IN INT64       Value,\r
+  IN UINTN       Width,\r
+  IN UINTN       Increment\r
+  );\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
new file mode 100644 (file)
index 0000000..5a48211
--- /dev/null
+++ b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf
@@ -0,0 +1,83 @@
+#/** @file\r
+# Timer library NULL template implementaton\r
+#\r
+# A non-functional instance of the Timer Library that can be used as a template\r
+#  for the implementation of a functional timer library instance. This library instance can\r
+#  also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer\r
+#  services as well as EBC modules that require timer services\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseTimerLibNullTemplate\r
+  FILE_GUID                      = f4731d79-537e-4505-bd52-c03f9b1f6b89\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = TimerLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  TimerLibNull.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  DebugLib\r
+\r

diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.msa b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.msa
new file mode 100644 (file)
index 0000000..6861a9f
--- /dev/null
+++ b/MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.msa
@@ -0,0 +1,45 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">\r
+  <MsaHeader>\r
+    <ModuleName>BaseTimerLibNullTemplate</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>f4731d79-537e-4505-bd52-c03f9b1f6b89</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Timer library NULL template implementaton</Abstract>\r
+    <Description>A non-functional instance of the Timer Library that can be used as a template\r
+      for the implementation of a functional timer library instance. This library instance can\r
+      also be used to test build DXE, Runtime, DXE SAL, and DXE SMM modules that require timer\r
+      services as well as EBC modules that require timer services</Description>\r
+    <Copyright>Copyright (c) 2007, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials
+      are licensed and made available under the terms and conditions of the BSD License
+      which accompanies this distribution.  The full text of the license may be found at
+      http://opensource.org/licenses/bsd-license.php
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BaseTimerLibNullTemplate</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>TimerLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>TimerLibNull.c</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/CommonHeader.h b/MdePkg/Library/BaseTimerLibNullTemplate/CommonHeader.h
new file mode 100644 (file)
index 0000000..c65882c
--- /dev/null
+++ b/MdePkg/Library/BaseTimerLibNullTemplate/CommonHeader.h
@@ -0,0 +1,32 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/TimerLib.h>\r
+#include <Library/DebugLib.h>\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseTimerLibNullTemplate/TimerLibNull.c b/MdePkg/Library/BaseTimerLibNullTemplate/TimerLibNull.c
new file mode 100644 (file)
index 0000000..caca0c3
--- /dev/null
+++ b/MdePkg/Library/BaseTimerLibNullTemplate/TimerLibNull.c
@@ -0,0 +1,116 @@
+/** @file\r
+  A non-functional instance of the Timer Library.\r
+\r
+  Copyright (c) 2007, Intel Corporation<BR>\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  TimerLibNull.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+/**\r
+  Stalls the CPU for at least the given number of microseconds.\r
+\r
+  Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
+\r
+  @param  MicroSeconds  The minimum number of microseconds to delay.\r
+\r
+  @return MicroSeconds\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+MicroSecondDelay (\r
+  IN      UINTN                     MicroSeconds\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return MicroSeconds;\r
+}\r
+\r
+/**\r
+  Stalls the CPU for at least the given number of nanoseconds.\r
+\r
+  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
+\r
+  @param  NanoSeconds The minimum number of nanoseconds to delay.\r
+\r
+  @return NanoSeconds\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+NanoSecondDelay (\r
+  IN      UINTN                     NanoSeconds\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return 0;\r
+}\r
+\r
+/**\r
+  Retrieves the current value of a 64-bit free running performance counter.\r
+\r
+  Retrieves the current value of a 64-bit free running performance counter. The\r
+  counter can either count up by 1 or count down by 1. If the physical\r
+  performance counter counts by a larger increment, then the counter values\r
+  must be translated. The properties of the counter can be retrieved from\r
+  GetPerformanceCounterProperties().\r
+\r
+  @return The current value of the free running performance counter.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+GetPerformanceCounter (\r
+  VOID\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return 0;\r
+}\r
+\r
+/**\r
+  Retrieves the 64-bit frequency in Hz and the range of performance counter\r
+  values.\r
+\r
+  If StartValue is not NULL, then the value that the performance counter starts\r
+  with immediately after is it rolls over is returned in StartValue. If\r
+  EndValue is not NULL, then the value that the performance counter end with\r
+  immediately before it rolls over is returned in EndValue. The 64-bit\r
+  frequency of the performance counter in Hz is always returned. If StartValue\r
+  is less than EndValue, then the performance counter counts up. If StartValue\r
+  is greater than EndValue, then the performance counter counts down. For\r
+  example, a 64-bit free running counter that counts up would have a StartValue\r
+  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
+  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
+\r
+  @param  StartValue  The value the performance counter starts with when it\r
+                      rolls over.\r
+  @param  EndValue    The value that the performance counter ends with before\r
+                      it rolls over.\r
+\r
+  @return The frequency in Hz.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+GetPerformanceCounterProperties (\r
+  OUT      UINT64                    *StartValue,  OPTIONAL\r
+  OUT      UINT64                    *EndValue     OPTIONAL\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+  return 0;\r
+}\r

diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c
new file mode 100644 (file)
index 0000000..15917a1
--- /dev/null
+++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.c
@@ -0,0 +1,800 @@
+/** @file\r
+  UEFI Decompress Library.\r
+\r
+  Copyright (c) 2006, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  UefiDecompressLib.c\r
+\r
+**/\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+#include "BaseUefiDecompressLibInternals.h"\r
+\r
+/**\r
+  Read NumOfBit of bits from source into mBitBuf\r
+\r
+  Shift mBitBuf NumOfBits left. Read in NumOfBits of bits from source.\r
+\r
+  @param  Sd        The global scratch data\r
+  @param  NumOfBits The number of bits to shift and read.\r
+\r
+**/\r
+VOID\r
+FillBuf (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        NumOfBits\r
+  )\r
+{\r
+  //\r
+  // Left shift NumOfBits of bits in advance\r
+  //\r
+  Sd->mBitBuf = (UINT32) (Sd->mBitBuf << NumOfBits);\r
+\r
+  //\r
+  // Copy data needed in bytes into mSbuBitBuf\r
+  //\r
+  while (NumOfBits > Sd->mBitCount) {\r
+\r
+    Sd->mBitBuf |= (UINT32) (Sd->mSubBitBuf << (NumOfBits = (UINT16) (NumOfBits - Sd->mBitCount)));\r
+\r
+    if (Sd->mCompSize > 0) {\r
+      //\r
+      // Get 1 byte into SubBitBuf\r
+      //\r
+      Sd->mCompSize--;\r
+      Sd->mSubBitBuf  = Sd->mSrcBase[Sd->mInBuf++];\r
+      Sd->mBitCount   = 8;\r
+\r
+    } else {\r
+      //\r
+      // No more bits from the source, just pad zero bit.\r
+      //\r
+      Sd->mSubBitBuf  = 0;\r
+      Sd->mBitCount   = 8;\r
+\r
+    }\r
+  }\r
+\r
+  //\r
+  // Caculate additional bit count read to update mBitCount\r
+  //\r
+  Sd->mBitCount = (UINT16) (Sd->mBitCount - NumOfBits);\r
+  \r
+  //\r
+  // Copy NumOfBits of bits from mSubBitBuf into mBitBuf\r
+  //\r
+  Sd->mBitBuf |= Sd->mSubBitBuf >> Sd->mBitCount;\r
+}\r
+\r
+/**\r
+  Get NumOfBits of bits out from mBitBuf\r
+\r
+  Get NumOfBits of bits out from mBitBuf. Fill mBitBuf with subsequent \r
+  NumOfBits of bits from source. Returns NumOfBits of bits that are \r
+  popped out.\r
+\r
+  @param  Sd        The global scratch data.\r
+  @param  NumOfBits The number of bits to pop and read.\r
+\r
+  @return The bits that are popped out.\r
+\r
+**/\r
+UINT32\r
+GetBits (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        NumOfBits\r
+  )\r
+{\r
+  UINT32  OutBits;\r
+\r
+  //\r
+  // Pop NumOfBits of Bits from Left\r
+  //  \r
+  OutBits = (UINT32) (Sd->mBitBuf >> (BITBUFSIZ - NumOfBits));\r
+\r
+  //\r
+  // Fill up mBitBuf from source\r
+  //\r
+  FillBuf (Sd, NumOfBits);\r
+\r
+  return OutBits;\r
+}\r
+\r
+/**\r
+  Creates Huffman Code mapping table according to code length array.\r
+\r
+  Creates Huffman Code mapping table for Extra Set, Char&Len Set \r
+  and Position Set according to code length array.\r
+\r
+  @param  Sd        The global scratch data\r
+  @param  NumOfChar Number of symbols in the symbol set\r
+  @param  BitLen    Code length array\r
+  @param  TableBits The width of the mapping table\r
+  @param  Table     The table\r
+\r
+  @retval  0 OK.\r
+  @retval  BAD_TABLE The table is corrupted.\r
+\r
+**/\r
+UINT16\r
+MakeTable (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        NumOfChar,\r
+  IN  UINT8         *BitLen,\r
+  IN  UINT16        TableBits,\r
+  OUT UINT16        *Table\r
+  )\r
+{\r
+  UINT16  Count[17];\r
+  UINT16  Weight[17];\r
+  UINT16  Start[18];\r
+  UINT16  *Pointer;\r
+  UINT16  Index3;\r
+  volatile UINT16  Index;\r
+  UINT16  Len;\r
+  UINT16  Char;\r
+  UINT16  JuBits;\r
+  UINT16  Avail;\r
+  UINT16  NextCode;\r
+  UINT16  Mask;\r
+  UINT16  WordOfStart;\r
+  UINT16  WordOfCount;\r
+\r
+\r
+  for (Index = 1; Index <= 16; Index++) {\r
+    Count[Index] = 0;\r
+  }\r
+\r
+  for (Index = 0; Index < NumOfChar; Index++) {\r
+    Count[BitLen[Index]]++;\r
+  }\r
+\r
+  Start[1] = 0;\r
+\r
+  for (Index = 1; Index <= 16; Index++) {\r
+    WordOfStart = Start[Index];\r
+    WordOfCount = Count[Index];\r
+    Start[Index + 1] = (UINT16) (WordOfStart + (WordOfCount << (16 - Index)));\r
+  }\r
+\r
+  if (Start[17] != 0) {\r
+    /*(1U << 16)*/\r
+    return (UINT16) BAD_TABLE;\r
+  }\r
+\r
+  JuBits = (UINT16) (16 - TableBits);\r
+\r
+  for (Index = 1; Index <= TableBits; Index++) {\r
+    Start[Index] >>= JuBits;\r
+    Weight[Index] = (UINT16) (1U << (TableBits - Index));\r
+  }\r
+\r
+  while (Index <= 16) {\r
+    Weight[Index] = (UINT16) (1U << (16 - Index));\r
+    Index++;    \r
+  }\r
+\r
+  Index = (UINT16) (Start[TableBits + 1] >> JuBits);\r
+\r
+  if (Index != 0) {\r
+    Index3 = (UINT16) (1U << TableBits);\r
+    while (Index != Index3) {\r
+      Table[Index++] = 0;\r
+    }\r
+  }\r
+\r
+  Avail = NumOfChar;\r
+  Mask  = (UINT16) (1U << (15 - TableBits));\r
+\r
+  for (Char = 0; Char < NumOfChar; Char++) {\r
+\r
+    Len = BitLen[Char];\r
+    if (Len == 0) {\r
+      continue;\r
+    }\r
+\r
+    NextCode = (UINT16) (Start[Len] + Weight[Len]);\r
+\r
+    if (Len <= TableBits) {\r
+\r
+      for (Index = Start[Len]; Index < NextCode; Index++) {\r
+        Table[Index] = Char;\r
+      }\r
+\r
+    } else {\r
+\r
+      Index3  = Start[Len];\r
+      Pointer = &Table[Index3 >> JuBits];\r
+      Index   = (UINT16) (Len - TableBits);\r
+\r
+      while (Index != 0) {\r
+        if (*Pointer == 0) {\r
+          Sd->mRight[Avail]                     = Sd->mLeft[Avail] = 0;\r
+          *Pointer = Avail++;\r
+        }\r
+\r
+        if (Index3 & Mask) {\r
+          Pointer = &Sd->mRight[*Pointer];\r
+        } else {\r
+          Pointer = &Sd->mLeft[*Pointer];\r
+        }\r
+\r
+        Index3 <<= 1;\r
+        Index--;\r
+      }\r
+\r
+      *Pointer = Char;\r
+\r
+    }\r
+\r
+    Start[Len] = NextCode;\r
+  }\r
+  //\r
+  // Succeeds\r
+  //\r
+  return 0;\r
+}\r
+\r
+/**\r
+  Decodes a position value.\r
+\r
+  Get a position value according to Position Huffman Table.\r
+  \r
+  @param  Sd the global scratch data\r
+\r
+  @return The position value decoded.\r
+\r
+**/\r
+UINT32\r
+DecodeP (\r
+  IN  SCRATCH_DATA  *Sd\r
+  )\r
+{\r
+  UINT16  Val;\r
+  UINT32  Mask;\r
+  UINT32  Pos;\r
+\r
+  Val = Sd->mPTTable[Sd->mBitBuf >> (BITBUFSIZ - 8)];\r
+\r
+  if (Val >= MAXNP) {\r
+    Mask = 1U << (BITBUFSIZ - 1 - 8);\r
+\r
+    do {\r
+\r
+      if (Sd->mBitBuf & Mask) {\r
+        Val = Sd->mRight[Val];\r
+      } else {\r
+        Val = Sd->mLeft[Val];\r
+      }\r
+\r
+      Mask >>= 1;\r
+    } while (Val >= MAXNP);\r
+  }\r
+  //\r
+  // Advance what we have read\r
+  //\r
+  FillBuf (Sd, Sd->mPTLen[Val]);\r
+\r
+  Pos = Val;\r
+  if (Val > 1) {\r
+    Pos = (UINT32) ((1U << (Val - 1)) + GetBits (Sd, (UINT16) (Val - 1)));\r
+  }\r
+\r
+  return Pos;\r
+}\r
+\r
+/**\r
+  Reads code lengths for the Extra Set or the Position Set.\r
+\r
+  Read in the Extra Set or Pointion Set Length Arrary, then\r
+  generate the Huffman code mapping for them.\r
+\r
+  @param  Sd      The global scratch data.\r
+  @param  nn      Number of symbols.\r
+  @param  nbit    Number of bits needed to represent nn.\r
+  @param  Special The special symbol that needs to be taken care of.\r
+\r
+  @retval  0 OK.\r
+  @retval  BAD_TABLE Table is corrupted.\r
+\r
+**/\r
+UINT16\r
+ReadPTLen (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        nn,\r
+  IN  UINT16        nbit,\r
+  IN  UINT16        Special\r
+  )\r
+{\r
+  UINT16  Number;\r
+  UINT16  CharC;\r
+  volatile UINT16  Index;\r
+  UINT32  Mask;\r
+\r
+  //\r
+  // Read Extra Set Code Length Array size \r
+  //\r
+  Number = (UINT16) GetBits (Sd, nbit);\r
+\r
+  if (Number == 0) {\r
+    //\r
+    // This represents only Huffman code used\r
+    //\r
+    CharC = (UINT16) GetBits (Sd, nbit);\r
+\r
+    for (Index = 0; Index < 256; Index++) {\r
+      Sd->mPTTable[Index] = CharC;\r
+    }\r
+\r
+    for (Index = 0; Index < nn; Index++) {\r
+      Sd->mPTLen[Index] = 0;\r
+    }\r
+\r
+    return 0;\r
+  }\r
+\r
+  Index = 0;\r
+\r
+  while (Index < Number) {\r
+\r
+    CharC = (UINT16) (Sd->mBitBuf >> (BITBUFSIZ - 3));\r
+\r
+    //\r
+    // If a code length is less than 7, then it is encoded as a 3-bit\r
+    // value. Or it is encoded as a series of "1"s followed by a \r
+    // terminating "0". The number of "1"s = Code length - 4.\r
+    //\r
+    if (CharC == 7) {\r
+      Mask = 1U << (BITBUFSIZ - 1 - 3);\r
+      while (Mask & Sd->mBitBuf) {\r
+        Mask >>= 1;\r
+        CharC += 1;\r
+      }\r
+    }\r
+    \r
+    FillBuf (Sd, (UINT16) ((CharC < 7) ? 3 : CharC - 3));\r
+\r
+    Sd->mPTLen[Index++] = (UINT8) CharC;\r
+ \r
+    //\r
+    // For Code&Len Set, \r
+    // After the third length of the code length concatenation,\r
+    // a 2-bit value is used to indicated the number of consecutive \r
+    // zero lengths after the third length.\r
+    //\r
+    if (Index == Special) {\r
+      CharC = (UINT16) GetBits (Sd, 2);\r
+      while ((INT16) (--CharC) >= 0) {\r
+        Sd->mPTLen[Index++] = 0;\r
+      }\r
+    }\r
+  }\r
+\r
+  while (Index < nn) {\r
+    Sd->mPTLen[Index++] = 0;\r
+  }\r
+  \r
+  return MakeTable (Sd, nn, Sd->mPTLen, 8, Sd->mPTTable);\r
+}\r
+\r
+/**\r
+  Reads code lengths for Char&Len Set.\r
+  \r
+  Read in and decode the Char&Len Set Code Length Array, then\r
+  generate the Huffman Code mapping table for the Char&Len Set.\r
+\r
+  @param  Sd the global scratch data\r
+\r
+**/\r
+VOID\r
+ReadCLen (\r
+  SCRATCH_DATA  *Sd\r
+  )\r
+{\r
+  UINT16           Number;\r
+  UINT16           CharC;\r
+  volatile UINT16  Index;\r
+  UINT32           Mask;\r
+\r
+  Number = (UINT16) GetBits (Sd, CBIT);\r
+\r
+  if (Number == 0) {\r
+    //\r
+    // This represents only Huffman code used\r
+    //\r
+    CharC = (UINT16) GetBits (Sd, CBIT);\r
+\r
+    for (Index = 0; Index < NC; Index++) {\r
+      Sd->mCLen[Index] = 0;\r
+    }\r
+\r
+    for (Index = 0; Index < 4096; Index++) {\r
+      Sd->mCTable[Index] = CharC;\r
+    }\r
+\r
+    return ;\r
+  }\r
+\r
+  Index = 0;\r
+  while (Index < Number) {\r
+    CharC = Sd->mPTTable[Sd->mBitBuf >> (BITBUFSIZ - 8)];\r
+    if (CharC >= NT) {\r
+      Mask = 1U << (BITBUFSIZ - 1 - 8);\r
+\r
+      do {\r
+\r
+        if (Mask & Sd->mBitBuf) {\r
+          CharC = Sd->mRight[CharC];\r
+        } else {\r
+          CharC = Sd->mLeft[CharC];\r
+        }\r
+\r
+        Mask >>= 1;\r
+\r
+      } while (CharC >= NT);\r
+    }\r
+    //\r
+    // Advance what we have read\r
+    //\r
+    FillBuf (Sd, Sd->mPTLen[CharC]);\r
+\r
+    if (CharC <= 2) {\r
+\r
+      if (CharC == 0) {\r
+        CharC = 1;\r
+      } else if (CharC == 1) {\r
+        CharC = (UINT16) (GetBits (Sd, 4) + 3);\r
+      } else if (CharC == 2) {\r
+        CharC = (UINT16) (GetBits (Sd, CBIT) + 20);\r
+      }\r
+\r
+      while ((INT16) (--CharC) >= 0) {\r
+        Sd->mCLen[Index++] = 0;\r
+      }\r
+\r
+    } else {\r
+\r
+      Sd->mCLen[Index++] = (UINT8) (CharC - 2);\r
+\r
+    }\r
+  }\r
+\r
+  while (Index < NC) {\r
+    Sd->mCLen[Index++] = 0;\r
+  }\r
+\r
+  MakeTable (Sd, NC, Sd->mCLen, 12, Sd->mCTable);\r
+\r
+  return ;\r
+}\r
+\r
+/**\r
+  Decode a character/length value.\r
+  \r
+  Read one value from mBitBuf, Get one code from mBitBuf. If it is at block boundary, generates\r
+  Huffman code mapping table for Extra Set, Code&Len Set and\r
+  Position Set.\r
+\r
+  @param  Sd The global scratch data.\r
+\r
+  @return The value decoded.\r
+\r
+**/\r
+UINT16\r
+DecodeC (\r
+  SCRATCH_DATA  *Sd\r
+  )\r
+{\r
+  UINT16  Index2;\r
+  UINT32  Mask;\r
+\r
+  if (Sd->mBlockSize == 0) {\r
+    //\r
+    // Starting a new block\r
+    // Read BlockSize from block header\r
+    // \r
+    Sd->mBlockSize    = (UINT16) GetBits (Sd, 16);\r
+\r
+    //\r
+    // Read in the Extra Set Code Length Arrary,\r
+    // Generate the Huffman code mapping table for Extra Set.\r
+    //\r
+    Sd->mBadTableFlag = ReadPTLen (Sd, NT, TBIT, 3);\r
+    if (Sd->mBadTableFlag != 0) {\r
+      return 0;\r
+    }\r
+\r
+    //\r
+    // Read in and decode the Char&Len Set Code Length Arrary,\r
+    // Generate the Huffman code mapping table for Char&Len Set.\r
+    //\r
+    ReadCLen (Sd);\r
+\r
+    //\r
+    // Read in the Position Set Code Length Arrary, \r
+    // Generate the Huffman code mapping table for the Position Set.\r
+    //\r
+    Sd->mBadTableFlag = ReadPTLen (Sd, MAXNP, Sd->mPBit, (UINT16) (-1));\r
+    if (Sd->mBadTableFlag != 0) {\r
+      return 0;\r
+    }\r
+  }\r
+\r
+  //\r
+  // Get one code according to Code&Set Huffman Table\r
+  //\r
+  Sd->mBlockSize--;\r
+  Index2 = Sd->mCTable[Sd->mBitBuf >> (BITBUFSIZ - 12)];\r
+\r
+  if (Index2 >= NC) {\r
+    Mask = 1U << (BITBUFSIZ - 1 - 12);\r
+\r
+    do {\r
+      if (Sd->mBitBuf & Mask) {\r
+        Index2 = Sd->mRight[Index2];\r
+      } else {\r
+        Index2 = Sd->mLeft[Index2];\r
+      }\r
+\r
+      Mask >>= 1;\r
+    } while (Index2 >= NC);\r
+  }\r
+  //\r
+  // Advance what we have read\r
+  //\r
+  FillBuf (Sd, Sd->mCLen[Index2]);\r
+\r
+  return Index2;\r
+}\r
+\r
+/**\r
+  Decode the source data and put the resulting data into the destination buffer.\r
+\r
+  Decode the source data and put the resulting data into the destination buffer.\r
+  \r
+  @param  Sd The global scratch data\r
+\r
+**/\r
+VOID\r
+Decode (\r
+  SCRATCH_DATA  *Sd\r
+  )\r
+{\r
+  UINT16  BytesRemain;\r
+  UINT32  DataIdx;\r
+  UINT16  CharC;\r
+\r
+  BytesRemain = (UINT16) (-1);\r
+\r
+  DataIdx     = 0;\r
+\r
+  for (;;) {\r
+    //\r
+    // Get one code from mBitBuf\r
+    // \r
+    CharC = DecodeC (Sd);\r
+    if (Sd->mBadTableFlag != 0) {\r
+      goto Done;\r
+    }\r
+\r
+    if (CharC < 256) {\r
+      //\r
+      // Process an Original character\r
+      //\r
+      if (Sd->mOutBuf >= Sd->mOrigSize) {\r
+        goto Done;\r
+      } else {\r
+        //\r
+        // Write orignal character into mDstBase\r
+        //\r
+        Sd->mDstBase[Sd->mOutBuf++] = (UINT8) CharC;\r
+      }\r
+\r
+    } else {\r
+      //\r
+      // Process a Pointer\r
+      //\r
+      CharC       = (UINT16) (CharC - (UINT8_MAX + 1 - THRESHOLD));\r
+ \r
+      //\r
+      // Get string length\r
+      //\r
+      BytesRemain = CharC;\r
+\r
+      //\r
+      // Locate string position\r
+      //\r
+      DataIdx     = Sd->mOutBuf - DecodeP (Sd) - 1;\r
+\r
+      //\r
+      // Write BytesRemain of bytes into mDstBase\r
+      //\r
+      BytesRemain--;\r
+      while ((INT16) (BytesRemain) >= 0) {\r
+        Sd->mDstBase[Sd->mOutBuf++] = Sd->mDstBase[DataIdx++];\r
+        if (Sd->mOutBuf >= Sd->mOrigSize) {\r
+          goto Done;\r
+        }\r
+\r
+        BytesRemain--;\r
+      }\r
+    }\r
+  }\r
+\r
+Done:\r
+  return ;\r
+}\r
+\r
+/**\r
+  Retrieves the size of the uncompressed buffer and the size of the scratch buffer.\r
+\r
+  Retrieves the size of the uncompressed buffer and the temporary scratch buffer \r
+  required to decompress the buffer specified by Source and SourceSize.\r
+  If the size of the uncompressed buffer or the size of the scratch buffer cannot\r
+  be determined from the compressed data specified by Source and SourceData, \r
+  then RETURN_INVALID_PARAMETER is returned.  Otherwise, the size of the uncompressed\r
+  buffer is returned in DestinationSize, the size of the scratch buffer is returned\r
+  in ScratchSize, and RETURN_SUCCESS is returned.\r
+  This function does not have scratch buffer available to perform a thorough \r
+  checking of the validity of the source data.  It just retrieves the "Original Size"\r
+  field from the beginning bytes of the source data and output it as DestinationSize.\r
+  And ScratchSize is specific to the decompression implementation.\r
+\r
+  If Source is NULL, then ASSERT().\r
+  If DestinationSize is NULL, then ASSERT().\r
+  If ScratchSize is NULL, then ASSERT().\r
+\r
+  @param  Source          The source buffer containing the compressed data.\r
+  @param  SourceSize      The size, in bytes, of the source buffer.\r
+  @param  DestinationSize A pointer to the size, in bytes, of the uncompressed buffer\r
+                          that will be generated when the compressed buffer specified\r
+                          by Source and SourceSize is decompressed..\r
+  @param  ScratchSize     A pointer to the size, in bytes, of the scratch buffer that\r
+                          is required to decompress the compressed buffer specified \r
+                          by Source and SourceSize.\r
+\r
+  @retval  RETURN_SUCCESS The size of destination buffer and the size of scratch \r
+                          buffer are successull retrieved.\r
+  @retval  RETURN_INVALID_PARAMETER The source data is corrupted\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+UefiDecompressGetInfo (\r
+  IN  CONST VOID  *Source,\r
+  IN  UINT32      SourceSize,\r
+  OUT UINT32      *DestinationSize,\r
+  OUT UINT32      *ScratchSize\r
+  )\r
+{\r
+  UINT32  CompressedSize;\r
+\r
+  ASSERT (Source != NULL);\r
+  ASSERT (DestinationSize != NULL);\r
+  ASSERT (ScratchSize != NULL);\r
+\r
+  *ScratchSize  = sizeof (SCRATCH_DATA);\r
+\r
+  if (SourceSize < 8) {\r
+    return RETURN_INVALID_PARAMETER;\r
+  }\r
+\r
+  CopyMem (&CompressedSize, Source, sizeof (UINT32));\r
+  CopyMem (DestinationSize, (VOID *)((UINT8 *)Source + 4), sizeof (UINT32));\r
+\r
+  if (SourceSize < (CompressedSize + 8)) {\r
+    return RETURN_INVALID_PARAMETER;\r
+  }\r
+\r
+  return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+  Decompresses a compressed source buffer.\r
+\r
+  This function is designed so that the decompression algorithm can be implemented\r
+  without using any memory services.  As a result, this function is not allowed to\r
+  call any memory allocation services in its implementation.  It is the caller's r\r
+  esponsibility to allocate and free the Destination and Scratch buffers.\r
+  If the compressed source data specified by Source is sucessfully decompressed \r
+  into Destination, then RETURN_SUCCESS is returned.  If the compressed source data \r
+  specified by Source is not in a valid compressed data format,\r
+  then RETURN_INVALID_PARAMETER is returned.\r
+\r
+  If Source is NULL, then ASSERT().\r
+  If Destination is NULL, then ASSERT().\r
+  If the required scratch buffer size > 0 and Scratch is NULL, then ASSERT().\r
+\r
+  @param  Source      The source buffer containing the compressed data.\r
+  @param  Destination The destination buffer to store the decompressed data\r
+  @param  Scratch     A temporary scratch buffer that is used to perform the decompression.\r
+                      This is an optional parameter that may be NULL if the \r
+                      required scratch buffer size is 0.\r
+                     \r
+  @retval  RETURN_SUCCESS Decompression is successfull\r
+  @retval  RETURN_INVALID_PARAMETER The source data is corrupted\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+UefiDecompress (\r
+  IN CONST VOID  *Source,\r
+  IN OUT VOID    *Destination,\r
+  IN OUT VOID    *Scratch\r
+  )\r
+{\r
+  volatile UINT32  Index;\r
+  UINT32           CompSize;\r
+  UINT32           OrigSize;\r
+  SCRATCH_DATA     *Sd;\r
+  CONST UINT8      *Src;\r
+  UINT8            *Dst;\r
+\r
+  ASSERT (Source != NULL);\r
+  ASSERT (Destination != NULL);\r
+  ASSERT (Scratch != NULL);\r
+\r
+  Src     = Source;\r
+  Dst     = Destination;\r
+\r
+  Sd = (SCRATCH_DATA *) Scratch;\r
+\r
+  CompSize  = Src[0] + (Src[1] << 8) + (Src[2] << 16) + (Src[3] << 24);\r
+  OrigSize  = Src[4] + (Src[5] << 8) + (Src[6] << 16) + (Src[7] << 24);\r
+\r
+  //\r
+  // If compressed file size is 0, return\r
+  //\r
+  if (OrigSize == 0) {\r
+    return RETURN_SUCCESS;\r
+  }\r
+\r
+  Src = Src + 8;\r
+\r
+  for (Index = 0; Index < sizeof (SCRATCH_DATA); Index++) {\r
+    ((UINT8 *) Sd)[Index] = 0;\r
+  }\r
+  //\r
+  // The length of the field 'Position Set Code Length Array Size' in Block Header.\r
+  // For EFI 1.1 de/compression algorithm(Version 1), mPBit = 4\r
+  // For Tiano de/compression algorithm(Version 2), mPBit = 5\r
+  //\r
+  Sd->mPBit     = 4;\r
+  Sd->mSrcBase  = (UINT8 *)Src;\r
+  Sd->mDstBase  = Dst;\r
+  //\r
+  // CompSize and OrigSize are caculated in bytes\r
+  //\r
+  Sd->mCompSize = CompSize;\r
+  Sd->mOrigSize = OrigSize;\r
+\r
+  //\r
+  // Fill the first BITBUFSIZ bits\r
+  //\r
+  FillBuf (Sd, BITBUFSIZ);\r
+\r
+  //\r
+  // Decompress it\r
+  //\r
+  Decode (Sd);\r
+\r
+  if (Sd->mBadTableFlag != 0) {\r
+    //\r
+    // Something wrong with the source\r
+    //\r
+    return RETURN_INVALID_PARAMETER;\r
+  }\r
+\r
+  return RETURN_SUCCESS;\r
+}\r

diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
new file mode 100644 (file)
index 0000000..979c95b
--- /dev/null
+++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
@@ -0,0 +1,82 @@
+#/** @file\r
+# Component description file for Base Uefi Decompress Library\r
+#\r
+# UEFI Decompress Library implementation.\r
+# Copyright (c) 2007, Intel Corporation.\r
+#\r
+#  All rights reserved. This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+################################################################################\r
+#\r
+# Defines Section - statements that will be processed to create a Makefile.\r
+#\r
+################################################################################\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = BaseUefiDecompressLib\r
+  FILE_GUID                      = 9ae5147d-b240-467f-a484-b024fdc42ee0\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = UefiDecompressLib \r
+  EDK_RELEASE_VERSION            = 0x00020000\r
+  EFI_SPECIFICATION_VERSION      = 0x00020000\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 IPF EBC\r
+#\r
+\r
+################################################################################\r
+#\r
+# Sources Section - list of files that are required for the build to succeed.\r
+#\r
+################################################################################\r
+\r
+[Sources.common]\r
+  BaseUefiDecompressLibInternals.h\r
+  BaseUefiDecompressLib.c\r
+  CommonHeader.h\r
+\r
+\r
+################################################################################\r
+#\r
+# Includes Section - list of Include locations that are required for\r
+#                    this module.\r
+#\r
+################################################################################\r
+\r
+[Includes]\r
+  $(WORKSPACE)/MdePkg\Include/Library\r
+\r
+################################################################################\r
+#\r
+# Package Dependency Section - list of Package files that are required for\r
+#                              this module.\r
+#\r
+################################################################################\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+\r
+\r
+################################################################################\r
+#\r
+# Library Class Section - list of Library Classes that are required for\r
+#                         this module.\r
+#\r
+################################################################################\r
+\r
+[LibraryClasses]\r
+  BaseMemoryLib\r
+  DebugLib\r
+\r

diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa
new file mode 100644 (file)
index 0000000..f8bfc3f
--- /dev/null
+++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.msa
@@ -0,0 +1,46 @@
+<?xml version="1.0" encoding="UTF-8"?>\r
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">\r
+  <MsaHeader>\r
+    <ModuleName>BaseUefiDecompressLib</ModuleName>\r
+    <ModuleType>BASE</ModuleType>\r
+    <GuidValue>9ae5147d-b240-467f-a484-b024fdc42ee0</GuidValue>\r
+    <Version>1.0</Version>\r
+    <Abstract>Component description file for Base Uefi Decompress Library</Abstract>\r
+    <Description>UEFI Decompress Library implementation.</Description>\r
+    <Copyright>Copyright (c) 2006, Intel Corporation.</Copyright>\r
+    <License>All rights reserved. This program and the accompanying materials
+      are licensed and made available under the terms and conditions of the BSD License
+      which accompanies this distribution.  The full text of the license may be found at
+      http://opensource.org/licenses/bsd-license.php
+      THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+      WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>\r
+    <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION   0x00000052</Specification>\r
+  </MsaHeader>\r
+  <ModuleDefinitions>\r
+    <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>\r
+    <BinaryModule>false</BinaryModule>\r
+    <OutputFileBasename>BaseUefiDecompressLib</OutputFileBasename>\r
+  </ModuleDefinitions>\r
+  <LibraryClassDefinitions>\r
+    <LibraryClass Usage="ALWAYS_PRODUCED">\r
+      <Keyword>UefiDecompressLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>DebugLib</Keyword>\r
+    </LibraryClass>\r
+    <LibraryClass Usage="ALWAYS_CONSUMED">\r
+      <Keyword>BaseMemoryLib</Keyword>\r
+    </LibraryClass>\r
+  </LibraryClassDefinitions>\r
+  <SourceFiles>\r
+    <Filename>BaseUefiDecompressLib.c</Filename>\r
+    <Filename>BaseUefiDecompressLibInternals.h</Filename>\r
+  </SourceFiles>\r
+  <PackageDependencies>\r
+    <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>\r
+  </PackageDependencies>\r
+  <Externs>\r
+    <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>\r
+    <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>\r
+  </Externs>\r
+</ModuleSurfaceArea>
\ No newline at end of file

diff --git a/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLibInternals.h b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLibInternals.h
new file mode 100644 (file)
index 0000000..f11df34
--- /dev/null
+++ b/MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLibInternals.h
@@ -0,0 +1,220 @@
+/** @file\r
+  Internal include file for Base UEFI Decompress Libary.\r
+\r
+  Copyright (c) 2006, Intel Corporation\r
+  All rights reserved. This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+  Module Name:  BaseUefiDecompressLibInternals.h\r
+\r
+**/\r
+\r
+#ifndef __BASE_UEFI_DECOMPRESS_LIB_INTERNALS_H__\r
+#define __BASE_UEFI_DECOMPRESS_LIB_INTERNALS_H__\r
+\r
+//\r
+// Include common header file for this module.\r
+//\r
+#include "CommonHeader.h"\r
+\r
+//\r
+// Decompression algorithm begins here\r
+//\r
+#define BITBUFSIZ 32\r
+#define MAXMATCH  256\r
+#define THRESHOLD 3\r
+#define CODE_BIT  16\r
+#define BAD_TABLE - 1\r
+\r
+//\r
+// C: Char&Len Set; P: Position Set; T: exTra Set\r
+//\r
+#define NC      (0xff + MAXMATCH + 2 - THRESHOLD)\r
+#define CBIT    9\r
+#define MAXPBIT 5\r
+#define TBIT    5\r
+#define MAXNP   ((1U << MAXPBIT) - 1)\r
+#define NT      (CODE_BIT + 3)\r
+#if NT > MAXNP\r
+#define NPT NT\r
+#else\r
+#define NPT MAXNP\r
+#endif\r
+\r
+typedef struct {\r
+  UINT8   *mSrcBase;  ///< Starting address of compressed data\r
+  UINT8   *mDstBase;  ///< Starting address of decompressed data\r
+  UINT32  mOutBuf;\r
+  UINT32  mInBuf;\r
+\r
+  UINT16  mBitCount;\r
+  UINT32  mBitBuf;\r
+  UINT32  mSubBitBuf;\r
+  UINT16  mBlockSize;\r
+  UINT32  mCompSize;\r
+  UINT32  mOrigSize;\r
+\r
+  UINT16  mBadTableFlag;\r
+\r
+  UINT16  mLeft[2 * NC - 1];\r
+  UINT16  mRight[2 * NC - 1];\r
+  UINT8   mCLen[NC];\r
+  UINT8   mPTLen[NPT];\r
+  UINT16  mCTable[4096];\r
+  UINT16  mPTTable[256];\r
+\r
+  ///\r
+  /// The length of the field 'Position Set Code Length Array Size' in Block Header.\r
+  /// For EFI 1.1 de/compression algorithm, mPBit = 4\r
+  /// For Tiano de/compression algorithm, mPBit = 5\r
+  ///\r
+  UINT8   mPBit;\r
+} SCRATCH_DATA;\r
+\r
+/**\r
+  Read NumOfBit of bits from source into mBitBuf\r
+\r
+  Shift mBitBuf NumOfBits left. Read in NumOfBits of bits from source.\r
+\r
+  @param  Sd        The global scratch data\r
+  @param  NumOfBits The number of bits to shift and read.\r
+\r
+**/\r
+VOID\r
+FillBuf (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        NumOfBits\r
+  );\r
+\r
+/**\r
+  Get NumOfBits of bits out from mBitBuf\r
+\r
+  Get NumOfBits of bits out from mBitBuf. Fill mBitBuf with subsequent \r
+  NumOfBits of bits from source. Returns NumOfBits of bits that are \r
+  popped out.\r
+\r
+  @param  Sd        The global scratch data.\r
+  @param  NumOfBits The number of bits to pop and read.\r
+\r
+  @return The bits that are popped out.\r
+\r
+**/\r
+UINT32\r
+GetBits (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        NumOfBits\r
+  );\r
+\r
+/**\r
+  Creates Huffman Code mapping table according to code length array.\r
+\r
+  Creates Huffman Code mapping table for Extra Set, Char&Len Set \r
+  and Position Set according to code length array.\r
+\r
+  @param  Sd        The global scratch data\r
+  @param  NumOfChar Number of symbols in the symbol set\r
+  @param  BitLen    Code length array\r
+  @param  TableBits The width of the mapping table\r
+  @param  Table     The table\r
+\r
+  @retval  0 OK.\r
+  @retval  BAD_TABLE The table is corrupted.\r
+\r
+**/\r
+UINT16\r
+MakeTable (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        NumOfChar,\r
+  IN  UINT8         *BitLen,\r
+  IN  UINT16        TableBits,\r
+  OUT UINT16        *Table\r
+  );\r
+\r
+/**\r
+  Decodes a position value.\r
+\r
+  Get a position value according to Position Huffman Table.\r
+  \r
+  @param  Sd the global scratch data\r
+\r
+  @return The position value decoded.\r
+\r
+**/\r
+UINT32\r
+DecodeP (\r
+  IN  SCRATCH_DATA  *Sd\r
+  );\r
+\r
+/**\r
+  Reads code lengths for the Extra Set or the Position Set.\r
+\r
+  Read in the Extra Set or Pointion Set Length Arrary, then\r
+  generate the Huffman code mapping for them.\r
+\r
+  @param  Sd      The global scratch data.\r
+  @param  nn      Number of symbols.\r
+  @param  nbit    Number of bits needed to represent nn.\r
+  @param  Special The special symbol that needs to be taken care of.\r
+\r
+  @retval  0 OK.\r
+  @retval  BAD_TABLE Table is corrupted.\r
+\r
+**/\r
+UINT16\r
+ReadPTLen (\r
+  IN  SCRATCH_DATA  *Sd,\r
+  IN  UINT16        nn,\r
+  IN  UINT16        nbit,\r
+  IN  UINT16        Special\r
+  );\r
+\r
+/**\r
+  Reads code lengths for Char&Len Set.\r
+  \r
+  Read in and decode the Char&Len Set Code Length Array, then\r
+  generate the Huffman Code mapping table for the Char&Len Set.\r
+\r
+  @param  Sd the global scratch data\r
+\r
+**/\r
+VOID\r
+ReadCLen (\r
+  SCRATCH_DATA  *Sd\r
+  );\r
+\r
+/**\r
+  Decode a character/length value.\r
+  \r
+  Read one value from mBitBuf, Get one code from mBitBuf. If it is at block boundary, generates\r
+  Huffman code mapping table for Extra Set, Code&Len Set and\r
+  Position Set.\r
+\r
+  @param  Sd The global scratch data.\r
+\r
+  @return The value decoded.\r
+\r
+**/\r
+UINT16\r
+DecodeC (\r
+  SCRATCH_DATA  *Sd\r
+  );\r
+\r
+/**\r
+  Decode the source data and put the resulting data into the destination buffer.\r
+\r
+  Decode the source data and put the resulting data into the destination buffer.\r
+  \r
+  @param  Sd The global scratch data\r
+\r
+**/\r
+VOID\r
+Decode (\r
+  SCRATCH_DATA  *Sd\r
+  );\r
+\r
+#endif\r

diff --git a/MdePkg/Library/BaseUefiDecompressLib/CommonHeader.h b/MdePkg/Library/BaseUefiDecompressLib/CommonHeader.h
new file mode 100644 (file)
index 0000000..38ef4e2
--- /dev/null
+++ b/MdePkg/Library/BaseUefiDecompressLib/CommonHeader.h
@@ -0,0 +1,33 @@
+/**@file\r
+  Common header file shared by all source files.\r
+\r
+  This file includes package header files, library classes and protocol, PPI & GUID definitions.\r
+\r
+  Copyright (c) 2007, Intel Corporation.\r
+  All rights reserved. This program and the accompanying materials\r
+   are licensed and made available under the terms and conditions of the BSD License\r
+   which accompanies this distribution. The full text of the license may be found at\r
+   http://opensource.org/licenses/bsd-license.php\r
+   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __COMMON_HEADER_H_\r
+#define __COMMON_HEADER_H_\r
+\r
+\r
+//\r
+// The package level header files this module uses\r
+//\r
+#include <Base.h>\r
+//\r
+// The protocols, PPI and GUID defintions for this module\r
+//\r
+//\r
+// The Library classes this module consumes\r
+//\r
+#include <Library/UefiDecompressLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+\r
+#endif\r