ArmPkg: Configure TTBCR register

Architecturally, the TTBCR register value is undefined at reset for
Non-Secure.
On some platforms the reset value for TTBCR is not zero and
this causes a data abort exception once the MMU is enabled.

This patch configures the TTBCR register to enable translation table
walk using TTBR0.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index 85fa1f600ba9e40fa09b74b75085ef7a5e7655ce..15f610d82e1dfc5c4c2fb8c32fe517b85b12e964 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -1,7 +1,7 @@
 /** @file\r
 \r
   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-  Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.<BR>\r
+  Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.<BR>\r
 \r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
@@ -353,6 +353,12 @@ ArmSetTTBR0 (
   IN  VOID  *TranslationTableBase\r
   );\r
 \r
+VOID\r
+EFIAPI\r
+ArmSetTTBCR (\r
+  IN  UINT32 Bits\r
+  );\r
+\r
 VOID *\r
 EFIAPI\r
 ArmGetTTBR0BaseAddress (\r

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
index fc8ea42843b382509b107b9e10e5268793592414..74a7c177df6cef680ab2395a30d5ce42efd73fb0 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Mmu.c
@@ -1,7 +1,7 @@
 /** @file\r
 *  File managing the MMU for ARMv7 architecture\r
 *\r
-*  Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
+*  Copyright (c) 2011-2016, ARM Limited. All rights reserved.\r
 *\r
 *  This program and the accompanying materials\r
 *  are licensed and made available under the terms and conditions of the BSD License\r
@@ -347,6 +347,17 @@ ArmConfigureMmu (
 \r
   ArmSetTTBR0 ((VOID *)(UINTN)(((UINTN)TranslationTable & ~TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK) | (TTBRAttributes & 0x7F)));\r
 \r
+  //\r
+  // The TTBCR register value is undefined at reset in the Non-Secure world.\r
+  // Writing 0 has the effect of:\r
+  //   Clearing EAE: Use short descriptors, as mandated by specification.\r
+  //   Clearing PD0 and PD1: Translation Table Walk Disable is off.\r
+  //   Clearing N: Perform all translation table walks through TTBR0.\r
+  //               (0 is the default reset value in systems not implementing\r
+  //               the Security Extensions.)\r
+  //\r
+  ArmSetTTBCR (0);\r
+\r
   ArmSetDomainAccessControl (DOMAIN_ACCESS_CONTROL_NONE(15) |\r
                              DOMAIN_ACCESS_CONTROL_NONE(14) |\r
                              DOMAIN_ACCESS_CONTROL_NONE(13) |\r

diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
index 085f08bfda8cc425f6e43f3ee7a49e191db8f914..5d1194e7e219ea6dec4b69191383ca693dc1c635 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
@@ -1,7 +1,7 @@
 #------------------------------------------------------------------------------\r
 #\r
 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.\r
 #\r
 # This program and the accompanying materials\r
 # are licensed and made available under the terms and conditions of the BSD License\r
@@ -23,6 +23,7 @@ GCC_ASM_EXPORT(ArmGetInterruptState)
 GCC_ASM_EXPORT(ArmGetFiqState)\r
 GCC_ASM_EXPORT(ArmGetTTBR0BaseAddress)\r
 GCC_ASM_EXPORT(ArmSetTTBR0)\r
+GCC_ASM_EXPORT(ArmSetTTBCR)\r
 GCC_ASM_EXPORT(ArmSetDomainAccessControl)\r
 GCC_ASM_EXPORT(CPSRMaskInsert)\r
 GCC_ASM_EXPORT(CPSRRead)\r
@@ -111,6 +112,11 @@ ASM_PFX(ArmSetTTBR0):
   isb\r
   bx      lr\r
 \r
+ASM_PFX(ArmSetTTBCR):\r
+  mcr     p15, 0, r0, c2, c0, 2\r
+  isb\r
+  bx      lr\r
+\r
 ASM_PFX(ArmGetTTBR0BaseAddress):\r
   mrc     p15,0,r0,c2,c0,0\r
   LoadConstantToReg(0xFFFFC000, r1)\r

diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
index 228d7c8fc147e4e036dee9dabd7fc0f43b2a0fcc..9b87b7f2579f33124f6c547178ea511e21aed7fd 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
+++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
@@ -1,7 +1,7 @@
 //------------------------------------------------------------------------------\r
 //\r
 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
-// Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
+// Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.\r
 //\r
 // This program and the accompanying materials\r
 // are licensed and made available under the terms and conditions of the BSD License\r
@@ -85,6 +85,11 @@
   isb\r
   bx      lr\r
 \r
+ RVCT_ASM_EXPORT ArmSetTTBCR\r
+  mcr     p15, 0, r0, c2, c0, 2\r
+  isb\r
+  bx      lr\r
+\r
  RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress\r
   mrc     p15,0,r0,c2,c0,0\r
   LoadConstantToReg(0xFFFFC000, r1)\r