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Commit | Line | Data |
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327d8e4e AJ |
1 | /* |
2 | * OpenPOWER Palmetto BMC | |
3 | * | |
4 | * Andrew Jeffery <andrew@aj.id.au> | |
5 | * | |
6 | * Copyright 2016 IBM Corp. | |
7 | * | |
8 | * This code is licensed under the GPL version 2 or later. See | |
9 | * the COPYING file in the top-level directory. | |
10 | */ | |
11 | ||
12 | #include "qemu/osdep.h" | |
da34e65c | 13 | #include "qapi/error.h" |
4771d756 | 14 | #include "cpu.h" |
327d8e4e | 15 | #include "exec/address-spaces.h" |
12ec8bd5 | 16 | #include "hw/arm/boot.h" |
fca9ca1b | 17 | #include "hw/arm/aspeed.h" |
00442402 | 18 | #include "hw/arm/aspeed_soc.h" |
327d8e4e | 19 | #include "hw/boards.h" |
93198b6c | 20 | #include "hw/i2c/smbus_eeprom.h" |
044475f3 PMD |
21 | #include "hw/misc/pca9552.h" |
22 | #include "hw/misc/tmp105.h" | |
a27bd6c7 | 23 | #include "hw/qdev-properties.h" |
03dd024f | 24 | #include "qemu/log.h" |
e1ad9bc4 | 25 | #include "sysemu/block-backend.h" |
ece09bee | 26 | #include "sysemu/sysemu.h" |
d769a1da CLG |
27 | #include "hw/loader.h" |
28 | #include "qemu/error-report.h" | |
a9df9622 | 29 | #include "qemu/units.h" |
327d8e4e | 30 | |
74fb1f38 | 31 | static struct arm_boot_info aspeed_board_binfo = { |
b033271f | 32 | .board_id = -1, /* device-tree-only board */ |
327d8e4e AJ |
33 | }; |
34 | ||
ea066d39 | 35 | struct AspeedBoardState { |
ff90606f | 36 | AspeedSoCState soc; |
ad1a9782 | 37 | MemoryRegion ram_container; |
327d8e4e | 38 | MemoryRegion ram; |
ebe31c0a | 39 | MemoryRegion max_ram; |
ea066d39 | 40 | }; |
327d8e4e | 41 | |
ef17f836 | 42 | /* Palmetto hardware value: 0x120CE416 */ |
8da33ef7 CLG |
43 | #define PALMETTO_BMC_HW_STRAP1 ( \ |
44 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ | |
45 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ | |
46 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
47 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ | |
48 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
49 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
50 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ | |
51 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
52 | SCU_HW_STRAP_SPI_WIDTH | \ | |
53 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
54 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
55 | ||
ef17f836 | 56 | /* AST2500 evb hardware value: 0xF100C2E6 */ |
9a7c1750 CLG |
57 | #define AST2500_EVB_HW_STRAP1 (( \ |
58 | AST2500_HW_STRAP1_DEFAULTS | \ | |
59 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
60 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
61 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
62 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
63 | SCU_HW_STRAP_MAC1_RGMII | \ | |
64 | SCU_HW_STRAP_MAC0_RGMII) & \ | |
65 | ~SCU_HW_STRAP_2ND_BOOT_WDT) | |
66 | ||
ef17f836 CLG |
67 | /* Romulus hardware value: 0xF10AD206 */ |
68 | #define ROMULUS_BMC_HW_STRAP1 ( \ | |
69 | AST2500_HW_STRAP1_DEFAULTS | \ | |
70 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
71 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
72 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
73 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
74 | SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ | |
75 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) | |
76 | ||
aae7a18d AK |
77 | /* Swift hardware value: 0xF11AD206 */ |
78 | #define SWIFT_BMC_HW_STRAP1 ( \ | |
79 | AST2500_HW_STRAP1_DEFAULTS | \ | |
80 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
81 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
82 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
83 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
84 | SCU_H_PLL_BYPASS_EN | \ | |
85 | SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ | |
86 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) | |
87 | ||
62c2c2eb CLG |
88 | /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ |
89 | #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 | |
90 | ||
ccc2c418 CLG |
91 | /* AST2600 evb hardware value */ |
92 | #define AST2600_EVB_HW_STRAP1 0x000000C0 | |
93 | #define AST2600_EVB_HW_STRAP2 0x00000003 | |
94 | ||
ebe31c0a CLG |
95 | /* |
96 | * The max ram region is for firmwares that scan the address space | |
97 | * with load/store to guess how much RAM the SoC has. | |
98 | */ | |
99 | static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size) | |
100 | { | |
101 | return 0; | |
102 | } | |
103 | ||
104 | static void max_ram_write(void *opaque, hwaddr offset, uint64_t value, | |
105 | unsigned size) | |
106 | { | |
107 | /* Discard writes */ | |
108 | } | |
109 | ||
110 | static const MemoryRegionOps max_ram_ops = { | |
111 | .read = max_ram_read, | |
112 | .write = max_ram_write, | |
113 | .endianness = DEVICE_NATIVE_ENDIAN, | |
114 | }; | |
115 | ||
d769a1da CLG |
116 | #define FIRMWARE_ADDR 0x0 |
117 | ||
118 | static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size, | |
119 | Error **errp) | |
120 | { | |
121 | BlockBackend *blk = blk_by_legacy_dinfo(dinfo); | |
122 | uint8_t *storage; | |
0c7209be CLG |
123 | int64_t size; |
124 | ||
125 | /* The block backend size should have already been 'validated' by | |
126 | * the creation of the m25p80 object. | |
127 | */ | |
128 | size = blk_getlength(blk); | |
129 | if (size <= 0) { | |
130 | error_setg(errp, "failed to get flash size"); | |
131 | return; | |
132 | } | |
d769a1da | 133 | |
0c7209be CLG |
134 | if (rom_size > size) { |
135 | rom_size = size; | |
d769a1da CLG |
136 | } |
137 | ||
138 | storage = g_new0(uint8_t, rom_size); | |
139 | if (blk_pread(blk, 0, storage, rom_size) < 0) { | |
140 | error_setg(errp, "failed to read the initial flash content"); | |
141 | return; | |
142 | } | |
143 | ||
144 | rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); | |
145 | g_free(storage); | |
146 | } | |
147 | ||
74fb1f38 | 148 | static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, |
e1ad9bc4 CLG |
149 | Error **errp) |
150 | { | |
151 | int i ; | |
152 | ||
153 | for (i = 0; i < s->num_cs; ++i) { | |
154 | AspeedSMCFlash *fl = &s->flashes[i]; | |
155 | DriveInfo *dinfo = drive_get_next(IF_MTD); | |
156 | qemu_irq cs_line; | |
157 | ||
e1ad9bc4 CLG |
158 | fl->flash = ssi_create_slave_no_init(s->spi, flashtype); |
159 | if (dinfo) { | |
160 | qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo), | |
161 | errp); | |
162 | } | |
163 | qdev_init_nofail(fl->flash); | |
164 | ||
165 | cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); | |
166 | sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); | |
167 | } | |
168 | } | |
169 | ||
baa4732b | 170 | static void aspeed_machine_init(MachineState *machine) |
327d8e4e | 171 | { |
74fb1f38 | 172 | AspeedBoardState *bmc; |
baa4732b | 173 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); |
b033271f | 174 | AspeedSoCClass *sc; |
d769a1da | 175 | DriveInfo *drive0 = drive_get(IF_MTD, 0, 0); |
ebe31c0a | 176 | ram_addr_t max_ram_size; |
2bea128c | 177 | int i; |
327d8e4e | 178 | |
74fb1f38 | 179 | bmc = g_new0(AspeedBoardState, 1); |
ad1a9782 CLG |
180 | |
181 | memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container", | |
182 | UINT32_MAX); | |
183 | ||
1b0ad567 | 184 | object_initialize_child(OBJECT(machine), "soc", &bmc->soc, |
baa4732b | 185 | (sizeof(bmc->soc)), amc->soc_name, &error_abort, |
1b0ad567 | 186 | NULL); |
327d8e4e | 187 | |
b033271f CLG |
188 | sc = ASPEED_SOC_GET_CLASS(&bmc->soc); |
189 | ||
19e9cdf0 MAL |
190 | object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size", |
191 | &error_abort); | |
baa4732b | 192 | object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1", |
87e79af0 | 193 | &error_abort); |
baa4732b | 194 | object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2", |
ccc2c418 | 195 | &error_abort); |
baa4732b | 196 | object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs", |
26d5df95 | 197 | &error_abort); |
cc7d44c2 | 198 | object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus", |
ece09bee | 199 | &error_abort); |
c4e1f0b4 CLG |
200 | object_property_set_link(OBJECT(&bmc->soc), OBJECT(&bmc->ram_container), |
201 | "dram", &error_abort); | |
b6e70d1d JS |
202 | if (machine->kernel_filename) { |
203 | /* | |
204 | * When booting with a -kernel command line there is no u-boot | |
205 | * that runs to unlock the SCU. In this case set the default to | |
206 | * be unlocked as the kernel expects | |
207 | */ | |
208 | object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY, | |
209 | "hw-prot-key", &error_abort); | |
210 | } | |
327d8e4e AJ |
211 | object_property_set_bool(OBJECT(&bmc->soc), true, "realized", |
212 | &error_abort); | |
213 | ||
de46f5f4 CLG |
214 | /* |
215 | * Allocate RAM after the memory controller has checked the size | |
216 | * was valid. If not, a default value is used. | |
217 | */ | |
19e9cdf0 MAL |
218 | ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size", |
219 | &error_abort); | |
de46f5f4 CLG |
220 | |
221 | memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); | |
ad1a9782 | 222 | memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram); |
d783d1fe | 223 | memory_region_add_subregion(get_system_memory(), |
54ecafb7 | 224 | sc->memmap[ASPEED_SDRAM], |
ad1a9782 | 225 | &bmc->ram_container); |
de46f5f4 | 226 | |
ebe31c0a CLG |
227 | max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size", |
228 | &error_abort); | |
229 | memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL, | |
230 | "max_ram", max_ram_size - ram_size); | |
ad1a9782 | 231 | memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram); |
ebe31c0a | 232 | |
baa4732b CLG |
233 | aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model, &error_abort); |
234 | aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model, &error_abort); | |
74fb1f38 | 235 | |
d769a1da CLG |
236 | /* Install first FMC flash content as a boot rom. */ |
237 | if (drive0) { | |
238 | AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0]; | |
239 | MemoryRegion *boot_rom = g_new(MemoryRegion, 1); | |
240 | ||
241 | /* | |
242 | * create a ROM region using the default mapping window size of | |
93bf276d CLG |
243 | * the flash module. The window size is 64MB for the AST2400 |
244 | * SoC and 128MB for the AST2500 SoC, which is twice as big as | |
245 | * needed by the flash modules of the Aspeed machines. | |
d769a1da | 246 | */ |
44cf837d | 247 | memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom", |
d769a1da CLG |
248 | fl->size, &error_abort); |
249 | memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR, | |
250 | boot_rom); | |
251 | write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort); | |
252 | } | |
253 | ||
74fb1f38 | 254 | aspeed_board_binfo.ram_size = ram_size; |
54ecafb7 | 255 | aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM]; |
ece09bee | 256 | aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus; |
e1ad9bc4 | 257 | |
baa4732b CLG |
258 | if (amc->i2c_init) { |
259 | amc->i2c_init(bmc); | |
2cf6cb50 CLG |
260 | } |
261 | ||
2bea128c EJ |
262 | for (i = 0; i < ARRAY_SIZE(bmc->soc.sdhci.slots); i++) { |
263 | SDHCIState *sdhci = &bmc->soc.sdhci.slots[i]; | |
264 | DriveInfo *dinfo = drive_get_next(IF_SD); | |
265 | BlockBackend *blk; | |
266 | DeviceState *card; | |
267 | ||
268 | blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; | |
269 | card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), | |
270 | TYPE_SD_CARD); | |
271 | qdev_prop_set_drive(card, "drive", blk, &error_fatal); | |
272 | object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); | |
273 | } | |
274 | ||
2744ece8 | 275 | arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); |
74fb1f38 | 276 | } |
b033271f | 277 | |
2cf6cb50 CLG |
278 | static void palmetto_bmc_i2c_init(AspeedBoardState *bmc) |
279 | { | |
280 | AspeedSoCState *soc = &bmc->soc; | |
a87e81b9 | 281 | DeviceState *dev; |
3d165f12 | 282 | uint8_t *eeprom_buf = g_malloc0(32 * 1024); |
2cf6cb50 CLG |
283 | |
284 | /* The palmetto platform expects a ds3231 RTC but a ds1338 is | |
285 | * enough to provide basic RTC features. Alarms will be missing */ | |
286 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68); | |
a87e81b9 | 287 | |
3d165f12 CLG |
288 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), 0x50, |
289 | eeprom_buf); | |
290 | ||
a87e81b9 CLG |
291 | /* add a TMP423 temperature sensor */ |
292 | dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2), | |
293 | "tmp423", 0x4c); | |
294 | object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort); | |
295 | object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort); | |
296 | object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort); | |
297 | object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort); | |
2cf6cb50 CLG |
298 | } |
299 | ||
2cf6cb50 CLG |
300 | static void ast2500_evb_i2c_init(AspeedBoardState *bmc) |
301 | { | |
302 | AspeedSoCState *soc = &bmc->soc; | |
3d165f12 CLG |
303 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
304 | ||
305 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), 0x50, | |
306 | eeprom_buf); | |
2cf6cb50 CLG |
307 | |
308 | /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ | |
044475f3 PMD |
309 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), |
310 | TYPE_TMP105, 0x4d); | |
6c4567c7 CLG |
311 | |
312 | /* The AST2500 EVB does not have an RTC. Let's pretend that one is | |
313 | * plugged on the I2C bus header */ | |
314 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
2cf6cb50 CLG |
315 | } |
316 | ||
ccc2c418 CLG |
317 | static void ast2600_evb_i2c_init(AspeedBoardState *bmc) |
318 | { | |
319 | /* Start with some devices on our I2C busses */ | |
320 | ast2500_evb_i2c_init(bmc); | |
321 | } | |
322 | ||
6c4567c7 CLG |
323 | static void romulus_bmc_i2c_init(AspeedBoardState *bmc) |
324 | { | |
325 | AspeedSoCState *soc = &bmc->soc; | |
326 | ||
327 | /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is | |
328 | * good enough */ | |
329 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
330 | } | |
331 | ||
aae7a18d AK |
332 | static void swift_bmc_i2c_init(AspeedBoardState *bmc) |
333 | { | |
334 | AspeedSoCState *soc = &bmc->soc; | |
335 | ||
336 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60); | |
337 | ||
338 | /* The swift board expects a TMP275 but a TMP105 is compatible */ | |
339 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x48); | |
340 | /* The swift board expects a pca9551 but a pca9552 is compatible */ | |
341 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "pca9552", 0x60); | |
342 | ||
343 | /* The swift board expects an Epson RX8900 RTC but a ds1338 is compatible */ | |
344 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "ds1338", 0x32); | |
345 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x60); | |
346 | ||
347 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp423", 0x4c); | |
348 | /* The swift board expects a pca9539 but a pca9552 is compatible */ | |
349 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "pca9552", 0x74); | |
350 | ||
351 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "tmp423", 0x4c); | |
352 | /* The swift board expects a pca9539 but a pca9552 is compatible */ | |
353 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "pca9552", | |
354 | 0x74); | |
355 | ||
356 | /* The swift board expects a TMP275 but a TMP105 is compatible */ | |
357 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x48); | |
358 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x4a); | |
359 | } | |
360 | ||
62c2c2eb CLG |
361 | static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc) |
362 | { | |
363 | AspeedSoCState *soc = &bmc->soc; | |
3d165f12 | 364 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
62c2c2eb | 365 | |
044475f3 PMD |
366 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552, |
367 | 0x60); | |
8c9a61d7 | 368 | |
62c2c2eb CLG |
369 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c); |
370 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c); | |
371 | ||
372 | /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ | |
044475f3 PMD |
373 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105, |
374 | 0x4a); | |
6c4567c7 CLG |
375 | |
376 | /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is | |
377 | * good enough */ | |
378 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
3d165f12 CLG |
379 | |
380 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51, | |
381 | eeprom_buf); | |
044475f3 | 382 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552, |
8c9a61d7 | 383 | 0x60); |
62c2c2eb CLG |
384 | } |
385 | ||
fca9ca1b | 386 | static void aspeed_machine_class_init(ObjectClass *oc, void *data) |
62c2c2eb CLG |
387 | { |
388 | MachineClass *mc = MACHINE_CLASS(oc); | |
389 | ||
fca9ca1b | 390 | mc->init = aspeed_machine_init; |
ece09bee | 391 | mc->max_cpus = ASPEED_CPUS_NUM; |
62c2c2eb CLG |
392 | mc->no_floppy = 1; |
393 | mc->no_cdrom = 1; | |
394 | mc->no_parallel = 1; | |
395 | } | |
396 | ||
baa4732b CLG |
397 | static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data) |
398 | { | |
399 | MachineClass *mc = MACHINE_CLASS(oc); | |
400 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
401 | ||
402 | mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; | |
403 | amc->soc_name = "ast2400-a1"; | |
404 | amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1; | |
405 | amc->fmc_model = "n25q256a"; | |
406 | amc->spi_model = "mx25l25635e"; | |
407 | amc->num_cs = 1; | |
408 | amc->i2c_init = palmetto_bmc_i2c_init; | |
409 | mc->default_ram_size = 256 * MiB; | |
410 | }; | |
411 | ||
412 | static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data) | |
413 | { | |
414 | MachineClass *mc = MACHINE_CLASS(oc); | |
415 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
416 | ||
417 | mc->desc = "Aspeed AST2500 EVB (ARM1176)"; | |
418 | amc->soc_name = "ast2500-a1"; | |
419 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
420 | amc->fmc_model = "w25q256"; | |
421 | amc->spi_model = "mx25l25635e"; | |
422 | amc->num_cs = 1; | |
423 | amc->i2c_init = ast2500_evb_i2c_init; | |
424 | mc->default_ram_size = 512 * MiB; | |
425 | }; | |
426 | ||
427 | static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) | |
428 | { | |
429 | MachineClass *mc = MACHINE_CLASS(oc); | |
430 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
431 | ||
432 | mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; | |
433 | amc->soc_name = "ast2500-a1"; | |
434 | amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1; | |
435 | amc->fmc_model = "n25q256a"; | |
436 | amc->spi_model = "mx66l1g45g"; | |
437 | amc->num_cs = 2; | |
438 | amc->i2c_init = romulus_bmc_i2c_init; | |
439 | mc->default_ram_size = 512 * MiB; | |
fca9ca1b CLG |
440 | }; |
441 | ||
baa4732b CLG |
442 | static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data) |
443 | { | |
444 | MachineClass *mc = MACHINE_CLASS(oc); | |
445 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
446 | ||
447 | mc->desc = "OpenPOWER Swift BMC (ARM1176)"; | |
448 | amc->soc_name = "ast2500-a1"; | |
449 | amc->hw_strap1 = SWIFT_BMC_HW_STRAP1; | |
450 | amc->fmc_model = "mx66l1g45g"; | |
451 | amc->spi_model = "mx66l1g45g"; | |
452 | amc->num_cs = 2; | |
453 | amc->i2c_init = swift_bmc_i2c_init; | |
454 | mc->default_ram_size = 512 * MiB; | |
455 | }; | |
456 | ||
457 | static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data) | |
458 | { | |
459 | MachineClass *mc = MACHINE_CLASS(oc); | |
460 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
461 | ||
462 | mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)"; | |
463 | amc->soc_name = "ast2500-a1"; | |
464 | amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1; | |
465 | amc->fmc_model = "mx25l25635e"; | |
466 | amc->spi_model = "mx66l1g45g"; | |
467 | amc->num_cs = 2; | |
468 | amc->i2c_init = witherspoon_bmc_i2c_init; | |
469 | mc->default_ram_size = 512 * MiB; | |
470 | }; | |
471 | ||
472 | static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data) | |
473 | { | |
474 | MachineClass *mc = MACHINE_CLASS(oc); | |
475 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
476 | ||
477 | mc->desc = "Aspeed AST2600 EVB (Cortex A7)"; | |
478 | amc->soc_name = "ast2600-a0"; | |
479 | amc->hw_strap1 = AST2600_EVB_HW_STRAP1; | |
480 | amc->hw_strap2 = AST2600_EVB_HW_STRAP2; | |
481 | amc->fmc_model = "w25q512jv"; | |
482 | amc->spi_model = "mx66u51235f"; | |
483 | amc->num_cs = 1; | |
484 | amc->i2c_init = ast2600_evb_i2c_init; | |
485 | mc->default_ram_size = 1 * GiB; | |
486 | }; | |
487 | ||
488 | static const TypeInfo aspeed_machine_types[] = { | |
fca9ca1b | 489 | { |
baa4732b CLG |
490 | .name = MACHINE_TYPE_NAME("palmetto-bmc"), |
491 | .parent = TYPE_ASPEED_MACHINE, | |
492 | .class_init = aspeed_machine_palmetto_class_init, | |
fca9ca1b | 493 | }, { |
baa4732b CLG |
494 | .name = MACHINE_TYPE_NAME("ast2500-evb"), |
495 | .parent = TYPE_ASPEED_MACHINE, | |
496 | .class_init = aspeed_machine_ast2500_evb_class_init, | |
fca9ca1b | 497 | }, { |
baa4732b CLG |
498 | .name = MACHINE_TYPE_NAME("romulus-bmc"), |
499 | .parent = TYPE_ASPEED_MACHINE, | |
500 | .class_init = aspeed_machine_romulus_class_init, | |
aae7a18d | 501 | }, { |
baa4732b CLG |
502 | .name = MACHINE_TYPE_NAME("swift-bmc"), |
503 | .parent = TYPE_ASPEED_MACHINE, | |
504 | .class_init = aspeed_machine_swift_class_init, | |
fca9ca1b | 505 | }, { |
baa4732b CLG |
506 | .name = MACHINE_TYPE_NAME("witherspoon-bmc"), |
507 | .parent = TYPE_ASPEED_MACHINE, | |
508 | .class_init = aspeed_machine_witherspoon_class_init, | |
ccc2c418 | 509 | }, { |
baa4732b CLG |
510 | .name = MACHINE_TYPE_NAME("ast2600-evb"), |
511 | .parent = TYPE_ASPEED_MACHINE, | |
512 | .class_init = aspeed_machine_ast2600_evb_class_init, | |
513 | }, { | |
514 | .name = TYPE_ASPEED_MACHINE, | |
515 | .parent = TYPE_MACHINE, | |
516 | .instance_size = sizeof(AspeedMachine), | |
517 | .class_size = sizeof(AspeedMachineClass), | |
518 | .class_init = aspeed_machine_class_init, | |
519 | .abstract = true, | |
fca9ca1b | 520 | } |
baa4732b | 521 | }; |
74fb1f38 | 522 | |
baa4732b | 523 | DEFINE_TYPES(aspeed_machine_types) |