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Commit | Line | Data |
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80cabfad FB |
1 | /* |
2 | * QEMU PC System Emulator | |
5fafdf24 | 3 | * |
80cabfad | 4 | * Copyright (c) 2003-2004 Fabrice Bellard |
5fafdf24 | 5 | * |
80cabfad FB |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
e688df6b | 24 | |
b6a0aa05 | 25 | #include "qemu/osdep.h" |
d471bf3e | 26 | #include "qemu/units.h" |
549e984e | 27 | #include "hw/i386/x86.h" |
0d09e41a PB |
28 | #include "hw/i386/pc.h" |
29 | #include "hw/char/serial.h" | |
bb3d5ea8 | 30 | #include "hw/char/parallel.h" |
0d09e41a | 31 | #include "hw/i386/apic.h" |
54a40293 | 32 | #include "hw/i386/topology.h" |
87abaa5d | 33 | #include "hw/i386/fw_cfg.h" |
d8f23d61 | 34 | #include "hw/i386/vmport.h" |
54a40293 | 35 | #include "sysemu/cpus.h" |
0d09e41a | 36 | #include "hw/block/fdc.h" |
83c9f4ca PB |
37 | #include "hw/ide.h" |
38 | #include "hw/pci/pci.h" | |
2118196b | 39 | #include "hw/pci/pci_bus.h" |
0d09e41a PB |
40 | #include "hw/nvram/fw_cfg.h" |
41 | #include "hw/timer/hpet.h" | |
a2eb5c0c | 42 | #include "hw/firmware/smbios.h" |
83c9f4ca | 43 | #include "hw/loader.h" |
ca20cf32 | 44 | #include "elf.h" |
d6454270 | 45 | #include "migration/vmstate.h" |
47b43a1f | 46 | #include "multiboot.h" |
bcdb9064 | 47 | #include "hw/rtc/mc146818rtc.h" |
852c27e2 | 48 | #include "hw/intc/i8259.h" |
55f613ac | 49 | #include "hw/dma/i8257.h" |
0d09e41a | 50 | #include "hw/timer/i8254.h" |
47973a2d | 51 | #include "hw/input/i8042.h" |
64552b6b | 52 | #include "hw/irq.h" |
0d09e41a | 53 | #include "hw/audio/pcspk.h" |
83c9f4ca PB |
54 | #include "hw/pci/msi.h" |
55 | #include "hw/sysbus.h" | |
9c17d615 | 56 | #include "sysemu/sysemu.h" |
14a48c1d | 57 | #include "sysemu/tcg.h" |
e35704ba | 58 | #include "sysemu/numa.h" |
9c17d615 | 59 | #include "sysemu/kvm.h" |
da278d58 | 60 | #include "sysemu/xen.h" |
b1c12027 | 61 | #include "sysemu/qtest.h" |
71e8a915 | 62 | #include "sysemu/reset.h" |
54d31236 | 63 | #include "sysemu/runstate.h" |
1d31f66b | 64 | #include "kvm_i386.h" |
0d09e41a | 65 | #include "hw/xen/xen.h" |
ab969087 | 66 | #include "hw/xen/start_info.h" |
a19cbfb3 | 67 | #include "ui/qemu-spice.h" |
022c62cb PB |
68 | #include "exec/memory.h" |
69 | #include "exec/address-spaces.h" | |
9c17d615 | 70 | #include "sysemu/arch_init.h" |
1de7afc9 | 71 | #include "qemu/bitmap.h" |
0c764a9d | 72 | #include "qemu/config-file.h" |
d49b6836 | 73 | #include "qemu/error-report.h" |
922a01a0 | 74 | #include "qemu/option.h" |
133ef074 | 75 | #include "qemu/cutils.h" |
0445259b | 76 | #include "hw/acpi/acpi.h" |
5ff020b7 | 77 | #include "hw/acpi/cpu_hotplug.h" |
c649983b | 78 | #include "hw/boards.h" |
72c194f7 | 79 | #include "acpi-build.h" |
95bee274 | 80 | #include "hw/mem/pc-dimm.h" |
4b997690 | 81 | #include "hw/mem/nvdimm.h" |
e688df6b | 82 | #include "qapi/error.h" |
9af23989 | 83 | #include "qapi/qapi-visit-common.h" |
bf1e8939 | 84 | #include "qapi/visitor.h" |
2e5b09fd | 85 | #include "hw/core/cpu.h" |
a310e653 | 86 | #include "hw/usb.h" |
60c5e104 | 87 | #include "hw/i386/intel_iommu.h" |
489983d6 | 88 | #include "hw/net/ne2000-isa.h" |
06e0259a | 89 | #include "standard-headers/asm-x86/bootparam.h" |
a0a49813 | 90 | #include "hw/virtio/virtio-pmem-pci.h" |
0ed48fd3 | 91 | #include "hw/virtio/virtio-mem-pci.h" |
a0a49813 | 92 | #include "hw/mem/memory-device.h" |
6f479566 LX |
93 | #include "sysemu/replay.h" |
94 | #include "qapi/qmp/qerror.h" | |
d6d059ca | 95 | #include "e820_memory_layout.h" |
149c50ca | 96 | #include "fw_cfg.h" |
4ca8dabd | 97 | #include "trace.h" |
2becc36a | 98 | #include CONFIG_DEVICES |
471fd342 | 99 | |
2ebc2121 HW |
100 | GlobalProperty pc_compat_5_0[] = { |
101 | }; | |
541aaa1d CH |
102 | const size_t pc_compat_5_0_len = G_N_ELEMENTS(pc_compat_5_0); |
103 | ||
f404220e IM |
104 | GlobalProperty pc_compat_4_2[] = { |
105 | { "mch", "smbase-smram", "off" }, | |
106 | }; | |
3eb74d20 CH |
107 | const size_t pc_compat_4_2_len = G_N_ELEMENTS(pc_compat_4_2); |
108 | ||
9aec2e52 CH |
109 | GlobalProperty pc_compat_4_1[] = {}; |
110 | const size_t pc_compat_4_1_len = G_N_ELEMENTS(pc_compat_4_1); | |
111 | ||
9bf2650b CH |
112 | GlobalProperty pc_compat_4_0[] = {}; |
113 | const size_t pc_compat_4_0_len = G_N_ELEMENTS(pc_compat_4_0); | |
114 | ||
abd93cc7 | 115 | GlobalProperty pc_compat_3_1[] = { |
6c36bddf | 116 | { "intel-iommu", "dma-drain", "off" }, |
483c6ad4 BP |
117 | { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "off" }, |
118 | { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "off" }, | |
9fe8b7be VK |
119 | { "Opteron_G4" "-" TYPE_X86_CPU, "npt", "off" }, |
120 | { "Opteron_G4" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
483c6ad4 | 121 | { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "off" }, |
9fe8b7be VK |
122 | { "Opteron_G5" "-" TYPE_X86_CPU, "npt", "off" }, |
123 | { "Opteron_G5" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
124 | { "EPYC" "-" TYPE_X86_CPU, "npt", "off" }, | |
125 | { "EPYC" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
126 | { "EPYC-IBPB" "-" TYPE_X86_CPU, "npt", "off" }, | |
127 | { "EPYC-IBPB" "-" TYPE_X86_CPU, "nrip-save", "off" }, | |
ecb85fe4 PB |
128 | { "Skylake-Client" "-" TYPE_X86_CPU, "mpx", "on" }, |
129 | { "Skylake-Client-IBRS" "-" TYPE_X86_CPU, "mpx", "on" }, | |
130 | { "Skylake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, | |
131 | { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "mpx", "on" }, | |
132 | { "Cascadelake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, | |
133 | { "Icelake-Client" "-" TYPE_X86_CPU, "mpx", "on" }, | |
134 | { "Icelake-Server" "-" TYPE_X86_CPU, "mpx", "on" }, | |
b0a19803 | 135 | { "Cascadelake-Server" "-" TYPE_X86_CPU, "stepping", "5" }, |
f24c3a79 | 136 | { TYPE_X86_CPU, "x-intel-pt-auto-level", "off" }, |
abd93cc7 MAL |
137 | }; |
138 | const size_t pc_compat_3_1_len = G_N_ELEMENTS(pc_compat_3_1); | |
139 | ||
ddb3235d | 140 | GlobalProperty pc_compat_3_0[] = { |
6c36bddf EH |
141 | { TYPE_X86_CPU, "x-hv-synic-kvm-only", "on" }, |
142 | { "Skylake-Server" "-" TYPE_X86_CPU, "pku", "off" }, | |
143 | { "Skylake-Server-IBRS" "-" TYPE_X86_CPU, "pku", "off" }, | |
ddb3235d MAL |
144 | }; |
145 | const size_t pc_compat_3_0_len = G_N_ELEMENTS(pc_compat_3_0); | |
146 | ||
0d47310b | 147 | GlobalProperty pc_compat_2_12[] = { |
6c36bddf EH |
148 | { TYPE_X86_CPU, "legacy-cache", "on" }, |
149 | { TYPE_X86_CPU, "topoext", "off" }, | |
150 | { "EPYC-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, | |
151 | { "EPYC-IBPB-" TYPE_X86_CPU, "xlevel", "0x8000000a" }, | |
0d47310b MAL |
152 | }; |
153 | const size_t pc_compat_2_12_len = G_N_ELEMENTS(pc_compat_2_12); | |
154 | ||
43df70a9 | 155 | GlobalProperty pc_compat_2_11[] = { |
6c36bddf EH |
156 | { TYPE_X86_CPU, "x-migrate-smi-count", "off" }, |
157 | { "Skylake-Server" "-" TYPE_X86_CPU, "clflushopt", "off" }, | |
43df70a9 MAL |
158 | }; |
159 | const size_t pc_compat_2_11_len = G_N_ELEMENTS(pc_compat_2_11); | |
160 | ||
503224f4 | 161 | GlobalProperty pc_compat_2_10[] = { |
6c36bddf EH |
162 | { TYPE_X86_CPU, "x-hv-max-vps", "0x40" }, |
163 | { "i440FX-pcihost", "x-pci-hole64-fix", "off" }, | |
164 | { "q35-pcihost", "x-pci-hole64-fix", "off" }, | |
503224f4 MAL |
165 | }; |
166 | const size_t pc_compat_2_10_len = G_N_ELEMENTS(pc_compat_2_10); | |
167 | ||
3e803152 | 168 | GlobalProperty pc_compat_2_9[] = { |
6c36bddf | 169 | { "mch", "extended-tseg-mbytes", "0" }, |
3e803152 MAL |
170 | }; |
171 | const size_t pc_compat_2_9_len = G_N_ELEMENTS(pc_compat_2_9); | |
172 | ||
edc24ccd | 173 | GlobalProperty pc_compat_2_8[] = { |
6c36bddf EH |
174 | { TYPE_X86_CPU, "tcg-cpuid", "off" }, |
175 | { "kvmclock", "x-mach-use-reliable-get-clock", "off" }, | |
176 | { "ICH9-LPC", "x-smi-broadcast", "off" }, | |
177 | { TYPE_X86_CPU, "vmware-cpuid-freq", "off" }, | |
178 | { "Haswell-" TYPE_X86_CPU, "stepping", "1" }, | |
edc24ccd MAL |
179 | }; |
180 | const size_t pc_compat_2_8_len = G_N_ELEMENTS(pc_compat_2_8); | |
181 | ||
5a995064 | 182 | GlobalProperty pc_compat_2_7[] = { |
6c36bddf EH |
183 | { TYPE_X86_CPU, "l3-cache", "off" }, |
184 | { TYPE_X86_CPU, "full-cpuid-auto-level", "off" }, | |
185 | { "Opteron_G3" "-" TYPE_X86_CPU, "family", "15" }, | |
186 | { "Opteron_G3" "-" TYPE_X86_CPU, "model", "6" }, | |
187 | { "Opteron_G3" "-" TYPE_X86_CPU, "stepping", "1" }, | |
188 | { "isa-pcspk", "migrate", "off" }, | |
5a995064 MAL |
189 | }; |
190 | const size_t pc_compat_2_7_len = G_N_ELEMENTS(pc_compat_2_7); | |
191 | ||
ff8f261f | 192 | GlobalProperty pc_compat_2_6[] = { |
6c36bddf EH |
193 | { TYPE_X86_CPU, "cpuid-0xb", "off" }, |
194 | { "vmxnet3", "romfile", "" }, | |
195 | { TYPE_X86_CPU, "fill-mtrr-mask", "off" }, | |
196 | { "apic-common", "legacy-instance-id", "on", } | |
ff8f261f MAL |
197 | }; |
198 | const size_t pc_compat_2_6_len = G_N_ELEMENTS(pc_compat_2_6); | |
199 | ||
fe759610 MAL |
200 | GlobalProperty pc_compat_2_5[] = {}; |
201 | const size_t pc_compat_2_5_len = G_N_ELEMENTS(pc_compat_2_5); | |
202 | ||
2f99b9c2 MAL |
203 | GlobalProperty pc_compat_2_4[] = { |
204 | PC_CPU_MODEL_IDS("2.4.0") | |
6c36bddf EH |
205 | { "Haswell-" TYPE_X86_CPU, "abm", "off" }, |
206 | { "Haswell-noTSX-" TYPE_X86_CPU, "abm", "off" }, | |
207 | { "Broadwell-" TYPE_X86_CPU, "abm", "off" }, | |
208 | { "Broadwell-noTSX-" TYPE_X86_CPU, "abm", "off" }, | |
209 | { "host" "-" TYPE_X86_CPU, "host-cache-info", "on" }, | |
210 | { TYPE_X86_CPU, "check", "off" }, | |
211 | { "qemu64" "-" TYPE_X86_CPU, "sse4a", "on" }, | |
212 | { "qemu64" "-" TYPE_X86_CPU, "abm", "on" }, | |
213 | { "qemu64" "-" TYPE_X86_CPU, "popcnt", "on" }, | |
214 | { "qemu32" "-" TYPE_X86_CPU, "popcnt", "on" }, | |
215 | { "Opteron_G2" "-" TYPE_X86_CPU, "rdtscp", "on" }, | |
216 | { "Opteron_G3" "-" TYPE_X86_CPU, "rdtscp", "on" }, | |
217 | { "Opteron_G4" "-" TYPE_X86_CPU, "rdtscp", "on" }, | |
218 | { "Opteron_G5" "-" TYPE_X86_CPU, "rdtscp", "on", } | |
2f99b9c2 MAL |
219 | }; |
220 | const size_t pc_compat_2_4_len = G_N_ELEMENTS(pc_compat_2_4); | |
221 | ||
8995dd90 MAL |
222 | GlobalProperty pc_compat_2_3[] = { |
223 | PC_CPU_MODEL_IDS("2.3.0") | |
6c36bddf EH |
224 | { TYPE_X86_CPU, "arat", "off" }, |
225 | { "qemu64" "-" TYPE_X86_CPU, "min-level", "4" }, | |
226 | { "kvm64" "-" TYPE_X86_CPU, "min-level", "5" }, | |
227 | { "pentium3" "-" TYPE_X86_CPU, "min-level", "2" }, | |
228 | { "n270" "-" TYPE_X86_CPU, "min-level", "5" }, | |
229 | { "Conroe" "-" TYPE_X86_CPU, "min-level", "4" }, | |
230 | { "Penryn" "-" TYPE_X86_CPU, "min-level", "4" }, | |
231 | { "Nehalem" "-" TYPE_X86_CPU, "min-level", "4" }, | |
232 | { "n270" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
233 | { "Penryn" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
234 | { "Conroe" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
235 | { "Nehalem" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
236 | { "Westmere" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
237 | { "SandyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
238 | { "IvyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
239 | { "Haswell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
240 | { "Haswell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
241 | { "Broadwell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
242 | { "Broadwell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, | |
243 | { TYPE_X86_CPU, "kvm-no-smi-migration", "on" }, | |
8995dd90 MAL |
244 | }; |
245 | const size_t pc_compat_2_3_len = G_N_ELEMENTS(pc_compat_2_3); | |
246 | ||
1c30044e MAL |
247 | GlobalProperty pc_compat_2_2[] = { |
248 | PC_CPU_MODEL_IDS("2.2.0") | |
6c36bddf EH |
249 | { "kvm64" "-" TYPE_X86_CPU, "vme", "off" }, |
250 | { "kvm32" "-" TYPE_X86_CPU, "vme", "off" }, | |
251 | { "Conroe" "-" TYPE_X86_CPU, "vme", "off" }, | |
252 | { "Penryn" "-" TYPE_X86_CPU, "vme", "off" }, | |
253 | { "Nehalem" "-" TYPE_X86_CPU, "vme", "off" }, | |
254 | { "Westmere" "-" TYPE_X86_CPU, "vme", "off" }, | |
255 | { "SandyBridge" "-" TYPE_X86_CPU, "vme", "off" }, | |
256 | { "Haswell" "-" TYPE_X86_CPU, "vme", "off" }, | |
257 | { "Broadwell" "-" TYPE_X86_CPU, "vme", "off" }, | |
258 | { "Opteron_G1" "-" TYPE_X86_CPU, "vme", "off" }, | |
259 | { "Opteron_G2" "-" TYPE_X86_CPU, "vme", "off" }, | |
260 | { "Opteron_G3" "-" TYPE_X86_CPU, "vme", "off" }, | |
261 | { "Opteron_G4" "-" TYPE_X86_CPU, "vme", "off" }, | |
262 | { "Opteron_G5" "-" TYPE_X86_CPU, "vme", "off" }, | |
263 | { "Haswell" "-" TYPE_X86_CPU, "f16c", "off" }, | |
264 | { "Haswell" "-" TYPE_X86_CPU, "rdrand", "off" }, | |
265 | { "Broadwell" "-" TYPE_X86_CPU, "f16c", "off" }, | |
266 | { "Broadwell" "-" TYPE_X86_CPU, "rdrand", "off" }, | |
1c30044e MAL |
267 | }; |
268 | const size_t pc_compat_2_2_len = G_N_ELEMENTS(pc_compat_2_2); | |
269 | ||
c4fc5695 MAL |
270 | GlobalProperty pc_compat_2_1[] = { |
271 | PC_CPU_MODEL_IDS("2.1.0") | |
6c36bddf EH |
272 | { "coreduo" "-" TYPE_X86_CPU, "vmx", "on" }, |
273 | { "core2duo" "-" TYPE_X86_CPU, "vmx", "on" }, | |
c4fc5695 MAL |
274 | }; |
275 | const size_t pc_compat_2_1_len = G_N_ELEMENTS(pc_compat_2_1); | |
276 | ||
a310e653 MAL |
277 | GlobalProperty pc_compat_2_0[] = { |
278 | PC_CPU_MODEL_IDS("2.0.0") | |
6c36bddf EH |
279 | { "virtio-scsi-pci", "any_layout", "off" }, |
280 | { "PIIX4_PM", "memory-hotplug-support", "off" }, | |
281 | { "apic", "version", "0x11" }, | |
282 | { "nec-usb-xhci", "superspeed-ports-first", "off" }, | |
283 | { "nec-usb-xhci", "force-pcie-endcap", "on" }, | |
284 | { "pci-serial", "prog_if", "0" }, | |
285 | { "pci-serial-2x", "prog_if", "0" }, | |
286 | { "pci-serial-4x", "prog_if", "0" }, | |
287 | { "virtio-net-pci", "guest_announce", "off" }, | |
288 | { "ICH9-LPC", "memory-hotplug-support", "off" }, | |
289 | { "xio3130-downstream", COMPAT_PROP_PCP, "off" }, | |
290 | { "ioh3420", COMPAT_PROP_PCP, "off" }, | |
a310e653 MAL |
291 | }; |
292 | const size_t pc_compat_2_0_len = G_N_ELEMENTS(pc_compat_2_0); | |
293 | ||
294 | GlobalProperty pc_compat_1_7[] = { | |
295 | PC_CPU_MODEL_IDS("1.7.0") | |
6c36bddf EH |
296 | { TYPE_USB_DEVICE, "msos-desc", "no" }, |
297 | { "PIIX4_PM", "acpi-pci-hotplug-with-bridge-support", "off" }, | |
298 | { "hpet", HPET_INTCAP, "4" }, | |
a310e653 MAL |
299 | }; |
300 | const size_t pc_compat_1_7_len = G_N_ELEMENTS(pc_compat_1_7); | |
301 | ||
302 | GlobalProperty pc_compat_1_6[] = { | |
303 | PC_CPU_MODEL_IDS("1.6.0") | |
6c36bddf EH |
304 | { "e1000", "mitigation", "off" }, |
305 | { "qemu64-" TYPE_X86_CPU, "model", "2" }, | |
306 | { "qemu32-" TYPE_X86_CPU, "model", "3" }, | |
307 | { "i440FX-pcihost", "short_root_bus", "1" }, | |
308 | { "q35-pcihost", "short_root_bus", "1" }, | |
a310e653 MAL |
309 | }; |
310 | const size_t pc_compat_1_6_len = G_N_ELEMENTS(pc_compat_1_6); | |
311 | ||
312 | GlobalProperty pc_compat_1_5[] = { | |
313 | PC_CPU_MODEL_IDS("1.5.0") | |
6c36bddf EH |
314 | { "Conroe-" TYPE_X86_CPU, "model", "2" }, |
315 | { "Conroe-" TYPE_X86_CPU, "min-level", "2" }, | |
316 | { "Penryn-" TYPE_X86_CPU, "model", "2" }, | |
317 | { "Penryn-" TYPE_X86_CPU, "min-level", "2" }, | |
318 | { "Nehalem-" TYPE_X86_CPU, "model", "2" }, | |
319 | { "Nehalem-" TYPE_X86_CPU, "min-level", "2" }, | |
320 | { "virtio-net-pci", "any_layout", "off" }, | |
321 | { TYPE_X86_CPU, "pmu", "on" }, | |
322 | { "i440FX-pcihost", "short_root_bus", "0" }, | |
323 | { "q35-pcihost", "short_root_bus", "0" }, | |
a310e653 MAL |
324 | }; |
325 | const size_t pc_compat_1_5_len = G_N_ELEMENTS(pc_compat_1_5); | |
326 | ||
327 | GlobalProperty pc_compat_1_4[] = { | |
328 | PC_CPU_MODEL_IDS("1.4.0") | |
6c36bddf EH |
329 | { "scsi-hd", "discard_granularity", "0" }, |
330 | { "scsi-cd", "discard_granularity", "0" }, | |
331 | { "scsi-disk", "discard_granularity", "0" }, | |
332 | { "ide-hd", "discard_granularity", "0" }, | |
333 | { "ide-cd", "discard_granularity", "0" }, | |
334 | { "ide-drive", "discard_granularity", "0" }, | |
335 | { "virtio-blk-pci", "discard_granularity", "0" }, | |
336 | /* DEV_NVECTORS_UNSPECIFIED as a uint32_t string: */ | |
337 | { "virtio-serial-pci", "vectors", "0xFFFFFFFF" }, | |
338 | { "virtio-net-pci", "ctrl_guest_offloads", "off" }, | |
339 | { "e1000", "romfile", "pxe-e1000.rom" }, | |
340 | { "ne2k_pci", "romfile", "pxe-ne2k_pci.rom" }, | |
341 | { "pcnet", "romfile", "pxe-pcnet.rom" }, | |
342 | { "rtl8139", "romfile", "pxe-rtl8139.rom" }, | |
343 | { "virtio-net-pci", "romfile", "pxe-virtio.rom" }, | |
344 | { "486-" TYPE_X86_CPU, "model", "0" }, | |
345 | { "n270" "-" TYPE_X86_CPU, "movbe", "off" }, | |
346 | { "Westmere" "-" TYPE_X86_CPU, "pclmulqdq", "off" }, | |
a310e653 MAL |
347 | }; |
348 | const size_t pc_compat_1_4_len = G_N_ELEMENTS(pc_compat_1_4); | |
349 | ||
417258f1 PMD |
350 | GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) |
351 | { | |
352 | GSIState *s; | |
353 | ||
354 | s = g_new0(GSIState, 1); | |
355 | if (kvm_ioapic_in_kernel()) { | |
356 | kvm_pc_setup_irq_routing(pci_enabled); | |
417258f1 | 357 | } |
64c033ba | 358 | *irqs = qemu_allocate_irqs(gsi_handler, s, GSI_NUM_PINS); |
417258f1 PMD |
359 | |
360 | return s; | |
361 | } | |
362 | ||
258711c6 JG |
363 | static void ioport80_write(void *opaque, hwaddr addr, uint64_t data, |
364 | unsigned size) | |
80cabfad FB |
365 | { |
366 | } | |
367 | ||
c02e1eac JG |
368 | static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size) |
369 | { | |
a6fc23e5 | 370 | return 0xffffffffffffffffULL; |
c02e1eac JG |
371 | } |
372 | ||
f929aad6 | 373 | /* MSDOS compatibility mode FPU exception support */ |
258711c6 JG |
374 | static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data, |
375 | unsigned size) | |
f929aad6 | 376 | { |
6f529b75 | 377 | if (tcg_enabled()) { |
bf13bfab | 378 | cpu_set_ignne(); |
6f529b75 | 379 | } |
f929aad6 FB |
380 | } |
381 | ||
c02e1eac JG |
382 | static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size) |
383 | { | |
a6fc23e5 | 384 | return 0xffffffffffffffffULL; |
c02e1eac JG |
385 | } |
386 | ||
b0a21b53 FB |
387 | /* PC cmos mappings */ |
388 | ||
80cabfad FB |
389 | #define REG_EQUIPMENT_BYTE 0x14 |
390 | ||
9139046c MA |
391 | static void cmos_init_hd(ISADevice *s, int type_ofs, int info_ofs, |
392 | int16_t cylinders, int8_t heads, int8_t sectors) | |
ba6c2377 | 393 | { |
ba6c2377 FB |
394 | rtc_set_memory(s, type_ofs, 47); |
395 | rtc_set_memory(s, info_ofs, cylinders); | |
396 | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); | |
397 | rtc_set_memory(s, info_ofs + 2, heads); | |
398 | rtc_set_memory(s, info_ofs + 3, 0xff); | |
399 | rtc_set_memory(s, info_ofs + 4, 0xff); | |
400 | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); | |
401 | rtc_set_memory(s, info_ofs + 6, cylinders); | |
402 | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); | |
403 | rtc_set_memory(s, info_ofs + 8, sectors); | |
404 | } | |
405 | ||
6ac0e82d AZ |
406 | /* convert boot_device letter to something recognizable by the bios */ |
407 | static int boot_device2nibble(char boot_device) | |
408 | { | |
409 | switch(boot_device) { | |
410 | case 'a': | |
411 | case 'b': | |
412 | return 0x01; /* floppy boot */ | |
413 | case 'c': | |
414 | return 0x02; /* hard drive boot */ | |
415 | case 'd': | |
416 | return 0x03; /* CD-ROM boot */ | |
417 | case 'n': | |
418 | return 0x04; /* Network boot */ | |
419 | } | |
420 | return 0; | |
421 | } | |
422 | ||
ddcd5531 | 423 | static void set_boot_dev(ISADevice *s, const char *boot_device, Error **errp) |
0ecdffbb AJ |
424 | { |
425 | #define PC_MAX_BOOT_DEVICES 3 | |
0ecdffbb AJ |
426 | int nbds, bds[3] = { 0, }; |
427 | int i; | |
428 | ||
429 | nbds = strlen(boot_device); | |
430 | if (nbds > PC_MAX_BOOT_DEVICES) { | |
ddcd5531 GA |
431 | error_setg(errp, "Too many boot devices for PC"); |
432 | return; | |
0ecdffbb AJ |
433 | } |
434 | for (i = 0; i < nbds; i++) { | |
435 | bds[i] = boot_device2nibble(boot_device[i]); | |
436 | if (bds[i] == 0) { | |
ddcd5531 GA |
437 | error_setg(errp, "Invalid boot device for PC: '%c'", |
438 | boot_device[i]); | |
439 | return; | |
0ecdffbb AJ |
440 | } |
441 | } | |
442 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); | |
d9346e81 | 443 | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
0ecdffbb AJ |
444 | } |
445 | ||
ddcd5531 | 446 | static void pc_boot_set(void *opaque, const char *boot_device, Error **errp) |
d9346e81 | 447 | { |
ddcd5531 | 448 | set_boot_dev(opaque, boot_device, errp); |
d9346e81 MA |
449 | } |
450 | ||
7444ca4e LE |
451 | static void pc_cmos_init_floppy(ISADevice *rtc_state, ISADevice *floppy) |
452 | { | |
453 | int val, nb, i; | |
2da44dd0 JS |
454 | FloppyDriveType fd_type[2] = { FLOPPY_DRIVE_TYPE_NONE, |
455 | FLOPPY_DRIVE_TYPE_NONE }; | |
7444ca4e LE |
456 | |
457 | /* floppy type */ | |
458 | if (floppy) { | |
459 | for (i = 0; i < 2; i++) { | |
460 | fd_type[i] = isa_fdc_get_drive_type(floppy, i); | |
461 | } | |
462 | } | |
463 | val = (cmos_get_fd_drive_type(fd_type[0]) << 4) | | |
464 | cmos_get_fd_drive_type(fd_type[1]); | |
465 | rtc_set_memory(rtc_state, 0x10, val); | |
466 | ||
467 | val = rtc_get_memory(rtc_state, REG_EQUIPMENT_BYTE); | |
468 | nb = 0; | |
2da44dd0 | 469 | if (fd_type[0] != FLOPPY_DRIVE_TYPE_NONE) { |
7444ca4e LE |
470 | nb++; |
471 | } | |
2da44dd0 | 472 | if (fd_type[1] != FLOPPY_DRIVE_TYPE_NONE) { |
7444ca4e LE |
473 | nb++; |
474 | } | |
475 | switch (nb) { | |
476 | case 0: | |
477 | break; | |
478 | case 1: | |
479 | val |= 0x01; /* 1 drive, ready for boot */ | |
480 | break; | |
481 | case 2: | |
482 | val |= 0x41; /* 2 drives, ready for boot */ | |
483 | break; | |
484 | } | |
485 | rtc_set_memory(rtc_state, REG_EQUIPMENT_BYTE, val); | |
486 | } | |
487 | ||
c0897e0c MA |
488 | typedef struct pc_cmos_init_late_arg { |
489 | ISADevice *rtc_state; | |
9139046c | 490 | BusState *idebus[2]; |
c0897e0c MA |
491 | } pc_cmos_init_late_arg; |
492 | ||
b86f4613 LE |
493 | typedef struct check_fdc_state { |
494 | ISADevice *floppy; | |
495 | bool multiple; | |
496 | } CheckFdcState; | |
497 | ||
498 | static int check_fdc(Object *obj, void *opaque) | |
499 | { | |
500 | CheckFdcState *state = opaque; | |
501 | Object *fdc; | |
502 | uint32_t iobase; | |
503 | Error *local_err = NULL; | |
504 | ||
505 | fdc = object_dynamic_cast(obj, TYPE_ISA_FDC); | |
506 | if (!fdc) { | |
507 | return 0; | |
508 | } | |
509 | ||
1ea1572a | 510 | iobase = object_property_get_uint(obj, "iobase", &local_err); |
b86f4613 LE |
511 | if (local_err || iobase != 0x3f0) { |
512 | error_free(local_err); | |
513 | return 0; | |
514 | } | |
515 | ||
516 | if (state->floppy) { | |
517 | state->multiple = true; | |
518 | } else { | |
519 | state->floppy = ISA_DEVICE(obj); | |
520 | } | |
521 | return 0; | |
522 | } | |
523 | ||
524 | static const char * const fdc_container_path[] = { | |
525 | "/unattached", "/peripheral", "/peripheral-anon" | |
526 | }; | |
527 | ||
424e4a87 RK |
528 | /* |
529 | * Locate the FDC at IO address 0x3f0, in order to configure the CMOS registers | |
530 | * and ACPI objects. | |
531 | */ | |
532 | ISADevice *pc_find_fdc0(void) | |
533 | { | |
534 | int i; | |
535 | Object *container; | |
536 | CheckFdcState state = { 0 }; | |
537 | ||
538 | for (i = 0; i < ARRAY_SIZE(fdc_container_path); i++) { | |
539 | container = container_get(qdev_get_machine(), fdc_container_path[i]); | |
540 | object_child_foreach(container, check_fdc, &state); | |
541 | } | |
542 | ||
543 | if (state.multiple) { | |
3dc6f869 AF |
544 | warn_report("multiple floppy disk controllers with " |
545 | "iobase=0x3f0 have been found"); | |
433672b0 | 546 | error_printf("the one being picked for CMOS setup might not reflect " |
9e5d2c52 | 547 | "your intent"); |
424e4a87 RK |
548 | } |
549 | ||
550 | return state.floppy; | |
551 | } | |
552 | ||
c0897e0c MA |
553 | static void pc_cmos_init_late(void *opaque) |
554 | { | |
555 | pc_cmos_init_late_arg *arg = opaque; | |
556 | ISADevice *s = arg->rtc_state; | |
9139046c MA |
557 | int16_t cylinders; |
558 | int8_t heads, sectors; | |
c0897e0c | 559 | int val; |
2adc99b2 | 560 | int i, trans; |
c0897e0c | 561 | |
9139046c | 562 | val = 0; |
272f0428 CP |
563 | if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0, |
564 | &cylinders, &heads, §ors) >= 0) { | |
9139046c MA |
565 | cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors); |
566 | val |= 0xf0; | |
567 | } | |
272f0428 CP |
568 | if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1, |
569 | &cylinders, &heads, §ors) >= 0) { | |
9139046c MA |
570 | cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors); |
571 | val |= 0x0f; | |
572 | } | |
573 | rtc_set_memory(s, 0x12, val); | |
c0897e0c MA |
574 | |
575 | val = 0; | |
576 | for (i = 0; i < 4; i++) { | |
9139046c MA |
577 | /* NOTE: ide_get_geometry() returns the physical |
578 | geometry. It is always such that: 1 <= sects <= 63, 1 | |
579 | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS | |
580 | geometry can be different if a translation is done. */ | |
272f0428 CP |
581 | if (arg->idebus[i / 2] && |
582 | ide_get_geometry(arg->idebus[i / 2], i % 2, | |
9139046c | 583 | &cylinders, &heads, §ors) >= 0) { |
2adc99b2 MA |
584 | trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1; |
585 | assert((trans & ~3) == 0); | |
586 | val |= trans << (i * 2); | |
c0897e0c MA |
587 | } |
588 | } | |
589 | rtc_set_memory(s, 0x39, val); | |
590 | ||
424e4a87 | 591 | pc_cmos_init_floppy(s, pc_find_fdc0()); |
b86f4613 | 592 | |
c0897e0c MA |
593 | qemu_unregister_reset(pc_cmos_init_late, opaque); |
594 | } | |
595 | ||
23d30407 | 596 | void pc_cmos_init(PCMachineState *pcms, |
220a8846 | 597 | BusState *idebus0, BusState *idebus1, |
63ffb564 | 598 | ISADevice *s) |
80cabfad | 599 | { |
7444ca4e | 600 | int val; |
c0897e0c | 601 | static pc_cmos_init_late_arg arg; |
f0bb276b | 602 | X86MachineState *x86ms = X86_MACHINE(pcms); |
b0a21b53 | 603 | |
b0a21b53 | 604 | /* various important CMOS locations needed by PC/Bochs bios */ |
80cabfad FB |
605 | |
606 | /* memory size */ | |
e89001f7 | 607 | /* base memory (first MiB) */ |
f0bb276b | 608 | val = MIN(x86ms->below_4g_mem_size / KiB, 640); |
333190eb FB |
609 | rtc_set_memory(s, 0x15, val); |
610 | rtc_set_memory(s, 0x16, val >> 8); | |
e89001f7 | 611 | /* extended memory (next 64MiB) */ |
f0bb276b PB |
612 | if (x86ms->below_4g_mem_size > 1 * MiB) { |
613 | val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB; | |
e89001f7 MA |
614 | } else { |
615 | val = 0; | |
616 | } | |
80cabfad FB |
617 | if (val > 65535) |
618 | val = 65535; | |
b0a21b53 FB |
619 | rtc_set_memory(s, 0x17, val); |
620 | rtc_set_memory(s, 0x18, val >> 8); | |
621 | rtc_set_memory(s, 0x30, val); | |
622 | rtc_set_memory(s, 0x31, val >> 8); | |
e89001f7 | 623 | /* memory between 16MiB and 4GiB */ |
f0bb276b PB |
624 | if (x86ms->below_4g_mem_size > 16 * MiB) { |
625 | val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB); | |
e89001f7 | 626 | } else { |
9da98861 | 627 | val = 0; |
e89001f7 | 628 | } |
80cabfad FB |
629 | if (val > 65535) |
630 | val = 65535; | |
b0a21b53 FB |
631 | rtc_set_memory(s, 0x34, val); |
632 | rtc_set_memory(s, 0x35, val >> 8); | |
e89001f7 | 633 | /* memory above 4GiB */ |
f0bb276b | 634 | val = x86ms->above_4g_mem_size / 65536; |
e89001f7 MA |
635 | rtc_set_memory(s, 0x5b, val); |
636 | rtc_set_memory(s, 0x5c, val >> 8); | |
637 | rtc_set_memory(s, 0x5d, val >> 16); | |
3b46e624 | 638 | |
23d30407 | 639 | object_property_add_link(OBJECT(pcms), "rtc_state", |
2d996150 | 640 | TYPE_ISA_DEVICE, |
f0bb276b | 641 | (Object **)&x86ms->rtc, |
2d996150 | 642 | object_property_allow_set_link, |
d2623129 | 643 | OBJ_PROP_LINK_STRONG); |
5325cc34 MA |
644 | object_property_set_link(OBJECT(pcms), "rtc_state", OBJECT(s), |
645 | &error_abort); | |
298e01b6 | 646 | |
007b0657 | 647 | set_boot_dev(s, MACHINE(pcms)->boot_order, &error_fatal); |
80cabfad | 648 | |
b0a21b53 | 649 | val = 0; |
b0a21b53 FB |
650 | val |= 0x02; /* FPU is there */ |
651 | val |= 0x04; /* PS/2 mouse installed */ | |
652 | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); | |
653 | ||
b86f4613 | 654 | /* hard drives and FDC */ |
c0897e0c | 655 | arg.rtc_state = s; |
9139046c MA |
656 | arg.idebus[0] = idebus0; |
657 | arg.idebus[1] = idebus1; | |
c0897e0c | 658 | qemu_register_reset(pc_cmos_init_late, &arg); |
80cabfad FB |
659 | } |
660 | ||
956a3e6b | 661 | static void handle_a20_line_change(void *opaque, int irq, int level) |
59b8ad81 | 662 | { |
cc36a7a2 | 663 | X86CPU *cpu = opaque; |
e1a23744 | 664 | |
956a3e6b | 665 | /* XXX: send to all CPUs ? */ |
4b78a802 | 666 | /* XXX: add logic to handle multiple A20 line sources */ |
cc36a7a2 | 667 | x86_cpu_set_a20(cpu, level); |
e1a23744 FB |
668 | } |
669 | ||
b41a2cd1 FB |
670 | #define NE2000_NB_MAX 6 |
671 | ||
675d6f82 BS |
672 | static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, |
673 | 0x280, 0x380 }; | |
674 | static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; | |
b41a2cd1 | 675 | |
48a18b3c | 676 | void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd) |
a41b2ff2 PB |
677 | { |
678 | static int nb_ne2k = 0; | |
679 | ||
680 | if (nb_ne2k == NE2000_NB_MAX) | |
681 | return; | |
48a18b3c | 682 | isa_ne2000_init(bus, ne2000_io[nb_ne2k], |
9453c5bc | 683 | ne2000_irq[nb_ne2k], nd); |
a41b2ff2 PB |
684 | nb_ne2k++; |
685 | } | |
686 | ||
845773ab | 687 | void pc_acpi_smi_interrupt(void *opaque, int irq, int level) |
53b67b30 | 688 | { |
c3affe56 | 689 | X86CPU *cpu = opaque; |
53b67b30 BS |
690 | |
691 | if (level) { | |
c3affe56 | 692 | cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI); |
53b67b30 BS |
693 | } |
694 | } | |
695 | ||
6f479566 LX |
696 | /* |
697 | * This function is very similar to smp_parse() | |
698 | * in hw/core/machine.c but includes CPU die support. | |
699 | */ | |
700 | void pc_smp_parse(MachineState *ms, QemuOpts *opts) | |
701 | { | |
f0bb276b | 702 | X86MachineState *x86ms = X86_MACHINE(ms); |
1b458422 | 703 | |
6f479566 LX |
704 | if (opts) { |
705 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
706 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
1b458422 | 707 | unsigned dies = qemu_opt_get_number(opts, "dies", 1); |
6f479566 LX |
708 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); |
709 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
710 | ||
711 | /* compute missing values, prefer sockets over cores over threads */ | |
712 | if (cpus == 0 || sockets == 0) { | |
713 | cores = cores > 0 ? cores : 1; | |
714 | threads = threads > 0 ? threads : 1; | |
715 | if (cpus == 0) { | |
716 | sockets = sockets > 0 ? sockets : 1; | |
1b458422 | 717 | cpus = cores * threads * dies * sockets; |
6f479566 LX |
718 | } else { |
719 | ms->smp.max_cpus = | |
720 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
1b458422 | 721 | sockets = ms->smp.max_cpus / (cores * threads * dies); |
6f479566 LX |
722 | } |
723 | } else if (cores == 0) { | |
724 | threads = threads > 0 ? threads : 1; | |
1b458422 | 725 | cores = cpus / (sockets * dies * threads); |
6f479566 LX |
726 | cores = cores > 0 ? cores : 1; |
727 | } else if (threads == 0) { | |
1b458422 | 728 | threads = cpus / (cores * dies * sockets); |
6f479566 | 729 | threads = threads > 0 ? threads : 1; |
1b458422 | 730 | } else if (sockets * dies * cores * threads < cpus) { |
6f479566 | 731 | error_report("cpu topology: " |
1b458422 | 732 | "sockets (%u) * dies (%u) * cores (%u) * threads (%u) < " |
6f479566 | 733 | "smp_cpus (%u)", |
1b458422 | 734 | sockets, dies, cores, threads, cpus); |
6f479566 LX |
735 | exit(1); |
736 | } | |
737 | ||
738 | ms->smp.max_cpus = | |
739 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
740 | ||
741 | if (ms->smp.max_cpus < cpus) { | |
742 | error_report("maxcpus must be equal to or greater than smp"); | |
743 | exit(1); | |
744 | } | |
745 | ||
1b458422 | 746 | if (sockets * dies * cores * threads > ms->smp.max_cpus) { |
6f479566 | 747 | error_report("cpu topology: " |
1b458422 | 748 | "sockets (%u) * dies (%u) * cores (%u) * threads (%u) > " |
6f479566 | 749 | "maxcpus (%u)", |
1b458422 | 750 | sockets, dies, cores, threads, |
6f479566 LX |
751 | ms->smp.max_cpus); |
752 | exit(1); | |
753 | } | |
754 | ||
1b458422 | 755 | if (sockets * dies * cores * threads != ms->smp.max_cpus) { |
6f479566 | 756 | warn_report("Invalid CPU topology deprecated: " |
1b458422 | 757 | "sockets (%u) * dies (%u) * cores (%u) * threads (%u) " |
6f479566 | 758 | "!= maxcpus (%u)", |
1b458422 | 759 | sockets, dies, cores, threads, |
6f479566 LX |
760 | ms->smp.max_cpus); |
761 | } | |
762 | ||
763 | ms->smp.cpus = cpus; | |
764 | ms->smp.cores = cores; | |
765 | ms->smp.threads = threads; | |
8cb30e3a | 766 | ms->smp.sockets = sockets; |
f0bb276b | 767 | x86ms->smp_dies = dies; |
6f479566 LX |
768 | } |
769 | ||
770 | if (ms->smp.cpus > 1) { | |
771 | Error *blocker = NULL; | |
772 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
773 | replay_add_blocker(blocker); | |
774 | } | |
775 | } | |
776 | ||
a0628599 | 777 | void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp) |
c649983b | 778 | { |
703a548a SL |
779 | X86MachineState *x86ms = X86_MACHINE(ms); |
780 | int64_t apic_id = x86_cpu_apic_id_from_index(x86ms, id); | |
0e3bd562 | 781 | Error *local_err = NULL; |
c649983b | 782 | |
8de433cb IM |
783 | if (id < 0) { |
784 | error_setg(errp, "Invalid CPU id: %" PRIi64, id); | |
785 | return; | |
786 | } | |
787 | ||
5ff020b7 EH |
788 | if (apic_id >= ACPI_CPU_HOTPLUG_ID_LIMIT) { |
789 | error_setg(errp, "Unable to add CPU: %" PRIi64 | |
790 | ", resulting APIC ID (%" PRIi64 ") is too large", | |
791 | id, apic_id); | |
792 | return; | |
793 | } | |
794 | ||
703a548a SL |
795 | |
796 | x86_cpu_new(X86_MACHINE(ms), apic_id, &local_err); | |
0e3bd562 AF |
797 | if (local_err) { |
798 | error_propagate(errp, local_err); | |
799 | return; | |
800 | } | |
c649983b IM |
801 | } |
802 | ||
e3cadac0 IM |
803 | static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count) |
804 | { | |
805 | if (cpus_count > 0xff) { | |
806 | /* If the number of CPUs can't be represented in 8 bits, the | |
807 | * BIOS must use "FW_CFG_NB_CPUS". Set RTC field to 0 just | |
808 | * to make old BIOSes fail more predictably. | |
809 | */ | |
810 | rtc_set_memory(rtc, 0x5f, 0); | |
811 | } else { | |
812 | rtc_set_memory(rtc, 0x5f, cpus_count - 1); | |
813 | } | |
814 | } | |
815 | ||
3459a625 | 816 | static |
9ebeed0c | 817 | void pc_machine_done(Notifier *notifier, void *data) |
3459a625 | 818 | { |
9ebeed0c EH |
819 | PCMachineState *pcms = container_of(notifier, |
820 | PCMachineState, machine_done); | |
f0bb276b | 821 | X86MachineState *x86ms = X86_MACHINE(pcms); |
9ebeed0c | 822 | PCIBus *bus = pcms->bus; |
2118196b | 823 | |
ba157b69 | 824 | /* set the number of CPUs */ |
f0bb276b | 825 | rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); |
ba157b69 | 826 | |
2118196b MA |
827 | if (bus) { |
828 | int extra_hosts = 0; | |
829 | ||
830 | QLIST_FOREACH(bus, &bus->child, sibling) { | |
831 | /* look for expander root buses */ | |
832 | if (pci_bus_is_root(bus)) { | |
833 | extra_hosts++; | |
834 | } | |
835 | } | |
f0bb276b | 836 | if (extra_hosts && x86ms->fw_cfg) { |
2118196b MA |
837 | uint64_t *val = g_malloc(sizeof(*val)); |
838 | *val = cpu_to_le64(extra_hosts); | |
f0bb276b | 839 | fw_cfg_add_file(x86ms->fw_cfg, |
2118196b MA |
840 | "etc/extra-pci-roots", val, sizeof(*val)); |
841 | } | |
842 | } | |
843 | ||
bb292f5a | 844 | acpi_setup(); |
f0bb276b PB |
845 | if (x86ms->fw_cfg) { |
846 | fw_cfg_build_smbios(MACHINE(pcms), x86ms->fw_cfg); | |
847 | fw_cfg_build_feature_control(MACHINE(pcms), x86ms->fw_cfg); | |
e3cadac0 | 848 | /* update FW_CFG_NB_CPUS to account for -device added CPUs */ |
f0bb276b | 849 | fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); |
6d42eefa | 850 | } |
60c5e104 | 851 | |
f0bb276b | 852 | if (x86ms->apic_id_limit > 255 && !xen_enabled()) { |
60c5e104 IM |
853 | IntelIOMMUState *iommu = INTEL_IOMMU_DEVICE(x86_iommu_get_default()); |
854 | ||
a924b3d8 | 855 | if (!iommu || !x86_iommu_ir_supported(X86_IOMMU_DEVICE(iommu)) || |
60c5e104 IM |
856 | iommu->intr_eim != ON_OFF_AUTO_ON) { |
857 | error_report("current -smp configuration requires " | |
858 | "Extended Interrupt Mode enabled. " | |
859 | "You can add an IOMMU using: " | |
860 | "-device intel-iommu,intremap=on,eim=on"); | |
861 | exit(EXIT_FAILURE); | |
862 | } | |
863 | } | |
3459a625 MT |
864 | } |
865 | ||
e4e8ba04 | 866 | void pc_guest_info_init(PCMachineState *pcms) |
3459a625 | 867 | { |
1f3aba37 | 868 | int i; |
aa570207 | 869 | MachineState *ms = MACHINE(pcms); |
f0bb276b | 870 | X86MachineState *x86ms = X86_MACHINE(pcms); |
b20c9bd5 | 871 | |
f0bb276b | 872 | x86ms->apic_xrupt_override = kvm_allows_irq0_override(); |
aa570207 | 873 | pcms->numa_nodes = ms->numa_state->num_nodes; |
dd4c2f01 EH |
874 | pcms->node_mem = g_malloc0(pcms->numa_nodes * |
875 | sizeof *pcms->node_mem); | |
aa570207 | 876 | for (i = 0; i < ms->numa_state->num_nodes; i++) { |
7e721e7b | 877 | pcms->node_mem[i] = ms->numa_state->nodes[i].node_mem; |
8c85901e WG |
878 | } |
879 | ||
9ebeed0c EH |
880 | pcms->machine_done.notify = pc_machine_done; |
881 | qemu_add_machine_init_done_notifier(&pcms->machine_done); | |
3459a625 MT |
882 | } |
883 | ||
83d08f26 MT |
884 | /* setup pci memory address space mapping into system address space */ |
885 | void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, | |
886 | MemoryRegion *pci_address_space) | |
39848901 | 887 | { |
83d08f26 MT |
888 | /* Set to lower priority than RAM */ |
889 | memory_region_add_subregion_overlap(system_memory, 0x0, | |
890 | pci_address_space, -1); | |
39848901 IM |
891 | } |
892 | ||
7bc35e0f | 893 | void xen_load_linux(PCMachineState *pcms) |
b33a5bbf CL |
894 | { |
895 | int i; | |
896 | FWCfgState *fw_cfg; | |
703a548a | 897 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
f0bb276b | 898 | X86MachineState *x86ms = X86_MACHINE(pcms); |
b33a5bbf | 899 | |
df1f79fd | 900 | assert(MACHINE(pcms)->kernel_filename != NULL); |
b33a5bbf | 901 | |
305ae888 | 902 | fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE); |
f0bb276b | 903 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); |
b33a5bbf CL |
904 | rom_set_fw(fw_cfg); |
905 | ||
703a548a SL |
906 | x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, |
907 | pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled); | |
b33a5bbf CL |
908 | for (i = 0; i < nb_option_roms; i++) { |
909 | assert(!strcmp(option_rom[i].name, "linuxboot.bin") || | |
b2a575a1 | 910 | !strcmp(option_rom[i].name, "linuxboot_dma.bin") || |
1fb0d709 | 911 | !strcmp(option_rom[i].name, "pvh.bin") || |
b33a5bbf CL |
912 | !strcmp(option_rom[i].name, "multiboot.bin")); |
913 | rom_add_option(option_rom[i].name, option_rom[i].bootindex); | |
914 | } | |
f0bb276b | 915 | x86ms->fw_cfg = fw_cfg; |
b33a5bbf CL |
916 | } |
917 | ||
5934e216 EH |
918 | void pc_memory_init(PCMachineState *pcms, |
919 | MemoryRegion *system_memory, | |
920 | MemoryRegion *rom_memory, | |
921 | MemoryRegion **ram_memory) | |
80cabfad | 922 | { |
cbc5b5f3 | 923 | int linux_boot, i; |
bd457782 | 924 | MemoryRegion *option_rom_mr; |
00cb2a99 | 925 | MemoryRegion *ram_below_4g, *ram_above_4g; |
a88b362c | 926 | FWCfgState *fw_cfg; |
62b160c0 | 927 | MachineState *machine = MACHINE(pcms); |
264b4857 | 928 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
16a9e8a5 | 929 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
f0bb276b | 930 | X86MachineState *x86ms = X86_MACHINE(pcms); |
d592d303 | 931 | |
f0bb276b PB |
932 | assert(machine->ram_size == x86ms->below_4g_mem_size + |
933 | x86ms->above_4g_mem_size); | |
9521d42b PB |
934 | |
935 | linux_boot = (machine->kernel_filename != NULL); | |
80cabfad | 936 | |
bd457782 IM |
937 | /* |
938 | * Split single memory region and use aliases to address portions of it, | |
939 | * done for backwards compatibility with older qemus. | |
00cb2a99 | 940 | */ |
bd457782 | 941 | *ram_memory = machine->ram; |
7267c094 | 942 | ram_below_4g = g_malloc(sizeof(*ram_below_4g)); |
bd457782 | 943 | memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", machine->ram, |
f0bb276b | 944 | 0, x86ms->below_4g_mem_size); |
00cb2a99 | 945 | memory_region_add_subregion(system_memory, 0, ram_below_4g); |
f0bb276b PB |
946 | e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM); |
947 | if (x86ms->above_4g_mem_size > 0) { | |
7267c094 | 948 | ram_above_4g = g_malloc(sizeof(*ram_above_4g)); |
bd457782 IM |
949 | memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", |
950 | machine->ram, | |
f0bb276b PB |
951 | x86ms->below_4g_mem_size, |
952 | x86ms->above_4g_mem_size); | |
00cb2a99 AK |
953 | memory_region_add_subregion(system_memory, 0x100000000ULL, |
954 | ram_above_4g); | |
f0bb276b | 955 | e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM); |
bbe80adf | 956 | } |
82b36dc3 | 957 | |
bb292f5a | 958 | if (!pcmc->has_reserved_memory && |
ca8336f3 | 959 | (machine->ram_slots || |
9521d42b | 960 | (machine->maxram_size > machine->ram_size))) { |
ca8336f3 IM |
961 | |
962 | error_report("\"-memory 'slots|maxmem'\" is not supported by: %s", | |
963 | mc->name); | |
964 | exit(EXIT_FAILURE); | |
965 | } | |
966 | ||
b0c14ec4 DH |
967 | /* always allocate the device memory information */ |
968 | machine->device_memory = g_malloc0(sizeof(*machine->device_memory)); | |
969 | ||
f2ffbe2b | 970 | /* initialize device memory address space */ |
bb292f5a | 971 | if (pcmc->has_reserved_memory && |
9521d42b | 972 | (machine->ram_size < machine->maxram_size)) { |
f2ffbe2b | 973 | ram_addr_t device_mem_size = machine->maxram_size - machine->ram_size; |
619d11e4 | 974 | |
a0cc8856 IM |
975 | if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) { |
976 | error_report("unsupported amount of memory slots: %"PRIu64, | |
977 | machine->ram_slots); | |
978 | exit(EXIT_FAILURE); | |
979 | } | |
980 | ||
f2c38522 PK |
981 | if (QEMU_ALIGN_UP(machine->maxram_size, |
982 | TARGET_PAGE_SIZE) != machine->maxram_size) { | |
983 | error_report("maximum memory size must by aligned to multiple of " | |
984 | "%d bytes", TARGET_PAGE_SIZE); | |
985 | exit(EXIT_FAILURE); | |
986 | } | |
987 | ||
b0c14ec4 | 988 | machine->device_memory->base = |
f0bb276b | 989 | ROUND_UP(0x100000000ULL + x86ms->above_4g_mem_size, 1 * GiB); |
619d11e4 | 990 | |
16a9e8a5 | 991 | if (pcmc->enforce_aligned_dimm) { |
f2ffbe2b | 992 | /* size device region assuming 1G page max alignment per slot */ |
d471bf3e | 993 | device_mem_size += (1 * GiB) * machine->ram_slots; |
085f8e88 IM |
994 | } |
995 | ||
f2ffbe2b DH |
996 | if ((machine->device_memory->base + device_mem_size) < |
997 | device_mem_size) { | |
619d11e4 IM |
998 | error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT, |
999 | machine->maxram_size); | |
1000 | exit(EXIT_FAILURE); | |
1001 | } | |
1002 | ||
b0c14ec4 | 1003 | memory_region_init(&machine->device_memory->mr, OBJECT(pcms), |
f2ffbe2b | 1004 | "device-memory", device_mem_size); |
b0c14ec4 DH |
1005 | memory_region_add_subregion(system_memory, machine->device_memory->base, |
1006 | &machine->device_memory->mr); | |
619d11e4 | 1007 | } |
cbc5b5f3 JJ |
1008 | |
1009 | /* Initialize PC system firmware */ | |
5e640a9e | 1010 | pc_system_firmware_init(pcms, rom_memory); |
00cb2a99 | 1011 | |
7267c094 | 1012 | option_rom_mr = g_malloc(sizeof(*option_rom_mr)); |
98a99ce0 | 1013 | memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE, |
f8ed85ac | 1014 | &error_fatal); |
208fa0e4 IM |
1015 | if (pcmc->pci_enabled) { |
1016 | memory_region_set_readonly(option_rom_mr, true); | |
1017 | } | |
4463aee6 | 1018 | memory_region_add_subregion_overlap(rom_memory, |
00cb2a99 AK |
1019 | PC_ROM_MIN_VGA, |
1020 | option_rom_mr, | |
1021 | 1); | |
f753ff16 | 1022 | |
bd802bd9 | 1023 | fw_cfg = fw_cfg_arch_create(machine, |
f0bb276b | 1024 | x86ms->boot_cpus, x86ms->apic_id_limit); |
c886fc4c | 1025 | |
8832cb80 | 1026 | rom_set_fw(fw_cfg); |
1d108d97 | 1027 | |
b0c14ec4 | 1028 | if (pcmc->has_reserved_memory && machine->device_memory->base) { |
de268e13 | 1029 | uint64_t *val = g_malloc(sizeof(*val)); |
2f8b5008 | 1030 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
b0c14ec4 | 1031 | uint64_t res_mem_end = machine->device_memory->base; |
2f8b5008 IM |
1032 | |
1033 | if (!pcmc->broken_reserved_end) { | |
b0c14ec4 | 1034 | res_mem_end += memory_region_size(&machine->device_memory->mr); |
2f8b5008 | 1035 | } |
d471bf3e | 1036 | *val = cpu_to_le64(ROUND_UP(res_mem_end, 1 * GiB)); |
de268e13 IM |
1037 | fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val)); |
1038 | } | |
1039 | ||
f753ff16 | 1040 | if (linux_boot) { |
703a548a SL |
1041 | x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, |
1042 | pcmc->pvh_enabled, pcmc->linuxboot_dma_enabled); | |
f753ff16 PB |
1043 | } |
1044 | ||
1045 | for (i = 0; i < nb_option_roms; i++) { | |
2e55e842 | 1046 | rom_add_option(option_rom[i].name, option_rom[i].bootindex); |
406c8df3 | 1047 | } |
f0bb276b | 1048 | x86ms->fw_cfg = fw_cfg; |
cb135f59 PX |
1049 | |
1050 | /* Init default IOAPIC address space */ | |
f0bb276b | 1051 | x86ms->ioapic_as = &address_space_memory; |
091c466e SK |
1052 | |
1053 | /* Init ACPI memory hotplug IO base address */ | |
1054 | pcms->memhp_io_base = ACPI_MEMORY_HOTPLUG_BASE; | |
3d53f5c3 IY |
1055 | } |
1056 | ||
9fa99d25 MA |
1057 | /* |
1058 | * The 64bit pci hole starts after "above 4G RAM" and | |
1059 | * potentially the space reserved for memory hotplug. | |
1060 | */ | |
1061 | uint64_t pc_pci_hole64_start(void) | |
1062 | { | |
1063 | PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); | |
1064 | PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); | |
b0c14ec4 | 1065 | MachineState *ms = MACHINE(pcms); |
f0bb276b | 1066 | X86MachineState *x86ms = X86_MACHINE(pcms); |
9fa99d25 MA |
1067 | uint64_t hole64_start = 0; |
1068 | ||
b0c14ec4 DH |
1069 | if (pcmc->has_reserved_memory && ms->device_memory->base) { |
1070 | hole64_start = ms->device_memory->base; | |
9fa99d25 | 1071 | if (!pcmc->broken_reserved_end) { |
b0c14ec4 | 1072 | hole64_start += memory_region_size(&ms->device_memory->mr); |
9fa99d25 MA |
1073 | } |
1074 | } else { | |
f0bb276b | 1075 | hole64_start = 0x100000000ULL + x86ms->above_4g_mem_size; |
9fa99d25 MA |
1076 | } |
1077 | ||
d471bf3e | 1078 | return ROUND_UP(hole64_start, 1 * GiB); |
9fa99d25 MA |
1079 | } |
1080 | ||
48a18b3c | 1081 | DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus) |
765d7908 | 1082 | { |
ad6d45fa AL |
1083 | DeviceState *dev = NULL; |
1084 | ||
bab47d9a | 1085 | rom_set_order_override(FW_CFG_ORDER_OVERRIDE_VGA); |
16094b75 AJ |
1086 | if (pci_bus) { |
1087 | PCIDevice *pcidev = pci_vga_init(pci_bus); | |
1088 | dev = pcidev ? &pcidev->qdev : NULL; | |
1089 | } else if (isa_bus) { | |
1090 | ISADevice *isadev = isa_vga_init(isa_bus); | |
4a17cc4f | 1091 | dev = isadev ? DEVICE(isadev) : NULL; |
765d7908 | 1092 | } |
bab47d9a | 1093 | rom_reset_order_override(); |
ad6d45fa | 1094 | return dev; |
765d7908 IY |
1095 | } |
1096 | ||
258711c6 JG |
1097 | static const MemoryRegionOps ioport80_io_ops = { |
1098 | .write = ioport80_write, | |
c02e1eac | 1099 | .read = ioport80_read, |
258711c6 JG |
1100 | .endianness = DEVICE_NATIVE_ENDIAN, |
1101 | .impl = { | |
1102 | .min_access_size = 1, | |
1103 | .max_access_size = 1, | |
1104 | }, | |
1105 | }; | |
1106 | ||
1107 | static const MemoryRegionOps ioportF0_io_ops = { | |
1108 | .write = ioportF0_write, | |
c02e1eac | 1109 | .read = ioportF0_read, |
258711c6 JG |
1110 | .endianness = DEVICE_NATIVE_ENDIAN, |
1111 | .impl = { | |
1112 | .min_access_size = 1, | |
1113 | .max_access_size = 1, | |
1114 | }, | |
1115 | }; | |
1116 | ||
ac64273c PMD |
1117 | static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport) |
1118 | { | |
1119 | int i; | |
1120 | DriveInfo *fd[MAX_FD]; | |
1121 | qemu_irq *a20_line; | |
fed2c173 | 1122 | ISADevice *fdc, *i8042, *port92, *vmmouse; |
ac64273c | 1123 | |
def337ff | 1124 | serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS); |
ac64273c PMD |
1125 | parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS); |
1126 | ||
1127 | for (i = 0; i < MAX_FD; i++) { | |
1128 | fd[i] = drive_get(IF_FLOPPY, 0, i); | |
1129 | create_fdctrl |= !!fd[i]; | |
1130 | } | |
1131 | if (create_fdctrl) { | |
fed2c173 MA |
1132 | fdc = isa_new(TYPE_ISA_FDC); |
1133 | if (fdc) { | |
1134 | isa_realize_and_unref(fdc, isa_bus, &error_fatal); | |
1135 | isa_fdc_init_drives(fdc, fd); | |
1136 | } | |
ac64273c PMD |
1137 | } |
1138 | ||
1139 | i8042 = isa_create_simple(isa_bus, "i8042"); | |
1140 | if (!no_vmport) { | |
b4fa79ea | 1141 | isa_create_simple(isa_bus, TYPE_VMPORT); |
c23e0561 | 1142 | vmmouse = isa_try_new("vmmouse"); |
ac64273c PMD |
1143 | } else { |
1144 | vmmouse = NULL; | |
1145 | } | |
1146 | if (vmmouse) { | |
5325cc34 MA |
1147 | object_property_set_link(OBJECT(vmmouse), "i8042", OBJECT(i8042), |
1148 | &error_abort); | |
c23e0561 | 1149 | isa_realize_and_unref(vmmouse, isa_bus, &error_fatal); |
ac64273c | 1150 | } |
9e5213c8 | 1151 | port92 = isa_create_simple(isa_bus, TYPE_PORT92); |
ac64273c PMD |
1152 | |
1153 | a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); | |
1154 | i8042_setup_a20_line(i8042, a20_line[0]); | |
1820b70e PMD |
1155 | qdev_connect_gpio_out_named(DEVICE(port92), |
1156 | PORT92_A20_LINE, 0, a20_line[1]); | |
ac64273c PMD |
1157 | g_free(a20_line); |
1158 | } | |
1159 | ||
10e2483b GH |
1160 | void pc_basic_device_init(struct PCMachineState *pcms, |
1161 | ISABus *isa_bus, qemu_irq *gsi, | |
1611977c | 1162 | ISADevice **rtc_state, |
fd53c87c | 1163 | bool create_fdctrl, |
3a87d009 | 1164 | uint32_t hpet_irqs) |
ffe513da IY |
1165 | { |
1166 | int i; | |
ce967e2f JK |
1167 | DeviceState *hpet = NULL; |
1168 | int pit_isa_irq = 0; | |
1169 | qemu_irq pit_alt_irq = NULL; | |
7d932dfd | 1170 | qemu_irq rtc_irq = NULL; |
ac64273c | 1171 | ISADevice *pit = NULL; |
258711c6 JG |
1172 | MemoryRegion *ioport80_io = g_new(MemoryRegion, 1); |
1173 | MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1); | |
ffe513da | 1174 | |
2c9b15ca | 1175 | memory_region_init_io(ioport80_io, NULL, &ioport80_io_ops, NULL, "ioport80", 1); |
258711c6 | 1176 | memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io); |
ffe513da | 1177 | |
2c9b15ca | 1178 | memory_region_init_io(ioportF0_io, NULL, &ioportF0_io_ops, NULL, "ioportF0", 1); |
258711c6 | 1179 | memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io); |
ffe513da | 1180 | |
5d17c0d2 JK |
1181 | /* |
1182 | * Check if an HPET shall be created. | |
1183 | * | |
1184 | * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT | |
1185 | * when the HPET wants to take over. Thus we have to disable the latter. | |
1186 | */ | |
1187 | if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) { | |
df707969 | 1188 | hpet = qdev_try_new(TYPE_HPET); |
dd703b99 | 1189 | if (hpet) { |
7a10ef51 LPF |
1190 | /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7 |
1191 | * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23, | |
1192 | * IRQ8 and IRQ2. | |
1193 | */ | |
5d7fb0f2 | 1194 | uint8_t compat = object_property_get_uint(OBJECT(hpet), |
7a10ef51 LPF |
1195 | HPET_INTCAP, NULL); |
1196 | if (!compat) { | |
1197 | qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs); | |
1198 | } | |
3c6ef471 | 1199 | sysbus_realize_and_unref(SYS_BUS_DEVICE(hpet), &error_fatal); |
7a10ef51 LPF |
1200 | sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE); |
1201 | ||
b881fbe9 | 1202 | for (i = 0; i < GSI_NUM_PINS; i++) { |
1356b98d | 1203 | sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]); |
dd703b99 | 1204 | } |
ce967e2f JK |
1205 | pit_isa_irq = -1; |
1206 | pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT); | |
1207 | rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT); | |
822557eb | 1208 | } |
ffe513da | 1209 | } |
6c646a11 | 1210 | *rtc_state = mc146818_rtc_init(isa_bus, 2000, rtc_irq); |
7d932dfd JK |
1211 | |
1212 | qemu_register_boot_set(pc_boot_set, *rtc_state); | |
1213 | ||
c52e7bbb | 1214 | if (!xen_enabled() && pcms->pit_enabled) { |
15eafc2e | 1215 | if (kvm_pit_in_kernel()) { |
c2d8d311 SS |
1216 | pit = kvm_pit_init(isa_bus, 0x40); |
1217 | } else { | |
acf695ec | 1218 | pit = i8254_pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq); |
c2d8d311 SS |
1219 | } |
1220 | if (hpet) { | |
1221 | /* connect PIT to output control line of the HPET */ | |
4a17cc4f | 1222 | qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0)); |
c2d8d311 | 1223 | } |
6b8d1416 | 1224 | pcspk_init(pcms->pcspk, isa_bus, pit); |
ce967e2f | 1225 | } |
ffe513da | 1226 | |
55f613ac | 1227 | i8257_dma_init(isa_bus, 0); |
ffe513da | 1228 | |
ac64273c | 1229 | /* Super I/O */ |
8859f072 | 1230 | pc_superio_init(isa_bus, create_fdctrl, pcms->vmport != ON_OFF_AUTO_ON); |
ffe513da IY |
1231 | } |
1232 | ||
4b9c264b | 1233 | void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus) |
9011a1a7 IY |
1234 | { |
1235 | int i; | |
1236 | ||
bab47d9a | 1237 | rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC); |
9011a1a7 IY |
1238 | for (i = 0; i < nb_nics; i++) { |
1239 | NICInfo *nd = &nd_table[i]; | |
4b9c264b | 1240 | const char *model = nd->model ? nd->model : pcmc->default_nic_model; |
9011a1a7 | 1241 | |
4b9c264b | 1242 | if (g_str_equal(model, "ne2k_isa")) { |
9011a1a7 IY |
1243 | pc_init_ne2k_isa(isa_bus, nd); |
1244 | } else { | |
4b9c264b | 1245 | pci_nic_init_nofail(nd, pci_bus, model, NULL); |
9011a1a7 IY |
1246 | } |
1247 | } | |
bab47d9a | 1248 | rom_reset_order_override(); |
9011a1a7 IY |
1249 | } |
1250 | ||
4501d317 PMD |
1251 | void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs) |
1252 | { | |
1253 | qemu_irq *i8259; | |
1254 | ||
1255 | if (kvm_pic_in_kernel()) { | |
1256 | i8259 = kvm_i8259_init(isa_bus); | |
1257 | } else if (xen_enabled()) { | |
1258 | i8259 = xen_interrupt_controller_init(); | |
1259 | } else { | |
89a289c7 | 1260 | i8259 = i8259_init(isa_bus, x86_allocate_cpu_irq()); |
4501d317 PMD |
1261 | } |
1262 | ||
1263 | for (size_t i = 0; i < ISA_NUM_IRQS; i++) { | |
1264 | i8259_irqs[i] = i8259[i]; | |
1265 | } | |
1266 | ||
1267 | g_free(i8259); | |
1268 | } | |
1269 | ||
d468115b DH |
1270 | static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, |
1271 | Error **errp) | |
1272 | { | |
1273 | const PCMachineState *pcms = PC_MACHINE(hotplug_dev); | |
b0e62443 | 1274 | const PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); |
f6a0d06b | 1275 | const MachineState *ms = MACHINE(hotplug_dev); |
d468115b | 1276 | const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); |
b0e62443 | 1277 | const uint64_t legacy_align = TARGET_PAGE_SIZE; |
ae909496 | 1278 | Error *local_err = NULL; |
d468115b DH |
1279 | |
1280 | /* | |
1281 | * When -no-acpi is used with Q35 machine type, no ACPI is built, | |
1282 | * but pcms->acpi_dev is still created. Check !acpi_enabled in | |
1283 | * addition to cover this case. | |
1284 | */ | |
17e89077 | 1285 | if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { |
d468115b DH |
1286 | error_setg(errp, |
1287 | "memory hotplug is not enabled: missing acpi device or acpi disabled"); | |
1288 | return; | |
1289 | } | |
1290 | ||
f6a0d06b | 1291 | if (is_nvdimm && !ms->nvdimms_state->is_enabled) { |
d468115b DH |
1292 | error_setg(errp, "nvdimm is not enabled: missing 'nvdimm' in '-M'"); |
1293 | return; | |
1294 | } | |
8f1ffe5b | 1295 | |
ae909496 TH |
1296 | hotplug_handler_pre_plug(pcms->acpi_dev, dev, &local_err); |
1297 | if (local_err) { | |
1298 | error_propagate(errp, local_err); | |
1299 | return; | |
1300 | } | |
1301 | ||
fd3416f5 | 1302 | pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), |
b0e62443 | 1303 | pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp); |
d468115b DH |
1304 | } |
1305 | ||
bb6e2f7a DH |
1306 | static void pc_memory_plug(HotplugHandler *hotplug_dev, |
1307 | DeviceState *dev, Error **errp) | |
95bee274 IM |
1308 | { |
1309 | Error *local_err = NULL; | |
1310 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); | |
f6a0d06b | 1311 | MachineState *ms = MACHINE(hotplug_dev); |
7f3cf2d6 | 1312 | bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); |
95bee274 | 1313 | |
fd3416f5 | 1314 | pc_dimm_plug(PC_DIMM(dev), MACHINE(pcms), &local_err); |
43bbb49e | 1315 | if (local_err) { |
b8865591 IM |
1316 | goto out; |
1317 | } | |
1318 | ||
7f3cf2d6 | 1319 | if (is_nvdimm) { |
f6a0d06b | 1320 | nvdimm_plug(ms->nvdimms_state); |
c7f8d0f3 XG |
1321 | } |
1322 | ||
473ac567 | 1323 | hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &error_abort); |
95bee274 IM |
1324 | out: |
1325 | error_propagate(errp, local_err); | |
1326 | } | |
1327 | ||
bb6e2f7a DH |
1328 | static void pc_memory_unplug_request(HotplugHandler *hotplug_dev, |
1329 | DeviceState *dev, Error **errp) | |
64fec58e | 1330 | { |
64fec58e TC |
1331 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
1332 | ||
8cd91ace HZ |
1333 | /* |
1334 | * When -no-acpi is used with Q35 machine type, no ACPI is built, | |
1335 | * but pcms->acpi_dev is still created. Check !acpi_enabled in | |
1336 | * addition to cover this case. | |
1337 | */ | |
17e89077 | 1338 | if (!pcms->acpi_dev || !x86_machine_is_acpi_enabled(X86_MACHINE(pcms))) { |
dcfe4805 | 1339 | error_setg(errp, |
8cd91ace | 1340 | "memory hotplug is not enabled: missing acpi device or acpi disabled"); |
dcfe4805 | 1341 | return; |
64fec58e TC |
1342 | } |
1343 | ||
b097cc52 | 1344 | if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { |
dcfe4805 MA |
1345 | error_setg(errp, "nvdimm device hot unplug is not supported yet."); |
1346 | return; | |
b097cc52 XG |
1347 | } |
1348 | ||
473ac567 | 1349 | hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, |
dcfe4805 | 1350 | errp); |
64fec58e TC |
1351 | } |
1352 | ||
bb6e2f7a DH |
1353 | static void pc_memory_unplug(HotplugHandler *hotplug_dev, |
1354 | DeviceState *dev, Error **errp) | |
f7d3e29d TC |
1355 | { |
1356 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); | |
f7d3e29d TC |
1357 | Error *local_err = NULL; |
1358 | ||
473ac567 | 1359 | hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); |
f7d3e29d TC |
1360 | if (local_err) { |
1361 | goto out; | |
1362 | } | |
1363 | ||
fd3416f5 | 1364 | pc_dimm_unplug(PC_DIMM(dev), MACHINE(pcms)); |
981c3dcd | 1365 | qdev_unrealize(dev); |
f7d3e29d TC |
1366 | out: |
1367 | error_propagate(errp, local_err); | |
1368 | } | |
1369 | ||
3811ef14 IM |
1370 | static int pc_apic_cmp(const void *a, const void *b) |
1371 | { | |
1372 | CPUArchId *apic_a = (CPUArchId *)a; | |
1373 | CPUArchId *apic_b = (CPUArchId *)b; | |
1374 | ||
1375 | return apic_a->arch_id - apic_b->arch_id; | |
1376 | } | |
1377 | ||
7baef5cf | 1378 | /* returns pointer to CPUArchId descriptor that matches CPU's apic_id |
38690a1c | 1379 | * in ms->possible_cpus->cpus, if ms->possible_cpus->cpus has no |
b12227af | 1380 | * entry corresponding to CPU's apic_id returns NULL. |
7baef5cf | 1381 | */ |
1ea69c0e | 1382 | static CPUArchId *pc_find_cpu_slot(MachineState *ms, uint32_t id, int *idx) |
7baef5cf | 1383 | { |
7baef5cf IM |
1384 | CPUArchId apic_id, *found_cpu; |
1385 | ||
1ea69c0e | 1386 | apic_id.arch_id = id; |
38690a1c IM |
1387 | found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, |
1388 | ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), | |
7baef5cf IM |
1389 | pc_apic_cmp); |
1390 | if (found_cpu && idx) { | |
38690a1c | 1391 | *idx = found_cpu - ms->possible_cpus->cpus; |
7baef5cf IM |
1392 | } |
1393 | return found_cpu; | |
1394 | } | |
1395 | ||
5279569e GZ |
1396 | static void pc_cpu_plug(HotplugHandler *hotplug_dev, |
1397 | DeviceState *dev, Error **errp) | |
1398 | { | |
7baef5cf | 1399 | CPUArchId *found_cpu; |
5279569e | 1400 | Error *local_err = NULL; |
1ea69c0e | 1401 | X86CPU *cpu = X86_CPU(dev); |
5279569e | 1402 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
f0bb276b | 1403 | X86MachineState *x86ms = X86_MACHINE(pcms); |
5279569e | 1404 | |
a44a49db | 1405 | if (pcms->acpi_dev) { |
473ac567 | 1406 | hotplug_handler_plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); |
a44a49db IM |
1407 | if (local_err) { |
1408 | goto out; | |
1409 | } | |
5279569e GZ |
1410 | } |
1411 | ||
e3cadac0 | 1412 | /* increment the number of CPUs */ |
f0bb276b PB |
1413 | x86ms->boot_cpus++; |
1414 | if (x86ms->rtc) { | |
1415 | rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); | |
26ef65be | 1416 | } |
f0bb276b PB |
1417 | if (x86ms->fw_cfg) { |
1418 | fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); | |
2d996150 GZ |
1419 | } |
1420 | ||
1ea69c0e | 1421 | found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); |
8aba3842 | 1422 | found_cpu->cpu = OBJECT(dev); |
5279569e GZ |
1423 | out: |
1424 | error_propagate(errp, local_err); | |
1425 | } | |
8872c25a IM |
1426 | static void pc_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, |
1427 | DeviceState *dev, Error **errp) | |
1428 | { | |
73360e27 | 1429 | int idx = -1; |
1ea69c0e | 1430 | X86CPU *cpu = X86_CPU(dev); |
8872c25a IM |
1431 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
1432 | ||
75ba2ddb | 1433 | if (!pcms->acpi_dev) { |
dcfe4805 MA |
1434 | error_setg(errp, "CPU hot unplug not supported without ACPI"); |
1435 | return; | |
75ba2ddb IM |
1436 | } |
1437 | ||
1ea69c0e | 1438 | pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); |
73360e27 IM |
1439 | assert(idx != -1); |
1440 | if (idx == 0) { | |
dcfe4805 MA |
1441 | error_setg(errp, "Boot CPU is unpluggable"); |
1442 | return; | |
73360e27 IM |
1443 | } |
1444 | ||
473ac567 | 1445 | hotplug_handler_unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, |
dcfe4805 | 1446 | errp); |
8872c25a IM |
1447 | } |
1448 | ||
1449 | static void pc_cpu_unplug_cb(HotplugHandler *hotplug_dev, | |
1450 | DeviceState *dev, Error **errp) | |
1451 | { | |
8fe6374e | 1452 | CPUArchId *found_cpu; |
8872c25a | 1453 | Error *local_err = NULL; |
1ea69c0e | 1454 | X86CPU *cpu = X86_CPU(dev); |
8872c25a | 1455 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
f0bb276b | 1456 | X86MachineState *x86ms = X86_MACHINE(pcms); |
8872c25a | 1457 | |
473ac567 | 1458 | hotplug_handler_unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err); |
8872c25a IM |
1459 | if (local_err) { |
1460 | goto out; | |
1461 | } | |
1462 | ||
1ea69c0e | 1463 | found_cpu = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, NULL); |
8fe6374e | 1464 | found_cpu->cpu = NULL; |
981c3dcd | 1465 | qdev_unrealize(dev); |
8872c25a | 1466 | |
e3cadac0 | 1467 | /* decrement the number of CPUs */ |
f0bb276b | 1468 | x86ms->boot_cpus--; |
e3cadac0 | 1469 | /* Update the number of CPUs in CMOS */ |
f0bb276b PB |
1470 | rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); |
1471 | fw_cfg_modify_i16(x86ms->fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); | |
8872c25a IM |
1472 | out: |
1473 | error_propagate(errp, local_err); | |
1474 | } | |
5279569e | 1475 | |
4ec60c76 IM |
1476 | static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, |
1477 | DeviceState *dev, Error **errp) | |
1478 | { | |
1479 | int idx; | |
a15d2728 | 1480 | CPUState *cs; |
e8f7b83e | 1481 | CPUArchId *cpu_slot; |
dcf08bc6 | 1482 | X86CPUTopoIDs topo_ids; |
4ec60c76 | 1483 | X86CPU *cpu = X86_CPU(dev); |
cabea7dc | 1484 | CPUX86State *env = &cpu->env; |
6970c5ff | 1485 | MachineState *ms = MACHINE(hotplug_dev); |
4ec60c76 | 1486 | PCMachineState *pcms = PC_MACHINE(hotplug_dev); |
f0bb276b | 1487 | X86MachineState *x86ms = X86_MACHINE(pcms); |
0e11fc69 LX |
1488 | unsigned int smp_cores = ms->smp.cores; |
1489 | unsigned int smp_threads = ms->smp.threads; | |
53a5e7bd | 1490 | X86CPUTopoInfo topo_info; |
4ec60c76 | 1491 | |
6970c5ff IM |
1492 | if(!object_dynamic_cast(OBJECT(cpu), ms->cpu_type)) { |
1493 | error_setg(errp, "Invalid CPU type, expected cpu type: '%s'", | |
1494 | ms->cpu_type); | |
1495 | return; | |
1496 | } | |
1497 | ||
53a5e7bd BM |
1498 | init_topo_info(&topo_info, x86ms); |
1499 | ||
f0bb276b | 1500 | env->nr_dies = x86ms->smp_dies; |
c24a41bb | 1501 | env->nr_nodes = topo_info.nodes_per_pkg; |
7b225762 | 1502 | env->pkg_offset = x86ms->apicid_pkg_offset(&topo_info); |
cabea7dc | 1503 | |
c26ae610 LX |
1504 | /* |
1505 | * If APIC ID is not set, | |
1506 | * set it based on socket/die/core/thread properties. | |
1507 | */ | |
e8f7b83e | 1508 | if (cpu->apic_id == UNASSIGNED_APIC_ID) { |
c26ae610 | 1509 | int max_socket = (ms->smp.max_cpus - 1) / |
f0bb276b | 1510 | smp_threads / smp_cores / x86ms->smp_dies; |
e8f7b83e | 1511 | |
fea374e7 EH |
1512 | /* |
1513 | * die-id was optional in QEMU 4.0 and older, so keep it optional | |
1514 | * if there's only one die per socket. | |
1515 | */ | |
f0bb276b | 1516 | if (cpu->die_id < 0 && x86ms->smp_dies == 1) { |
fea374e7 EH |
1517 | cpu->die_id = 0; |
1518 | } | |
1519 | ||
e8f7b83e IM |
1520 | if (cpu->socket_id < 0) { |
1521 | error_setg(errp, "CPU socket-id is not set"); | |
1522 | return; | |
1523 | } else if (cpu->socket_id > max_socket) { | |
1524 | error_setg(errp, "Invalid CPU socket-id: %u must be in range 0:%u", | |
1525 | cpu->socket_id, max_socket); | |
1526 | return; | |
23d9cff4 EH |
1527 | } |
1528 | if (cpu->die_id < 0) { | |
1529 | error_setg(errp, "CPU die-id is not set"); | |
1530 | return; | |
f0bb276b | 1531 | } else if (cpu->die_id > x86ms->smp_dies - 1) { |
176d2cda | 1532 | error_setg(errp, "Invalid CPU die-id: %u must be in range 0:%u", |
f0bb276b | 1533 | cpu->die_id, x86ms->smp_dies - 1); |
176d2cda | 1534 | return; |
e8f7b83e IM |
1535 | } |
1536 | if (cpu->core_id < 0) { | |
1537 | error_setg(errp, "CPU core-id is not set"); | |
1538 | return; | |
1539 | } else if (cpu->core_id > (smp_cores - 1)) { | |
1540 | error_setg(errp, "Invalid CPU core-id: %u must be in range 0:%u", | |
1541 | cpu->core_id, smp_cores - 1); | |
1542 | return; | |
1543 | } | |
1544 | if (cpu->thread_id < 0) { | |
1545 | error_setg(errp, "CPU thread-id is not set"); | |
1546 | return; | |
1547 | } else if (cpu->thread_id > (smp_threads - 1)) { | |
1548 | error_setg(errp, "Invalid CPU thread-id: %u must be in range 0:%u", | |
1549 | cpu->thread_id, smp_threads - 1); | |
1550 | return; | |
1551 | } | |
1552 | ||
dcf08bc6 BM |
1553 | topo_ids.pkg_id = cpu->socket_id; |
1554 | topo_ids.die_id = cpu->die_id; | |
1555 | topo_ids.core_id = cpu->core_id; | |
1556 | topo_ids.smt_id = cpu->thread_id; | |
2e26f4ab | 1557 | cpu->apic_id = x86ms->apicid_from_topo_ids(&topo_info, &topo_ids); |
e8f7b83e IM |
1558 | } |
1559 | ||
1ea69c0e | 1560 | cpu_slot = pc_find_cpu_slot(MACHINE(pcms), cpu->apic_id, &idx); |
4ec60c76 | 1561 | if (!cpu_slot) { |
38690a1c IM |
1562 | MachineState *ms = MACHINE(pcms); |
1563 | ||
2e26f4ab | 1564 | x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); |
d65af288 LX |
1565 | error_setg(errp, |
1566 | "Invalid CPU [socket: %u, die: %u, core: %u, thread: %u] with" | |
1567 | " APIC ID %" PRIu32 ", valid index range 0:%d", | |
dcf08bc6 | 1568 | topo_ids.pkg_id, topo_ids.die_id, topo_ids.core_id, topo_ids.smt_id, |
d65af288 | 1569 | cpu->apic_id, ms->possible_cpus->len - 1); |
4ec60c76 IM |
1570 | return; |
1571 | } | |
1572 | ||
1573 | if (cpu_slot->cpu) { | |
1574 | error_setg(errp, "CPU[%d] with APIC ID %" PRIu32 " exists", | |
1575 | idx, cpu->apic_id); | |
1576 | return; | |
1577 | } | |
d89c2b8b IM |
1578 | |
1579 | /* if 'address' properties socket-id/core-id/thread-id are not set, set them | |
c5514d0e | 1580 | * so that machine_query_hotpluggable_cpus would show correct values |
d89c2b8b IM |
1581 | */ |
1582 | /* TODO: move socket_id/core_id/thread_id checks into x86_cpu_realizefn() | |
1583 | * once -smp refactoring is complete and there will be CPU private | |
1584 | * CPUState::nr_cores and CPUState::nr_threads fields instead of globals */ | |
2e26f4ab | 1585 | x86ms->topo_ids_from_apicid(cpu->apic_id, &topo_info, &topo_ids); |
dcf08bc6 | 1586 | if (cpu->socket_id != -1 && cpu->socket_id != topo_ids.pkg_id) { |
d89c2b8b | 1587 | error_setg(errp, "property socket-id: %u doesn't match set apic-id:" |
dcf08bc6 BM |
1588 | " 0x%x (socket-id: %u)", cpu->socket_id, cpu->apic_id, |
1589 | topo_ids.pkg_id); | |
d89c2b8b IM |
1590 | return; |
1591 | } | |
dcf08bc6 | 1592 | cpu->socket_id = topo_ids.pkg_id; |
d89c2b8b | 1593 | |
dcf08bc6 | 1594 | if (cpu->die_id != -1 && cpu->die_id != topo_ids.die_id) { |
176d2cda | 1595 | error_setg(errp, "property die-id: %u doesn't match set apic-id:" |
dcf08bc6 | 1596 | " 0x%x (die-id: %u)", cpu->die_id, cpu->apic_id, topo_ids.die_id); |
176d2cda LX |
1597 | return; |
1598 | } | |
dcf08bc6 | 1599 | cpu->die_id = topo_ids.die_id; |
176d2cda | 1600 | |
dcf08bc6 | 1601 | if (cpu->core_id != -1 && cpu->core_id != topo_ids.core_id) { |
d89c2b8b | 1602 | error_setg(errp, "property core-id: %u doesn't match set apic-id:" |
dcf08bc6 BM |
1603 | " 0x%x (core-id: %u)", cpu->core_id, cpu->apic_id, |
1604 | topo_ids.core_id); | |
d89c2b8b IM |
1605 | return; |
1606 | } | |
dcf08bc6 | 1607 | cpu->core_id = topo_ids.core_id; |
d89c2b8b | 1608 | |
dcf08bc6 | 1609 | if (cpu->thread_id != -1 && cpu->thread_id != topo_ids.smt_id) { |
d89c2b8b | 1610 | error_setg(errp, "property thread-id: %u doesn't match set apic-id:" |
dcf08bc6 BM |
1611 | " 0x%x (thread-id: %u)", cpu->thread_id, cpu->apic_id, |
1612 | topo_ids.smt_id); | |
d89c2b8b IM |
1613 | return; |
1614 | } | |
dcf08bc6 | 1615 | cpu->thread_id = topo_ids.smt_id; |
a15d2728 | 1616 | |
2d384d7c VK |
1617 | if (hyperv_feat_enabled(cpu, HYPERV_FEAT_VPINDEX) && |
1618 | !kvm_hv_vpindex_settable()) { | |
e9688fab RK |
1619 | error_setg(errp, "kernel doesn't allow setting HyperV VP_INDEX"); |
1620 | return; | |
1621 | } | |
1622 | ||
a15d2728 IM |
1623 | cs = CPU(cpu); |
1624 | cs->cpu_index = idx; | |
93b2a8cb | 1625 | |
a0ceb640 | 1626 | numa_cpu_pre_plug(cpu_slot, dev, errp); |
4ec60c76 IM |
1627 | } |
1628 | ||
0ed48fd3 DH |
1629 | static void pc_virtio_md_pci_pre_plug(HotplugHandler *hotplug_dev, |
1630 | DeviceState *dev, Error **errp) | |
a0a49813 DH |
1631 | { |
1632 | HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev); | |
1633 | Error *local_err = NULL; | |
1634 | ||
af1d039f | 1635 | if (!hotplug_dev2 && dev->hotplugged) { |
a0a49813 DH |
1636 | /* |
1637 | * Without a bus hotplug handler, we cannot control the plug/unplug | |
af1d039f DH |
1638 | * order. We should never reach this point when hotplugging on x86, |
1639 | * however, better add a safety net. | |
a0a49813 | 1640 | */ |
0ed48fd3 DH |
1641 | error_setg(errp, "hotplug of virtio based memory devices not supported" |
1642 | " on this bus."); | |
a0a49813 DH |
1643 | return; |
1644 | } | |
1645 | /* | |
1646 | * First, see if we can plug this memory device at all. If that | |
1647 | * succeeds, branch of to the actual hotplug handler. | |
1648 | */ | |
1649 | memory_device_pre_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev), NULL, | |
1650 | &local_err); | |
af1d039f | 1651 | if (!local_err && hotplug_dev2) { |
a0a49813 DH |
1652 | hotplug_handler_pre_plug(hotplug_dev2, dev, &local_err); |
1653 | } | |
1654 | error_propagate(errp, local_err); | |
1655 | } | |
1656 | ||
0ed48fd3 DH |
1657 | static void pc_virtio_md_pci_plug(HotplugHandler *hotplug_dev, |
1658 | DeviceState *dev, Error **errp) | |
a0a49813 DH |
1659 | { |
1660 | HotplugHandler *hotplug_dev2 = qdev_get_bus_hotplug_handler(dev); | |
1661 | Error *local_err = NULL; | |
1662 | ||
1663 | /* | |
1664 | * Plug the memory device first and then branch off to the actual | |
1665 | * hotplug handler. If that one fails, we can easily undo the memory | |
1666 | * device bits. | |
1667 | */ | |
1668 | memory_device_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev)); | |
af1d039f DH |
1669 | if (hotplug_dev2) { |
1670 | hotplug_handler_plug(hotplug_dev2, dev, &local_err); | |
1671 | if (local_err) { | |
1672 | memory_device_unplug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev)); | |
1673 | } | |
a0a49813 DH |
1674 | } |
1675 | error_propagate(errp, local_err); | |
1676 | } | |
1677 | ||
0ed48fd3 DH |
1678 | static void pc_virtio_md_pci_unplug_request(HotplugHandler *hotplug_dev, |
1679 | DeviceState *dev, Error **errp) | |
a0a49813 | 1680 | { |
0ed48fd3 DH |
1681 | /* We don't support hot unplug of virtio based memory devices */ |
1682 | error_setg(errp, "virtio based memory devices cannot be unplugged."); | |
a0a49813 DH |
1683 | } |
1684 | ||
0ed48fd3 DH |
1685 | static void pc_virtio_md_pci_unplug(HotplugHandler *hotplug_dev, |
1686 | DeviceState *dev, Error **errp) | |
a0a49813 | 1687 | { |
0ed48fd3 | 1688 | /* We don't support hot unplug of virtio based memory devices */ |
a0a49813 DH |
1689 | } |
1690 | ||
4ec60c76 IM |
1691 | static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, |
1692 | DeviceState *dev, Error **errp) | |
1693 | { | |
d468115b DH |
1694 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
1695 | pc_memory_pre_plug(hotplug_dev, dev, errp); | |
1696 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { | |
4ec60c76 | 1697 | pc_cpu_pre_plug(hotplug_dev, dev, errp); |
0ed48fd3 DH |
1698 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1699 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1700 | pc_virtio_md_pci_pre_plug(hotplug_dev, dev, errp); | |
4ec60c76 IM |
1701 | } |
1702 | } | |
1703 | ||
95bee274 IM |
1704 | static void pc_machine_device_plug_cb(HotplugHandler *hotplug_dev, |
1705 | DeviceState *dev, Error **errp) | |
1706 | { | |
1707 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { | |
bb6e2f7a | 1708 | pc_memory_plug(hotplug_dev, dev, errp); |
5279569e GZ |
1709 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
1710 | pc_cpu_plug(hotplug_dev, dev, errp); | |
0ed48fd3 DH |
1711 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1712 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1713 | pc_virtio_md_pci_plug(hotplug_dev, dev, errp); | |
95bee274 IM |
1714 | } |
1715 | } | |
1716 | ||
d9c5c5b8 TC |
1717 | static void pc_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev, |
1718 | DeviceState *dev, Error **errp) | |
1719 | { | |
64fec58e | 1720 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
bb6e2f7a | 1721 | pc_memory_unplug_request(hotplug_dev, dev, errp); |
8872c25a IM |
1722 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
1723 | pc_cpu_unplug_request_cb(hotplug_dev, dev, errp); | |
0ed48fd3 DH |
1724 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1725 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1726 | pc_virtio_md_pci_unplug_request(hotplug_dev, dev, errp); | |
64fec58e TC |
1727 | } else { |
1728 | error_setg(errp, "acpi: device unplug request for not supported device" | |
1729 | " type: %s", object_get_typename(OBJECT(dev))); | |
1730 | } | |
d9c5c5b8 TC |
1731 | } |
1732 | ||
232391c1 TC |
1733 | static void pc_machine_device_unplug_cb(HotplugHandler *hotplug_dev, |
1734 | DeviceState *dev, Error **errp) | |
1735 | { | |
f7d3e29d | 1736 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
bb6e2f7a | 1737 | pc_memory_unplug(hotplug_dev, dev, errp); |
8872c25a IM |
1738 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
1739 | pc_cpu_unplug_cb(hotplug_dev, dev, errp); | |
0ed48fd3 DH |
1740 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1741 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
1742 | pc_virtio_md_pci_unplug(hotplug_dev, dev, errp); | |
f7d3e29d TC |
1743 | } else { |
1744 | error_setg(errp, "acpi: device unplug for not supported device" | |
1745 | " type: %s", object_get_typename(OBJECT(dev))); | |
1746 | } | |
232391c1 TC |
1747 | } |
1748 | ||
285816d7 | 1749 | static HotplugHandler *pc_get_hotplug_handler(MachineState *machine, |
95bee274 IM |
1750 | DeviceState *dev) |
1751 | { | |
5279569e | 1752 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || |
a0a49813 | 1753 | object_dynamic_cast(OBJECT(dev), TYPE_CPU) || |
0ed48fd3 DH |
1754 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || |
1755 | object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { | |
95bee274 IM |
1756 | return HOTPLUG_HANDLER(machine); |
1757 | } | |
1758 | ||
38aefb57 | 1759 | return NULL; |
95bee274 IM |
1760 | } |
1761 | ||
bf1e8939 | 1762 | static void |
f2ffbe2b DH |
1763 | pc_machine_get_device_memory_region_size(Object *obj, Visitor *v, |
1764 | const char *name, void *opaque, | |
1765 | Error **errp) | |
bf1e8939 | 1766 | { |
b0c14ec4 | 1767 | MachineState *ms = MACHINE(obj); |
fc3b77e2 IM |
1768 | int64_t value = 0; |
1769 | ||
1770 | if (ms->device_memory) { | |
1771 | value = memory_region_size(&ms->device_memory->mr); | |
1772 | } | |
bf1e8939 | 1773 | |
51e72bc1 | 1774 | visit_type_int(v, name, &value, errp); |
bf1e8939 IM |
1775 | } |
1776 | ||
d7bce999 EB |
1777 | static void pc_machine_get_vmport(Object *obj, Visitor *v, const char *name, |
1778 | void *opaque, Error **errp) | |
9b23cfb7 DDAG |
1779 | { |
1780 | PCMachineState *pcms = PC_MACHINE(obj); | |
d1048bef | 1781 | OnOffAuto vmport = pcms->vmport; |
9b23cfb7 | 1782 | |
51e72bc1 | 1783 | visit_type_OnOffAuto(v, name, &vmport, errp); |
9b23cfb7 DDAG |
1784 | } |
1785 | ||
d7bce999 EB |
1786 | static void pc_machine_set_vmport(Object *obj, Visitor *v, const char *name, |
1787 | void *opaque, Error **errp) | |
9b23cfb7 DDAG |
1788 | { |
1789 | PCMachineState *pcms = PC_MACHINE(obj); | |
1790 | ||
51e72bc1 | 1791 | visit_type_OnOffAuto(v, name, &pcms->vmport, errp); |
9b23cfb7 DDAG |
1792 | } |
1793 | ||
be232eb0 CP |
1794 | static bool pc_machine_get_smbus(Object *obj, Error **errp) |
1795 | { | |
1796 | PCMachineState *pcms = PC_MACHINE(obj); | |
1797 | ||
f5878b03 | 1798 | return pcms->smbus_enabled; |
be232eb0 CP |
1799 | } |
1800 | ||
1801 | static void pc_machine_set_smbus(Object *obj, bool value, Error **errp) | |
1802 | { | |
1803 | PCMachineState *pcms = PC_MACHINE(obj); | |
1804 | ||
f5878b03 | 1805 | pcms->smbus_enabled = value; |
be232eb0 CP |
1806 | } |
1807 | ||
272f0428 CP |
1808 | static bool pc_machine_get_sata(Object *obj, Error **errp) |
1809 | { | |
1810 | PCMachineState *pcms = PC_MACHINE(obj); | |
1811 | ||
f5878b03 | 1812 | return pcms->sata_enabled; |
272f0428 CP |
1813 | } |
1814 | ||
1815 | static void pc_machine_set_sata(Object *obj, bool value, Error **errp) | |
1816 | { | |
1817 | PCMachineState *pcms = PC_MACHINE(obj); | |
1818 | ||
f5878b03 | 1819 | pcms->sata_enabled = value; |
272f0428 CP |
1820 | } |
1821 | ||
feddd2fd CP |
1822 | static bool pc_machine_get_pit(Object *obj, Error **errp) |
1823 | { | |
1824 | PCMachineState *pcms = PC_MACHINE(obj); | |
1825 | ||
f5878b03 | 1826 | return pcms->pit_enabled; |
feddd2fd CP |
1827 | } |
1828 | ||
1829 | static void pc_machine_set_pit(Object *obj, bool value, Error **errp) | |
1830 | { | |
1831 | PCMachineState *pcms = PC_MACHINE(obj); | |
1832 | ||
f5878b03 | 1833 | pcms->pit_enabled = value; |
feddd2fd CP |
1834 | } |
1835 | ||
9a45729d GH |
1836 | static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v, |
1837 | const char *name, void *opaque, | |
1838 | Error **errp) | |
1839 | { | |
1840 | PCMachineState *pcms = PC_MACHINE(obj); | |
1841 | uint64_t value = pcms->max_ram_below_4g; | |
1842 | ||
1843 | visit_type_size(v, name, &value, errp); | |
1844 | } | |
1845 | ||
1846 | static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v, | |
1847 | const char *name, void *opaque, | |
1848 | Error **errp) | |
1849 | { | |
1850 | PCMachineState *pcms = PC_MACHINE(obj); | |
9a45729d GH |
1851 | uint64_t value; |
1852 | ||
668f62ec | 1853 | if (!visit_type_size(v, name, &value, errp)) { |
9a45729d GH |
1854 | return; |
1855 | } | |
1856 | if (value > 4 * GiB) { | |
dcfe4805 | 1857 | error_setg(errp, |
9a45729d GH |
1858 | "Machine option 'max-ram-below-4g=%"PRIu64 |
1859 | "' expects size less than or equal to 4G", value); | |
9a45729d GH |
1860 | return; |
1861 | } | |
1862 | ||
1863 | if (value < 1 * MiB) { | |
1864 | warn_report("Only %" PRIu64 " bytes of RAM below the 4GiB boundary," | |
1865 | "BIOS may not work with less than 1MiB", value); | |
1866 | } | |
1867 | ||
1868 | pcms->max_ram_below_4g = value; | |
1869 | } | |
1870 | ||
bf1e8939 IM |
1871 | static void pc_machine_initfn(Object *obj) |
1872 | { | |
c87b1520 DS |
1873 | PCMachineState *pcms = PC_MACHINE(obj); |
1874 | ||
97fd1ea8 | 1875 | #ifdef CONFIG_VMPORT |
d1048bef | 1876 | pcms->vmport = ON_OFF_AUTO_AUTO; |
97fd1ea8 JM |
1877 | #else |
1878 | pcms->vmport = ON_OFF_AUTO_OFF; | |
1879 | #endif /* CONFIG_VMPORT */ | |
9a45729d | 1880 | pcms->max_ram_below_4g = 0; /* use default */ |
021746c1 WL |
1881 | /* acpi build is enabled by default if machine supports it */ |
1882 | pcms->acpi_build_enabled = PC_MACHINE_GET_CLASS(pcms)->has_acpi_build; | |
f5878b03 CM |
1883 | pcms->smbus_enabled = true; |
1884 | pcms->sata_enabled = true; | |
1885 | pcms->pit_enabled = true; | |
ebc29e1b MA |
1886 | |
1887 | pc_system_flash_create(pcms); | |
6b8d1416 | 1888 | pcms->pcspk = isa_new(TYPE_PC_SPEAKER); |
2e16ec05 GH |
1889 | object_property_add_alias(OBJECT(pcms), "pcspk-audiodev", |
1890 | OBJECT(pcms->pcspk), "audiodev"); | |
bf1e8939 IM |
1891 | } |
1892 | ||
a0628599 | 1893 | static void pc_machine_reset(MachineState *machine) |
ae50c55a ZG |
1894 | { |
1895 | CPUState *cs; | |
1896 | X86CPU *cpu; | |
1897 | ||
1898 | qemu_devices_reset(); | |
1899 | ||
1900 | /* Reset APIC after devices have been reset to cancel | |
1901 | * any changes that qemu_devices_reset() might have done. | |
1902 | */ | |
1903 | CPU_FOREACH(cs) { | |
1904 | cpu = X86_CPU(cs); | |
1905 | ||
1906 | if (cpu->apic_state) { | |
f703a04c | 1907 | device_legacy_reset(cpu->apic_state); |
ae50c55a ZG |
1908 | } |
1909 | } | |
1910 | } | |
1911 | ||
c508bd12 NP |
1912 | static void pc_machine_wakeup(MachineState *machine) |
1913 | { | |
1914 | cpu_synchronize_all_states(); | |
1915 | pc_machine_reset(machine); | |
1916 | cpu_synchronize_all_post_reset(); | |
1917 | } | |
1918 | ||
c6cbc29d PX |
1919 | static bool pc_hotplug_allowed(MachineState *ms, DeviceState *dev, Error **errp) |
1920 | { | |
1921 | X86IOMMUState *iommu = x86_iommu_get_default(); | |
1922 | IntelIOMMUState *intel_iommu; | |
1923 | ||
1924 | if (iommu && | |
1925 | object_dynamic_cast((Object *)iommu, TYPE_INTEL_IOMMU_DEVICE) && | |
1926 | object_dynamic_cast((Object *)dev, "vfio-pci")) { | |
1927 | intel_iommu = INTEL_IOMMU_DEVICE(iommu); | |
1928 | if (!intel_iommu->caching_mode) { | |
1929 | error_setg(errp, "Device assignment is not allowed without " | |
1930 | "enabling caching-mode=on for Intel IOMMU."); | |
1931 | return false; | |
1932 | } | |
1933 | } | |
1934 | ||
1935 | return true; | |
1936 | } | |
1937 | ||
95bee274 IM |
1938 | static void pc_machine_class_init(ObjectClass *oc, void *data) |
1939 | { | |
1940 | MachineClass *mc = MACHINE_CLASS(oc); | |
1941 | PCMachineClass *pcmc = PC_MACHINE_CLASS(oc); | |
1942 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc); | |
1943 | ||
7102fa70 EH |
1944 | pcmc->pci_enabled = true; |
1945 | pcmc->has_acpi_build = true; | |
1946 | pcmc->rsdp_in_ram = true; | |
1947 | pcmc->smbios_defaults = true; | |
1948 | pcmc->smbios_uuid_encoded = true; | |
1949 | pcmc->gigabyte_align = true; | |
1950 | pcmc->has_reserved_memory = true; | |
1951 | pcmc->kvmclock_enabled = true; | |
16a9e8a5 | 1952 | pcmc->enforce_aligned_dimm = true; |
cd4040ec EH |
1953 | /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported |
1954 | * to be used at the moment, 32K should be enough for a while. */ | |
1955 | pcmc->acpi_data_size = 0x20000 + 0x8000; | |
98e753a6 | 1956 | pcmc->linuxboot_dma_enabled = true; |
fda672b5 | 1957 | pcmc->pvh_enabled = true; |
debbdc00 | 1958 | assert(!mc->get_hotplug_handler); |
285816d7 | 1959 | mc->get_hotplug_handler = pc_get_hotplug_handler; |
c6cbc29d | 1960 | mc->hotplug_allowed = pc_hotplug_allowed; |
81ef68e4 SL |
1961 | mc->cpu_index_to_instance_props = x86_cpu_index_to_props; |
1962 | mc->get_default_cpu_node_id = x86_get_default_cpu_node_id; | |
1963 | mc->possible_cpu_arch_ids = x86_possible_cpu_arch_ids; | |
7b8be49d | 1964 | mc->auto_enable_numa_with_memhp = true; |
195784a0 | 1965 | mc->auto_enable_numa_with_memdev = true; |
c5514d0e | 1966 | mc->has_hotpluggable_cpus = true; |
41742767 | 1967 | mc->default_boot_order = "cad"; |
4458fb3a | 1968 | mc->hot_add_cpu = pc_hot_add_cpu; |
6f479566 | 1969 | mc->smp_parse = pc_smp_parse; |
2059839b | 1970 | mc->block_default_type = IF_IDE; |
4458fb3a | 1971 | mc->max_cpus = 255; |
ae50c55a | 1972 | mc->reset = pc_machine_reset; |
c508bd12 | 1973 | mc->wakeup = pc_machine_wakeup; |
4ec60c76 | 1974 | hc->pre_plug = pc_machine_device_pre_plug_cb; |
95bee274 | 1975 | hc->plug = pc_machine_device_plug_cb; |
d9c5c5b8 | 1976 | hc->unplug_request = pc_machine_device_unplug_request_cb; |
232391c1 | 1977 | hc->unplug = pc_machine_device_unplug_cb; |
311ca98d | 1978 | mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE; |
f6a0d06b | 1979 | mc->nvdimm_supported = true; |
bd457782 | 1980 | mc->default_ram_id = "pc.ram"; |
0efc257d | 1981 | |
9a45729d GH |
1982 | object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size", |
1983 | pc_machine_get_max_ram_below_4g, pc_machine_set_max_ram_below_4g, | |
1984 | NULL, NULL); | |
1985 | object_class_property_set_description(oc, PC_MACHINE_MAX_RAM_BELOW_4G, | |
1986 | "Maximum ram below the 4G boundary (32bit boundary)"); | |
1987 | ||
f2ffbe2b DH |
1988 | object_class_property_add(oc, PC_MACHINE_DEVMEM_REGION_SIZE, "int", |
1989 | pc_machine_get_device_memory_region_size, NULL, | |
d2623129 | 1990 | NULL, NULL); |
0efc257d | 1991 | |
0efc257d EH |
1992 | object_class_property_add(oc, PC_MACHINE_VMPORT, "OnOffAuto", |
1993 | pc_machine_get_vmport, pc_machine_set_vmport, | |
d2623129 | 1994 | NULL, NULL); |
0efc257d | 1995 | object_class_property_set_description(oc, PC_MACHINE_VMPORT, |
7eecec7d | 1996 | "Enable vmport (pc & q35)"); |
0efc257d | 1997 | |
be232eb0 | 1998 | object_class_property_add_bool(oc, PC_MACHINE_SMBUS, |
d2623129 | 1999 | pc_machine_get_smbus, pc_machine_set_smbus); |
272f0428 CP |
2000 | |
2001 | object_class_property_add_bool(oc, PC_MACHINE_SATA, | |
d2623129 | 2002 | pc_machine_get_sata, pc_machine_set_sata); |
feddd2fd CP |
2003 | |
2004 | object_class_property_add_bool(oc, PC_MACHINE_PIT, | |
d2623129 | 2005 | pc_machine_get_pit, pc_machine_set_pit); |
95bee274 IM |
2006 | } |
2007 | ||
d5747cac IM |
2008 | static const TypeInfo pc_machine_info = { |
2009 | .name = TYPE_PC_MACHINE, | |
f0bb276b | 2010 | .parent = TYPE_X86_MACHINE, |
d5747cac IM |
2011 | .abstract = true, |
2012 | .instance_size = sizeof(PCMachineState), | |
bf1e8939 | 2013 | .instance_init = pc_machine_initfn, |
d5747cac | 2014 | .class_size = sizeof(PCMachineClass), |
95bee274 IM |
2015 | .class_init = pc_machine_class_init, |
2016 | .interfaces = (InterfaceInfo[]) { | |
2017 | { TYPE_HOTPLUG_HANDLER }, | |
2018 | { } | |
2019 | }, | |
d5747cac IM |
2020 | }; |
2021 | ||
2022 | static void pc_machine_register_types(void) | |
2023 | { | |
2024 | type_register_static(&pc_machine_info); | |
2025 | } | |
2026 | ||
2027 | type_init(pc_machine_register_types) |