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Commit | Line | Data |
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093bc2cd AK |
1 | /* |
2 | * Physical memory management | |
3 | * | |
4 | * Copyright 2011 Red Hat, Inc. and/or its affiliates | |
5 | * | |
6 | * Authors: | |
7 | * Avi Kivity <avi@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
10 | * the COPYING file in the top-level directory. | |
11 | * | |
6b620ca3 PB |
12 | * Contributions after 2012-01-13 are licensed under the terms of the |
13 | * GNU GPL, version 2 or (at your option) any later version. | |
093bc2cd AK |
14 | */ |
15 | ||
d38ea87a | 16 | #include "qemu/osdep.h" |
21786c7e | 17 | #include "qemu/log.h" |
da34e65c | 18 | #include "qapi/error.h" |
022c62cb PB |
19 | #include "exec/memory.h" |
20 | #include "exec/address-spaces.h" | |
409ddd01 | 21 | #include "qapi/visitor.h" |
1de7afc9 | 22 | #include "qemu/bitops.h" |
8c56c1a5 | 23 | #include "qemu/error-report.h" |
db725815 | 24 | #include "qemu/main-loop.h" |
b6b71cb5 | 25 | #include "qemu/qemu-print.h" |
2c9b15ca | 26 | #include "qom/object.h" |
8b7a5507 | 27 | #include "trace.h" |
093bc2cd | 28 | |
022c62cb | 29 | #include "exec/memory-internal.h" |
220c3ebd | 30 | #include "exec/ram_addr.h" |
8c56c1a5 | 31 | #include "sysemu/kvm.h" |
54d31236 | 32 | #include "sysemu/runstate.h" |
14a48c1d | 33 | #include "sysemu/tcg.h" |
940e43aa | 34 | #include "qemu/accel.h" |
8072aae3 | 35 | #include "hw/boards.h" |
b08199c6 | 36 | #include "migration/vmstate.h" |
67d95c15 | 37 | |
d197063f PB |
38 | //#define DEBUG_UNASSIGNED |
39 | ||
22bde714 JK |
40 | static unsigned memory_region_transaction_depth; |
41 | static bool memory_region_update_pending; | |
4dc56152 | 42 | static bool ioeventfd_update_pending; |
ae7a2bca | 43 | bool global_dirty_log; |
7664e80c | 44 | |
eae3eb3e | 45 | static QTAILQ_HEAD(, MemoryListener) memory_listeners |
72e22d2f | 46 | = QTAILQ_HEAD_INITIALIZER(memory_listeners); |
4ef4db86 | 47 | |
0d673e36 AK |
48 | static QTAILQ_HEAD(, AddressSpace) address_spaces |
49 | = QTAILQ_HEAD_INITIALIZER(address_spaces); | |
50 | ||
967dc9b1 AK |
51 | static GHashTable *flat_views; |
52 | ||
093bc2cd AK |
53 | typedef struct AddrRange AddrRange; |
54 | ||
8417cebf | 55 | /* |
c9cdaa3a | 56 | * Note that signed integers are needed for negative offsetting in aliases |
8417cebf AK |
57 | * (large MemoryRegion::alias_offset). |
58 | */ | |
093bc2cd | 59 | struct AddrRange { |
08dafab4 AK |
60 | Int128 start; |
61 | Int128 size; | |
093bc2cd AK |
62 | }; |
63 | ||
08dafab4 | 64 | static AddrRange addrrange_make(Int128 start, Int128 size) |
093bc2cd AK |
65 | { |
66 | return (AddrRange) { start, size }; | |
67 | } | |
68 | ||
69 | static bool addrrange_equal(AddrRange r1, AddrRange r2) | |
70 | { | |
08dafab4 | 71 | return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size); |
093bc2cd AK |
72 | } |
73 | ||
08dafab4 | 74 | static Int128 addrrange_end(AddrRange r) |
093bc2cd | 75 | { |
08dafab4 | 76 | return int128_add(r.start, r.size); |
093bc2cd AK |
77 | } |
78 | ||
08dafab4 | 79 | static AddrRange addrrange_shift(AddrRange range, Int128 delta) |
093bc2cd | 80 | { |
08dafab4 | 81 | int128_addto(&range.start, delta); |
093bc2cd AK |
82 | return range; |
83 | } | |
84 | ||
08dafab4 AK |
85 | static bool addrrange_contains(AddrRange range, Int128 addr) |
86 | { | |
87 | return int128_ge(addr, range.start) | |
88 | && int128_lt(addr, addrrange_end(range)); | |
89 | } | |
90 | ||
093bc2cd AK |
91 | static bool addrrange_intersects(AddrRange r1, AddrRange r2) |
92 | { | |
08dafab4 AK |
93 | return addrrange_contains(r1, r2.start) |
94 | || addrrange_contains(r2, r1.start); | |
093bc2cd AK |
95 | } |
96 | ||
97 | static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2) | |
98 | { | |
08dafab4 AK |
99 | Int128 start = int128_max(r1.start, r2.start); |
100 | Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2)); | |
101 | return addrrange_make(start, int128_sub(end, start)); | |
093bc2cd AK |
102 | } |
103 | ||
0e0d36b4 AK |
104 | enum ListenerDirection { Forward, Reverse }; |
105 | ||
7376e582 | 106 | #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \ |
0e0d36b4 AK |
107 | do { \ |
108 | MemoryListener *_listener; \ | |
109 | \ | |
110 | switch (_direction) { \ | |
111 | case Forward: \ | |
112 | QTAILQ_FOREACH(_listener, &memory_listeners, link) { \ | |
975aefe0 AK |
113 | if (_listener->_callback) { \ |
114 | _listener->_callback(_listener, ##_args); \ | |
115 | } \ | |
0e0d36b4 AK |
116 | } \ |
117 | break; \ | |
118 | case Reverse: \ | |
eae3eb3e | 119 | QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \ |
975aefe0 AK |
120 | if (_listener->_callback) { \ |
121 | _listener->_callback(_listener, ##_args); \ | |
122 | } \ | |
0e0d36b4 AK |
123 | } \ |
124 | break; \ | |
125 | default: \ | |
126 | abort(); \ | |
127 | } \ | |
128 | } while (0) | |
129 | ||
9a54635d | 130 | #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \ |
7376e582 AK |
131 | do { \ |
132 | MemoryListener *_listener; \ | |
133 | \ | |
134 | switch (_direction) { \ | |
135 | case Forward: \ | |
eae3eb3e | 136 | QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \ |
9a54635d | 137 | if (_listener->_callback) { \ |
7376e582 AK |
138 | _listener->_callback(_listener, _section, ##_args); \ |
139 | } \ | |
140 | } \ | |
141 | break; \ | |
142 | case Reverse: \ | |
eae3eb3e | 143 | QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \ |
9a54635d | 144 | if (_listener->_callback) { \ |
7376e582 AK |
145 | _listener->_callback(_listener, _section, ##_args); \ |
146 | } \ | |
147 | } \ | |
148 | break; \ | |
149 | default: \ | |
150 | abort(); \ | |
151 | } \ | |
152 | } while (0) | |
153 | ||
dfde4e6e | 154 | /* No need to ref/unref .mr, the FlatRange keeps it alive. */ |
b2dfd71c | 155 | #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \ |
9c1f8f44 | 156 | do { \ |
16620684 AK |
157 | MemoryRegionSection mrs = section_from_flat_range(fr, \ |
158 | address_space_to_flatview(as)); \ | |
9a54635d | 159 | MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \ |
9c1f8f44 | 160 | } while(0) |
0e0d36b4 | 161 | |
093bc2cd AK |
162 | struct CoalescedMemoryRange { |
163 | AddrRange addr; | |
164 | QTAILQ_ENTRY(CoalescedMemoryRange) link; | |
165 | }; | |
166 | ||
3e9d69e7 AK |
167 | struct MemoryRegionIoeventfd { |
168 | AddrRange addr; | |
169 | bool match_data; | |
170 | uint64_t data; | |
753d5e14 | 171 | EventNotifier *e; |
3e9d69e7 AK |
172 | }; |
173 | ||
73bb753d TB |
174 | static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a, |
175 | MemoryRegionIoeventfd *b) | |
3e9d69e7 | 176 | { |
73bb753d | 177 | if (int128_lt(a->addr.start, b->addr.start)) { |
3e9d69e7 | 178 | return true; |
73bb753d | 179 | } else if (int128_gt(a->addr.start, b->addr.start)) { |
3e9d69e7 | 180 | return false; |
73bb753d | 181 | } else if (int128_lt(a->addr.size, b->addr.size)) { |
3e9d69e7 | 182 | return true; |
73bb753d | 183 | } else if (int128_gt(a->addr.size, b->addr.size)) { |
3e9d69e7 | 184 | return false; |
73bb753d | 185 | } else if (a->match_data < b->match_data) { |
3e9d69e7 | 186 | return true; |
73bb753d | 187 | } else if (a->match_data > b->match_data) { |
3e9d69e7 | 188 | return false; |
73bb753d TB |
189 | } else if (a->match_data) { |
190 | if (a->data < b->data) { | |
3e9d69e7 | 191 | return true; |
73bb753d | 192 | } else if (a->data > b->data) { |
3e9d69e7 AK |
193 | return false; |
194 | } | |
195 | } | |
73bb753d | 196 | if (a->e < b->e) { |
3e9d69e7 | 197 | return true; |
73bb753d | 198 | } else if (a->e > b->e) { |
3e9d69e7 AK |
199 | return false; |
200 | } | |
201 | return false; | |
202 | } | |
203 | ||
73bb753d TB |
204 | static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a, |
205 | MemoryRegionIoeventfd *b) | |
3e9d69e7 | 206 | { |
e6ffd757 EA |
207 | if (int128_eq(a->addr.start, b->addr.start) && |
208 | (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) || | |
209 | (int128_eq(a->addr.size, b->addr.size) && | |
210 | (a->match_data == b->match_data) && | |
211 | ((a->match_data && (a->data == b->data)) || !a->match_data) && | |
212 | (a->e == b->e)))) | |
213 | return true; | |
214 | ||
215 | return false; | |
3e9d69e7 AK |
216 | } |
217 | ||
093bc2cd AK |
218 | /* Range of memory in the global map. Addresses are absolute. */ |
219 | struct FlatRange { | |
220 | MemoryRegion *mr; | |
a8170e5e | 221 | hwaddr offset_in_region; |
093bc2cd | 222 | AddrRange addr; |
5a583347 | 223 | uint8_t dirty_log_mask; |
b138e654 | 224 | bool romd_mode; |
fb1cd6f9 | 225 | bool readonly; |
c26763f8 | 226 | bool nonvolatile; |
093bc2cd AK |
227 | }; |
228 | ||
093bc2cd AK |
229 | #define FOR_EACH_FLAT_RANGE(var, view) \ |
230 | for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var) | |
231 | ||
9c1f8f44 | 232 | static inline MemoryRegionSection |
16620684 | 233 | section_from_flat_range(FlatRange *fr, FlatView *fv) |
9c1f8f44 PB |
234 | { |
235 | return (MemoryRegionSection) { | |
236 | .mr = fr->mr, | |
16620684 | 237 | .fv = fv, |
9c1f8f44 PB |
238 | .offset_within_region = fr->offset_in_region, |
239 | .size = fr->addr.size, | |
240 | .offset_within_address_space = int128_get64(fr->addr.start), | |
241 | .readonly = fr->readonly, | |
c26763f8 | 242 | .nonvolatile = fr->nonvolatile, |
9c1f8f44 PB |
243 | }; |
244 | } | |
245 | ||
093bc2cd AK |
246 | static bool flatrange_equal(FlatRange *a, FlatRange *b) |
247 | { | |
248 | return a->mr == b->mr | |
249 | && addrrange_equal(a->addr, b->addr) | |
d0a9b5bc | 250 | && a->offset_in_region == b->offset_in_region |
b138e654 | 251 | && a->romd_mode == b->romd_mode |
c26763f8 MAL |
252 | && a->readonly == b->readonly |
253 | && a->nonvolatile == b->nonvolatile; | |
093bc2cd AK |
254 | } |
255 | ||
89c177bb | 256 | static FlatView *flatview_new(MemoryRegion *mr_root) |
093bc2cd | 257 | { |
cc94cd6d AK |
258 | FlatView *view; |
259 | ||
260 | view = g_new0(FlatView, 1); | |
856d7245 | 261 | view->ref = 1; |
89c177bb AK |
262 | view->root = mr_root; |
263 | memory_region_ref(mr_root); | |
02d9651d | 264 | trace_flatview_new(view, mr_root); |
cc94cd6d AK |
265 | |
266 | return view; | |
093bc2cd AK |
267 | } |
268 | ||
269 | /* Insert a range into a given position. Caller is responsible for maintaining | |
270 | * sorting order. | |
271 | */ | |
272 | static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range) | |
273 | { | |
274 | if (view->nr == view->nr_allocated) { | |
275 | view->nr_allocated = MAX(2 * view->nr, 10); | |
7267c094 | 276 | view->ranges = g_realloc(view->ranges, |
093bc2cd AK |
277 | view->nr_allocated * sizeof(*view->ranges)); |
278 | } | |
279 | memmove(view->ranges + pos + 1, view->ranges + pos, | |
280 | (view->nr - pos) * sizeof(FlatRange)); | |
281 | view->ranges[pos] = *range; | |
dfde4e6e | 282 | memory_region_ref(range->mr); |
093bc2cd AK |
283 | ++view->nr; |
284 | } | |
285 | ||
286 | static void flatview_destroy(FlatView *view) | |
287 | { | |
dfde4e6e PB |
288 | int i; |
289 | ||
02d9651d | 290 | trace_flatview_destroy(view, view->root); |
66a6df1d AK |
291 | if (view->dispatch) { |
292 | address_space_dispatch_free(view->dispatch); | |
293 | } | |
dfde4e6e PB |
294 | for (i = 0; i < view->nr; i++) { |
295 | memory_region_unref(view->ranges[i].mr); | |
296 | } | |
7267c094 | 297 | g_free(view->ranges); |
89c177bb | 298 | memory_region_unref(view->root); |
a9a0c06d | 299 | g_free(view); |
093bc2cd AK |
300 | } |
301 | ||
447b0d0b | 302 | static bool flatview_ref(FlatView *view) |
856d7245 | 303 | { |
d73415a3 | 304 | return qatomic_fetch_inc_nonzero(&view->ref) > 0; |
856d7245 PB |
305 | } |
306 | ||
48564041 | 307 | void flatview_unref(FlatView *view) |
856d7245 | 308 | { |
d73415a3 | 309 | if (qatomic_fetch_dec(&view->ref) == 1) { |
02d9651d | 310 | trace_flatview_destroy_rcu(view, view->root); |
092aa2fc | 311 | assert(view->root); |
66a6df1d | 312 | call_rcu(view, flatview_destroy, rcu); |
856d7245 PB |
313 | } |
314 | } | |
315 | ||
3d8e6bf9 AK |
316 | static bool can_merge(FlatRange *r1, FlatRange *r2) |
317 | { | |
08dafab4 | 318 | return int128_eq(addrrange_end(r1->addr), r2->addr.start) |
3d8e6bf9 | 319 | && r1->mr == r2->mr |
08dafab4 AK |
320 | && int128_eq(int128_add(int128_make64(r1->offset_in_region), |
321 | r1->addr.size), | |
322 | int128_make64(r2->offset_in_region)) | |
d0a9b5bc | 323 | && r1->dirty_log_mask == r2->dirty_log_mask |
b138e654 | 324 | && r1->romd_mode == r2->romd_mode |
c26763f8 MAL |
325 | && r1->readonly == r2->readonly |
326 | && r1->nonvolatile == r2->nonvolatile; | |
3d8e6bf9 AK |
327 | } |
328 | ||
8508e024 | 329 | /* Attempt to simplify a view by merging adjacent ranges */ |
3d8e6bf9 AK |
330 | static void flatview_simplify(FlatView *view) |
331 | { | |
838ec117 | 332 | unsigned i, j, k; |
3d8e6bf9 AK |
333 | |
334 | i = 0; | |
335 | while (i < view->nr) { | |
336 | j = i + 1; | |
337 | while (j < view->nr | |
338 | && can_merge(&view->ranges[j-1], &view->ranges[j])) { | |
08dafab4 | 339 | int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size); |
3d8e6bf9 AK |
340 | ++j; |
341 | } | |
342 | ++i; | |
838ec117 KW |
343 | for (k = i; k < j; k++) { |
344 | memory_region_unref(view->ranges[k].mr); | |
345 | } | |
3d8e6bf9 AK |
346 | memmove(&view->ranges[i], &view->ranges[j], |
347 | (view->nr - j) * sizeof(view->ranges[j])); | |
348 | view->nr -= j - i; | |
349 | } | |
350 | } | |
351 | ||
e7342aa3 PB |
352 | static bool memory_region_big_endian(MemoryRegion *mr) |
353 | { | |
354 | #ifdef TARGET_WORDS_BIGENDIAN | |
355 | return mr->ops->endianness != DEVICE_LITTLE_ENDIAN; | |
356 | #else | |
357 | return mr->ops->endianness == DEVICE_BIG_ENDIAN; | |
358 | #endif | |
359 | } | |
360 | ||
9bf825bf | 361 | static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op) |
e11ef3d1 | 362 | { |
9bf825bf TN |
363 | if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) { |
364 | switch (op & MO_SIZE) { | |
365 | case MO_8: | |
e11ef3d1 | 366 | break; |
9bf825bf | 367 | case MO_16: |
e11ef3d1 PB |
368 | *data = bswap16(*data); |
369 | break; | |
9bf825bf | 370 | case MO_32: |
e11ef3d1 PB |
371 | *data = bswap32(*data); |
372 | break; | |
9bf825bf | 373 | case MO_64: |
e11ef3d1 PB |
374 | *data = bswap64(*data); |
375 | break; | |
376 | default: | |
9bf825bf | 377 | g_assert_not_reached(); |
e11ef3d1 PB |
378 | } |
379 | } | |
380 | } | |
381 | ||
3c754a93 | 382 | static inline void memory_region_shift_read_access(uint64_t *value, |
98f52cdb | 383 | signed shift, |
3c754a93 PMD |
384 | uint64_t mask, |
385 | uint64_t tmp) | |
386 | { | |
98f52cdb PMD |
387 | if (shift >= 0) { |
388 | *value |= (tmp & mask) << shift; | |
389 | } else { | |
390 | *value |= (tmp & mask) >> -shift; | |
391 | } | |
3c754a93 PMD |
392 | } |
393 | ||
394 | static inline uint64_t memory_region_shift_write_access(uint64_t *value, | |
98f52cdb | 395 | signed shift, |
3c754a93 PMD |
396 | uint64_t mask) |
397 | { | |
98f52cdb PMD |
398 | uint64_t tmp; |
399 | ||
400 | if (shift >= 0) { | |
401 | tmp = (*value >> shift) & mask; | |
402 | } else { | |
403 | tmp = (*value << -shift) & mask; | |
404 | } | |
405 | ||
406 | return tmp; | |
3c754a93 PMD |
407 | } |
408 | ||
4779dc1d HB |
409 | static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset) |
410 | { | |
411 | MemoryRegion *root; | |
412 | hwaddr abs_addr = offset; | |
413 | ||
414 | abs_addr += mr->addr; | |
415 | for (root = mr; root->container; ) { | |
416 | root = root->container; | |
417 | abs_addr += root->addr; | |
418 | } | |
419 | ||
420 | return abs_addr; | |
421 | } | |
422 | ||
5a68be94 HB |
423 | static int get_cpu_index(void) |
424 | { | |
425 | if (current_cpu) { | |
426 | return current_cpu->cpu_index; | |
427 | } | |
428 | return -1; | |
429 | } | |
430 | ||
cc05c43a | 431 | static MemTxResult memory_region_read_accessor(MemoryRegion *mr, |
ce5d2f33 PB |
432 | hwaddr addr, |
433 | uint64_t *value, | |
434 | unsigned size, | |
98f52cdb | 435 | signed shift, |
cc05c43a PM |
436 | uint64_t mask, |
437 | MemTxAttrs attrs) | |
ce5d2f33 | 438 | { |
ce5d2f33 PB |
439 | uint64_t tmp; |
440 | ||
cc05c43a | 441 | tmp = mr->ops->read(mr->opaque, addr, size); |
23d92d68 | 442 | if (mr->subpage) { |
5a68be94 | 443 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 444 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) { |
4779dc1d | 445 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 446 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 447 | } |
3c754a93 | 448 | memory_region_shift_read_access(value, shift, mask, tmp); |
cc05c43a | 449 | return MEMTX_OK; |
ce5d2f33 PB |
450 | } |
451 | ||
cc05c43a PM |
452 | static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr, |
453 | hwaddr addr, | |
454 | uint64_t *value, | |
455 | unsigned size, | |
98f52cdb | 456 | signed shift, |
cc05c43a PM |
457 | uint64_t mask, |
458 | MemTxAttrs attrs) | |
164a4dcd | 459 | { |
cc05c43a PM |
460 | uint64_t tmp = 0; |
461 | MemTxResult r; | |
164a4dcd | 462 | |
cc05c43a | 463 | r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); |
23d92d68 | 464 | if (mr->subpage) { |
5a68be94 | 465 | trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 466 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) { |
4779dc1d | 467 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 468 | trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 469 | } |
3c754a93 | 470 | memory_region_shift_read_access(value, shift, mask, tmp); |
cc05c43a | 471 | return r; |
164a4dcd AK |
472 | } |
473 | ||
cc05c43a PM |
474 | static MemTxResult memory_region_write_accessor(MemoryRegion *mr, |
475 | hwaddr addr, | |
476 | uint64_t *value, | |
477 | unsigned size, | |
98f52cdb | 478 | signed shift, |
cc05c43a PM |
479 | uint64_t mask, |
480 | MemTxAttrs attrs) | |
164a4dcd | 481 | { |
3c754a93 | 482 | uint64_t tmp = memory_region_shift_write_access(value, shift, mask); |
164a4dcd | 483 | |
23d92d68 | 484 | if (mr->subpage) { |
5a68be94 | 485 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 486 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) { |
4779dc1d | 487 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 488 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 489 | } |
164a4dcd | 490 | mr->ops->write(mr->opaque, addr, tmp, size); |
cc05c43a | 491 | return MEMTX_OK; |
164a4dcd AK |
492 | } |
493 | ||
cc05c43a PM |
494 | static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr, |
495 | hwaddr addr, | |
496 | uint64_t *value, | |
497 | unsigned size, | |
98f52cdb | 498 | signed shift, |
cc05c43a PM |
499 | uint64_t mask, |
500 | MemTxAttrs attrs) | |
501 | { | |
3c754a93 | 502 | uint64_t tmp = memory_region_shift_write_access(value, shift, mask); |
cc05c43a | 503 | |
23d92d68 | 504 | if (mr->subpage) { |
5a68be94 | 505 | trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size); |
380ea843 | 506 | } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) { |
4779dc1d | 507 | hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr); |
5a68be94 | 508 | trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size); |
23d92d68 | 509 | } |
cc05c43a PM |
510 | return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs); |
511 | } | |
512 | ||
513 | static MemTxResult access_with_adjusted_size(hwaddr addr, | |
164a4dcd AK |
514 | uint64_t *value, |
515 | unsigned size, | |
516 | unsigned access_size_min, | |
517 | unsigned access_size_max, | |
05e015f7 KF |
518 | MemTxResult (*access_fn) |
519 | (MemoryRegion *mr, | |
520 | hwaddr addr, | |
521 | uint64_t *value, | |
522 | unsigned size, | |
98f52cdb | 523 | signed shift, |
05e015f7 KF |
524 | uint64_t mask, |
525 | MemTxAttrs attrs), | |
cc05c43a PM |
526 | MemoryRegion *mr, |
527 | MemTxAttrs attrs) | |
164a4dcd AK |
528 | { |
529 | uint64_t access_mask; | |
530 | unsigned access_size; | |
531 | unsigned i; | |
cc05c43a | 532 | MemTxResult r = MEMTX_OK; |
164a4dcd AK |
533 | |
534 | if (!access_size_min) { | |
535 | access_size_min = 1; | |
536 | } | |
537 | if (!access_size_max) { | |
538 | access_size_max = 4; | |
539 | } | |
ce5d2f33 PB |
540 | |
541 | /* FIXME: support unaligned access? */ | |
164a4dcd | 542 | access_size = MAX(MIN(size, access_size_max), access_size_min); |
36960b4d | 543 | access_mask = MAKE_64BIT_MASK(0, access_size * 8); |
e7342aa3 PB |
544 | if (memory_region_big_endian(mr)) { |
545 | for (i = 0; i < size; i += access_size) { | |
05e015f7 | 546 | r |= access_fn(mr, addr + i, value, access_size, |
cc05c43a | 547 | (size - access_size - i) * 8, access_mask, attrs); |
e7342aa3 PB |
548 | } |
549 | } else { | |
550 | for (i = 0; i < size; i += access_size) { | |
05e015f7 | 551 | r |= access_fn(mr, addr + i, value, access_size, i * 8, |
cc05c43a | 552 | access_mask, attrs); |
e7342aa3 | 553 | } |
164a4dcd | 554 | } |
cc05c43a | 555 | return r; |
164a4dcd AK |
556 | } |
557 | ||
e2177955 AK |
558 | static AddressSpace *memory_region_to_address_space(MemoryRegion *mr) |
559 | { | |
0d673e36 AK |
560 | AddressSpace *as; |
561 | ||
feca4ac1 PB |
562 | while (mr->container) { |
563 | mr = mr->container; | |
e2177955 | 564 | } |
0d673e36 AK |
565 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
566 | if (mr == as->root) { | |
567 | return as; | |
568 | } | |
e2177955 | 569 | } |
eed2bacf | 570 | return NULL; |
e2177955 AK |
571 | } |
572 | ||
093bc2cd AK |
573 | /* Render a memory region into the global view. Ranges in @view obscure |
574 | * ranges in @mr. | |
575 | */ | |
576 | static void render_memory_region(FlatView *view, | |
577 | MemoryRegion *mr, | |
08dafab4 | 578 | Int128 base, |
fb1cd6f9 | 579 | AddrRange clip, |
c26763f8 MAL |
580 | bool readonly, |
581 | bool nonvolatile) | |
093bc2cd AK |
582 | { |
583 | MemoryRegion *subregion; | |
584 | unsigned i; | |
a8170e5e | 585 | hwaddr offset_in_region; |
08dafab4 AK |
586 | Int128 remain; |
587 | Int128 now; | |
093bc2cd AK |
588 | FlatRange fr; |
589 | AddrRange tmp; | |
590 | ||
6bba19ba AK |
591 | if (!mr->enabled) { |
592 | return; | |
593 | } | |
594 | ||
08dafab4 | 595 | int128_addto(&base, int128_make64(mr->addr)); |
fb1cd6f9 | 596 | readonly |= mr->readonly; |
c26763f8 | 597 | nonvolatile |= mr->nonvolatile; |
093bc2cd AK |
598 | |
599 | tmp = addrrange_make(base, mr->size); | |
600 | ||
601 | if (!addrrange_intersects(tmp, clip)) { | |
602 | return; | |
603 | } | |
604 | ||
605 | clip = addrrange_intersection(tmp, clip); | |
606 | ||
607 | if (mr->alias) { | |
08dafab4 AK |
608 | int128_subfrom(&base, int128_make64(mr->alias->addr)); |
609 | int128_subfrom(&base, int128_make64(mr->alias_offset)); | |
c26763f8 MAL |
610 | render_memory_region(view, mr->alias, base, clip, |
611 | readonly, nonvolatile); | |
093bc2cd AK |
612 | return; |
613 | } | |
614 | ||
615 | /* Render subregions in priority order. */ | |
616 | QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) { | |
c26763f8 MAL |
617 | render_memory_region(view, subregion, base, clip, |
618 | readonly, nonvolatile); | |
093bc2cd AK |
619 | } |
620 | ||
14a3c10a | 621 | if (!mr->terminates) { |
093bc2cd AK |
622 | return; |
623 | } | |
624 | ||
08dafab4 | 625 | offset_in_region = int128_get64(int128_sub(clip.start, base)); |
093bc2cd AK |
626 | base = clip.start; |
627 | remain = clip.size; | |
628 | ||
2eb74e1a | 629 | fr.mr = mr; |
6f6a5ef3 | 630 | fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr); |
b138e654 | 631 | fr.romd_mode = mr->romd_mode; |
2eb74e1a | 632 | fr.readonly = readonly; |
c26763f8 | 633 | fr.nonvolatile = nonvolatile; |
2eb74e1a | 634 | |
093bc2cd | 635 | /* Render the region itself into any gaps left by the current view. */ |
08dafab4 AK |
636 | for (i = 0; i < view->nr && int128_nz(remain); ++i) { |
637 | if (int128_ge(base, addrrange_end(view->ranges[i].addr))) { | |
093bc2cd AK |
638 | continue; |
639 | } | |
08dafab4 AK |
640 | if (int128_lt(base, view->ranges[i].addr.start)) { |
641 | now = int128_min(remain, | |
642 | int128_sub(view->ranges[i].addr.start, base)); | |
093bc2cd AK |
643 | fr.offset_in_region = offset_in_region; |
644 | fr.addr = addrrange_make(base, now); | |
645 | flatview_insert(view, i, &fr); | |
646 | ++i; | |
08dafab4 AK |
647 | int128_addto(&base, now); |
648 | offset_in_region += int128_get64(now); | |
649 | int128_subfrom(&remain, now); | |
093bc2cd | 650 | } |
d26a8cae AK |
651 | now = int128_sub(int128_min(int128_add(base, remain), |
652 | addrrange_end(view->ranges[i].addr)), | |
653 | base); | |
654 | int128_addto(&base, now); | |
655 | offset_in_region += int128_get64(now); | |
656 | int128_subfrom(&remain, now); | |
093bc2cd | 657 | } |
08dafab4 | 658 | if (int128_nz(remain)) { |
093bc2cd AK |
659 | fr.offset_in_region = offset_in_region; |
660 | fr.addr = addrrange_make(base, remain); | |
661 | flatview_insert(view, i, &fr); | |
662 | } | |
663 | } | |
664 | ||
fb5ef4ee AB |
665 | void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque) |
666 | { | |
667 | FlatRange *fr; | |
668 | ||
669 | assert(fv); | |
670 | assert(cb); | |
671 | ||
672 | FOR_EACH_FLAT_RANGE(fr, fv) { | |
b3566001 PM |
673 | if (cb(fr->addr.start, fr->addr.size, fr->mr, |
674 | fr->offset_in_region, opaque)) { | |
fb5ef4ee | 675 | break; |
b3566001 | 676 | } |
fb5ef4ee AB |
677 | } |
678 | } | |
679 | ||
89c177bb AK |
680 | static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr) |
681 | { | |
e673ba9a PB |
682 | while (mr->enabled) { |
683 | if (mr->alias) { | |
684 | if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) { | |
685 | /* The alias is included in its entirety. Use it as | |
686 | * the "real" root, so that we can share more FlatViews. | |
687 | */ | |
688 | mr = mr->alias; | |
689 | continue; | |
690 | } | |
691 | } else if (!mr->terminates) { | |
692 | unsigned int found = 0; | |
693 | MemoryRegion *child, *next = NULL; | |
694 | QTAILQ_FOREACH(child, &mr->subregions, subregions_link) { | |
695 | if (child->enabled) { | |
696 | if (++found > 1) { | |
697 | next = NULL; | |
698 | break; | |
699 | } | |
700 | if (!child->addr && int128_ge(mr->size, child->size)) { | |
701 | /* A child is included in its entirety. If it's the only | |
702 | * enabled one, use it in the hope of finding an alias down the | |
703 | * way. This will also let us share FlatViews. | |
704 | */ | |
705 | next = child; | |
706 | } | |
707 | } | |
708 | } | |
092aa2fc AK |
709 | if (found == 0) { |
710 | return NULL; | |
711 | } | |
e673ba9a PB |
712 | if (next) { |
713 | mr = next; | |
714 | continue; | |
715 | } | |
716 | } | |
717 | ||
092aa2fc | 718 | return mr; |
89c177bb AK |
719 | } |
720 | ||
092aa2fc | 721 | return NULL; |
89c177bb AK |
722 | } |
723 | ||
093bc2cd | 724 | /* Render a memory topology into a list of disjoint absolute ranges. */ |
a9a0c06d | 725 | static FlatView *generate_memory_topology(MemoryRegion *mr) |
093bc2cd | 726 | { |
9bf561e3 | 727 | int i; |
a9a0c06d | 728 | FlatView *view; |
093bc2cd | 729 | |
89c177bb | 730 | view = flatview_new(mr); |
093bc2cd | 731 | |
83f3c251 | 732 | if (mr) { |
a9a0c06d | 733 | render_memory_region(view, mr, int128_zero(), |
c26763f8 MAL |
734 | addrrange_make(int128_zero(), int128_2_64()), |
735 | false, false); | |
83f3c251 | 736 | } |
a9a0c06d | 737 | flatview_simplify(view); |
093bc2cd | 738 | |
9bf561e3 AK |
739 | view->dispatch = address_space_dispatch_new(view); |
740 | for (i = 0; i < view->nr; i++) { | |
741 | MemoryRegionSection mrs = | |
742 | section_from_flat_range(&view->ranges[i], view); | |
743 | flatview_add_to_dispatch(view, &mrs); | |
744 | } | |
745 | address_space_dispatch_compact(view->dispatch); | |
967dc9b1 | 746 | g_hash_table_replace(flat_views, mr, view); |
9bf561e3 | 747 | |
093bc2cd AK |
748 | return view; |
749 | } | |
750 | ||
3e9d69e7 AK |
751 | static void address_space_add_del_ioeventfds(AddressSpace *as, |
752 | MemoryRegionIoeventfd *fds_new, | |
753 | unsigned fds_new_nb, | |
754 | MemoryRegionIoeventfd *fds_old, | |
755 | unsigned fds_old_nb) | |
756 | { | |
757 | unsigned iold, inew; | |
80a1ea37 AK |
758 | MemoryRegionIoeventfd *fd; |
759 | MemoryRegionSection section; | |
3e9d69e7 AK |
760 | |
761 | /* Generate a symmetric difference of the old and new fd sets, adding | |
762 | * and deleting as necessary. | |
763 | */ | |
764 | ||
765 | iold = inew = 0; | |
766 | while (iold < fds_old_nb || inew < fds_new_nb) { | |
767 | if (iold < fds_old_nb | |
768 | && (inew == fds_new_nb | |
73bb753d TB |
769 | || memory_region_ioeventfd_before(&fds_old[iold], |
770 | &fds_new[inew]))) { | |
80a1ea37 AK |
771 | fd = &fds_old[iold]; |
772 | section = (MemoryRegionSection) { | |
16620684 | 773 | .fv = address_space_to_flatview(as), |
80a1ea37 | 774 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 775 | .size = fd->addr.size, |
80a1ea37 | 776 | }; |
9a54635d | 777 | MEMORY_LISTENER_CALL(as, eventfd_del, Forward, §ion, |
753d5e14 | 778 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
779 | ++iold; |
780 | } else if (inew < fds_new_nb | |
781 | && (iold == fds_old_nb | |
73bb753d TB |
782 | || memory_region_ioeventfd_before(&fds_new[inew], |
783 | &fds_old[iold]))) { | |
80a1ea37 AK |
784 | fd = &fds_new[inew]; |
785 | section = (MemoryRegionSection) { | |
16620684 | 786 | .fv = address_space_to_flatview(as), |
80a1ea37 | 787 | .offset_within_address_space = int128_get64(fd->addr.start), |
052e87b0 | 788 | .size = fd->addr.size, |
80a1ea37 | 789 | }; |
9a54635d | 790 | MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, §ion, |
753d5e14 | 791 | fd->match_data, fd->data, fd->e); |
3e9d69e7 AK |
792 | ++inew; |
793 | } else { | |
794 | ++iold; | |
795 | ++inew; | |
796 | } | |
797 | } | |
798 | } | |
799 | ||
48564041 | 800 | FlatView *address_space_get_flatview(AddressSpace *as) |
856d7245 PB |
801 | { |
802 | FlatView *view; | |
803 | ||
694ea274 | 804 | RCU_READ_LOCK_GUARD(); |
447b0d0b | 805 | do { |
16620684 | 806 | view = address_space_to_flatview(as); |
447b0d0b PB |
807 | /* If somebody has replaced as->current_map concurrently, |
808 | * flatview_ref returns false. | |
809 | */ | |
810 | } while (!flatview_ref(view)); | |
856d7245 PB |
811 | return view; |
812 | } | |
813 | ||
3e9d69e7 AK |
814 | static void address_space_update_ioeventfds(AddressSpace *as) |
815 | { | |
99e86347 | 816 | FlatView *view; |
3e9d69e7 AK |
817 | FlatRange *fr; |
818 | unsigned ioeventfd_nb = 0; | |
920d557e SH |
819 | unsigned ioeventfd_max; |
820 | MemoryRegionIoeventfd *ioeventfds; | |
3e9d69e7 AK |
821 | AddrRange tmp; |
822 | unsigned i; | |
823 | ||
920d557e SH |
824 | /* |
825 | * It is likely that the number of ioeventfds hasn't changed much, so use | |
826 | * the previous size as the starting value, with some headroom to avoid | |
827 | * gratuitous reallocations. | |
828 | */ | |
829 | ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4); | |
830 | ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max); | |
831 | ||
856d7245 | 832 | view = address_space_get_flatview(as); |
99e86347 | 833 | FOR_EACH_FLAT_RANGE(fr, view) { |
3e9d69e7 AK |
834 | for (i = 0; i < fr->mr->ioeventfd_nb; ++i) { |
835 | tmp = addrrange_shift(fr->mr->ioeventfds[i].addr, | |
08dafab4 AK |
836 | int128_sub(fr->addr.start, |
837 | int128_make64(fr->offset_in_region))); | |
3e9d69e7 AK |
838 | if (addrrange_intersects(fr->addr, tmp)) { |
839 | ++ioeventfd_nb; | |
920d557e SH |
840 | if (ioeventfd_nb > ioeventfd_max) { |
841 | ioeventfd_max = MAX(ioeventfd_max * 2, 4); | |
842 | ioeventfds = g_realloc(ioeventfds, | |
843 | ioeventfd_max * sizeof(*ioeventfds)); | |
844 | } | |
3e9d69e7 AK |
845 | ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i]; |
846 | ioeventfds[ioeventfd_nb-1].addr = tmp; | |
847 | } | |
848 | } | |
849 | } | |
850 | ||
851 | address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb, | |
852 | as->ioeventfds, as->ioeventfd_nb); | |
853 | ||
7267c094 | 854 | g_free(as->ioeventfds); |
3e9d69e7 AK |
855 | as->ioeventfds = ioeventfds; |
856 | as->ioeventfd_nb = ioeventfd_nb; | |
856d7245 | 857 | flatview_unref(view); |
3e9d69e7 AK |
858 | } |
859 | ||
23f1174a PX |
860 | /* |
861 | * Notify the memory listeners about the coalesced IO change events of | |
862 | * range `cmr'. Only the part that has intersection of the specified | |
863 | * FlatRange will be sent. | |
864 | */ | |
865 | static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as, | |
866 | CoalescedMemoryRange *cmr, bool add) | |
867 | { | |
868 | AddrRange tmp; | |
869 | ||
870 | tmp = addrrange_shift(cmr->addr, | |
871 | int128_sub(fr->addr.start, | |
872 | int128_make64(fr->offset_in_region))); | |
873 | if (!addrrange_intersects(tmp, fr->addr)) { | |
874 | return; | |
875 | } | |
876 | tmp = addrrange_intersection(tmp, fr->addr); | |
877 | ||
878 | if (add) { | |
879 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add, | |
880 | int128_get64(tmp.start), | |
881 | int128_get64(tmp.size)); | |
882 | } else { | |
883 | MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del, | |
884 | int128_get64(tmp.start), | |
885 | int128_get64(tmp.size)); | |
886 | } | |
887 | } | |
888 | ||
909bf763 PB |
889 | static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as) |
890 | { | |
23f1174a PX |
891 | CoalescedMemoryRange *cmr; |
892 | ||
23f1174a PX |
893 | QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) { |
894 | flat_range_coalesced_io_notify(fr, as, cmr, false); | |
895 | } | |
909bf763 PB |
896 | } |
897 | ||
898 | static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as) | |
899 | { | |
900 | MemoryRegion *mr = fr->mr; | |
901 | CoalescedMemoryRange *cmr; | |
909bf763 | 902 | |
1f7af804 PB |
903 | if (QTAILQ_EMPTY(&mr->coalesced)) { |
904 | return; | |
905 | } | |
906 | ||
909bf763 | 907 | QTAILQ_FOREACH(cmr, &mr->coalesced, link) { |
23f1174a | 908 | flat_range_coalesced_io_notify(fr, as, cmr, true); |
909bf763 PB |
909 | } |
910 | } | |
911 | ||
b8af1afb | 912 | static void address_space_update_topology_pass(AddressSpace *as, |
a9a0c06d PB |
913 | const FlatView *old_view, |
914 | const FlatView *new_view, | |
b8af1afb | 915 | bool adding) |
093bc2cd | 916 | { |
093bc2cd AK |
917 | unsigned iold, inew; |
918 | FlatRange *frold, *frnew; | |
093bc2cd AK |
919 | |
920 | /* Generate a symmetric difference of the old and new memory maps. | |
921 | * Kill ranges in the old map, and instantiate ranges in the new map. | |
922 | */ | |
923 | iold = inew = 0; | |
a9a0c06d PB |
924 | while (iold < old_view->nr || inew < new_view->nr) { |
925 | if (iold < old_view->nr) { | |
926 | frold = &old_view->ranges[iold]; | |
093bc2cd AK |
927 | } else { |
928 | frold = NULL; | |
929 | } | |
a9a0c06d PB |
930 | if (inew < new_view->nr) { |
931 | frnew = &new_view->ranges[inew]; | |
093bc2cd AK |
932 | } else { |
933 | frnew = NULL; | |
934 | } | |
935 | ||
936 | if (frold | |
937 | && (!frnew | |
08dafab4 AK |
938 | || int128_lt(frold->addr.start, frnew->addr.start) |
939 | || (int128_eq(frold->addr.start, frnew->addr.start) | |
093bc2cd | 940 | && !flatrange_equal(frold, frnew)))) { |
41a6e477 | 941 | /* In old but not in new, or in both but attributes changed. */ |
093bc2cd | 942 | |
b8af1afb | 943 | if (!adding) { |
3ac7d43a | 944 | flat_range_coalesced_io_del(frold, as); |
72e22d2f | 945 | MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); |
b8af1afb AK |
946 | } |
947 | ||
093bc2cd AK |
948 | ++iold; |
949 | } else if (frold && frnew && flatrange_equal(frold, frnew)) { | |
41a6e477 | 950 | /* In both and unchanged (except logging may have changed) */ |
093bc2cd | 951 | |
4f826024 | 952 | if (adding) { |
50c1e149 | 953 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); |
b2dfd71c PB |
954 | if (frnew->dirty_log_mask & ~frold->dirty_log_mask) { |
955 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start, | |
956 | frold->dirty_log_mask, | |
957 | frnew->dirty_log_mask); | |
958 | } | |
959 | if (frold->dirty_log_mask & ~frnew->dirty_log_mask) { | |
960 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop, | |
961 | frold->dirty_log_mask, | |
962 | frnew->dirty_log_mask); | |
b8af1afb | 963 | } |
5a583347 AK |
964 | } |
965 | ||
093bc2cd AK |
966 | ++iold; |
967 | ++inew; | |
093bc2cd AK |
968 | } else { |
969 | /* In new */ | |
970 | ||
b8af1afb | 971 | if (adding) { |
72e22d2f | 972 | MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); |
3ac7d43a | 973 | flat_range_coalesced_io_add(frnew, as); |
b8af1afb AK |
974 | } |
975 | ||
093bc2cd AK |
976 | ++inew; |
977 | } | |
978 | } | |
b8af1afb AK |
979 | } |
980 | ||
967dc9b1 AK |
981 | static void flatviews_init(void) |
982 | { | |
092aa2fc AK |
983 | static FlatView *empty_view; |
984 | ||
967dc9b1 AK |
985 | if (flat_views) { |
986 | return; | |
987 | } | |
988 | ||
989 | flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL, | |
990 | (GDestroyNotify) flatview_unref); | |
092aa2fc AK |
991 | if (!empty_view) { |
992 | empty_view = generate_memory_topology(NULL); | |
993 | /* We keep it alive forever in the global variable. */ | |
994 | flatview_ref(empty_view); | |
995 | } else { | |
996 | g_hash_table_replace(flat_views, NULL, empty_view); | |
997 | flatview_ref(empty_view); | |
998 | } | |
967dc9b1 AK |
999 | } |
1000 | ||
1001 | static void flatviews_reset(void) | |
1002 | { | |
1003 | AddressSpace *as; | |
1004 | ||
1005 | if (flat_views) { | |
1006 | g_hash_table_unref(flat_views); | |
1007 | flat_views = NULL; | |
1008 | } | |
1009 | flatviews_init(); | |
1010 | ||
1011 | /* Render unique FVs */ | |
1012 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1013 | MemoryRegion *physmr = memory_region_get_flatview_root(as->root); | |
1014 | ||
1015 | if (g_hash_table_lookup(flat_views, physmr)) { | |
1016 | continue; | |
1017 | } | |
1018 | ||
1019 | generate_memory_topology(physmr); | |
1020 | } | |
1021 | } | |
1022 | ||
1023 | static void address_space_set_flatview(AddressSpace *as) | |
b8af1afb | 1024 | { |
67ace39b | 1025 | FlatView *old_view = address_space_to_flatview(as); |
967dc9b1 AK |
1026 | MemoryRegion *physmr = memory_region_get_flatview_root(as->root); |
1027 | FlatView *new_view = g_hash_table_lookup(flat_views, physmr); | |
1028 | ||
1029 | assert(new_view); | |
1030 | ||
67ace39b AK |
1031 | if (old_view == new_view) { |
1032 | return; | |
1033 | } | |
1034 | ||
1035 | if (old_view) { | |
1036 | flatview_ref(old_view); | |
1037 | } | |
1038 | ||
967dc9b1 | 1039 | flatview_ref(new_view); |
9a62e24f AK |
1040 | |
1041 | if (!QTAILQ_EMPTY(&as->listeners)) { | |
67ace39b AK |
1042 | FlatView tmpview = { .nr = 0 }, *old_view2 = old_view; |
1043 | ||
1044 | if (!old_view2) { | |
1045 | old_view2 = &tmpview; | |
1046 | } | |
1047 | address_space_update_topology_pass(as, old_view2, new_view, false); | |
1048 | address_space_update_topology_pass(as, old_view2, new_view, true); | |
9a62e24f | 1049 | } |
b8af1afb | 1050 | |
374f2981 | 1051 | /* Writes are protected by the BQL. */ |
d73415a3 | 1052 | qatomic_rcu_set(&as->current_map, new_view); |
67ace39b AK |
1053 | if (old_view) { |
1054 | flatview_unref(old_view); | |
1055 | } | |
856d7245 PB |
1056 | |
1057 | /* Note that all the old MemoryRegions are still alive up to this | |
1058 | * point. This relieves most MemoryListeners from the need to | |
1059 | * ref/unref the MemoryRegions they get---unless they use them | |
1060 | * outside the iothread mutex, in which case precise reference | |
1061 | * counting is necessary. | |
1062 | */ | |
67ace39b AK |
1063 | if (old_view) { |
1064 | flatview_unref(old_view); | |
1065 | } | |
093bc2cd AK |
1066 | } |
1067 | ||
202fc01b AK |
1068 | static void address_space_update_topology(AddressSpace *as) |
1069 | { | |
1070 | MemoryRegion *physmr = memory_region_get_flatview_root(as->root); | |
1071 | ||
1072 | flatviews_init(); | |
1073 | if (!g_hash_table_lookup(flat_views, physmr)) { | |
1074 | generate_memory_topology(physmr); | |
1075 | } | |
1076 | address_space_set_flatview(as); | |
1077 | } | |
1078 | ||
4ef4db86 AK |
1079 | void memory_region_transaction_begin(void) |
1080 | { | |
bb880ded | 1081 | qemu_flush_coalesced_mmio_buffer(); |
4ef4db86 AK |
1082 | ++memory_region_transaction_depth; |
1083 | } | |
1084 | ||
1085 | void memory_region_transaction_commit(void) | |
1086 | { | |
0d673e36 AK |
1087 | AddressSpace *as; |
1088 | ||
4ef4db86 | 1089 | assert(memory_region_transaction_depth); |
8d04fb55 JK |
1090 | assert(qemu_mutex_iothread_locked()); |
1091 | ||
4ef4db86 | 1092 | --memory_region_transaction_depth; |
4dc56152 GA |
1093 | if (!memory_region_transaction_depth) { |
1094 | if (memory_region_update_pending) { | |
967dc9b1 AK |
1095 | flatviews_reset(); |
1096 | ||
4dc56152 | 1097 | MEMORY_LISTENER_CALL_GLOBAL(begin, Forward); |
02e2b95f | 1098 | |
4dc56152 | 1099 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
967dc9b1 | 1100 | address_space_set_flatview(as); |
02218487 | 1101 | address_space_update_ioeventfds(as); |
4dc56152 | 1102 | } |
ade9c1aa | 1103 | memory_region_update_pending = false; |
0b152095 | 1104 | ioeventfd_update_pending = false; |
4dc56152 GA |
1105 | MEMORY_LISTENER_CALL_GLOBAL(commit, Forward); |
1106 | } else if (ioeventfd_update_pending) { | |
1107 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { | |
1108 | address_space_update_ioeventfds(as); | |
1109 | } | |
ade9c1aa | 1110 | ioeventfd_update_pending = false; |
4dc56152 | 1111 | } |
4dc56152 | 1112 | } |
4ef4db86 AK |
1113 | } |
1114 | ||
545e92e0 AK |
1115 | static void memory_region_destructor_none(MemoryRegion *mr) |
1116 | { | |
1117 | } | |
1118 | ||
1119 | static void memory_region_destructor_ram(MemoryRegion *mr) | |
1120 | { | |
f1060c55 | 1121 | qemu_ram_free(mr->ram_block); |
545e92e0 AK |
1122 | } |
1123 | ||
b4fefef9 PC |
1124 | static bool memory_region_need_escape(char c) |
1125 | { | |
1126 | return c == '/' || c == '[' || c == '\\' || c == ']'; | |
1127 | } | |
1128 | ||
1129 | static char *memory_region_escape_name(const char *name) | |
1130 | { | |
1131 | const char *p; | |
1132 | char *escaped, *q; | |
1133 | uint8_t c; | |
1134 | size_t bytes = 0; | |
1135 | ||
1136 | for (p = name; *p; p++) { | |
1137 | bytes += memory_region_need_escape(*p) ? 4 : 1; | |
1138 | } | |
1139 | if (bytes == p - name) { | |
1140 | return g_memdup(name, bytes + 1); | |
1141 | } | |
1142 | ||
1143 | escaped = g_malloc(bytes + 1); | |
1144 | for (p = name, q = escaped; *p; p++) { | |
1145 | c = *p; | |
1146 | if (unlikely(memory_region_need_escape(c))) { | |
1147 | *q++ = '\\'; | |
1148 | *q++ = 'x'; | |
1149 | *q++ = "0123456789abcdef"[c >> 4]; | |
1150 | c = "0123456789abcdef"[c & 15]; | |
1151 | } | |
1152 | *q++ = c; | |
1153 | } | |
1154 | *q = 0; | |
1155 | return escaped; | |
1156 | } | |
1157 | ||
3df9d748 AK |
1158 | static void memory_region_do_init(MemoryRegion *mr, |
1159 | Object *owner, | |
1160 | const char *name, | |
1161 | uint64_t size) | |
093bc2cd | 1162 | { |
08dafab4 AK |
1163 | mr->size = int128_make64(size); |
1164 | if (size == UINT64_MAX) { | |
1165 | mr->size = int128_2_64(); | |
1166 | } | |
302fa283 | 1167 | mr->name = g_strdup(name); |
612263cf | 1168 | mr->owner = owner; |
58eaa217 | 1169 | mr->ram_block = NULL; |
b4fefef9 PC |
1170 | |
1171 | if (name) { | |
843ef73a PC |
1172 | char *escaped_name = memory_region_escape_name(name); |
1173 | char *name_array = g_strdup_printf("%s[*]", escaped_name); | |
612263cf PB |
1174 | |
1175 | if (!owner) { | |
1176 | owner = container_get(qdev_get_machine(), "/unattached"); | |
1177 | } | |
1178 | ||
d2623129 | 1179 | object_property_add_child(owner, name_array, OBJECT(mr)); |
b4fefef9 | 1180 | object_unref(OBJECT(mr)); |
843ef73a PC |
1181 | g_free(name_array); |
1182 | g_free(escaped_name); | |
b4fefef9 PC |
1183 | } |
1184 | } | |
1185 | ||
3df9d748 AK |
1186 | void memory_region_init(MemoryRegion *mr, |
1187 | Object *owner, | |
1188 | const char *name, | |
1189 | uint64_t size) | |
1190 | { | |
1191 | object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION); | |
1192 | memory_region_do_init(mr, owner, name, size); | |
1193 | } | |
1194 | ||
d7bce999 EB |
1195 | static void memory_region_get_container(Object *obj, Visitor *v, |
1196 | const char *name, void *opaque, | |
1197 | Error **errp) | |
409ddd01 PC |
1198 | { |
1199 | MemoryRegion *mr = MEMORY_REGION(obj); | |
ddfb0baa | 1200 | char *path = (char *)""; |
409ddd01 PC |
1201 | |
1202 | if (mr->container) { | |
1203 | path = object_get_canonical_path(OBJECT(mr->container)); | |
1204 | } | |
51e72bc1 | 1205 | visit_type_str(v, name, &path, errp); |
409ddd01 PC |
1206 | if (mr->container) { |
1207 | g_free(path); | |
1208 | } | |
1209 | } | |
1210 | ||
1211 | static Object *memory_region_resolve_container(Object *obj, void *opaque, | |
1212 | const char *part) | |
1213 | { | |
1214 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1215 | ||
1216 | return OBJECT(mr->container); | |
1217 | } | |
1218 | ||
d7bce999 EB |
1219 | static void memory_region_get_priority(Object *obj, Visitor *v, |
1220 | const char *name, void *opaque, | |
1221 | Error **errp) | |
d33382da PC |
1222 | { |
1223 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1224 | int32_t value = mr->priority; | |
1225 | ||
51e72bc1 | 1226 | visit_type_int32(v, name, &value, errp); |
d33382da PC |
1227 | } |
1228 | ||
d7bce999 EB |
1229 | static void memory_region_get_size(Object *obj, Visitor *v, const char *name, |
1230 | void *opaque, Error **errp) | |
52aef7bb PC |
1231 | { |
1232 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1233 | uint64_t value = memory_region_size(mr); | |
1234 | ||
51e72bc1 | 1235 | visit_type_uint64(v, name, &value, errp); |
52aef7bb PC |
1236 | } |
1237 | ||
b4fefef9 PC |
1238 | static void memory_region_initfn(Object *obj) |
1239 | { | |
1240 | MemoryRegion *mr = MEMORY_REGION(obj); | |
409ddd01 | 1241 | ObjectProperty *op; |
b4fefef9 PC |
1242 | |
1243 | mr->ops = &unassigned_mem_ops; | |
6bba19ba | 1244 | mr->enabled = true; |
5f9a5ea1 | 1245 | mr->romd_mode = true; |
545e92e0 | 1246 | mr->destructor = memory_region_destructor_none; |
093bc2cd | 1247 | QTAILQ_INIT(&mr->subregions); |
093bc2cd | 1248 | QTAILQ_INIT(&mr->coalesced); |
409ddd01 PC |
1249 | |
1250 | op = object_property_add(OBJECT(mr), "container", | |
1251 | "link<" TYPE_MEMORY_REGION ">", | |
1252 | memory_region_get_container, | |
1253 | NULL, /* memory_region_set_container */ | |
d2623129 | 1254 | NULL, NULL); |
409ddd01 PC |
1255 | op->resolve = memory_region_resolve_container; |
1256 | ||
64a7b8de | 1257 | object_property_add_uint64_ptr(OBJECT(mr), "addr", |
d2623129 | 1258 | &mr->addr, OBJ_PROP_FLAG_READ); |
d33382da PC |
1259 | object_property_add(OBJECT(mr), "priority", "uint32", |
1260 | memory_region_get_priority, | |
1261 | NULL, /* memory_region_set_priority */ | |
d2623129 | 1262 | NULL, NULL); |
52aef7bb PC |
1263 | object_property_add(OBJECT(mr), "size", "uint64", |
1264 | memory_region_get_size, | |
1265 | NULL, /* memory_region_set_size, */ | |
d2623129 | 1266 | NULL, NULL); |
093bc2cd AK |
1267 | } |
1268 | ||
3df9d748 AK |
1269 | static void iommu_memory_region_initfn(Object *obj) |
1270 | { | |
1271 | MemoryRegion *mr = MEMORY_REGION(obj); | |
1272 | ||
1273 | mr->is_iommu = true; | |
1274 | } | |
1275 | ||
b018ddf6 PB |
1276 | static uint64_t unassigned_mem_read(void *opaque, hwaddr addr, |
1277 | unsigned size) | |
1278 | { | |
1279 | #ifdef DEBUG_UNASSIGNED | |
1280 | printf("Unassigned mem read " TARGET_FMT_plx "\n", addr); | |
1281 | #endif | |
68a7439a | 1282 | return 0; |
b018ddf6 PB |
1283 | } |
1284 | ||
1285 | static void unassigned_mem_write(void *opaque, hwaddr addr, | |
1286 | uint64_t val, unsigned size) | |
1287 | { | |
1288 | #ifdef DEBUG_UNASSIGNED | |
1289 | printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val); | |
1290 | #endif | |
b018ddf6 PB |
1291 | } |
1292 | ||
d197063f | 1293 | static bool unassigned_mem_accepts(void *opaque, hwaddr addr, |
8372d383 PM |
1294 | unsigned size, bool is_write, |
1295 | MemTxAttrs attrs) | |
d197063f PB |
1296 | { |
1297 | return false; | |
1298 | } | |
1299 | ||
1300 | const MemoryRegionOps unassigned_mem_ops = { | |
1301 | .valid.accepts = unassigned_mem_accepts, | |
1302 | .endianness = DEVICE_NATIVE_ENDIAN, | |
1303 | }; | |
1304 | ||
4a2e242b AW |
1305 | static uint64_t memory_region_ram_device_read(void *opaque, |
1306 | hwaddr addr, unsigned size) | |
1307 | { | |
1308 | MemoryRegion *mr = opaque; | |
1309 | uint64_t data = (uint64_t)~0; | |
1310 | ||
1311 | switch (size) { | |
1312 | case 1: | |
1313 | data = *(uint8_t *)(mr->ram_block->host + addr); | |
1314 | break; | |
1315 | case 2: | |
1316 | data = *(uint16_t *)(mr->ram_block->host + addr); | |
1317 | break; | |
1318 | case 4: | |
1319 | data = *(uint32_t *)(mr->ram_block->host + addr); | |
1320 | break; | |
1321 | case 8: | |
1322 | data = *(uint64_t *)(mr->ram_block->host + addr); | |
1323 | break; | |
1324 | } | |
1325 | ||
1326 | trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size); | |
1327 | ||
1328 | return data; | |
1329 | } | |
1330 | ||
1331 | static void memory_region_ram_device_write(void *opaque, hwaddr addr, | |
1332 | uint64_t data, unsigned size) | |
1333 | { | |
1334 | MemoryRegion *mr = opaque; | |
1335 | ||
1336 | trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size); | |
1337 | ||
1338 | switch (size) { | |
1339 | case 1: | |
1340 | *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data; | |
1341 | break; | |
1342 | case 2: | |
1343 | *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data; | |
1344 | break; | |
1345 | case 4: | |
1346 | *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data; | |
1347 | break; | |
1348 | case 8: | |
1349 | *(uint64_t *)(mr->ram_block->host + addr) = data; | |
1350 | break; | |
1351 | } | |
1352 | } | |
1353 | ||
1354 | static const MemoryRegionOps ram_device_mem_ops = { | |
1355 | .read = memory_region_ram_device_read, | |
1356 | .write = memory_region_ram_device_write, | |
c99a29e7 | 1357 | .endianness = DEVICE_HOST_ENDIAN, |
4a2e242b AW |
1358 | .valid = { |
1359 | .min_access_size = 1, | |
1360 | .max_access_size = 8, | |
1361 | .unaligned = true, | |
1362 | }, | |
1363 | .impl = { | |
1364 | .min_access_size = 1, | |
1365 | .max_access_size = 8, | |
1366 | .unaligned = true, | |
1367 | }, | |
1368 | }; | |
1369 | ||
d2702032 PB |
1370 | bool memory_region_access_valid(MemoryRegion *mr, |
1371 | hwaddr addr, | |
1372 | unsigned size, | |
6d7b9a6c PM |
1373 | bool is_write, |
1374 | MemTxAttrs attrs) | |
093bc2cd | 1375 | { |
5d971f9e MT |
1376 | if (mr->ops->valid.accepts |
1377 | && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) { | |
21786c7e PMD |
1378 | qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr " |
1379 | "0x%" HWADDR_PRIX ", size %u, " | |
1380 | "region '%s', reason: rejected\n", | |
1381 | addr, size, memory_region_name(mr)); | |
093bc2cd AK |
1382 | return false; |
1383 | } | |
1384 | ||
5d971f9e | 1385 | if (!mr->ops->valid.unaligned && (addr & (size - 1))) { |
21786c7e PMD |
1386 | qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr " |
1387 | "0x%" HWADDR_PRIX ", size %u, " | |
1388 | "region '%s', reason: unaligned\n", | |
1389 | addr, size, memory_region_name(mr)); | |
5d971f9e | 1390 | return false; |
a014ed07 PB |
1391 | } |
1392 | ||
5d971f9e | 1393 | /* Treat zero as compatibility all valid */ |
a014ed07 | 1394 | if (!mr->ops->valid.max_access_size) { |
5d971f9e | 1395 | return true; |
a014ed07 PB |
1396 | } |
1397 | ||
5d971f9e MT |
1398 | if (size > mr->ops->valid.max_access_size |
1399 | || size < mr->ops->valid.min_access_size) { | |
21786c7e PMD |
1400 | qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr " |
1401 | "0x%" HWADDR_PRIX ", size %u, " | |
1402 | "region '%s', reason: invalid size " | |
1403 | "(min:%u max:%u)\n", | |
1404 | addr, size, memory_region_name(mr), | |
1405 | mr->ops->valid.min_access_size, | |
1406 | mr->ops->valid.max_access_size); | |
5d971f9e | 1407 | return false; |
093bc2cd AK |
1408 | } |
1409 | return true; | |
1410 | } | |
1411 | ||
cc05c43a PM |
1412 | static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr, |
1413 | hwaddr addr, | |
1414 | uint64_t *pval, | |
1415 | unsigned size, | |
1416 | MemTxAttrs attrs) | |
093bc2cd | 1417 | { |
cc05c43a | 1418 | *pval = 0; |
093bc2cd | 1419 | |
ce5d2f33 | 1420 | if (mr->ops->read) { |
cc05c43a PM |
1421 | return access_with_adjusted_size(addr, pval, size, |
1422 | mr->ops->impl.min_access_size, | |
1423 | mr->ops->impl.max_access_size, | |
1424 | memory_region_read_accessor, | |
1425 | mr, attrs); | |
62a0db94 | 1426 | } else { |
cc05c43a PM |
1427 | return access_with_adjusted_size(addr, pval, size, |
1428 | mr->ops->impl.min_access_size, | |
1429 | mr->ops->impl.max_access_size, | |
1430 | memory_region_read_with_attrs_accessor, | |
1431 | mr, attrs); | |
74901c3b | 1432 | } |
093bc2cd AK |
1433 | } |
1434 | ||
3b643495 PM |
1435 | MemTxResult memory_region_dispatch_read(MemoryRegion *mr, |
1436 | hwaddr addr, | |
1437 | uint64_t *pval, | |
e67c9046 | 1438 | MemOp op, |
3b643495 | 1439 | MemTxAttrs attrs) |
a621f38d | 1440 | { |
e67c9046 | 1441 | unsigned size = memop_size(op); |
cc05c43a PM |
1442 | MemTxResult r; |
1443 | ||
6d7b9a6c | 1444 | if (!memory_region_access_valid(mr, addr, size, false, attrs)) { |
791af8c8 | 1445 | *pval = unassigned_mem_read(mr, addr, size); |
cc05c43a | 1446 | return MEMTX_DECODE_ERROR; |
791af8c8 | 1447 | } |
a621f38d | 1448 | |
cc05c43a | 1449 | r = memory_region_dispatch_read1(mr, addr, pval, size, attrs); |
9bf825bf | 1450 | adjust_endianness(mr, pval, op); |
cc05c43a | 1451 | return r; |
a621f38d | 1452 | } |
093bc2cd | 1453 | |
8c56c1a5 PF |
1454 | /* Return true if an eventfd was signalled */ |
1455 | static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr, | |
1456 | hwaddr addr, | |
1457 | uint64_t data, | |
1458 | unsigned size, | |
1459 | MemTxAttrs attrs) | |
1460 | { | |
1461 | MemoryRegionIoeventfd ioeventfd = { | |
1462 | .addr = addrrange_make(int128_make64(addr), int128_make64(size)), | |
1463 | .data = data, | |
1464 | }; | |
1465 | unsigned i; | |
1466 | ||
1467 | for (i = 0; i < mr->ioeventfd_nb; i++) { | |
1468 | ioeventfd.match_data = mr->ioeventfds[i].match_data; | |
1469 | ioeventfd.e = mr->ioeventfds[i].e; | |
1470 | ||
73bb753d | 1471 | if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) { |
8c56c1a5 PF |
1472 | event_notifier_set(ioeventfd.e); |
1473 | return true; | |
1474 | } | |
1475 | } | |
1476 | ||
1477 | return false; | |
1478 | } | |
1479 | ||
3b643495 PM |
1480 | MemTxResult memory_region_dispatch_write(MemoryRegion *mr, |
1481 | hwaddr addr, | |
1482 | uint64_t data, | |
e67c9046 | 1483 | MemOp op, |
3b643495 | 1484 | MemTxAttrs attrs) |
a621f38d | 1485 | { |
e67c9046 TN |
1486 | unsigned size = memop_size(op); |
1487 | ||
6d7b9a6c | 1488 | if (!memory_region_access_valid(mr, addr, size, true, attrs)) { |
b018ddf6 | 1489 | unassigned_mem_write(mr, addr, data, size); |
cc05c43a | 1490 | return MEMTX_DECODE_ERROR; |
093bc2cd AK |
1491 | } |
1492 | ||
9bf825bf | 1493 | adjust_endianness(mr, &data, op); |
a621f38d | 1494 | |
8c56c1a5 PF |
1495 | if ((!kvm_eventfds_enabled()) && |
1496 | memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) { | |
1497 | return MEMTX_OK; | |
1498 | } | |
1499 | ||
ce5d2f33 | 1500 | if (mr->ops->write) { |
cc05c43a PM |
1501 | return access_with_adjusted_size(addr, &data, size, |
1502 | mr->ops->impl.min_access_size, | |
1503 | mr->ops->impl.max_access_size, | |
1504 | memory_region_write_accessor, mr, | |
1505 | attrs); | |
62a0db94 | 1506 | } else { |
cc05c43a PM |
1507 | return |
1508 | access_with_adjusted_size(addr, &data, size, | |
1509 | mr->ops->impl.min_access_size, | |
1510 | mr->ops->impl.max_access_size, | |
1511 | memory_region_write_with_attrs_accessor, | |
1512 | mr, attrs); | |
74901c3b | 1513 | } |
093bc2cd AK |
1514 | } |
1515 | ||
093bc2cd | 1516 | void memory_region_init_io(MemoryRegion *mr, |
2c9b15ca | 1517 | Object *owner, |
093bc2cd AK |
1518 | const MemoryRegionOps *ops, |
1519 | void *opaque, | |
1520 | const char *name, | |
1521 | uint64_t size) | |
1522 | { | |
2c9b15ca | 1523 | memory_region_init(mr, owner, name, size); |
6d6d2abf | 1524 | mr->ops = ops ? ops : &unassigned_mem_ops; |
093bc2cd | 1525 | mr->opaque = opaque; |
14a3c10a | 1526 | mr->terminates = true; |
093bc2cd AK |
1527 | } |
1528 | ||
1cfe48c1 PM |
1529 | void memory_region_init_ram_nomigrate(MemoryRegion *mr, |
1530 | Object *owner, | |
1531 | const char *name, | |
1532 | uint64_t size, | |
1533 | Error **errp) | |
06329cce MA |
1534 | { |
1535 | memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp); | |
1536 | } | |
1537 | ||
1538 | void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr, | |
1539 | Object *owner, | |
1540 | const char *name, | |
1541 | uint64_t size, | |
1542 | bool share, | |
1543 | Error **errp) | |
093bc2cd | 1544 | { |
1cd3d492 | 1545 | Error *err = NULL; |
2c9b15ca | 1546 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1547 | mr->ram = true; |
14a3c10a | 1548 | mr->terminates = true; |
545e92e0 | 1549 | mr->destructor = memory_region_destructor_ram; |
1cd3d492 | 1550 | mr->ram_block = qemu_ram_alloc(size, share, mr, &err); |
1cd3d492 IM |
1551 | if (err) { |
1552 | mr->size = int128_zero(); | |
1553 | object_unparent(OBJECT(mr)); | |
1554 | error_propagate(errp, err); | |
1555 | } | |
0b183fc8 PB |
1556 | } |
1557 | ||
60786ef3 MT |
1558 | void memory_region_init_resizeable_ram(MemoryRegion *mr, |
1559 | Object *owner, | |
1560 | const char *name, | |
1561 | uint64_t size, | |
1562 | uint64_t max_size, | |
1563 | void (*resized)(const char*, | |
1564 | uint64_t length, | |
1565 | void *host), | |
1566 | Error **errp) | |
1567 | { | |
1cd3d492 | 1568 | Error *err = NULL; |
60786ef3 MT |
1569 | memory_region_init(mr, owner, name, size); |
1570 | mr->ram = true; | |
1571 | mr->terminates = true; | |
1572 | mr->destructor = memory_region_destructor_ram; | |
8e41fb63 | 1573 | mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized, |
1cd3d492 | 1574 | mr, &err); |
1cd3d492 IM |
1575 | if (err) { |
1576 | mr->size = int128_zero(); | |
1577 | object_unparent(OBJECT(mr)); | |
1578 | error_propagate(errp, err); | |
1579 | } | |
60786ef3 MT |
1580 | } |
1581 | ||
d5dbde46 | 1582 | #ifdef CONFIG_POSIX |
0b183fc8 | 1583 | void memory_region_init_ram_from_file(MemoryRegion *mr, |
d32335e8 | 1584 | Object *owner, |
0b183fc8 PB |
1585 | const char *name, |
1586 | uint64_t size, | |
98376843 | 1587 | uint64_t align, |
cbfc0171 | 1588 | uint32_t ram_flags, |
7f56e740 | 1589 | const char *path, |
369d6dc4 | 1590 | bool readonly, |
7f56e740 | 1591 | Error **errp) |
0b183fc8 | 1592 | { |
1cd3d492 | 1593 | Error *err = NULL; |
0b183fc8 PB |
1594 | memory_region_init(mr, owner, name, size); |
1595 | mr->ram = true; | |
369d6dc4 | 1596 | mr->readonly = readonly; |
0b183fc8 PB |
1597 | mr->terminates = true; |
1598 | mr->destructor = memory_region_destructor_ram; | |
98376843 | 1599 | mr->align = align; |
369d6dc4 SH |
1600 | mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, |
1601 | readonly, &err); | |
1cd3d492 IM |
1602 | if (err) { |
1603 | mr->size = int128_zero(); | |
1604 | object_unparent(OBJECT(mr)); | |
1605 | error_propagate(errp, err); | |
1606 | } | |
093bc2cd | 1607 | } |
fea617c5 MAL |
1608 | |
1609 | void memory_region_init_ram_from_fd(MemoryRegion *mr, | |
d32335e8 | 1610 | Object *owner, |
fea617c5 MAL |
1611 | const char *name, |
1612 | uint64_t size, | |
1613 | bool share, | |
1614 | int fd, | |
44a4ff31 | 1615 | ram_addr_t offset, |
fea617c5 MAL |
1616 | Error **errp) |
1617 | { | |
1cd3d492 | 1618 | Error *err = NULL; |
fea617c5 MAL |
1619 | memory_region_init(mr, owner, name, size); |
1620 | mr->ram = true; | |
1621 | mr->terminates = true; | |
1622 | mr->destructor = memory_region_destructor_ram; | |
cbfc0171 JH |
1623 | mr->ram_block = qemu_ram_alloc_from_fd(size, mr, |
1624 | share ? RAM_SHARED : 0, | |
44a4ff31 | 1625 | fd, offset, false, &err); |
1cd3d492 IM |
1626 | if (err) { |
1627 | mr->size = int128_zero(); | |
1628 | object_unparent(OBJECT(mr)); | |
1629 | error_propagate(errp, err); | |
1630 | } | |
fea617c5 | 1631 | } |
0b183fc8 | 1632 | #endif |
093bc2cd AK |
1633 | |
1634 | void memory_region_init_ram_ptr(MemoryRegion *mr, | |
2c9b15ca | 1635 | Object *owner, |
093bc2cd AK |
1636 | const char *name, |
1637 | uint64_t size, | |
1638 | void *ptr) | |
1639 | { | |
2c9b15ca | 1640 | memory_region_init(mr, owner, name, size); |
8ea9252a | 1641 | mr->ram = true; |
14a3c10a | 1642 | mr->terminates = true; |
fc3e7665 | 1643 | mr->destructor = memory_region_destructor_ram; |
ef701d7b HT |
1644 | |
1645 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ | |
1646 | assert(ptr != NULL); | |
8e41fb63 | 1647 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); |
093bc2cd AK |
1648 | } |
1649 | ||
21e00fa5 AW |
1650 | void memory_region_init_ram_device_ptr(MemoryRegion *mr, |
1651 | Object *owner, | |
1652 | const char *name, | |
1653 | uint64_t size, | |
1654 | void *ptr) | |
e4dc3f59 | 1655 | { |
2ddb89b0 BS |
1656 | memory_region_init(mr, owner, name, size); |
1657 | mr->ram = true; | |
1658 | mr->terminates = true; | |
21e00fa5 | 1659 | mr->ram_device = true; |
4a2e242b AW |
1660 | mr->ops = &ram_device_mem_ops; |
1661 | mr->opaque = mr; | |
2ddb89b0 | 1662 | mr->destructor = memory_region_destructor_ram; |
0a2949e0 | 1663 | |
2ddb89b0 BS |
1664 | /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */ |
1665 | assert(ptr != NULL); | |
1666 | mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal); | |
e4dc3f59 ND |
1667 | } |
1668 | ||
093bc2cd | 1669 | void memory_region_init_alias(MemoryRegion *mr, |
2c9b15ca | 1670 | Object *owner, |
093bc2cd AK |
1671 | const char *name, |
1672 | MemoryRegion *orig, | |
a8170e5e | 1673 | hwaddr offset, |
093bc2cd AK |
1674 | uint64_t size) |
1675 | { | |
2c9b15ca | 1676 | memory_region_init(mr, owner, name, size); |
093bc2cd AK |
1677 | mr->alias = orig; |
1678 | mr->alias_offset = offset; | |
1679 | } | |
1680 | ||
b59821a9 | 1681 | void memory_region_init_rom_nomigrate(MemoryRegion *mr, |
d32335e8 | 1682 | Object *owner, |
b59821a9 PM |
1683 | const char *name, |
1684 | uint64_t size, | |
1685 | Error **errp) | |
a1777f7f | 1686 | { |
83696c8f | 1687 | memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp); |
a1777f7f | 1688 | mr->readonly = true; |
a1777f7f PM |
1689 | } |
1690 | ||
b59821a9 PM |
1691 | void memory_region_init_rom_device_nomigrate(MemoryRegion *mr, |
1692 | Object *owner, | |
1693 | const MemoryRegionOps *ops, | |
1694 | void *opaque, | |
1695 | const char *name, | |
1696 | uint64_t size, | |
1697 | Error **errp) | |
d0a9b5bc | 1698 | { |
1cd3d492 | 1699 | Error *err = NULL; |
39e0b03d | 1700 | assert(ops); |
2c9b15ca | 1701 | memory_region_init(mr, owner, name, size); |
7bc2b9cd | 1702 | mr->ops = ops; |
75f5941c | 1703 | mr->opaque = opaque; |
d0a9b5bc | 1704 | mr->terminates = true; |
75c578dc | 1705 | mr->rom_device = true; |
58268c8d | 1706 | mr->destructor = memory_region_destructor_ram; |
1cd3d492 IM |
1707 | mr->ram_block = qemu_ram_alloc(size, false, mr, &err); |
1708 | if (err) { | |
1709 | mr->size = int128_zero(); | |
1710 | object_unparent(OBJECT(mr)); | |
1711 | error_propagate(errp, err); | |
1712 | } | |
d0a9b5bc AK |
1713 | } |
1714 | ||
1221a474 AK |
1715 | void memory_region_init_iommu(void *_iommu_mr, |
1716 | size_t instance_size, | |
1717 | const char *mrtypename, | |
2c9b15ca | 1718 | Object *owner, |
30951157 AK |
1719 | const char *name, |
1720 | uint64_t size) | |
1721 | { | |
1221a474 | 1722 | struct IOMMUMemoryRegion *iommu_mr; |
3df9d748 AK |
1723 | struct MemoryRegion *mr; |
1724 | ||
1221a474 AK |
1725 | object_initialize(_iommu_mr, instance_size, mrtypename); |
1726 | mr = MEMORY_REGION(_iommu_mr); | |
3df9d748 AK |
1727 | memory_region_do_init(mr, owner, name, size); |
1728 | iommu_mr = IOMMU_MEMORY_REGION(mr); | |
30951157 | 1729 | mr->terminates = true; /* then re-forwards */ |
3df9d748 AK |
1730 | QLIST_INIT(&iommu_mr->iommu_notify); |
1731 | iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE; | |
30951157 AK |
1732 | } |
1733 | ||
b4fefef9 | 1734 | static void memory_region_finalize(Object *obj) |
093bc2cd | 1735 | { |
b4fefef9 PC |
1736 | MemoryRegion *mr = MEMORY_REGION(obj); |
1737 | ||
2e2b8eb7 PB |
1738 | assert(!mr->container); |
1739 | ||
1740 | /* We know the region is not visible in any address space (it | |
1741 | * does not have a container and cannot be a root either because | |
1742 | * it has no references, so we can blindly clear mr->enabled. | |
1743 | * memory_region_set_enabled instead could trigger a transaction | |
1744 | * and cause an infinite loop. | |
1745 | */ | |
1746 | mr->enabled = false; | |
1747 | memory_region_transaction_begin(); | |
1748 | while (!QTAILQ_EMPTY(&mr->subregions)) { | |
1749 | MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions); | |
1750 | memory_region_del_subregion(mr, subregion); | |
1751 | } | |
1752 | memory_region_transaction_commit(); | |
1753 | ||
545e92e0 | 1754 | mr->destructor(mr); |
093bc2cd | 1755 | memory_region_clear_coalescing(mr); |
302fa283 | 1756 | g_free((char *)mr->name); |
7267c094 | 1757 | g_free(mr->ioeventfds); |
093bc2cd AK |
1758 | } |
1759 | ||
803c0816 PB |
1760 | Object *memory_region_owner(MemoryRegion *mr) |
1761 | { | |
22a893e4 PB |
1762 | Object *obj = OBJECT(mr); |
1763 | return obj->parent; | |
803c0816 PB |
1764 | } |
1765 | ||
46637be2 PB |
1766 | void memory_region_ref(MemoryRegion *mr) |
1767 | { | |
22a893e4 PB |
1768 | /* MMIO callbacks most likely will access data that belongs |
1769 | * to the owner, hence the need to ref/unref the owner whenever | |
1770 | * the memory region is in use. | |
1771 | * | |
1772 | * The memory region is a child of its owner. As long as the | |
1773 | * owner doesn't call unparent itself on the memory region, | |
1774 | * ref-ing the owner will also keep the memory region alive. | |
612263cf PB |
1775 | * Memory regions without an owner are supposed to never go away; |
1776 | * we do not ref/unref them because it slows down DMA sensibly. | |
22a893e4 | 1777 | */ |
612263cf PB |
1778 | if (mr && mr->owner) { |
1779 | object_ref(mr->owner); | |
46637be2 PB |
1780 | } |
1781 | } | |
1782 | ||
1783 | void memory_region_unref(MemoryRegion *mr) | |
1784 | { | |
612263cf PB |
1785 | if (mr && mr->owner) { |
1786 | object_unref(mr->owner); | |
46637be2 PB |
1787 | } |
1788 | } | |
1789 | ||
093bc2cd AK |
1790 | uint64_t memory_region_size(MemoryRegion *mr) |
1791 | { | |
08dafab4 AK |
1792 | if (int128_eq(mr->size, int128_2_64())) { |
1793 | return UINT64_MAX; | |
1794 | } | |
1795 | return int128_get64(mr->size); | |
093bc2cd AK |
1796 | } |
1797 | ||
5d546d4b | 1798 | const char *memory_region_name(const MemoryRegion *mr) |
8991c79b | 1799 | { |
d1dd32af PC |
1800 | if (!mr->name) { |
1801 | ((MemoryRegion *)mr)->name = | |
7a309cc9 | 1802 | g_strdup(object_get_canonical_path_component(OBJECT(mr))); |
d1dd32af | 1803 | } |
302fa283 | 1804 | return mr->name; |
8991c79b AK |
1805 | } |
1806 | ||
21e00fa5 | 1807 | bool memory_region_is_ram_device(MemoryRegion *mr) |
e4dc3f59 | 1808 | { |
21e00fa5 | 1809 | return mr->ram_device; |
e4dc3f59 ND |
1810 | } |
1811 | ||
2d1a35be | 1812 | uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr) |
55043ba3 | 1813 | { |
6f6a5ef3 | 1814 | uint8_t mask = mr->dirty_log_mask; |
1370d61a ZY |
1815 | RAMBlock *rb = mr->ram_block; |
1816 | ||
1817 | if (global_dirty_log && ((rb && qemu_ram_is_migratable(rb)) || | |
1818 | memory_region_is_iommu(mr))) { | |
6f6a5ef3 PB |
1819 | mask |= (1 << DIRTY_MEMORY_MIGRATION); |
1820 | } | |
0a2949e0 PB |
1821 | |
1822 | if (tcg_enabled() && rb) { | |
1823 | /* TCG only cares about dirty memory logging for RAM, not IOMMU. */ | |
1824 | mask |= (1 << DIRTY_MEMORY_CODE); | |
1825 | } | |
6f6a5ef3 | 1826 | return mask; |
55043ba3 AK |
1827 | } |
1828 | ||
2d1a35be PB |
1829 | bool memory_region_is_logging(MemoryRegion *mr, uint8_t client) |
1830 | { | |
1831 | return memory_region_get_dirty_log_mask(mr) & (1 << client); | |
1832 | } | |
1833 | ||
549d4005 EA |
1834 | static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr, |
1835 | Error **errp) | |
5bf3d319 PX |
1836 | { |
1837 | IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE; | |
1838 | IOMMUNotifier *iommu_notifier; | |
1221a474 | 1839 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
549d4005 | 1840 | int ret = 0; |
5bf3d319 | 1841 | |
3df9d748 | 1842 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { |
5bf3d319 PX |
1843 | flags |= iommu_notifier->notifier_flags; |
1844 | } | |
1845 | ||
1221a474 | 1846 | if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) { |
549d4005 EA |
1847 | ret = imrc->notify_flag_changed(iommu_mr, |
1848 | iommu_mr->iommu_notify_flags, | |
1849 | flags, errp); | |
5bf3d319 PX |
1850 | } |
1851 | ||
549d4005 EA |
1852 | if (!ret) { |
1853 | iommu_mr->iommu_notify_flags = flags; | |
1854 | } | |
1855 | return ret; | |
5bf3d319 PX |
1856 | } |
1857 | ||
457f8cbb BB |
1858 | int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr, |
1859 | uint64_t page_size_mask, | |
1860 | Error **errp) | |
1861 | { | |
1862 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
1863 | int ret = 0; | |
1864 | ||
1865 | if (imrc->iommu_set_page_size_mask) { | |
1866 | ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp); | |
1867 | } | |
1868 | return ret; | |
1869 | } | |
1870 | ||
549d4005 EA |
1871 | int memory_region_register_iommu_notifier(MemoryRegion *mr, |
1872 | IOMMUNotifier *n, Error **errp) | |
06866575 | 1873 | { |
3df9d748 | 1874 | IOMMUMemoryRegion *iommu_mr; |
549d4005 | 1875 | int ret; |
3df9d748 | 1876 | |
efcd38c5 | 1877 | if (mr->alias) { |
549d4005 | 1878 | return memory_region_register_iommu_notifier(mr->alias, n, errp); |
efcd38c5 JW |
1879 | } |
1880 | ||
cdb30812 | 1881 | /* We need to register for at least one bitfield */ |
3df9d748 | 1882 | iommu_mr = IOMMU_MEMORY_REGION(mr); |
cdb30812 | 1883 | assert(n->notifier_flags != IOMMU_NOTIFIER_NONE); |
698feb5e | 1884 | assert(n->start <= n->end); |
cb1efcf4 PM |
1885 | assert(n->iommu_idx >= 0 && |
1886 | n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr)); | |
1887 | ||
3df9d748 | 1888 | QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node); |
549d4005 EA |
1889 | ret = memory_region_update_iommu_notify_flags(iommu_mr, errp); |
1890 | if (ret) { | |
1891 | QLIST_REMOVE(n, node); | |
1892 | } | |
1893 | return ret; | |
06866575 DG |
1894 | } |
1895 | ||
3df9d748 | 1896 | uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr) |
a788f227 | 1897 | { |
1221a474 AK |
1898 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
1899 | ||
1900 | if (imrc->get_min_page_size) { | |
1901 | return imrc->get_min_page_size(iommu_mr); | |
f682e9c2 AK |
1902 | } |
1903 | return TARGET_PAGE_SIZE; | |
1904 | } | |
1905 | ||
3df9d748 | 1906 | void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n) |
f682e9c2 | 1907 | { |
3df9d748 | 1908 | MemoryRegion *mr = MEMORY_REGION(iommu_mr); |
1221a474 | 1909 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); |
f682e9c2 | 1910 | hwaddr addr, granularity; |
a788f227 DG |
1911 | IOMMUTLBEntry iotlb; |
1912 | ||
faa362e3 | 1913 | /* If the IOMMU has its own replay callback, override */ |
1221a474 AK |
1914 | if (imrc->replay) { |
1915 | imrc->replay(iommu_mr, n); | |
faa362e3 PX |
1916 | return; |
1917 | } | |
1918 | ||
3df9d748 | 1919 | granularity = memory_region_iommu_get_min_page_size(iommu_mr); |
f682e9c2 | 1920 | |
a788f227 | 1921 | for (addr = 0; addr < memory_region_size(mr); addr += granularity) { |
2c91bcf2 | 1922 | iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx); |
a788f227 DG |
1923 | if (iotlb.perm != IOMMU_NONE) { |
1924 | n->notify(n, &iotlb); | |
1925 | } | |
1926 | ||
1927 | /* if (2^64 - MR size) < granularity, it's possible to get an | |
1928 | * infinite loop here. This should catch such a wraparound */ | |
1929 | if ((addr + granularity) < addr) { | |
1930 | break; | |
1931 | } | |
1932 | } | |
1933 | } | |
1934 | ||
cdb30812 PX |
1935 | void memory_region_unregister_iommu_notifier(MemoryRegion *mr, |
1936 | IOMMUNotifier *n) | |
06866575 | 1937 | { |
3df9d748 AK |
1938 | IOMMUMemoryRegion *iommu_mr; |
1939 | ||
efcd38c5 JW |
1940 | if (mr->alias) { |
1941 | memory_region_unregister_iommu_notifier(mr->alias, n); | |
1942 | return; | |
1943 | } | |
cdb30812 | 1944 | QLIST_REMOVE(n, node); |
3df9d748 | 1945 | iommu_mr = IOMMU_MEMORY_REGION(mr); |
549d4005 | 1946 | memory_region_update_iommu_notify_flags(iommu_mr, NULL); |
06866575 DG |
1947 | } |
1948 | ||
3b5ebf85 | 1949 | void memory_region_notify_iommu_one(IOMMUNotifier *notifier, |
5039caf3 | 1950 | IOMMUTLBEvent *event) |
06866575 | 1951 | { |
5039caf3 | 1952 | IOMMUTLBEntry *entry = &event->entry; |
03c7140c | 1953 | hwaddr entry_end = entry->iova + entry->addr_mask; |
1804857f | 1954 | IOMMUTLBEntry tmp = *entry; |
cdb30812 | 1955 | |
5039caf3 EP |
1956 | if (event->type == IOMMU_NOTIFIER_UNMAP) { |
1957 | assert(entry->perm == IOMMU_NONE); | |
1958 | } | |
1959 | ||
bd2bfa4c PX |
1960 | /* |
1961 | * Skip the notification if the notification does not overlap | |
1962 | * with registered range. | |
1963 | */ | |
03c7140c | 1964 | if (notifier->start > entry_end || notifier->end < entry->iova) { |
bd2bfa4c PX |
1965 | return; |
1966 | } | |
cdb30812 | 1967 | |
1804857f EP |
1968 | if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) { |
1969 | /* Crop (iova, addr_mask) to range */ | |
1970 | tmp.iova = MAX(tmp.iova, notifier->start); | |
1971 | tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova; | |
1972 | } else { | |
1973 | assert(entry->iova >= notifier->start && entry_end <= notifier->end); | |
1974 | } | |
03c7140c | 1975 | |
5039caf3 | 1976 | if (event->type & notifier->notifier_flags) { |
1804857f | 1977 | notifier->notify(notifier, &tmp); |
bd2bfa4c PX |
1978 | } |
1979 | } | |
1980 | ||
3df9d748 | 1981 | void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, |
cb1efcf4 | 1982 | int iommu_idx, |
5039caf3 | 1983 | IOMMUTLBEvent event) |
bd2bfa4c PX |
1984 | { |
1985 | IOMMUNotifier *iommu_notifier; | |
1986 | ||
3df9d748 | 1987 | assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr))); |
bd2bfa4c | 1988 | |
3df9d748 | 1989 | IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) { |
cb1efcf4 | 1990 | if (iommu_notifier->iommu_idx == iommu_idx) { |
5039caf3 | 1991 | memory_region_notify_iommu_one(iommu_notifier, &event); |
cb1efcf4 | 1992 | } |
cdb30812 | 1993 | } |
06866575 DG |
1994 | } |
1995 | ||
f1334de6 AK |
1996 | int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr, |
1997 | enum IOMMUMemoryRegionAttr attr, | |
1998 | void *data) | |
1999 | { | |
2000 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
2001 | ||
2002 | if (!imrc->get_attr) { | |
2003 | return -EINVAL; | |
2004 | } | |
2005 | ||
2006 | return imrc->get_attr(iommu_mr, attr, data); | |
2007 | } | |
2008 | ||
21f40209 PM |
2009 | int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr, |
2010 | MemTxAttrs attrs) | |
2011 | { | |
2012 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
2013 | ||
2014 | if (!imrc->attrs_to_index) { | |
2015 | return 0; | |
2016 | } | |
2017 | ||
2018 | return imrc->attrs_to_index(iommu_mr, attrs); | |
2019 | } | |
2020 | ||
2021 | int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr) | |
2022 | { | |
2023 | IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr); | |
2024 | ||
2025 | if (!imrc->num_indexes) { | |
2026 | return 1; | |
2027 | } | |
2028 | ||
2029 | return imrc->num_indexes(iommu_mr); | |
2030 | } | |
2031 | ||
093bc2cd AK |
2032 | void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client) |
2033 | { | |
5a583347 | 2034 | uint8_t mask = 1 << client; |
deb809ed | 2035 | uint8_t old_logging; |
5a583347 | 2036 | |
dbddac6d | 2037 | assert(client == DIRTY_MEMORY_VGA); |
deb809ed PB |
2038 | old_logging = mr->vga_logging_count; |
2039 | mr->vga_logging_count += log ? 1 : -1; | |
2040 | if (!!old_logging == !!mr->vga_logging_count) { | |
2041 | return; | |
2042 | } | |
2043 | ||
59023ef4 | 2044 | memory_region_transaction_begin(); |
5a583347 | 2045 | mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask); |
22bde714 | 2046 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2047 | memory_region_transaction_commit(); |
093bc2cd AK |
2048 | } |
2049 | ||
a8170e5e AK |
2050 | void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr, |
2051 | hwaddr size) | |
093bc2cd | 2052 | { |
8e41fb63 FZ |
2053 | assert(mr->ram_block); |
2054 | cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr, | |
2055 | size, | |
58d2707e | 2056 | memory_region_get_dirty_log_mask(mr)); |
093bc2cd AK |
2057 | } |
2058 | ||
0fe1eca7 | 2059 | static void memory_region_sync_dirty_bitmap(MemoryRegion *mr) |
093bc2cd | 2060 | { |
0a752eee | 2061 | MemoryListener *listener; |
0d673e36 | 2062 | AddressSpace *as; |
0a752eee | 2063 | FlatView *view; |
5a583347 AK |
2064 | FlatRange *fr; |
2065 | ||
0a752eee PB |
2066 | /* If the same address space has multiple log_sync listeners, we |
2067 | * visit that address space's FlatView multiple times. But because | |
2068 | * log_sync listeners are rare, it's still cheaper than walking each | |
2069 | * address space once. | |
2070 | */ | |
2071 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2072 | if (!listener->log_sync) { | |
2073 | continue; | |
2074 | } | |
2075 | as = listener->address_space; | |
2076 | view = address_space_get_flatview(as); | |
99e86347 | 2077 | FOR_EACH_FLAT_RANGE(fr, view) { |
3ebb1817 | 2078 | if (fr->dirty_log_mask && (!mr || fr->mr == mr)) { |
16620684 | 2079 | MemoryRegionSection mrs = section_from_flat_range(fr, view); |
0a752eee | 2080 | listener->log_sync(listener, &mrs); |
0d673e36 | 2081 | } |
5a583347 | 2082 | } |
856d7245 | 2083 | flatview_unref(view); |
5a583347 | 2084 | } |
093bc2cd AK |
2085 | } |
2086 | ||
077874e0 PX |
2087 | void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start, |
2088 | hwaddr len) | |
2089 | { | |
2090 | MemoryRegionSection mrs; | |
2091 | MemoryListener *listener; | |
2092 | AddressSpace *as; | |
2093 | FlatView *view; | |
2094 | FlatRange *fr; | |
2095 | hwaddr sec_start, sec_end, sec_size; | |
2096 | ||
2097 | QTAILQ_FOREACH(listener, &memory_listeners, link) { | |
2098 | if (!listener->log_clear) { | |
2099 | continue; | |
2100 | } | |
2101 | as = listener->address_space; | |
2102 | view = address_space_get_flatview(as); | |
2103 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2104 | if (!fr->dirty_log_mask || fr->mr != mr) { | |
2105 | /* | |
2106 | * Clear dirty bitmap operation only applies to those | |
2107 | * regions whose dirty logging is at least enabled | |
2108 | */ | |
2109 | continue; | |
2110 | } | |
2111 | ||
2112 | mrs = section_from_flat_range(fr, view); | |
2113 | ||
2114 | sec_start = MAX(mrs.offset_within_region, start); | |
2115 | sec_end = mrs.offset_within_region + int128_get64(mrs.size); | |
2116 | sec_end = MIN(sec_end, start + len); | |
2117 | ||
2118 | if (sec_start >= sec_end) { | |
2119 | /* | |
2120 | * If this memory region section has no intersection | |
2121 | * with the requested range, skip. | |
2122 | */ | |
2123 | continue; | |
2124 | } | |
2125 | ||
2126 | /* Valid case; shrink the section if needed */ | |
2127 | mrs.offset_within_address_space += | |
2128 | sec_start - mrs.offset_within_region; | |
2129 | mrs.offset_within_region = sec_start; | |
2130 | sec_size = sec_end - sec_start; | |
2131 | mrs.size = int128_make64(sec_size); | |
2132 | listener->log_clear(listener, &mrs); | |
2133 | } | |
2134 | flatview_unref(view); | |
2135 | } | |
2136 | } | |
2137 | ||
0fe1eca7 PB |
2138 | DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr, |
2139 | hwaddr addr, | |
2140 | hwaddr size, | |
2141 | unsigned client) | |
2142 | { | |
9458a9a1 | 2143 | DirtyBitmapSnapshot *snapshot; |
0fe1eca7 PB |
2144 | assert(mr->ram_block); |
2145 | memory_region_sync_dirty_bitmap(mr); | |
9458a9a1 PB |
2146 | snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client); |
2147 | memory_global_after_dirty_log_sync(); | |
2148 | return snapshot; | |
0fe1eca7 PB |
2149 | } |
2150 | ||
2151 | bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap, | |
2152 | hwaddr addr, hwaddr size) | |
2153 | { | |
2154 | assert(mr->ram_block); | |
2155 | return cpu_physical_memory_snapshot_get_dirty(snap, | |
2156 | memory_region_get_ram_addr(mr) + addr, size); | |
2157 | } | |
2158 | ||
093bc2cd AK |
2159 | void memory_region_set_readonly(MemoryRegion *mr, bool readonly) |
2160 | { | |
fb1cd6f9 | 2161 | if (mr->readonly != readonly) { |
59023ef4 | 2162 | memory_region_transaction_begin(); |
fb1cd6f9 | 2163 | mr->readonly = readonly; |
22bde714 | 2164 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2165 | memory_region_transaction_commit(); |
fb1cd6f9 | 2166 | } |
093bc2cd AK |
2167 | } |
2168 | ||
c26763f8 MAL |
2169 | void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile) |
2170 | { | |
2171 | if (mr->nonvolatile != nonvolatile) { | |
2172 | memory_region_transaction_begin(); | |
2173 | mr->nonvolatile = nonvolatile; | |
2174 | memory_region_update_pending |= mr->enabled; | |
2175 | memory_region_transaction_commit(); | |
2176 | } | |
2177 | } | |
2178 | ||
5f9a5ea1 | 2179 | void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode) |
d0a9b5bc | 2180 | { |
5f9a5ea1 | 2181 | if (mr->romd_mode != romd_mode) { |
59023ef4 | 2182 | memory_region_transaction_begin(); |
5f9a5ea1 | 2183 | mr->romd_mode = romd_mode; |
22bde714 | 2184 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2185 | memory_region_transaction_commit(); |
d0a9b5bc AK |
2186 | } |
2187 | } | |
2188 | ||
a8170e5e AK |
2189 | void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr, |
2190 | hwaddr size, unsigned client) | |
093bc2cd | 2191 | { |
8e41fb63 FZ |
2192 | assert(mr->ram_block); |
2193 | cpu_physical_memory_test_and_clear_dirty( | |
2194 | memory_region_get_ram_addr(mr) + addr, size, client); | |
093bc2cd AK |
2195 | } |
2196 | ||
a35ba7be PB |
2197 | int memory_region_get_fd(MemoryRegion *mr) |
2198 | { | |
4ff87573 PB |
2199 | int fd; |
2200 | ||
694ea274 | 2201 | RCU_READ_LOCK_GUARD(); |
4ff87573 PB |
2202 | while (mr->alias) { |
2203 | mr = mr->alias; | |
a35ba7be | 2204 | } |
4ff87573 | 2205 | fd = mr->ram_block->fd; |
a35ba7be | 2206 | |
4ff87573 PB |
2207 | return fd; |
2208 | } | |
a35ba7be | 2209 | |
093bc2cd AK |
2210 | void *memory_region_get_ram_ptr(MemoryRegion *mr) |
2211 | { | |
49b24afc PB |
2212 | void *ptr; |
2213 | uint64_t offset = 0; | |
093bc2cd | 2214 | |
694ea274 | 2215 | RCU_READ_LOCK_GUARD(); |
49b24afc PB |
2216 | while (mr->alias) { |
2217 | offset += mr->alias_offset; | |
2218 | mr = mr->alias; | |
2219 | } | |
8e41fb63 | 2220 | assert(mr->ram_block); |
0878d0e1 | 2221 | ptr = qemu_map_ram_ptr(mr->ram_block, offset); |
093bc2cd | 2222 | |
0878d0e1 | 2223 | return ptr; |
093bc2cd AK |
2224 | } |
2225 | ||
07bdaa41 PB |
2226 | MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset) |
2227 | { | |
2228 | RAMBlock *block; | |
2229 | ||
2230 | block = qemu_ram_block_from_host(ptr, false, offset); | |
2231 | if (!block) { | |
2232 | return NULL; | |
2233 | } | |
2234 | ||
2235 | return block->mr; | |
2236 | } | |
2237 | ||
7ebb2745 FZ |
2238 | ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr) |
2239 | { | |
2240 | return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID; | |
2241 | } | |
2242 | ||
37d7c084 PB |
2243 | void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp) |
2244 | { | |
8e41fb63 | 2245 | assert(mr->ram_block); |
37d7c084 | 2246 | |
fa53a0e5 | 2247 | qemu_ram_resize(mr->ram_block, newsize, errp); |
37d7c084 PB |
2248 | } |
2249 | ||
9ecc996a PMD |
2250 | void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size) |
2251 | { | |
2252 | if (mr->ram_block) { | |
ab7e41e6 | 2253 | qemu_ram_msync(mr->ram_block, addr, size); |
9ecc996a PMD |
2254 | } |
2255 | } | |
61c490e2 | 2256 | |
4dfe59d1 | 2257 | void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size) |
61c490e2 BM |
2258 | { |
2259 | /* | |
2260 | * Might be extended case needed to cover | |
2261 | * different types of memory regions | |
2262 | */ | |
9ecc996a PMD |
2263 | if (mr->dirty_log_mask) { |
2264 | memory_region_msync(mr, addr, size); | |
61c490e2 BM |
2265 | } |
2266 | } | |
2267 | ||
b960fc17 PX |
2268 | /* |
2269 | * Call proper memory listeners about the change on the newly | |
2270 | * added/removed CoalescedMemoryRange. | |
2271 | */ | |
2272 | static void memory_region_update_coalesced_range(MemoryRegion *mr, | |
2273 | CoalescedMemoryRange *cmr, | |
2274 | bool add) | |
093bc2cd | 2275 | { |
b960fc17 | 2276 | AddressSpace *as; |
99e86347 | 2277 | FlatView *view; |
093bc2cd | 2278 | FlatRange *fr; |
093bc2cd | 2279 | |
0d673e36 | 2280 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
b960fc17 PX |
2281 | view = address_space_get_flatview(as); |
2282 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2283 | if (fr->mr == mr) { | |
2284 | flat_range_coalesced_io_notify(fr, as, cmr, add); | |
2285 | } | |
2286 | } | |
2287 | flatview_unref(view); | |
0d673e36 AK |
2288 | } |
2289 | } | |
2290 | ||
093bc2cd AK |
2291 | void memory_region_set_coalescing(MemoryRegion *mr) |
2292 | { | |
2293 | memory_region_clear_coalescing(mr); | |
08dafab4 | 2294 | memory_region_add_coalescing(mr, 0, int128_get64(mr->size)); |
093bc2cd AK |
2295 | } |
2296 | ||
2297 | void memory_region_add_coalescing(MemoryRegion *mr, | |
a8170e5e | 2298 | hwaddr offset, |
093bc2cd AK |
2299 | uint64_t size) |
2300 | { | |
7267c094 | 2301 | CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr)); |
093bc2cd | 2302 | |
08dafab4 | 2303 | cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size)); |
093bc2cd | 2304 | QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link); |
b960fc17 | 2305 | memory_region_update_coalesced_range(mr, cmr, true); |
d410515e | 2306 | memory_region_set_flush_coalesced(mr); |
093bc2cd AK |
2307 | } |
2308 | ||
2309 | void memory_region_clear_coalescing(MemoryRegion *mr) | |
2310 | { | |
2311 | CoalescedMemoryRange *cmr; | |
9c1aa1c2 PX |
2312 | |
2313 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
2314 | return; | |
2315 | } | |
093bc2cd | 2316 | |
d410515e JK |
2317 | qemu_flush_coalesced_mmio_buffer(); |
2318 | mr->flush_coalesced_mmio = false; | |
2319 | ||
093bc2cd AK |
2320 | while (!QTAILQ_EMPTY(&mr->coalesced)) { |
2321 | cmr = QTAILQ_FIRST(&mr->coalesced); | |
2322 | QTAILQ_REMOVE(&mr->coalesced, cmr, link); | |
b960fc17 | 2323 | memory_region_update_coalesced_range(mr, cmr, false); |
7267c094 | 2324 | g_free(cmr); |
ab5b3db5 | 2325 | } |
093bc2cd AK |
2326 | } |
2327 | ||
d410515e JK |
2328 | void memory_region_set_flush_coalesced(MemoryRegion *mr) |
2329 | { | |
2330 | mr->flush_coalesced_mmio = true; | |
2331 | } | |
2332 | ||
2333 | void memory_region_clear_flush_coalesced(MemoryRegion *mr) | |
2334 | { | |
2335 | qemu_flush_coalesced_mmio_buffer(); | |
2336 | if (QTAILQ_EMPTY(&mr->coalesced)) { | |
2337 | mr->flush_coalesced_mmio = false; | |
2338 | } | |
2339 | } | |
2340 | ||
8c56c1a5 PF |
2341 | static bool userspace_eventfd_warning; |
2342 | ||
3e9d69e7 | 2343 | void memory_region_add_eventfd(MemoryRegion *mr, |
a8170e5e | 2344 | hwaddr addr, |
3e9d69e7 AK |
2345 | unsigned size, |
2346 | bool match_data, | |
2347 | uint64_t data, | |
753d5e14 | 2348 | EventNotifier *e) |
3e9d69e7 AK |
2349 | { |
2350 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2351 | .addr.start = int128_make64(addr), |
2352 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2353 | .match_data = match_data, |
2354 | .data = data, | |
753d5e14 | 2355 | .e = e, |
3e9d69e7 AK |
2356 | }; |
2357 | unsigned i; | |
2358 | ||
8c56c1a5 PF |
2359 | if (kvm_enabled() && (!(kvm_eventfds_enabled() || |
2360 | userspace_eventfd_warning))) { | |
2361 | userspace_eventfd_warning = true; | |
2362 | error_report("Using eventfd without MMIO binding in KVM. " | |
2363 | "Suboptimal performance expected"); | |
2364 | } | |
2365 | ||
b8aecea2 | 2366 | if (size) { |
9bf825bf | 2367 | adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE); |
b8aecea2 | 2368 | } |
59023ef4 | 2369 | memory_region_transaction_begin(); |
3e9d69e7 | 2370 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
73bb753d | 2371 | if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) { |
3e9d69e7 AK |
2372 | break; |
2373 | } | |
2374 | } | |
2375 | ++mr->ioeventfd_nb; | |
7267c094 | 2376 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 AK |
2377 | sizeof(*mr->ioeventfds) * mr->ioeventfd_nb); |
2378 | memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i], | |
2379 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i)); | |
2380 | mr->ioeventfds[i] = mrfd; | |
4dc56152 | 2381 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2382 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2383 | } |
2384 | ||
2385 | void memory_region_del_eventfd(MemoryRegion *mr, | |
a8170e5e | 2386 | hwaddr addr, |
3e9d69e7 AK |
2387 | unsigned size, |
2388 | bool match_data, | |
2389 | uint64_t data, | |
753d5e14 | 2390 | EventNotifier *e) |
3e9d69e7 AK |
2391 | { |
2392 | MemoryRegionIoeventfd mrfd = { | |
08dafab4 AK |
2393 | .addr.start = int128_make64(addr), |
2394 | .addr.size = int128_make64(size), | |
3e9d69e7 AK |
2395 | .match_data = match_data, |
2396 | .data = data, | |
753d5e14 | 2397 | .e = e, |
3e9d69e7 AK |
2398 | }; |
2399 | unsigned i; | |
2400 | ||
b8aecea2 | 2401 | if (size) { |
9bf825bf | 2402 | adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE); |
b8aecea2 | 2403 | } |
59023ef4 | 2404 | memory_region_transaction_begin(); |
3e9d69e7 | 2405 | for (i = 0; i < mr->ioeventfd_nb; ++i) { |
73bb753d | 2406 | if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) { |
3e9d69e7 AK |
2407 | break; |
2408 | } | |
2409 | } | |
2410 | assert(i != mr->ioeventfd_nb); | |
2411 | memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1], | |
2412 | sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1))); | |
2413 | --mr->ioeventfd_nb; | |
7267c094 | 2414 | mr->ioeventfds = g_realloc(mr->ioeventfds, |
3e9d69e7 | 2415 | sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1); |
4dc56152 | 2416 | ioeventfd_update_pending |= mr->enabled; |
59023ef4 | 2417 | memory_region_transaction_commit(); |
3e9d69e7 AK |
2418 | } |
2419 | ||
feca4ac1 | 2420 | static void memory_region_update_container_subregions(MemoryRegion *subregion) |
093bc2cd | 2421 | { |
feca4ac1 | 2422 | MemoryRegion *mr = subregion->container; |
093bc2cd AK |
2423 | MemoryRegion *other; |
2424 | ||
59023ef4 JK |
2425 | memory_region_transaction_begin(); |
2426 | ||
dfde4e6e | 2427 | memory_region_ref(subregion); |
093bc2cd AK |
2428 | QTAILQ_FOREACH(other, &mr->subregions, subregions_link) { |
2429 | if (subregion->priority >= other->priority) { | |
2430 | QTAILQ_INSERT_BEFORE(other, subregion, subregions_link); | |
2431 | goto done; | |
2432 | } | |
2433 | } | |
2434 | QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link); | |
2435 | done: | |
22bde714 | 2436 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2437 | memory_region_transaction_commit(); |
093bc2cd AK |
2438 | } |
2439 | ||
0598701a PC |
2440 | static void memory_region_add_subregion_common(MemoryRegion *mr, |
2441 | hwaddr offset, | |
2442 | MemoryRegion *subregion) | |
2443 | { | |
feca4ac1 PB |
2444 | assert(!subregion->container); |
2445 | subregion->container = mr; | |
0598701a | 2446 | subregion->addr = offset; |
feca4ac1 | 2447 | memory_region_update_container_subregions(subregion); |
0598701a | 2448 | } |
093bc2cd AK |
2449 | |
2450 | void memory_region_add_subregion(MemoryRegion *mr, | |
a8170e5e | 2451 | hwaddr offset, |
093bc2cd AK |
2452 | MemoryRegion *subregion) |
2453 | { | |
093bc2cd AK |
2454 | subregion->priority = 0; |
2455 | memory_region_add_subregion_common(mr, offset, subregion); | |
2456 | } | |
2457 | ||
2458 | void memory_region_add_subregion_overlap(MemoryRegion *mr, | |
a8170e5e | 2459 | hwaddr offset, |
093bc2cd | 2460 | MemoryRegion *subregion, |
a1ff8ae0 | 2461 | int priority) |
093bc2cd | 2462 | { |
093bc2cd AK |
2463 | subregion->priority = priority; |
2464 | memory_region_add_subregion_common(mr, offset, subregion); | |
2465 | } | |
2466 | ||
2467 | void memory_region_del_subregion(MemoryRegion *mr, | |
2468 | MemoryRegion *subregion) | |
2469 | { | |
59023ef4 | 2470 | memory_region_transaction_begin(); |
feca4ac1 PB |
2471 | assert(subregion->container == mr); |
2472 | subregion->container = NULL; | |
093bc2cd | 2473 | QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link); |
dfde4e6e | 2474 | memory_region_unref(subregion); |
22bde714 | 2475 | memory_region_update_pending |= mr->enabled && subregion->enabled; |
59023ef4 | 2476 | memory_region_transaction_commit(); |
6bba19ba AK |
2477 | } |
2478 | ||
2479 | void memory_region_set_enabled(MemoryRegion *mr, bool enabled) | |
2480 | { | |
2481 | if (enabled == mr->enabled) { | |
2482 | return; | |
2483 | } | |
59023ef4 | 2484 | memory_region_transaction_begin(); |
6bba19ba | 2485 | mr->enabled = enabled; |
22bde714 | 2486 | memory_region_update_pending = true; |
59023ef4 | 2487 | memory_region_transaction_commit(); |
093bc2cd | 2488 | } |
1c0ffa58 | 2489 | |
e7af4c67 MT |
2490 | void memory_region_set_size(MemoryRegion *mr, uint64_t size) |
2491 | { | |
2492 | Int128 s = int128_make64(size); | |
2493 | ||
2494 | if (size == UINT64_MAX) { | |
2495 | s = int128_2_64(); | |
2496 | } | |
2497 | if (int128_eq(s, mr->size)) { | |
2498 | return; | |
2499 | } | |
2500 | memory_region_transaction_begin(); | |
2501 | mr->size = s; | |
2502 | memory_region_update_pending = true; | |
2503 | memory_region_transaction_commit(); | |
2504 | } | |
2505 | ||
67891b8a | 2506 | static void memory_region_readd_subregion(MemoryRegion *mr) |
2282e1af | 2507 | { |
feca4ac1 | 2508 | MemoryRegion *container = mr->container; |
2282e1af | 2509 | |
feca4ac1 | 2510 | if (container) { |
67891b8a PC |
2511 | memory_region_transaction_begin(); |
2512 | memory_region_ref(mr); | |
feca4ac1 PB |
2513 | memory_region_del_subregion(container, mr); |
2514 | mr->container = container; | |
2515 | memory_region_update_container_subregions(mr); | |
67891b8a PC |
2516 | memory_region_unref(mr); |
2517 | memory_region_transaction_commit(); | |
2282e1af | 2518 | } |
67891b8a | 2519 | } |
2282e1af | 2520 | |
67891b8a PC |
2521 | void memory_region_set_address(MemoryRegion *mr, hwaddr addr) |
2522 | { | |
2523 | if (addr != mr->addr) { | |
2524 | mr->addr = addr; | |
2525 | memory_region_readd_subregion(mr); | |
2526 | } | |
2282e1af AK |
2527 | } |
2528 | ||
a8170e5e | 2529 | void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset) |
4703359e | 2530 | { |
4703359e | 2531 | assert(mr->alias); |
4703359e | 2532 | |
59023ef4 | 2533 | if (offset == mr->alias_offset) { |
4703359e AK |
2534 | return; |
2535 | } | |
2536 | ||
59023ef4 JK |
2537 | memory_region_transaction_begin(); |
2538 | mr->alias_offset = offset; | |
22bde714 | 2539 | memory_region_update_pending |= mr->enabled; |
59023ef4 | 2540 | memory_region_transaction_commit(); |
4703359e AK |
2541 | } |
2542 | ||
a2b257d6 IM |
2543 | uint64_t memory_region_get_alignment(const MemoryRegion *mr) |
2544 | { | |
2545 | return mr->align; | |
2546 | } | |
2547 | ||
e2177955 AK |
2548 | static int cmp_flatrange_addr(const void *addr_, const void *fr_) |
2549 | { | |
2550 | const AddrRange *addr = addr_; | |
2551 | const FlatRange *fr = fr_; | |
2552 | ||
2553 | if (int128_le(addrrange_end(*addr), fr->addr.start)) { | |
2554 | return -1; | |
2555 | } else if (int128_ge(addr->start, addrrange_end(fr->addr))) { | |
2556 | return 1; | |
2557 | } | |
2558 | return 0; | |
2559 | } | |
2560 | ||
99e86347 | 2561 | static FlatRange *flatview_lookup(FlatView *view, AddrRange addr) |
e2177955 | 2562 | { |
99e86347 | 2563 | return bsearch(&addr, view->ranges, view->nr, |
e2177955 AK |
2564 | sizeof(FlatRange), cmp_flatrange_addr); |
2565 | } | |
2566 | ||
eed2bacf IM |
2567 | bool memory_region_is_mapped(MemoryRegion *mr) |
2568 | { | |
2569 | return mr->container ? true : false; | |
2570 | } | |
2571 | ||
c6742b14 PB |
2572 | /* Same as memory_region_find, but it does not add a reference to the |
2573 | * returned region. It must be called from an RCU critical section. | |
2574 | */ | |
2575 | static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr, | |
2576 | hwaddr addr, uint64_t size) | |
e2177955 | 2577 | { |
052e87b0 | 2578 | MemoryRegionSection ret = { .mr = NULL }; |
73034e9e PB |
2579 | MemoryRegion *root; |
2580 | AddressSpace *as; | |
2581 | AddrRange range; | |
99e86347 | 2582 | FlatView *view; |
73034e9e PB |
2583 | FlatRange *fr; |
2584 | ||
2585 | addr += mr->addr; | |
feca4ac1 PB |
2586 | for (root = mr; root->container; ) { |
2587 | root = root->container; | |
73034e9e PB |
2588 | addr += root->addr; |
2589 | } | |
e2177955 | 2590 | |
73034e9e | 2591 | as = memory_region_to_address_space(root); |
eed2bacf IM |
2592 | if (!as) { |
2593 | return ret; | |
2594 | } | |
73034e9e | 2595 | range = addrrange_make(int128_make64(addr), int128_make64(size)); |
99e86347 | 2596 | |
16620684 | 2597 | view = address_space_to_flatview(as); |
99e86347 | 2598 | fr = flatview_lookup(view, range); |
e2177955 | 2599 | if (!fr) { |
c6742b14 | 2600 | return ret; |
e2177955 AK |
2601 | } |
2602 | ||
99e86347 | 2603 | while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) { |
e2177955 AK |
2604 | --fr; |
2605 | } | |
2606 | ||
2607 | ret.mr = fr->mr; | |
16620684 | 2608 | ret.fv = view; |
e2177955 AK |
2609 | range = addrrange_intersection(range, fr->addr); |
2610 | ret.offset_within_region = fr->offset_in_region; | |
2611 | ret.offset_within_region += int128_get64(int128_sub(range.start, | |
2612 | fr->addr.start)); | |
052e87b0 | 2613 | ret.size = range.size; |
e2177955 | 2614 | ret.offset_within_address_space = int128_get64(range.start); |
7a8499e8 | 2615 | ret.readonly = fr->readonly; |
c26763f8 | 2616 | ret.nonvolatile = fr->nonvolatile; |
c6742b14 PB |
2617 | return ret; |
2618 | } | |
2619 | ||
2620 | MemoryRegionSection memory_region_find(MemoryRegion *mr, | |
2621 | hwaddr addr, uint64_t size) | |
2622 | { | |
2623 | MemoryRegionSection ret; | |
694ea274 | 2624 | RCU_READ_LOCK_GUARD(); |
c6742b14 PB |
2625 | ret = memory_region_find_rcu(mr, addr, size); |
2626 | if (ret.mr) { | |
2627 | memory_region_ref(ret.mr); | |
2628 | } | |
e2177955 AK |
2629 | return ret; |
2630 | } | |
2631 | ||
c6742b14 PB |
2632 | bool memory_region_present(MemoryRegion *container, hwaddr addr) |
2633 | { | |
2634 | MemoryRegion *mr; | |
2635 | ||
694ea274 | 2636 | RCU_READ_LOCK_GUARD(); |
c6742b14 | 2637 | mr = memory_region_find_rcu(container, addr, 1).mr; |
c6742b14 PB |
2638 | return mr && mr != container; |
2639 | } | |
2640 | ||
9c1f8f44 | 2641 | void memory_global_dirty_log_sync(void) |
86e775c6 | 2642 | { |
3ebb1817 | 2643 | memory_region_sync_dirty_bitmap(NULL); |
7664e80c AK |
2644 | } |
2645 | ||
9458a9a1 PB |
2646 | void memory_global_after_dirty_log_sync(void) |
2647 | { | |
2648 | MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward); | |
2649 | } | |
2650 | ||
19310760 JZ |
2651 | static VMChangeStateEntry *vmstate_change; |
2652 | ||
7664e80c AK |
2653 | void memory_global_dirty_log_start(void) |
2654 | { | |
19310760 JZ |
2655 | if (vmstate_change) { |
2656 | qemu_del_vm_change_state_handler(vmstate_change); | |
2657 | vmstate_change = NULL; | |
2658 | } | |
2659 | ||
7664e80c | 2660 | global_dirty_log = true; |
6f6a5ef3 | 2661 | |
7376e582 | 2662 | MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward); |
6f6a5ef3 | 2663 | |
39adb536 | 2664 | /* Refresh DIRTY_MEMORY_MIGRATION bit. */ |
6f6a5ef3 PB |
2665 | memory_region_transaction_begin(); |
2666 | memory_region_update_pending = true; | |
2667 | memory_region_transaction_commit(); | |
7664e80c AK |
2668 | } |
2669 | ||
19310760 | 2670 | static void memory_global_dirty_log_do_stop(void) |
7664e80c | 2671 | { |
7664e80c | 2672 | global_dirty_log = false; |
6f6a5ef3 | 2673 | |
39adb536 | 2674 | /* Refresh DIRTY_MEMORY_MIGRATION bit. */ |
6f6a5ef3 PB |
2675 | memory_region_transaction_begin(); |
2676 | memory_region_update_pending = true; | |
2677 | memory_region_transaction_commit(); | |
2678 | ||
7376e582 | 2679 | MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse); |
7664e80c AK |
2680 | } |
2681 | ||
538f0497 | 2682 | static void memory_vm_change_state_handler(void *opaque, bool running, |
19310760 JZ |
2683 | RunState state) |
2684 | { | |
2685 | if (running) { | |
2686 | memory_global_dirty_log_do_stop(); | |
2687 | ||
2688 | if (vmstate_change) { | |
2689 | qemu_del_vm_change_state_handler(vmstate_change); | |
2690 | vmstate_change = NULL; | |
2691 | } | |
2692 | } | |
2693 | } | |
2694 | ||
2695 | void memory_global_dirty_log_stop(void) | |
2696 | { | |
2697 | if (!runstate_is_running()) { | |
2698 | if (vmstate_change) { | |
2699 | return; | |
2700 | } | |
2701 | vmstate_change = qemu_add_vm_change_state_handler( | |
2702 | memory_vm_change_state_handler, NULL); | |
2703 | return; | |
2704 | } | |
2705 | ||
2706 | memory_global_dirty_log_do_stop(); | |
2707 | } | |
2708 | ||
7664e80c AK |
2709 | static void listener_add_address_space(MemoryListener *listener, |
2710 | AddressSpace *as) | |
2711 | { | |
99e86347 | 2712 | FlatView *view; |
7664e80c AK |
2713 | FlatRange *fr; |
2714 | ||
680a4783 PB |
2715 | if (listener->begin) { |
2716 | listener->begin(listener); | |
2717 | } | |
7664e80c | 2718 | if (global_dirty_log) { |
975aefe0 AK |
2719 | if (listener->log_global_start) { |
2720 | listener->log_global_start(listener); | |
2721 | } | |
7664e80c | 2722 | } |
975aefe0 | 2723 | |
856d7245 | 2724 | view = address_space_get_flatview(as); |
99e86347 | 2725 | FOR_EACH_FLAT_RANGE(fr, view) { |
279836f8 DH |
2726 | MemoryRegionSection section = section_from_flat_range(fr, view); |
2727 | ||
975aefe0 AK |
2728 | if (listener->region_add) { |
2729 | listener->region_add(listener, §ion); | |
2730 | } | |
ae990e6c DH |
2731 | if (fr->dirty_log_mask && listener->log_start) { |
2732 | listener->log_start(listener, §ion, 0, fr->dirty_log_mask); | |
2733 | } | |
7664e80c | 2734 | } |
680a4783 PB |
2735 | if (listener->commit) { |
2736 | listener->commit(listener); | |
2737 | } | |
856d7245 | 2738 | flatview_unref(view); |
7664e80c AK |
2739 | } |
2740 | ||
d25836ca PX |
2741 | static void listener_del_address_space(MemoryListener *listener, |
2742 | AddressSpace *as) | |
2743 | { | |
2744 | FlatView *view; | |
2745 | FlatRange *fr; | |
2746 | ||
2747 | if (listener->begin) { | |
2748 | listener->begin(listener); | |
2749 | } | |
2750 | view = address_space_get_flatview(as); | |
2751 | FOR_EACH_FLAT_RANGE(fr, view) { | |
2752 | MemoryRegionSection section = section_from_flat_range(fr, view); | |
2753 | ||
2754 | if (fr->dirty_log_mask && listener->log_stop) { | |
2755 | listener->log_stop(listener, §ion, fr->dirty_log_mask, 0); | |
2756 | } | |
2757 | if (listener->region_del) { | |
2758 | listener->region_del(listener, §ion); | |
2759 | } | |
2760 | } | |
2761 | if (listener->commit) { | |
2762 | listener->commit(listener); | |
2763 | } | |
2764 | flatview_unref(view); | |
2765 | } | |
2766 | ||
d45fa784 | 2767 | void memory_listener_register(MemoryListener *listener, AddressSpace *as) |
7664e80c | 2768 | { |
72e22d2f AK |
2769 | MemoryListener *other = NULL; |
2770 | ||
d45fa784 | 2771 | listener->address_space = as; |
72e22d2f | 2772 | if (QTAILQ_EMPTY(&memory_listeners) |
eae3eb3e | 2773 | || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) { |
72e22d2f AK |
2774 | QTAILQ_INSERT_TAIL(&memory_listeners, listener, link); |
2775 | } else { | |
2776 | QTAILQ_FOREACH(other, &memory_listeners, link) { | |
2777 | if (listener->priority < other->priority) { | |
2778 | break; | |
2779 | } | |
2780 | } | |
2781 | QTAILQ_INSERT_BEFORE(other, listener, link); | |
2782 | } | |
0d673e36 | 2783 | |
9a54635d | 2784 | if (QTAILQ_EMPTY(&as->listeners) |
eae3eb3e | 2785 | || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) { |
9a54635d PB |
2786 | QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as); |
2787 | } else { | |
2788 | QTAILQ_FOREACH(other, &as->listeners, link_as) { | |
2789 | if (listener->priority < other->priority) { | |
2790 | break; | |
2791 | } | |
2792 | } | |
2793 | QTAILQ_INSERT_BEFORE(other, listener, link_as); | |
2794 | } | |
2795 | ||
d45fa784 | 2796 | listener_add_address_space(listener, as); |
7664e80c AK |
2797 | } |
2798 | ||
2799 | void memory_listener_unregister(MemoryListener *listener) | |
2800 | { | |
1d8280c1 PB |
2801 | if (!listener->address_space) { |
2802 | return; | |
2803 | } | |
2804 | ||
d25836ca | 2805 | listener_del_address_space(listener, listener->address_space); |
72e22d2f | 2806 | QTAILQ_REMOVE(&memory_listeners, listener, link); |
9a54635d | 2807 | QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as); |
1d8280c1 | 2808 | listener->address_space = NULL; |
86e775c6 | 2809 | } |
e2177955 | 2810 | |
a2166410 GK |
2811 | void address_space_remove_listeners(AddressSpace *as) |
2812 | { | |
2813 | while (!QTAILQ_EMPTY(&as->listeners)) { | |
2814 | memory_listener_unregister(QTAILQ_FIRST(&as->listeners)); | |
2815 | } | |
2816 | } | |
2817 | ||
7dca8043 | 2818 | void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name) |
1c0ffa58 | 2819 | { |
ac95190e | 2820 | memory_region_ref(root); |
8786db7c | 2821 | as->root = root; |
67ace39b | 2822 | as->current_map = NULL; |
4c19eb72 AK |
2823 | as->ioeventfd_nb = 0; |
2824 | as->ioeventfds = NULL; | |
9a54635d | 2825 | QTAILQ_INIT(&as->listeners); |
0d673e36 | 2826 | QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link); |
7dca8043 | 2827 | as->name = g_strdup(name ? name : "anonymous"); |
202fc01b AK |
2828 | address_space_update_topology(as); |
2829 | address_space_update_ioeventfds(as); | |
1c0ffa58 | 2830 | } |
658b2224 | 2831 | |
374f2981 | 2832 | static void do_address_space_destroy(AddressSpace *as) |
83f3c251 | 2833 | { |
9a54635d | 2834 | assert(QTAILQ_EMPTY(&as->listeners)); |
078c44f4 | 2835 | |
856d7245 | 2836 | flatview_unref(as->current_map); |
7dca8043 | 2837 | g_free(as->name); |
4c19eb72 | 2838 | g_free(as->ioeventfds); |
ac95190e | 2839 | memory_region_unref(as->root); |
83f3c251 AK |
2840 | } |
2841 | ||
374f2981 PB |
2842 | void address_space_destroy(AddressSpace *as) |
2843 | { | |
ac95190e PB |
2844 | MemoryRegion *root = as->root; |
2845 | ||
374f2981 PB |
2846 | /* Flush out anything from MemoryListeners listening in on this */ |
2847 | memory_region_transaction_begin(); | |
2848 | as->root = NULL; | |
2849 | memory_region_transaction_commit(); | |
2850 | QTAILQ_REMOVE(&address_spaces, as, address_spaces_link); | |
2851 | ||
2852 | /* At this point, as->dispatch and as->current_map are dummy | |
2853 | * entries that the guest should never use. Wait for the old | |
2854 | * values to expire before freeing the data. | |
2855 | */ | |
ac95190e | 2856 | as->root = root; |
374f2981 PB |
2857 | call_rcu(as, do_address_space_destroy, rcu); |
2858 | } | |
2859 | ||
4e831901 PX |
2860 | static const char *memory_region_type(MemoryRegion *mr) |
2861 | { | |
39fa93c4 PMD |
2862 | if (mr->alias) { |
2863 | return memory_region_type(mr->alias); | |
2864 | } | |
4e831901 PX |
2865 | if (memory_region_is_ram_device(mr)) { |
2866 | return "ramd"; | |
2867 | } else if (memory_region_is_romd(mr)) { | |
2868 | return "romd"; | |
2869 | } else if (memory_region_is_rom(mr)) { | |
2870 | return "rom"; | |
2871 | } else if (memory_region_is_ram(mr)) { | |
2872 | return "ram"; | |
2873 | } else { | |
2874 | return "i/o"; | |
2875 | } | |
2876 | } | |
2877 | ||
314e2987 BS |
2878 | typedef struct MemoryRegionList MemoryRegionList; |
2879 | ||
2880 | struct MemoryRegionList { | |
2881 | const MemoryRegion *mr; | |
a16878d2 | 2882 | QTAILQ_ENTRY(MemoryRegionList) mrqueue; |
314e2987 BS |
2883 | }; |
2884 | ||
b58deb34 | 2885 | typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead; |
314e2987 | 2886 | |
4e831901 PX |
2887 | #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \ |
2888 | int128_sub((size), int128_one())) : 0) | |
2889 | #define MTREE_INDENT " " | |
2890 | ||
b6b71cb5 | 2891 | static void mtree_expand_owner(const char *label, Object *obj) |
fc051ae6 AK |
2892 | { |
2893 | DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE); | |
2894 | ||
b6b71cb5 | 2895 | qemu_printf(" %s:{%s", label, dev ? "dev" : "obj"); |
fc051ae6 | 2896 | if (dev && dev->id) { |
b6b71cb5 | 2897 | qemu_printf(" id=%s", dev->id); |
fc051ae6 | 2898 | } else { |
ddfb0baa | 2899 | char *canonical_path = object_get_canonical_path(obj); |
fc051ae6 | 2900 | if (canonical_path) { |
b6b71cb5 | 2901 | qemu_printf(" path=%s", canonical_path); |
fc051ae6 AK |
2902 | g_free(canonical_path); |
2903 | } else { | |
b6b71cb5 | 2904 | qemu_printf(" type=%s", object_get_typename(obj)); |
fc051ae6 AK |
2905 | } |
2906 | } | |
b6b71cb5 | 2907 | qemu_printf("}"); |
fc051ae6 AK |
2908 | } |
2909 | ||
b6b71cb5 | 2910 | static void mtree_print_mr_owner(const MemoryRegion *mr) |
fc051ae6 AK |
2911 | { |
2912 | Object *owner = mr->owner; | |
2913 | Object *parent = memory_region_owner((MemoryRegion *)mr); | |
2914 | ||
2915 | if (!owner && !parent) { | |
b6b71cb5 | 2916 | qemu_printf(" orphan"); |
fc051ae6 AK |
2917 | return; |
2918 | } | |
2919 | if (owner) { | |
b6b71cb5 | 2920 | mtree_expand_owner("owner", owner); |
fc051ae6 AK |
2921 | } |
2922 | if (parent && parent != owner) { | |
b6b71cb5 | 2923 | mtree_expand_owner("parent", parent); |
fc051ae6 AK |
2924 | } |
2925 | } | |
2926 | ||
b6b71cb5 | 2927 | static void mtree_print_mr(const MemoryRegion *mr, unsigned int level, |
a8170e5e | 2928 | hwaddr base, |
fc051ae6 | 2929 | MemoryRegionListHead *alias_print_queue, |
2261d393 | 2930 | bool owner, bool display_disabled) |
314e2987 | 2931 | { |
9479c57a JK |
2932 | MemoryRegionList *new_ml, *ml, *next_ml; |
2933 | MemoryRegionListHead submr_print_queue; | |
314e2987 BS |
2934 | const MemoryRegion *submr; |
2935 | unsigned int i; | |
b31f8412 | 2936 | hwaddr cur_start, cur_end; |
314e2987 | 2937 | |
f8a9f720 | 2938 | if (!mr) { |
314e2987 BS |
2939 | return; |
2940 | } | |
2941 | ||
b31f8412 PX |
2942 | cur_start = base + mr->addr; |
2943 | cur_end = cur_start + MR_SIZE(mr->size); | |
2944 | ||
2945 | /* | |
2946 | * Try to detect overflow of memory region. This should never | |
2947 | * happen normally. When it happens, we dump something to warn the | |
2948 | * user who is observing this. | |
2949 | */ | |
2950 | if (cur_start < base || cur_end < cur_start) { | |
b6b71cb5 | 2951 | qemu_printf("[DETECTED OVERFLOW!] "); |
b31f8412 PX |
2952 | } |
2953 | ||
314e2987 BS |
2954 | if (mr->alias) { |
2955 | MemoryRegionList *ml; | |
2956 | bool found = false; | |
2957 | ||
2958 | /* check if the alias is already in the queue */ | |
a16878d2 | 2959 | QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) { |
f54bb15f | 2960 | if (ml->mr == mr->alias) { |
314e2987 BS |
2961 | found = true; |
2962 | } | |
2963 | } | |
2964 | ||
2965 | if (!found) { | |
2966 | ml = g_new(MemoryRegionList, 1); | |
2967 | ml->mr = mr->alias; | |
a16878d2 | 2968 | QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue); |
314e2987 | 2969 | } |
2261d393 PMD |
2970 | if (mr->enabled || display_disabled) { |
2971 | for (i = 0; i < level; i++) { | |
2972 | qemu_printf(MTREE_INDENT); | |
2973 | } | |
2974 | qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx | |
2975 | " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx | |
2976 | "-" TARGET_FMT_plx "%s", | |
2977 | cur_start, cur_end, | |
2978 | mr->priority, | |
2979 | mr->nonvolatile ? "nv-" : "", | |
2980 | memory_region_type((MemoryRegion *)mr), | |
2981 | memory_region_name(mr), | |
2982 | memory_region_name(mr->alias), | |
2983 | mr->alias_offset, | |
2984 | mr->alias_offset + MR_SIZE(mr->size), | |
2985 | mr->enabled ? "" : " [disabled]"); | |
2986 | if (owner) { | |
2987 | mtree_print_mr_owner(mr); | |
2988 | } | |
2989 | qemu_printf("\n"); | |
fc051ae6 | 2990 | } |
314e2987 | 2991 | } else { |
2261d393 PMD |
2992 | if (mr->enabled || display_disabled) { |
2993 | for (i = 0; i < level; i++) { | |
2994 | qemu_printf(MTREE_INDENT); | |
2995 | } | |
2996 | qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx | |
2997 | " (prio %d, %s%s): %s%s", | |
2998 | cur_start, cur_end, | |
2999 | mr->priority, | |
3000 | mr->nonvolatile ? "nv-" : "", | |
3001 | memory_region_type((MemoryRegion *)mr), | |
3002 | memory_region_name(mr), | |
3003 | mr->enabled ? "" : " [disabled]"); | |
3004 | if (owner) { | |
3005 | mtree_print_mr_owner(mr); | |
3006 | } | |
3007 | qemu_printf("\n"); | |
fc051ae6 | 3008 | } |
314e2987 | 3009 | } |
9479c57a JK |
3010 | |
3011 | QTAILQ_INIT(&submr_print_queue); | |
3012 | ||
314e2987 | 3013 | QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) { |
9479c57a JK |
3014 | new_ml = g_new(MemoryRegionList, 1); |
3015 | new_ml->mr = submr; | |
a16878d2 | 3016 | QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) { |
9479c57a JK |
3017 | if (new_ml->mr->addr < ml->mr->addr || |
3018 | (new_ml->mr->addr == ml->mr->addr && | |
3019 | new_ml->mr->priority > ml->mr->priority)) { | |
a16878d2 | 3020 | QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue); |
9479c57a JK |
3021 | new_ml = NULL; |
3022 | break; | |
3023 | } | |
3024 | } | |
3025 | if (new_ml) { | |
a16878d2 | 3026 | QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue); |
9479c57a JK |
3027 | } |
3028 | } | |
3029 | ||
a16878d2 | 3030 | QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) { |
b6b71cb5 | 3031 | mtree_print_mr(ml->mr, level + 1, cur_start, |
2261d393 | 3032 | alias_print_queue, owner, display_disabled); |
9479c57a JK |
3033 | } |
3034 | ||
a16878d2 | 3035 | QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) { |
9479c57a | 3036 | g_free(ml); |
314e2987 BS |
3037 | } |
3038 | } | |
3039 | ||
5e8fd947 | 3040 | struct FlatViewInfo { |
5e8fd947 AK |
3041 | int counter; |
3042 | bool dispatch_tree; | |
fc051ae6 | 3043 | bool owner; |
8072aae3 | 3044 | AccelClass *ac; |
5e8fd947 AK |
3045 | }; |
3046 | ||
3047 | static void mtree_print_flatview(gpointer key, gpointer value, | |
3048 | gpointer user_data) | |
57bb40c9 | 3049 | { |
5e8fd947 AK |
3050 | FlatView *view = key; |
3051 | GArray *fv_address_spaces = value; | |
3052 | struct FlatViewInfo *fvi = user_data; | |
57bb40c9 PX |
3053 | FlatRange *range = &view->ranges[0]; |
3054 | MemoryRegion *mr; | |
3055 | int n = view->nr; | |
5e8fd947 AK |
3056 | int i; |
3057 | AddressSpace *as; | |
3058 | ||
b6b71cb5 | 3059 | qemu_printf("FlatView #%d\n", fvi->counter); |
5e8fd947 AK |
3060 | ++fvi->counter; |
3061 | ||
3062 | for (i = 0; i < fv_address_spaces->len; ++i) { | |
3063 | as = g_array_index(fv_address_spaces, AddressSpace*, i); | |
b6b71cb5 MA |
3064 | qemu_printf(" AS \"%s\", root: %s", |
3065 | as->name, memory_region_name(as->root)); | |
5e8fd947 | 3066 | if (as->root->alias) { |
b6b71cb5 | 3067 | qemu_printf(", alias %s", memory_region_name(as->root->alias)); |
5e8fd947 | 3068 | } |
b6b71cb5 | 3069 | qemu_printf("\n"); |
5e8fd947 AK |
3070 | } |
3071 | ||
b6b71cb5 | 3072 | qemu_printf(" Root memory region: %s\n", |
5e8fd947 | 3073 | view->root ? memory_region_name(view->root) : "(none)"); |
57bb40c9 PX |
3074 | |
3075 | if (n <= 0) { | |
b6b71cb5 | 3076 | qemu_printf(MTREE_INDENT "No rendered FlatView\n\n"); |
57bb40c9 PX |
3077 | return; |
3078 | } | |
3079 | ||
3080 | while (n--) { | |
3081 | mr = range->mr; | |
377a07aa | 3082 | if (range->offset_in_region) { |
b6b71cb5 MA |
3083 | qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx |
3084 | " (prio %d, %s%s): %s @" TARGET_FMT_plx, | |
3085 | int128_get64(range->addr.start), | |
3086 | int128_get64(range->addr.start) | |
3087 | + MR_SIZE(range->addr.size), | |
3088 | mr->priority, | |
3089 | range->nonvolatile ? "nv-" : "", | |
3090 | range->readonly ? "rom" : memory_region_type(mr), | |
3091 | memory_region_name(mr), | |
3092 | range->offset_in_region); | |
377a07aa | 3093 | } else { |
b6b71cb5 MA |
3094 | qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx |
3095 | " (prio %d, %s%s): %s", | |
3096 | int128_get64(range->addr.start), | |
3097 | int128_get64(range->addr.start) | |
3098 | + MR_SIZE(range->addr.size), | |
3099 | mr->priority, | |
3100 | range->nonvolatile ? "nv-" : "", | |
3101 | range->readonly ? "rom" : memory_region_type(mr), | |
3102 | memory_region_name(mr)); | |
377a07aa | 3103 | } |
fc051ae6 | 3104 | if (fvi->owner) { |
b6b71cb5 | 3105 | mtree_print_mr_owner(mr); |
fc051ae6 | 3106 | } |
8072aae3 AK |
3107 | |
3108 | if (fvi->ac) { | |
3109 | for (i = 0; i < fv_address_spaces->len; ++i) { | |
3110 | as = g_array_index(fv_address_spaces, AddressSpace*, i); | |
3111 | if (fvi->ac->has_memory(current_machine, as, | |
3112 | int128_get64(range->addr.start), | |
3113 | MR_SIZE(range->addr.size) + 1)) { | |
53b62bec | 3114 | qemu_printf(" %s", fvi->ac->name); |
8072aae3 AK |
3115 | } |
3116 | } | |
3117 | } | |
b6b71cb5 | 3118 | qemu_printf("\n"); |
57bb40c9 PX |
3119 | range++; |
3120 | } | |
3121 | ||
5e8fd947 AK |
3122 | #if !defined(CONFIG_USER_ONLY) |
3123 | if (fvi->dispatch_tree && view->root) { | |
b6b71cb5 | 3124 | mtree_print_dispatch(view->dispatch, view->root); |
5e8fd947 AK |
3125 | } |
3126 | #endif | |
3127 | ||
b6b71cb5 | 3128 | qemu_printf("\n"); |
5e8fd947 AK |
3129 | } |
3130 | ||
3131 | static gboolean mtree_info_flatview_free(gpointer key, gpointer value, | |
3132 | gpointer user_data) | |
3133 | { | |
3134 | FlatView *view = key; | |
3135 | GArray *fv_address_spaces = value; | |
3136 | ||
3137 | g_array_unref(fv_address_spaces); | |
57bb40c9 | 3138 | flatview_unref(view); |
5e8fd947 AK |
3139 | |
3140 | return true; | |
57bb40c9 PX |
3141 | } |
3142 | ||
2261d393 | 3143 | void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled) |
314e2987 BS |
3144 | { |
3145 | MemoryRegionListHead ml_head; | |
3146 | MemoryRegionList *ml, *ml2; | |
0d673e36 | 3147 | AddressSpace *as; |
314e2987 | 3148 | |
57bb40c9 | 3149 | if (flatview) { |
5e8fd947 AK |
3150 | FlatView *view; |
3151 | struct FlatViewInfo fvi = { | |
5e8fd947 | 3152 | .counter = 0, |
fc051ae6 AK |
3153 | .dispatch_tree = dispatch_tree, |
3154 | .owner = owner, | |
5e8fd947 AK |
3155 | }; |
3156 | GArray *fv_address_spaces; | |
3157 | GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal); | |
4f7f5893 | 3158 | AccelClass *ac = ACCEL_GET_CLASS(current_accel()); |
8072aae3 AK |
3159 | |
3160 | if (ac->has_memory) { | |
3161 | fvi.ac = ac; | |
8072aae3 | 3162 | } |
5e8fd947 AK |
3163 | |
3164 | /* Gather all FVs in one table */ | |
57bb40c9 | 3165 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
5e8fd947 AK |
3166 | view = address_space_get_flatview(as); |
3167 | ||
3168 | fv_address_spaces = g_hash_table_lookup(views, view); | |
3169 | if (!fv_address_spaces) { | |
3170 | fv_address_spaces = g_array_new(false, false, sizeof(as)); | |
3171 | g_hash_table_insert(views, view, fv_address_spaces); | |
3172 | } | |
3173 | ||
3174 | g_array_append_val(fv_address_spaces, as); | |
57bb40c9 | 3175 | } |
5e8fd947 AK |
3176 | |
3177 | /* Print */ | |
3178 | g_hash_table_foreach(views, mtree_print_flatview, &fvi); | |
3179 | ||
3180 | /* Free */ | |
3181 | g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0); | |
3182 | g_hash_table_unref(views); | |
3183 | ||
57bb40c9 PX |
3184 | return; |
3185 | } | |
3186 | ||
314e2987 BS |
3187 | QTAILQ_INIT(&ml_head); |
3188 | ||
0d673e36 | 3189 | QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) { |
b6b71cb5 | 3190 | qemu_printf("address-space: %s\n", as->name); |
2261d393 | 3191 | mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled); |
b6b71cb5 | 3192 | qemu_printf("\n"); |
b9f9be88 BS |
3193 | } |
3194 | ||
314e2987 | 3195 | /* print aliased regions */ |
a16878d2 | 3196 | QTAILQ_FOREACH(ml, &ml_head, mrqueue) { |
b6b71cb5 | 3197 | qemu_printf("memory-region: %s\n", memory_region_name(ml->mr)); |
2261d393 | 3198 | mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled); |
b6b71cb5 | 3199 | qemu_printf("\n"); |
314e2987 BS |
3200 | } |
3201 | ||
a16878d2 | 3202 | QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) { |
88365e47 | 3203 | g_free(ml); |
314e2987 | 3204 | } |
314e2987 | 3205 | } |
b4fefef9 | 3206 | |
b08199c6 | 3207 | void memory_region_init_ram(MemoryRegion *mr, |
d32335e8 | 3208 | Object *owner, |
b08199c6 PM |
3209 | const char *name, |
3210 | uint64_t size, | |
3211 | Error **errp) | |
3212 | { | |
3213 | DeviceState *owner_dev; | |
3214 | Error *err = NULL; | |
3215 | ||
3216 | memory_region_init_ram_nomigrate(mr, owner, name, size, &err); | |
3217 | if (err) { | |
3218 | error_propagate(errp, err); | |
3219 | return; | |
3220 | } | |
3221 | /* This will assert if owner is neither NULL nor a DeviceState. | |
3222 | * We only want the owner here for the purposes of defining a | |
3223 | * unique name for migration. TODO: Ideally we should implement | |
3224 | * a naming scheme for Objects which are not DeviceStates, in | |
3225 | * which case we can relax this restriction. | |
3226 | */ | |
3227 | owner_dev = DEVICE(owner); | |
3228 | vmstate_register_ram(mr, owner_dev); | |
3229 | } | |
3230 | ||
3231 | void memory_region_init_rom(MemoryRegion *mr, | |
d32335e8 | 3232 | Object *owner, |
b08199c6 PM |
3233 | const char *name, |
3234 | uint64_t size, | |
3235 | Error **errp) | |
3236 | { | |
3237 | DeviceState *owner_dev; | |
3238 | Error *err = NULL; | |
3239 | ||
3240 | memory_region_init_rom_nomigrate(mr, owner, name, size, &err); | |
3241 | if (err) { | |
3242 | error_propagate(errp, err); | |
3243 | return; | |
3244 | } | |
3245 | /* This will assert if owner is neither NULL nor a DeviceState. | |
3246 | * We only want the owner here for the purposes of defining a | |
3247 | * unique name for migration. TODO: Ideally we should implement | |
3248 | * a naming scheme for Objects which are not DeviceStates, in | |
3249 | * which case we can relax this restriction. | |
3250 | */ | |
3251 | owner_dev = DEVICE(owner); | |
3252 | vmstate_register_ram(mr, owner_dev); | |
3253 | } | |
3254 | ||
3255 | void memory_region_init_rom_device(MemoryRegion *mr, | |
d32335e8 | 3256 | Object *owner, |
b08199c6 PM |
3257 | const MemoryRegionOps *ops, |
3258 | void *opaque, | |
3259 | const char *name, | |
3260 | uint64_t size, | |
3261 | Error **errp) | |
3262 | { | |
3263 | DeviceState *owner_dev; | |
3264 | Error *err = NULL; | |
3265 | ||
3266 | memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque, | |
3267 | name, size, &err); | |
3268 | if (err) { | |
3269 | error_propagate(errp, err); | |
3270 | return; | |
3271 | } | |
3272 | /* This will assert if owner is neither NULL nor a DeviceState. | |
3273 | * We only want the owner here for the purposes of defining a | |
3274 | * unique name for migration. TODO: Ideally we should implement | |
3275 | * a naming scheme for Objects which are not DeviceStates, in | |
3276 | * which case we can relax this restriction. | |
3277 | */ | |
3278 | owner_dev = DEVICE(owner); | |
3279 | vmstate_register_ram(mr, owner_dev); | |
3280 | } | |
3281 | ||
e7d3222e AB |
3282 | /* |
3283 | * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for | |
3284 | * the fuzz_dma_read_cb callback | |
3285 | */ | |
3286 | #ifdef CONFIG_FUZZ | |
3287 | void __attribute__((weak)) fuzz_dma_read_cb(size_t addr, | |
3288 | size_t len, | |
fc1c8344 | 3289 | MemoryRegion *mr) |
e7d3222e AB |
3290 | { |
3291 | } | |
3292 | #endif | |
3293 | ||
b4fefef9 PC |
3294 | static const TypeInfo memory_region_info = { |
3295 | .parent = TYPE_OBJECT, | |
3296 | .name = TYPE_MEMORY_REGION, | |
1b53ecd9 | 3297 | .class_size = sizeof(MemoryRegionClass), |
b4fefef9 PC |
3298 | .instance_size = sizeof(MemoryRegion), |
3299 | .instance_init = memory_region_initfn, | |
3300 | .instance_finalize = memory_region_finalize, | |
3301 | }; | |
3302 | ||
3df9d748 AK |
3303 | static const TypeInfo iommu_memory_region_info = { |
3304 | .parent = TYPE_MEMORY_REGION, | |
3305 | .name = TYPE_IOMMU_MEMORY_REGION, | |
1221a474 | 3306 | .class_size = sizeof(IOMMUMemoryRegionClass), |
3df9d748 AK |
3307 | .instance_size = sizeof(IOMMUMemoryRegion), |
3308 | .instance_init = iommu_memory_region_initfn, | |
1221a474 | 3309 | .abstract = true, |
3df9d748 AK |
3310 | }; |
3311 | ||
b4fefef9 PC |
3312 | static void memory_register_types(void) |
3313 | { | |
3314 | type_register_static(&memory_region_info); | |
3df9d748 | 3315 | type_register_static(&iommu_memory_region_info); |
b4fefef9 PC |
3316 | } |
3317 | ||
3318 | type_init(memory_register_types) |