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1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
4614139c 18#ifndef __ASSEMBLY__
55a6ca25
PA
19#include <asm/x86_init.h>
20
ef6bea6d 21void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
e1a58320
SS
22void ptdump_walk_pgd_level_checkwx(void);
23
24#ifdef CONFIG_DEBUG_WX
25#define debug_checkwx() ptdump_walk_pgd_level_checkwx()
26#else
27#define debug_checkwx() do { } while (0)
28#endif
ef6bea6d 29
8405b122
JF
30/*
31 * ZERO_PAGE is a global shared page that is always zero: used
32 * for zero-mapped memory areas etc..
33 */
277d5b40
AK
34extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
35 __visible;
8405b122
JF
36#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
37
e3ed910d
JF
38extern spinlock_t pgd_lock;
39extern struct list_head pgd_list;
8405b122 40
617d34d9
JF
41extern struct mm_struct *pgd_page_get_mm(struct page *page);
42
54321d94
JF
43#ifdef CONFIG_PARAVIRT
44#include <asm/paravirt.h>
45#else /* !CONFIG_PARAVIRT */
46#define set_pte(ptep, pte) native_set_pte(ptep, pte)
47#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 48#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
a00cc7d9 49#define set_pud_at(mm, addr, pudp, pud) native_set_pud_at(mm, addr, pudp, pud)
54321d94 50
54321d94
JF
51#define set_pte_atomic(ptep, pte) \
52 native_set_pte_atomic(ptep, pte)
53
54#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
55
56#ifndef __PAGETABLE_PUD_FOLDED
57#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
58#define pgd_clear(pgd) native_pgd_clear(pgd)
59#endif
60
61#ifndef set_pud
62# define set_pud(pudp, pud) native_set_pud(pudp, pud)
63#endif
64
65#ifndef __PAGETABLE_PMD_FOLDED
66#define pud_clear(pud) native_pud_clear(pud)
67#endif
68
69#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
70#define pmd_clear(pmd) native_pmd_clear(pmd)
71
72#define pte_update(mm, addr, ptep) do { } while (0)
54321d94 73
54321d94
JF
74#define pgd_val(x) native_pgd_val(x)
75#define __pgd(x) native_make_pgd(x)
76
77#ifndef __PAGETABLE_PUD_FOLDED
78#define pud_val(x) native_pud_val(x)
79#define __pud(x) native_make_pud(x)
80#endif
81
82#ifndef __PAGETABLE_PMD_FOLDED
83#define pmd_val(x) native_pmd_val(x)
84#define __pmd(x) native_make_pmd(x)
85#endif
86
87#define pte_val(x) native_pte_val(x)
88#define __pte(x) native_make_pte(x)
89
224101ed
JF
90#define arch_end_context_switch(prev) do {} while(0)
91
54321d94
JF
92#endif /* CONFIG_PARAVIRT */
93
4614139c
JF
94/*
95 * The following only work if pte_present() is true.
96 * Undefined behaviour if not..
97 */
3cbaeafe
JP
98static inline int pte_dirty(pte_t pte)
99{
a15af1c9 100 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
101}
102
a927cb83
DH
103
104static inline u32 read_pkru(void)
105{
106 if (boot_cpu_has(X86_FEATURE_OSPKE))
107 return __read_pkru();
108 return 0;
109}
110
9e90199c
XG
111static inline void write_pkru(u32 pkru)
112{
113 if (boot_cpu_has(X86_FEATURE_OSPKE))
114 __write_pkru(pkru);
115}
116
3cbaeafe
JP
117static inline int pte_young(pte_t pte)
118{
a15af1c9 119 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
120}
121
c164e038
KS
122static inline int pmd_dirty(pmd_t pmd)
123{
124 return pmd_flags(pmd) & _PAGE_DIRTY;
125}
3cbaeafe 126
f2d6bfe9
JW
127static inline int pmd_young(pmd_t pmd)
128{
129 return pmd_flags(pmd) & _PAGE_ACCESSED;
130}
131
a00cc7d9
MW
132static inline int pud_dirty(pud_t pud)
133{
134 return pud_flags(pud) & _PAGE_DIRTY;
135}
136
137static inline int pud_young(pud_t pud)
138{
139 return pud_flags(pud) & _PAGE_ACCESSED;
140}
141
3cbaeafe
JP
142static inline int pte_write(pte_t pte)
143{
a15af1c9 144 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
145}
146
3cbaeafe
JP
147static inline int pte_huge(pte_t pte)
148{
a15af1c9 149 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
150}
151
3cbaeafe
JP
152static inline int pte_global(pte_t pte)
153{
a15af1c9 154 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
155}
156
157static inline int pte_exec(pte_t pte)
158{
a15af1c9 159 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
160}
161
7e675137
NP
162static inline int pte_special(pte_t pte)
163{
c819f37e 164 return pte_flags(pte) & _PAGE_SPECIAL;
7e675137
NP
165}
166
91030ca1
HD
167static inline unsigned long pte_pfn(pte_t pte)
168{
169 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
170}
171
087975b0
AM
172static inline unsigned long pmd_pfn(pmd_t pmd)
173{
f70abb0f 174 return (pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
087975b0
AM
175}
176
0ee364eb
MG
177static inline unsigned long pud_pfn(pud_t pud)
178{
f70abb0f 179 return (pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT;
0ee364eb
MG
180}
181
fe1e8c3e
KS
182static inline unsigned long p4d_pfn(p4d_t p4d)
183{
184 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
185}
186
187static inline int p4d_large(p4d_t p4d)
188{
189 /* No 512 GiB pages yet */
190 return 0;
191}
192
91030ca1
HD
193#define pte_page(pte) pfn_to_page(pte_pfn(pte))
194
3cbaeafe
JP
195static inline int pmd_large(pmd_t pte)
196{
027ef6c8 197 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
198}
199
f2d6bfe9 200#ifdef CONFIG_TRANSPARENT_HUGEPAGE
f2d6bfe9
JW
201static inline int pmd_trans_huge(pmd_t pmd)
202{
5c7fb56e 203 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
f2d6bfe9 204}
4b7167b9 205
a00cc7d9
MW
206#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
207static inline int pud_trans_huge(pud_t pud)
208{
209 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
210}
211#endif
212
fd8cfd30 213#define has_transparent_hugepage has_transparent_hugepage
4b7167b9
AA
214static inline int has_transparent_hugepage(void)
215{
16bf9226 216 return boot_cpu_has(X86_FEATURE_PSE);
4b7167b9 217}
5c7fb56e
DW
218
219#ifdef __HAVE_ARCH_PTE_DEVMAP
220static inline int pmd_devmap(pmd_t pmd)
221{
222 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
223}
a00cc7d9
MW
224
225#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
226static inline int pud_devmap(pud_t pud)
227{
228 return !!(pud_val(pud) & _PAGE_DEVMAP);
229}
230#else
231static inline int pud_devmap(pud_t pud)
232{
233 return 0;
234}
235#endif
2947ba05
KS
236
237static inline int pgd_devmap(pgd_t pgd)
238{
239 return 0;
240}
5c7fb56e 241#endif
f2d6bfe9
JW
242#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
243
6522869c
JF
244static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
245{
246 pteval_t v = native_pte_val(pte);
247
248 return native_make_pte(v | set);
249}
250
251static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
252{
253 pteval_t v = native_pte_val(pte);
254
255 return native_make_pte(v & ~clear);
256}
257
3cbaeafe
JP
258static inline pte_t pte_mkclean(pte_t pte)
259{
6522869c 260 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
261}
262
263static inline pte_t pte_mkold(pte_t pte)
264{
6522869c 265 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
266}
267
268static inline pte_t pte_wrprotect(pte_t pte)
269{
6522869c 270 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
271}
272
273static inline pte_t pte_mkexec(pte_t pte)
274{
6522869c 275 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
276}
277
278static inline pte_t pte_mkdirty(pte_t pte)
279{
0f8975ec 280 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
281}
282
283static inline pte_t pte_mkyoung(pte_t pte)
284{
6522869c 285 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
286}
287
288static inline pte_t pte_mkwrite(pte_t pte)
289{
6522869c 290 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
291}
292
293static inline pte_t pte_mkhuge(pte_t pte)
294{
6522869c 295 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
296}
297
298static inline pte_t pte_clrhuge(pte_t pte)
299{
6522869c 300 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
301}
302
303static inline pte_t pte_mkglobal(pte_t pte)
304{
6522869c 305 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
306}
307
308static inline pte_t pte_clrglobal(pte_t pte)
309{
6522869c 310 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 311}
4614139c 312
7e675137
NP
313static inline pte_t pte_mkspecial(pte_t pte)
314{
6522869c 315 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
316}
317
01c8f1c4
DW
318static inline pte_t pte_mkdevmap(pte_t pte)
319{
320 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
321}
322
f2d6bfe9
JW
323static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
324{
325 pmdval_t v = native_pmd_val(pmd);
326
327 return __pmd(v | set);
328}
329
330static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
331{
332 pmdval_t v = native_pmd_val(pmd);
333
334 return __pmd(v & ~clear);
335}
336
337static inline pmd_t pmd_mkold(pmd_t pmd)
338{
339 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
340}
341
590a471c
MK
342static inline pmd_t pmd_mkclean(pmd_t pmd)
343{
344 return pmd_clear_flags(pmd, _PAGE_DIRTY);
345}
346
f2d6bfe9
JW
347static inline pmd_t pmd_wrprotect(pmd_t pmd)
348{
349 return pmd_clear_flags(pmd, _PAGE_RW);
350}
351
352static inline pmd_t pmd_mkdirty(pmd_t pmd)
353{
0f8975ec 354 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
355}
356
f25748e3
DW
357static inline pmd_t pmd_mkdevmap(pmd_t pmd)
358{
359 return pmd_set_flags(pmd, _PAGE_DEVMAP);
360}
361
f2d6bfe9
JW
362static inline pmd_t pmd_mkhuge(pmd_t pmd)
363{
364 return pmd_set_flags(pmd, _PAGE_PSE);
365}
366
367static inline pmd_t pmd_mkyoung(pmd_t pmd)
368{
369 return pmd_set_flags(pmd, _PAGE_ACCESSED);
370}
371
372static inline pmd_t pmd_mkwrite(pmd_t pmd)
373{
374 return pmd_set_flags(pmd, _PAGE_RW);
375}
376
377static inline pmd_t pmd_mknotpresent(pmd_t pmd)
378{
21d9ee3e 379 return pmd_clear_flags(pmd, _PAGE_PRESENT | _PAGE_PROTNONE);
f2d6bfe9
JW
380}
381
a00cc7d9
MW
382static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
383{
384 pudval_t v = native_pud_val(pud);
385
386 return __pud(v | set);
387}
388
389static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
390{
391 pudval_t v = native_pud_val(pud);
392
393 return __pud(v & ~clear);
394}
395
396static inline pud_t pud_mkold(pud_t pud)
397{
398 return pud_clear_flags(pud, _PAGE_ACCESSED);
399}
400
401static inline pud_t pud_mkclean(pud_t pud)
402{
403 return pud_clear_flags(pud, _PAGE_DIRTY);
404}
405
406static inline pud_t pud_wrprotect(pud_t pud)
407{
408 return pud_clear_flags(pud, _PAGE_RW);
409}
410
411static inline pud_t pud_mkdirty(pud_t pud)
412{
413 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
414}
415
416static inline pud_t pud_mkdevmap(pud_t pud)
417{
418 return pud_set_flags(pud, _PAGE_DEVMAP);
419}
420
421static inline pud_t pud_mkhuge(pud_t pud)
422{
423 return pud_set_flags(pud, _PAGE_PSE);
424}
425
426static inline pud_t pud_mkyoung(pud_t pud)
427{
428 return pud_set_flags(pud, _PAGE_ACCESSED);
429}
430
431static inline pud_t pud_mkwrite(pud_t pud)
432{
433 return pud_set_flags(pud, _PAGE_RW);
434}
435
436static inline pud_t pud_mknotpresent(pud_t pud)
437{
438 return pud_clear_flags(pud, _PAGE_PRESENT | _PAGE_PROTNONE);
439}
440
2bf01f9f 441#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
442static inline int pte_soft_dirty(pte_t pte)
443{
444 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
445}
446
447static inline int pmd_soft_dirty(pmd_t pmd)
448{
449 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
450}
451
a00cc7d9
MW
452static inline int pud_soft_dirty(pud_t pud)
453{
454 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
455}
456
0f8975ec
PE
457static inline pte_t pte_mksoft_dirty(pte_t pte)
458{
459 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
460}
461
462static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
463{
464 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
465}
466
a00cc7d9
MW
467static inline pud_t pud_mksoft_dirty(pud_t pud)
468{
469 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
470}
471
a7b76174
MS
472static inline pte_t pte_clear_soft_dirty(pte_t pte)
473{
474 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
475}
476
477static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
478{
479 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
480}
481
a00cc7d9
MW
482static inline pud_t pud_clear_soft_dirty(pud_t pud)
483{
484 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
485}
486
2bf01f9f
CG
487#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
488
b534816b
JF
489/*
490 * Mask out unsupported bits in a present pgprot. Non-present pgprots
491 * can use those bits for other purposes, so leave them be.
492 */
493static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
494{
495 pgprotval_t protval = pgprot_val(pgprot);
496
497 if (protval & _PAGE_PRESENT)
498 protval &= __supported_pte_mask;
499
500 return protval;
501}
502
6fdc05d4
JF
503static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
504{
b534816b
JF
505 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
506 massage_pgprot(pgprot));
6fdc05d4
JF
507}
508
509static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
510{
b534816b
JF
511 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
512 massage_pgprot(pgprot));
6fdc05d4
JF
513}
514
a00cc7d9
MW
515static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
516{
517 return __pud(((phys_addr_t)page_nr << PAGE_SHIFT) |
518 massage_pgprot(pgprot));
519}
520
38472311
IM
521static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
522{
523 pteval_t val = pte_val(pte);
524
525 /*
526 * Chop off the NX bit (if present), and add the NX portion of
527 * the newprot (if present):
528 */
1c12c4cf 529 val &= _PAGE_CHG_MASK;
b534816b 530 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
531
532 return __pte(val);
533}
534
c489f125
JW
535static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
536{
537 pmdval_t val = pmd_val(pmd);
538
539 val &= _HPAGE_CHG_MASK;
540 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
541
542 return __pmd(val);
543}
544
1c12c4cf
VP
545/* mprotect needs to preserve PAT bits when updating vm_page_prot */
546#define pgprot_modify pgprot_modify
547static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
548{
549 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
550 pgprotval_t addbits = pgprot_val(newprot);
551 return __pgprot(preservebits | addbits);
552}
553
bbac8c6d
TK
554#define pte_pgprot(x) __pgprot(pte_flags(x))
555#define pmd_pgprot(x) __pgprot(pmd_flags(x))
556#define pud_pgprot(x) __pgprot(pud_flags(x))
c6ca18eb 557
b534816b 558#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 559
1adcaafe 560static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
561 enum page_cache_mode pcm,
562 enum page_cache_mode new_pcm)
afc7d20c 563{
1adcaafe 564 /*
55a6ca25 565 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 566 */
8a271389 567 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
568 return 1;
569
afc7d20c 570 /*
571 * Certain new memtypes are not allowed with certain
572 * requested memtype:
573 * - request is uncached, return cannot be write-back
574 * - request is write-combine, return cannot be write-back
ecb2feba
TK
575 * - request is write-through, return cannot be write-back
576 * - request is write-through, return cannot be write-combine
afc7d20c 577 */
d85f3334
JG
578 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
579 new_pcm == _PAGE_CACHE_MODE_WB) ||
580 (pcm == _PAGE_CACHE_MODE_WC &&
ecb2feba
TK
581 new_pcm == _PAGE_CACHE_MODE_WB) ||
582 (pcm == _PAGE_CACHE_MODE_WT &&
583 new_pcm == _PAGE_CACHE_MODE_WB) ||
584 (pcm == _PAGE_CACHE_MODE_WT &&
585 new_pcm == _PAGE_CACHE_MODE_WC)) {
afc7d20c 586 return 0;
587 }
588
589 return 1;
590}
591
458a3e64
TH
592pmd_t *populate_extra_pmd(unsigned long vaddr);
593pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
594#endif /* __ASSEMBLY__ */
595
96a388de 596#ifdef CONFIG_X86_32
a1ce3928 597# include <asm/pgtable_32.h>
96a388de 598#else
a1ce3928 599# include <asm/pgtable_64.h>
96a388de 600#endif
6c386655 601
aca159db 602#ifndef __ASSEMBLY__
f476961c 603#include <linux/mm_types.h>
fa0f281c 604#include <linux/mmdebug.h>
4cbeb51b 605#include <linux/log2.h>
ef37bc36 606#include <asm/fixmap.h>
aca159db 607
a034a010
JF
608static inline int pte_none(pte_t pte)
609{
97e3c602 610 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
a034a010
JF
611}
612
8de01da3
JF
613#define __HAVE_ARCH_PTE_SAME
614static inline int pte_same(pte_t a, pte_t b)
615{
616 return a.pte == b.pte;
617}
618
7c683851 619static inline int pte_present(pte_t a)
c46a7c81
MG
620{
621 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
622}
623
3565fce3
DW
624#ifdef __HAVE_ARCH_PTE_DEVMAP
625static inline int pte_devmap(pte_t a)
626{
627 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
628}
629#endif
630
2c3cf556 631#define pte_accessible pte_accessible
20841405 632static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 633{
20841405
RR
634 if (pte_flags(a) & _PAGE_PRESENT)
635 return true;
636
21d9ee3e 637 if ((pte_flags(a) & _PAGE_PROTNONE) &&
20841405
RR
638 mm_tlb_flush_pending(mm))
639 return true;
640
641 return false;
2c3cf556
RR
642}
643
eb63657e 644static inline int pte_hidden(pte_t pte)
dfec072e 645{
eb63657e 646 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
647}
648
649e8ef6
JF
649static inline int pmd_present(pmd_t pmd)
650{
027ef6c8
AA
651 /*
652 * Checking for _PAGE_PSE is needed too because
653 * split_huge_page will temporarily clear the present bit (but
654 * the _PAGE_PSE flag will remain set at all times while the
655 * _PAGE_PRESENT bit is clear).
656 */
21d9ee3e 657 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
649e8ef6
JF
658}
659
e7bb4b6d
MG
660#ifdef CONFIG_NUMA_BALANCING
661/*
662 * These work without NUMA balancing but the kernel does not care. See the
663 * comment in include/asm-generic/pgtable.h
664 */
665static inline int pte_protnone(pte_t pte)
666{
e3a1f6ca
DV
667 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
668 == _PAGE_PROTNONE;
e7bb4b6d
MG
669}
670
671static inline int pmd_protnone(pmd_t pmd)
672{
e3a1f6ca
DV
673 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
674 == _PAGE_PROTNONE;
e7bb4b6d
MG
675}
676#endif /* CONFIG_NUMA_BALANCING */
677
4fea801a
JF
678static inline int pmd_none(pmd_t pmd)
679{
680 /* Only check low word on 32-bit platforms, since it might be
681 out of sync with upper half. */
97e3c602
DH
682 unsigned long val = native_pmd_val(pmd);
683 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
4fea801a
JF
684}
685
3ffb3564
JF
686static inline unsigned long pmd_page_vaddr(pmd_t pmd)
687{
f70abb0f 688 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
3ffb3564
JF
689}
690
e5f7f202
IM
691/*
692 * Currently stuck as a macro due to indirect forward reference to
693 * linux/mmzone.h's __section_mem_map_addr() definition:
694 */
f70abb0f
TK
695#define pmd_page(pmd) \
696 pfn_to_page((pmd_val(pmd) & pmd_pfn_mask(pmd)) >> PAGE_SHIFT)
20063ca4 697
e24d7eee
JF
698/*
699 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
700 *
701 * this macro returns the index of the entry in the pmd page which would
702 * control the given virtual address
703 */
ce0c0f9e 704static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
705{
706 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
707}
708
97e2817d
JF
709/*
710 * Conversion functions: convert a page and protection to a page entry,
711 * and a page entry and page directory to the page they refer to.
712 *
713 * (Currently stuck as a macro because of indirect forward reference
714 * to linux/mm.h:page_to_nid())
715 */
716#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
717
346309cf
JF
718/*
719 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
720 *
721 * this function returns the index of the entry in the pte page which would
722 * control the given virtual address
723 */
ce0c0f9e 724static inline unsigned long pte_index(unsigned long address)
346309cf
JF
725{
726 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
727}
728
3fbc2444
JF
729static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
730{
731 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
732}
733
99510238
JF
734static inline int pmd_bad(pmd_t pmd)
735{
18a7a199 736 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
737}
738
cc290ca3
JF
739static inline unsigned long pages_to_mb(unsigned long npg)
740{
741 return npg >> (20 - PAGE_SHIFT);
742}
743
98233368 744#if CONFIG_PGTABLE_LEVELS > 2
deb79cfb
JF
745static inline int pud_none(pud_t pud)
746{
97e3c602 747 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
deb79cfb
JF
748}
749
5ba7c913
JF
750static inline int pud_present(pud_t pud)
751{
18a7a199 752 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 753}
6fff47e3
JF
754
755static inline unsigned long pud_page_vaddr(pud_t pud)
756{
f70abb0f 757 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
6fff47e3 758}
f476961c 759
e5f7f202
IM
760/*
761 * Currently stuck as a macro due to indirect forward reference to
762 * linux/mmzone.h's __section_mem_map_addr() definition:
763 */
f70abb0f
TK
764#define pud_page(pud) \
765 pfn_to_page((pud_val(pud) & pud_pfn_mask(pud)) >> PAGE_SHIFT)
01ade20d
JF
766
767/* Find an entry in the second-level page table.. */
768static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
769{
770 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
771}
3180fba0 772
3f6cbef1
JF
773static inline int pud_large(pud_t pud)
774{
e2f5bda9 775 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
3f6cbef1
JF
776 (_PAGE_PSE | _PAGE_PRESENT);
777}
a61bb29a
JF
778
779static inline int pud_bad(pud_t pud)
780{
18a7a199 781 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 782}
e2f5bda9
JF
783#else
784static inline int pud_large(pud_t pud)
785{
786 return 0;
787}
98233368 788#endif /* CONFIG_PGTABLE_LEVELS > 2 */
5ba7c913 789
fe1e8c3e
KS
790static inline unsigned long pud_index(unsigned long address)
791{
792 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
793}
794
795static inline unsigned long p4d_index(unsigned long address)
796{
797 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
798}
799
98233368 800#if CONFIG_PGTABLE_LEVELS > 3
9f38d7e8
JF
801static inline int pgd_present(pgd_t pgd)
802{
18a7a199 803 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 804}
c5f040b1
JF
805
806static inline unsigned long pgd_page_vaddr(pgd_t pgd)
807{
808 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
809}
777cba16 810
e5f7f202
IM
811/*
812 * Currently stuck as a macro due to indirect forward reference to
813 * linux/mmzone.h's __section_mem_map_addr() definition:
814 */
815#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
7cfb8102
JF
816
817/* to find an entry in a page-table-directory. */
3d081b18
JF
818static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
819{
820 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
821}
30f10316
JF
822
823static inline int pgd_bad(pgd_t pgd)
824{
18a7a199 825 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 826}
7325cc2e
JF
827
828static inline int pgd_none(pgd_t pgd)
829{
97e3c602
DH
830 /*
831 * There is no need to do a workaround for the KNL stray
832 * A/D bit erratum here. PGDs only point to page tables
833 * except on 32-bit non-PAE which is not supported on
834 * KNL.
835 */
26c8e317 836 return !native_pgd_val(pgd);
7325cc2e 837}
98233368 838#endif /* CONFIG_PGTABLE_LEVELS > 3 */
9f38d7e8 839
4614139c
JF
840#endif /* __ASSEMBLY__ */
841
fb15a9b3
JF
842/*
843 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
844 *
845 * this macro returns the index of the entry in the pgd page which would
846 * control the given virtual address
847 */
848#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
849
850/*
851 * pgd_offset() returns a (pgd_t *)
852 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
853 */
854#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
855/*
856 * a shortcut which implies the use of the kernel's pgd, instead
857 * of a process's
858 */
859#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
860
861
68db065c
JF
862#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
863#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
864
195466dc
JF
865#ifndef __ASSEMBLY__
866
2c1b284e 867extern int direct_gbpages;
22ddfcaa 868void init_mem_mapping(void);
8d57470d 869void early_alloc_pgt_buf(void);
2c1b284e 870
b234e8a0
TG
871#ifdef CONFIG_X86_64
872/* Realmode trampoline initialization. */
873extern pgd_t trampoline_pgd_entry;
0483e1fa 874static inline void __meminit init_trampoline_default(void)
b234e8a0
TG
875{
876 /* Default trampoline pgd value */
877 trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
878}
0483e1fa
TG
879# ifdef CONFIG_RANDOMIZE_MEMORY
880void __meminit init_trampoline(void);
881# else
882# define init_trampoline init_trampoline_default
883# endif
b234e8a0
TG
884#else
885static inline void init_trampoline(void) { }
886#endif
887
4891645e
JF
888/* local pte updates need not use xchg for locking */
889static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
890{
891 pte_t res = *ptep;
892
893 /* Pure native function needs no input for mm, addr */
894 native_pte_clear(NULL, 0, ptep);
895 return res;
896}
897
f2d6bfe9
JW
898static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
899{
900 pmd_t res = *pmdp;
901
902 native_pmd_clear(pmdp);
903 return res;
904}
905
a00cc7d9
MW
906static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
907{
908 pud_t res = *pudp;
909
910 native_pud_clear(pudp);
911 return res;
912}
913
4891645e
JF
914static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
915 pte_t *ptep , pte_t pte)
916{
917 native_set_pte(ptep, pte);
918}
919
0a47de52
AA
920static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
921 pmd_t *pmdp , pmd_t pmd)
922{
923 native_set_pmd(pmdp, pmd);
924}
925
a00cc7d9
MW
926static inline void native_set_pud_at(struct mm_struct *mm, unsigned long addr,
927 pud_t *pudp, pud_t pud)
928{
929 native_set_pud(pudp, pud);
930}
931
195466dc
JF
932#ifndef CONFIG_PARAVIRT
933/*
934 * Rules for using pte_update - it must be called after any PTE update which
935 * has not been done using the set_pte / clear_pte interfaces. It is used by
936 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
937 * updates should either be sets, clears, or set_pte_atomic for P->P
938 * transitions, which means this hook should only be called for user PTEs.
939 * This hook implies a P->P protection or access change has taken place, which
d6ccc3ec 940 * requires a subsequent TLB flush.
195466dc
JF
941 */
942#define pte_update(mm, addr, ptep) do { } while (0)
195466dc
JF
943#endif
944
195466dc
JF
945/*
946 * We only update the dirty/accessed state if we set
947 * the dirty bit by hand in the kernel, since the hardware
948 * will do the accessed bit for us, and we don't want to
949 * race with other CPU's that might be updating the dirty
950 * bit at the same time.
951 */
bea41808
JF
952struct vm_area_struct;
953
195466dc 954#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
ee5aa8d3
JF
955extern int ptep_set_access_flags(struct vm_area_struct *vma,
956 unsigned long address, pte_t *ptep,
957 pte_t entry, int dirty);
195466dc
JF
958
959#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
f9fbf1a3
JF
960extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
961 unsigned long addr, pte_t *ptep);
195466dc
JF
962
963#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
c20311e1
JF
964extern int ptep_clear_flush_young(struct vm_area_struct *vma,
965 unsigned long address, pte_t *ptep);
195466dc
JF
966
967#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
968static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
969 pte_t *ptep)
195466dc
JF
970{
971 pte_t pte = native_ptep_get_and_clear(ptep);
972 pte_update(mm, addr, ptep);
973 return pte;
974}
975
976#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
977static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
978 unsigned long addr, pte_t *ptep,
979 int full)
195466dc
JF
980{
981 pte_t pte;
982 if (full) {
983 /*
984 * Full address destruction in progress; paravirt does not
985 * care about updates and native needs no locking
986 */
987 pte = native_local_ptep_get_and_clear(ptep);
988 } else {
989 pte = ptep_get_and_clear(mm, addr, ptep);
990 }
991 return pte;
992}
993
994#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
995static inline void ptep_set_wrprotect(struct mm_struct *mm,
996 unsigned long addr, pte_t *ptep)
195466dc 997{
d8d89827 998 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
195466dc
JF
999 pte_update(mm, addr, ptep);
1000}
1001
2ac13462 1002#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 1003
f2d6bfe9
JW
1004#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1005
1006#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1007extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1008 unsigned long address, pmd_t *pmdp,
1009 pmd_t entry, int dirty);
a00cc7d9
MW
1010extern int pudp_set_access_flags(struct vm_area_struct *vma,
1011 unsigned long address, pud_t *pudp,
1012 pud_t entry, int dirty);
f2d6bfe9
JW
1013
1014#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1015extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1016 unsigned long addr, pmd_t *pmdp);
a00cc7d9
MW
1017extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1018 unsigned long addr, pud_t *pudp);
f2d6bfe9
JW
1019
1020#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1021extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1022 unsigned long address, pmd_t *pmdp);
1023
1024
f2d6bfe9
JW
1025#define __HAVE_ARCH_PMD_WRITE
1026static inline int pmd_write(pmd_t pmd)
1027{
1028 return pmd_flags(pmd) & _PAGE_RW;
1029}
1030
8809aa2d
AK
1031#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1032static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
f2d6bfe9
JW
1033 pmd_t *pmdp)
1034{
d6ccc3ec 1035 return native_pmdp_get_and_clear(pmdp);
f2d6bfe9
JW
1036}
1037
a00cc7d9
MW
1038#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1039static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1040 unsigned long addr, pud_t *pudp)
1041{
1042 return native_pudp_get_and_clear(pudp);
1043}
1044
f2d6bfe9
JW
1045#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1046static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1047 unsigned long addr, pmd_t *pmdp)
1048{
1049 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
f2d6bfe9
JW
1050}
1051
85958b46
JF
1052/*
1053 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1054 *
1055 * dst - pointer to pgd range anwhere on a pgd page
1056 * src - ""
1057 * count - the number of pgds to copy.
1058 *
1059 * dst and src can be on the same page, but the range must not overlap,
1060 * and must not cross a page boundary.
1061 */
1062static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1063{
1064 memcpy(dst, src, count * sizeof(pgd_t));
1065}
1066
4cbeb51b
DH
1067#define PTE_SHIFT ilog2(PTRS_PER_PTE)
1068static inline int page_level_shift(enum pg_level level)
1069{
1070 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1071}
1072static inline unsigned long page_level_size(enum pg_level level)
1073{
1074 return 1UL << page_level_shift(level);
1075}
1076static inline unsigned long page_level_mask(enum pg_level level)
1077{
1078 return ~(page_level_size(level) - 1);
1079}
85958b46 1080
602e0186
KS
1081/*
1082 * The x86 doesn't have any external MMU info: the kernel page
1083 * tables contain all the necessary information.
1084 */
1085static inline void update_mmu_cache(struct vm_area_struct *vma,
1086 unsigned long addr, pte_t *ptep)
1087{
1088}
1089static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1090 unsigned long addr, pmd_t *pmd)
1091{
1092}
a00cc7d9
MW
1093static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1094 unsigned long addr, pud_t *pud)
1095{
1096}
85958b46 1097
2bf01f9f 1098#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
fa0f281c
CG
1099static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1100{
fa0f281c
CG
1101 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1102}
1103
1104static inline int pte_swp_soft_dirty(pte_t pte)
1105{
fa0f281c
CG
1106 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1107}
1108
1109static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1110{
fa0f281c
CG
1111 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1112}
2bf01f9f 1113#endif
fa0f281c 1114
33a709b2
DH
1115#define PKRU_AD_BIT 0x1
1116#define PKRU_WD_BIT 0x2
84594296 1117#define PKRU_BITS_PER_PKEY 2
33a709b2
DH
1118
1119static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1120{
84594296 1121 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1122 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1123}
1124
1125static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1126{
84594296 1127 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
33a709b2
DH
1128 /*
1129 * Access-disable disables writes too so we need to check
1130 * both bits here.
1131 */
1132 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1133}
1134
1135static inline u16 pte_flags_pkey(unsigned long pte_flags)
1136{
1137#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1138 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1139 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1140#else
1141 return 0;
1142#endif
1143}
1144
2947ba05
KS
1145static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1146{
1147 u32 pkru = read_pkru();
1148
1149 if (!__pkru_allows_read(pkru, pkey))
1150 return false;
1151 if (write && !__pkru_allows_write(pkru, pkey))
1152 return false;
1153
1154 return true;
1155}
1156
1157/*
1158 * 'pteval' can come from a PTE, PMD or PUD. We only check
1159 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1160 * same value on all 3 types.
1161 */
1162static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1163{
1164 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1165
1166 if (write)
1167 need_pte_bits |= _PAGE_RW;
1168
1169 if ((pteval & need_pte_bits) != need_pte_bits)
1170 return 0;
1171
1172 return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1173}
1174
1175#define pte_access_permitted pte_access_permitted
1176static inline bool pte_access_permitted(pte_t pte, bool write)
1177{
1178 return __pte_access_permitted(pte_val(pte), write);
1179}
1180
1181#define pmd_access_permitted pmd_access_permitted
1182static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1183{
1184 return __pte_access_permitted(pmd_val(pmd), write);
1185}
1186
1187#define pud_access_permitted pud_access_permitted
1188static inline bool pud_access_permitted(pud_t pud, bool write)
1189{
1190 return __pte_access_permitted(pud_val(pud), write);
1191}
1192
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1193#include <asm-generic/pgtable.h>
1194#endif /* __ASSEMBLY__ */
1195
1965aae3 1196#endif /* _ASM_X86_PGTABLE_H */