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ARM Packages: Replaced the macro GetCorePositionFromMpId() by the ArmPlatformGetCoreP...
[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / Arm / PrePeiCoreEntryPoint.asm
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1d5d0ae9 1//\r
bebda7ce 2// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
1d5d0ae9 3// \r
4// This program and the accompanying materials \r
5// are licensed and made available under the terms and conditions of the BSD License \r
6// which accompanies this distribution. The full text of the license may be found at \r
7// http://opensource.org/licenses/bsd-license.php \r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11//\r
12//\r
13\r
14#include <AsmMacroIoLib.h>\r
15#include <Base.h>\r
16#include <Library/PcdLib.h>\r
17#include <AutoGen.h>\r
18\r
19 INCLUDE AsmMacroIoLib.inc\r
20 \r
21 IMPORT CEntryPoint\r
2d45f194 22 IMPORT ArmPlatformGetCorePosition\r
bebda7ce 23 IMPORT ArmPlatformIsPrimaryCore\r
0787bc61 24 IMPORT ArmReadMpidr\r
1d5d0ae9 25 EXPORT _ModuleEntryPoint\r
26 \r
27 PRESERVE8\r
28 AREA PrePeiCoreEntryPoint, CODE, READONLY\r
29 \r
30StartupAddr DCD CEntryPoint\r
31\r
1d5d0ae9 32_ModuleEntryPoint\r
33 // Identify CPU ID\r
0787bc61 34 bl ArmReadMpidr\r
bebda7ce 35 // Keep a copy of the MpId register value\r
36 mov r5, r0\r
1377db63 37 \r
bebda7ce 38 // Is it the Primary Core ?\r
39 bl ArmPlatformIsPrimaryCore\r
40\r
1377db63 41 // Get the top of the primary stacks (and the base of the secondary stacks)\r
2dbcb8f0 42 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)\r
43 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r
1377db63 44 add r1, r1, r2\r
2dbcb8f0 45\r
bebda7ce 46 // r0 is equal to 1 if I am the primary core\r
47 cmp r0, #1\r
2dbcb8f0 48 beq _SetupPrimaryCoreStack\r
49\r
50_SetupSecondaryCoreStack\r
1377db63 51 // r1 contains the base of the secondary stacks\r
2dbcb8f0 52\r
2d45f194 53 // Get the Core Position\r
54 mov r6, r1 // Save base of the secondary stacks\r
55 mov r0, r5\r
56 bl ArmPlatformGetCorePosition\r
2dbcb8f0 57 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
1377db63 58 add r0, r0, #1\r
1d5d0ae9 59\r
2dbcb8f0 60 // StackOffset = CorePos * StackSize\r
1377db63 61 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)\r
62 mul r0, r0, r2\r
2dbcb8f0 63 // SP = StackBase + StackOffset\r
2d45f194 64 add sp, r6, r0\r
47a8e12f 65\r
66_PrepareArguments\r
1d5d0ae9 67 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector\r
f92b93c9 68 LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)\r
1d5d0ae9 69 add r2, r2, #4\r
70 ldr r1, [r2]\r
71\r
1377db63 72 // Move sec startup address into a data register\r
73 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
74 ldr r3, StartupAddr\r
75 \r
76 // Jump to PrePeiCore C code\r
0787bc61 77 // r0 = mp_id\r
1d5d0ae9 78 // r1 = pei_core_address\r
1377db63 79 mov r0, r5\r
80 blx r3\r
81\r
82_SetupPrimaryCoreStack\r
83 // r1 contains the top of the primary stack\r
84 LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r
85\r
86 // The reserved space for global variable must be 8-bytes aligned for pushing\r
87 // 64-bit variable on the stack\r
88 SetPrimaryStack (r1, r2, r3)\r
89 b _PrepareArguments\r
1d5d0ae9 90\r
2dbcb8f0 91_NeverReturn\r
92 b _NeverReturn\r
93\r
1d5d0ae9 94 END\r