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CommitLineData
3e8ad6bd
JF		 1/** @file\r
2 Common header file for MP Initialize Library.\r
3\r
8c61f193 4 Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
4c0f6e34
LD		 5 Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
6\r
0acd8697 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
3e8ad6bd
JF		 8\r
9**/\r
10\r
11#ifndef _MP_LIB_H_\r
12#define _MP_LIB_H_\r
13\r
14#include <PiPei.h>\r
15\r
01acb06c 16#include <Register/Intel/Cpuid.h>\r
4c0f6e34 17#include <Register/Amd/Cpuid.h>\r
01acb06c
RN		 18#include <Register/Intel/Msr.h>\r
19#include <Register/Intel/LocalApic.h>\r
20#include <Register/Intel/Microcode.h>\r
3e8ad6bd
JF		 21\r
22#include <Library/MpInitLib.h>\r
23#include <Library/BaseLib.h>\r
24#include <Library/BaseMemoryLib.h>\r
25#include <Library/MemoryAllocationLib.h>\r
26#include <Library/DebugLib.h>\r
27#include <Library/LocalApicLib.h>\r
28#include <Library/CpuLib.h>\r
29#include <Library/UefiCpuLib.h>\r
30#include <Library/TimerLib.h>\r
31#include <Library/SynchronizationLib.h>\r
32#include <Library/MtrrLib.h>\r
33#include <Library/HobLib.h>\r
d5339c04 34#include <Library/PcdLib.h>\r
bce03284 35#include <Library/MicrocodeLib.h>\r
3e8ad6bd 36\r
348a34d9
HW		 37#include <Guid/MicrocodePatchHob.h>\r
38\r
053e878b 39#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
b8b04307 40\r
93ca4c0f
JF		 41#define CPU_INIT_MP_LIB_HOB_GUID \\r
42 { \\r
43 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r
44 }\r
45\r
41be0da5
JF		 46//\r
47// The MP data for switch BSP\r
48//\r
053e878b
MK		 49#define CPU_SWITCH_STATE_IDLE 0\r
50#define CPU_SWITCH_STATE_STORED 1\r
51#define CPU_SWITCH_STATE_LOADED 2\r
41be0da5 52\r
d786a172
HW		 53//\r
54// Default maximum number of entries to store the microcode patches information\r
55//\r
053e878b 56#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
d786a172
HW		 57\r
58//\r
59// Data structure for microcode patch information\r
60//\r
61typedef struct {\r
62 UINTN Address;\r
63 UINTN Size;\r
d786a172
HW		 64} MICROCODE_PATCH_INFO;\r
65\r
41be0da5
JF		 66//\r
67// CPU exchange information for switch BSP\r
68//\r
69typedef struct {\r
053e878b
MK		 70 UINT8 State; // offset 0\r
71 UINTN StackPointer; // offset 4 / 8\r
72 IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
73 IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
41be0da5
JF		 74} CPU_EXCHANGE_ROLE_INFO;\r
75\r
9ebcf0f4
JF		 76//\r
77// AP loop state when APs are in idle state\r
78// It's value is the same with PcdCpuApLoopMode\r
79//\r
80typedef enum {\r
81 ApInHltLoop = 1,\r
82 ApInMwaitLoop = 2,\r
83 ApInRunLoop = 3\r
84} AP_LOOP_MODE;\r
85\r
e59f8f6b
JF		 86//\r
87// AP initialization state during APs wakeup\r
88//\r
89typedef enum {\r
90 ApInitConfig = 1,\r
91 ApInitReconfig = 2,\r
92 ApInitDone = 3\r
93} AP_INIT_STATE;\r
94\r
03a1a925
JF		 95//\r
96// AP state\r
97//\r
2a5997f8
ED		 98// The state transitions for an AP when it process a procedure are:\r
99// Idle ----> Ready ----> Busy ----> Idle\r
100// [BSP] [AP] [AP]\r
101//\r
03a1a925
JF		 102typedef enum {\r
103 CpuStateIdle,\r
104 CpuStateReady,\r
105 CpuStateBusy,\r
e048ce88 106 CpuStateFinished,\r
03a1a925
JF		 107 CpuStateDisabled\r
108} CPU_STATE;\r
109\r
68cb9330
JF		 110//\r
111// CPU volatile registers around INIT-SIPI-SIPI\r
112//\r
113typedef struct {\r
053e878b
MK		 114 UINTN Cr0;\r
115 UINTN Cr3;\r
116 UINTN Cr4;\r
117 UINTN Dr0;\r
118 UINTN Dr1;\r
119 UINTN Dr2;\r
120 UINTN Dr3;\r
121 UINTN Dr6;\r
122 UINTN Dr7;\r
123 IA32_DESCRIPTOR Gdtr;\r
124 IA32_DESCRIPTOR Idtr;\r
125 UINT16 Tr;\r
68cb9330
JF		 126} CPU_VOLATILE_REGISTERS;\r
127\r
e59f8f6b
JF		 128//\r
129// AP related data\r
130//\r
131typedef struct {\r
053e878b
MK		 132 SPIN_LOCK ApLock;\r
133 volatile UINT32 *StartupApSignal;\r
134 volatile UINTN ApFunction;\r
135 volatile UINTN ApFunctionArgument;\r
136 BOOLEAN CpuHealthy;\r
137 volatile CPU_STATE State;\r
138 CPU_VOLATILE_REGISTERS VolatileRegisters;\r
139 BOOLEAN Waiting;\r
140 BOOLEAN *Finished;\r
141 UINT64 ExpectedTime;\r
142 UINT64 CurrentTime;\r
143 UINT64 TotalTime;\r
144 EFI_EVENT WaitEvent;\r
145 UINT32 ProcessorSignature;\r
146 UINT8 PlatformId;\r
147 UINT64 MicrocodeEntryAddr;\r
148 UINT32 MicrocodeRevision;\r
e59f8f6b
JF		 149} CPU_AP_DATA;\r
150\r
151//\r
152// Basic CPU information saved in Guided HOB.\r
153// Because the contents will be shard between PEI and DXE,\r
154// we need to make sure the each fields offset same in different\r
155// architecture.\r
156//\r
dd3fa0cd 157#pragma pack (1)\r
e59f8f6b 158typedef struct {\r
053e878b
MK		 159 UINT32 InitialApicId;\r
160 UINT32 ApicId;\r
161 UINT32 Health;\r
162 UINT64 ApTopOfStack;\r
e59f8f6b 163} CPU_INFO_IN_HOB;\r
dd3fa0cd 164#pragma pack ()\r
e59f8f6b 165\r
f7f85d83
JF		 166//\r
167// AP reset code information including code address and size,\r
168// this structure will be shared be C code and assembly code.\r
169// It is natural aligned by design.\r
170//\r
171typedef struct {\r
053e878b
MK		 172 UINT8 *RendezvousFunnelAddress;\r
173 UINTN ModeEntryOffset;\r
174 UINTN RendezvousFunnelSize;\r
175 UINT8 *RelocateApLoopFuncAddress;\r
176 UINTN RelocateApLoopFuncSize;\r
177 UINTN ModeTransitionOffset;\r
178 UINTN SwitchToRealSize;\r
179 UINTN SwitchToRealOffset;\r
180 UINTN SwitchToRealNoNxOffset;\r
181 UINTN SwitchToRealPM16ModeOffset;\r
182 UINTN SwitchToRealPM16ModeSize;\r
f7f85d83 183} MP_ASSEMBLY_ADDRESS_MAP;\r
3e8ad6bd 184\r
053e878b 185typedef struct _CPU_MP_DATA CPU_MP_DATA;\r
e59f8f6b 186\r
d94e5f67
JF		 187#pragma pack(1)\r
188\r
189//\r
190// MP CPU exchange information for AP reset code\r
191// This structure is required to be packed because fixed field offsets\r
192// into this structure are used in assembly code in this module\r
193//\r
194typedef struct {\r
053e878b
MK		 195 UINTN StackStart;\r
196 UINTN StackSize;\r
197 UINTN CFunction;\r
198 IA32_DESCRIPTOR GdtrProfile;\r
199 IA32_DESCRIPTOR IdtrProfile;\r
200 UINTN BufferStart;\r
201 UINTN ModeOffset;\r
202 UINTN ApIndex;\r
203 UINTN CodeSegment;\r
204 UINTN DataSegment;\r
205 UINTN EnableExecuteDisable;\r
206 UINTN Cr3;\r
207 UINTN InitFlag;\r
208 CPU_INFO_IN_HOB *CpuInfo;\r
209 UINTN NumApsExecuting;\r
210 CPU_MP_DATA *CpuMpData;\r
211 UINTN InitializeFloatingPointUnitsAddress;\r
212 UINT32 ModeTransitionMemory;\r
213 UINT16 ModeTransitionSegment;\r
214 UINT32 ModeHighMemory;\r
215 UINT16 ModeHighSegment;\r
09f69a87
RN		 216 //\r
217 // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
218 //\r
053e878b
MK		 219 BOOLEAN Enable5LevelPaging;\r
220 BOOLEAN SevEsIsEnabled;\r
221 UINTN GhcbBase;\r
d94e5f67
JF		 222} MP_CPU_EXCHANGE_INFO;\r
223\r
224#pragma pack()\r
e59f8f6b
JF		 225\r
226//\r
227// CPU MP Data save in memory\r
228//\r
229struct _CPU_MP_DATA {\r
053e878b
MK		 230 UINT64 CpuInfoInHob;\r
231 UINT32 CpuCount;\r
232 UINT32 BspNumber;\r
e59f8f6b
JF		 233 //\r
234 // The above fields data will be passed from PEI to DXE\r
235 // Please make sure the fields offset same in the different\r
236 // architecture.\r
237 //\r
053e878b
MK		 238 SPIN_LOCK MpLock;\r
239 UINTN Buffer;\r
240 UINTN CpuApStackSize;\r
241 MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
242 UINTN WakeupBuffer;\r
243 UINTN WakeupBufferHigh;\r
244 UINTN BackupBuffer;\r
245 UINTN BackupBufferSize;\r
246\r
247 volatile UINT32 FinishedCount;\r
248 UINT32 RunningCount;\r
249 BOOLEAN SingleThread;\r
250 EFI_AP_PROCEDURE Procedure;\r
251 VOID *ProcArguments;\r
252 BOOLEAN *Finished;\r
253 UINT64 ExpectedTime;\r
254 UINT64 CurrentTime;\r
255 UINT64 TotalTime;\r
256 EFI_EVENT WaitEvent;\r
257 UINTN **FailedCpuList;\r
258\r
259 AP_INIT_STATE InitFlag;\r
260 BOOLEAN SwitchBspFlag;\r
261 UINTN NewBspNumber;\r
262 CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
263 CPU_EXCHANGE_ROLE_INFO APInfo;\r
264 MTRR_SETTINGS MtrrTable;\r
265 UINT8 ApLoopMode;\r
266 UINT8 ApTargetCState;\r
267 UINT16 PmCodeSegment;\r
268 UINT16 Pm16CodeSegment;\r
269 CPU_AP_DATA *CpuData;\r
270 volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
271\r
272 UINT32 CurrentTimerCount;\r
273 UINTN DivideValue;\r
274 UINT8 Vector;\r
275 BOOLEAN PeriodicMode;\r
276 BOOLEAN TimerInterruptState;\r
277 UINT64 MicrocodePatchAddress;\r
278 UINT64 MicrocodePatchRegionSize;\r
2a089134 279\r
58942277
ED		 280 //\r
281 // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
282 // Two cases need to set this value to TRUE. One is in HLT\r
283 // loop mode, the other is resume from S3 which loop mode\r
e23d9c3e 284 // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
58942277
ED		 285 // driver.\r
286 //\r
053e878b 287 BOOLEAN WakeUpByInitSipiSipi;\r
e88a5b98 288\r
053e878b
MK		 289 BOOLEAN SevEsIsEnabled;\r
290 UINTN SevEsAPBuffer;\r
291 UINTN SevEsAPResetStackStart;\r
292 CPU_MP_DATA *NewCpuMpData;\r
7b7508ad 293\r
053e878b 294 UINT64 GhcbBase;\r
e59f8f6b 295};\r
93ca4c0f 296\r
053e878b
MK		 297#define AP_SAFE_STACK_SIZE 128\r
298#define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r
7b7508ad
TL		 299\r
300#pragma pack(1)\r
301\r
302typedef struct {\r
053e878b
MK		 303 UINT8 InsnBuffer[8];\r
304 UINT16 Rip;\r
305 UINT16 Segment;\r
7b7508ad
TL		 306} SEV_ES_AP_JMP_FAR;\r
307\r
308#pragma pack()\r
309\r
310/**\r
311 Assembly code to move an AP from long mode to real mode.\r
312\r
313 Move an AP from long mode to real mode in preparation to invoking\r
314 the reset vector. This is used for SEV-ES guests where a hypervisor\r
315 is not allowed to set the CS and RIP to point to the reset vector.\r
316\r
317 @param[in] BufferStart The reset vector target.\r
318 @param[in] Code16 16-bit protected mode code segment value.\r
319 @param[in] Code32 32-bit protected mode code segment value.\r
320 @param[in] StackStart The start of a stack to be used for transitioning\r
321 from long mode to real mode.\r
322**/\r
323typedef\r
324VOID\r
053e878b 325(EFIAPI AP_RESET)(\r
7b7508ad
TL		 326 IN UINTN BufferStart,\r
327 IN UINT16 Code16,\r
328 IN UINT16 Code32,\r
329 IN UINTN StackStart\r
330 );\r
331\r
053e878b 332extern EFI_GUID mCpuInitMpLibHobGuid;\r
93ca4c0f 333\r
76157021
JF		 334/**\r
335 Assembly code to place AP into safe loop mode.\r
336\r
337 Place AP into targeted C-State if MONITOR is supported, otherwise\r
338 place AP into hlt state.\r
339 Place AP in protected mode if the current is long mode. Due to AP maybe\r
340 wakeup by some hardware event. It could avoid accessing page table that\r
341 may not available during booting to OS.\r
342\r
343 @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r
344 FALSE indicates MONITOR is not supported.\r
345 @param[in] ApTargetCState Target C-State value.\r
346 @param[in] PmCodeSegment Protected mode code segment value.\r
347**/\r
348typedef\r
349VOID\r
053e878b 350(EFIAPI *ASM_RELOCATE_AP_LOOP)(\r
76157021
JF		 351 IN BOOLEAN MwaitSupport,\r
352 IN UINTN ApTargetCState,\r
bf2786dc 353 IN UINTN PmCodeSegment,\r
9f91cb01 354 IN UINTN TopOfApStack,\r
20da7ca4
TL		 355 IN UINTN NumberToFinish,\r
356 IN UINTN Pm16CodeSegment,\r
357 IN UINTN SevEsAPJumpTable,\r
358 IN UINTN WakeupBuffer\r
76157021 359 );\r
f7f85d83
JF		 360\r
361/**\r
362 Assembly code to get starting address and size of the rendezvous entry for APs.\r
363 Information for fixing a jump instruction in the code is also returned.\r
364\r
365 @param[out] AddressMap Output buffer for address map information.\r
366**/\r
367VOID\r
368EFIAPI\r
369AsmGetAddressMap (\r
053e878b 370 OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
f7f85d83
JF		 371 );\r
372\r
41be0da5
JF		 373/**\r
374 This function is called by both the BSP and the AP which is to become the BSP to\r
375 Exchange execution context including stack between them. After return from this\r
376 function, the BSP becomes AP and the AP becomes the BSP.\r
377\r
378 @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r
379 @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r
380\r
381**/\r
382VOID\r
383EFIAPI\r
384AsmExchangeRole (\r
053e878b
MK		 385 IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r
386 IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r
41be0da5
JF		 387 );\r
388\r
93ca4c0f
JF		 389/**\r
390 Get the pointer to CPU MP Data structure.\r
391\r
392 @return The pointer to CPU MP Data structure.\r
393**/\r
394CPU_MP_DATA *\r
395GetCpuMpData (\r
396 VOID\r
397 );\r
398\r
399/**\r
400 Save the pointer to CPU MP Data structure.\r
401\r
402 @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r
403**/\r
404VOID\r
405SaveCpuMpData (\r
053e878b 406 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 407 );\r
408\r
ed66e0e3 409/**\r
a6b3d753 410 Get available system memory below 1MB by specified size.\r
ed66e0e3 411\r
a6b3d753
SZ		 412 @param[in] WakeupBufferSize Wakeup buffer size required\r
413\r
414 @retval other Return wakeup buffer address below 1MB.\r
415 @retval -1 Cannot find free memory below 1MB.\r
ed66e0e3 416**/\r
a6b3d753
SZ		 417UINTN\r
418GetWakeupBuffer (\r
053e878b 419 IN UINTN WakeupBufferSize\r
ed66e0e3
JF		 420 );\r
421\r
f32bfe6d
JW		 422/**\r
423 Get available EfiBootServicesCode memory below 4GB by specified size.\r
424\r
425 This buffer is required to safely transfer AP from real address mode to\r
426 protected mode or long mode, due to the fact that the buffer returned by\r
427 GetWakeupBuffer() may be marked as non-executable.\r
428\r
429 @param[in] BufferSize Wakeup transition buffer size.\r
430\r
431 @retval other Return wakeup transition buffer address below 4GB.\r
432 @retval 0 Cannot find free memory below 4GB.\r
433**/\r
434UINTN\r
435GetModeTransitionBuffer (\r
053e878b 436 IN UINTN BufferSize\r
f32bfe6d
JW		 437 );\r
438\r
7b7508ad
TL		 439/**\r
440 Return the address of the SEV-ES AP jump table.\r
441\r
442 This buffer is required in order for an SEV-ES guest to transition from\r
443 UEFI into an OS.\r
444\r
445 @return Return SEV-ES AP jump table buffer\r
446**/\r
447UINTN\r
448GetSevEsAPMemory (\r
449 VOID\r
450 );\r
451\r
96f5920d
JF		 452/**\r
453 This function will be called by BSP to wakeup AP.\r
454\r
455 @param[in] CpuMpData Pointer to CPU MP Data\r
456 @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
457 FALSE: Send IPI to AP by ApicId\r
458 @param[in] ProcessorNumber The handle number of specified processor\r
459 @param[in] Procedure The function to be invoked by AP\r
460 @param[in] ProcedureArgument The argument to be passed into AP function\r
cf4e79e4 461 @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
96f5920d
JF		 462**/\r
463VOID\r
464WakeUpAP (\r
053e878b
MK		 465 IN CPU_MP_DATA *CpuMpData,\r
466 IN BOOLEAN Broadcast,\r
467 IN UINTN ProcessorNumber,\r
468 IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r
469 IN VOID *ProcedureArgument OPTIONAL,\r
470 IN BOOLEAN WakeUpDisabledAps OPTIONAL\r
96f5920d
JF		 471 );\r
472\r
93ca4c0f
JF		 473/**\r
474 Initialize global data for MP support.\r
475\r
476 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
477**/\r
478VOID\r
479InitMpGlobalData (\r
053e878b 480 IN CPU_MP_DATA *CpuMpData\r
93ca4c0f
JF		 481 );\r
482\r
86efe976
JF		 483/**\r
484 Worker function to execute a caller provided function on all enabled APs.\r
485\r
486 @param[in] Procedure A pointer to the function to be run on\r
487 enabled APs of the system.\r
488 @param[in] SingleThread If TRUE, then all the enabled APs execute\r
489 the function specified by Procedure one by\r
490 one, in ascending order of processor handle\r
491 number. If FALSE, then all the enabled APs\r
492 execute the function specified by Procedure\r
493 simultaneously.\r
ee0c39fa 494 @param[in] ExcludeBsp Whether let BSP also trig this task.\r
86efe976
JF		 495 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
496 service.\r
367284e7 497 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
86efe976
JF		 498 APs to return from Procedure, either for\r
499 blocking or non-blocking mode.\r
500 @param[in] ProcedureArgument The parameter passed into Procedure for\r
501 all APs.\r
502 @param[out] FailedCpuList If all APs finish successfully, then its\r
503 content is set to NULL. If not all APs\r
504 finish before timeout expires, then its\r
505 content is set to address of the buffer\r
506 holding handle numbers of the failed APs.\r
507\r
508 @retval EFI_SUCCESS In blocking mode, all APs have finished before\r
509 the timeout expired.\r
510 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r
511 to all enabled APs.\r
512 @retval others Failed to Startup all APs.\r
513\r
514**/\r
515EFI_STATUS\r
ee0c39fa 516StartupAllCPUsWorker (\r
053e878b
MK		 517 IN EFI_AP_PROCEDURE Procedure,\r
518 IN BOOLEAN SingleThread,\r
519 IN BOOLEAN ExcludeBsp,\r
520 IN EFI_EVENT WaitEvent OPTIONAL,\r
521 IN UINTN TimeoutInMicroseconds,\r
522 IN VOID *ProcedureArgument OPTIONAL,\r
523 OUT UINTN **FailedCpuList OPTIONAL\r
86efe976
JF		 524 );\r
525\r
20ae5774
JF		 526/**\r
527 Worker function to let the caller get one enabled AP to execute a caller-provided\r
528 function.\r
529\r
530 @param[in] Procedure A pointer to the function to be run on\r
531 enabled APs of the system.\r
532 @param[in] ProcessorNumber The handle number of the AP.\r
533 @param[in] WaitEvent The event created by the caller with CreateEvent()\r
534 service.\r
367284e7 535 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r
20ae5774
JF		 536 APs to return from Procedure, either for\r
537 blocking or non-blocking mode.\r
538 @param[in] ProcedureArgument The parameter passed into Procedure for\r
539 all APs.\r
540 @param[out] Finished If AP returns from Procedure before the\r
541 timeout expires, its content is set to TRUE.\r
542 Otherwise, the value is set to FALSE.\r
543\r
544 @retval EFI_SUCCESS In blocking mode, specified AP finished before\r
545 the timeout expires.\r
546 @retval others Failed to Startup AP.\r
547\r
548**/\r
549EFI_STATUS\r
550StartupThisAPWorker (\r
053e878b
MK		 551 IN EFI_AP_PROCEDURE Procedure,\r
552 IN UINTN ProcessorNumber,\r
553 IN EFI_EVENT WaitEvent OPTIONAL,\r
554 IN UINTN TimeoutInMicroseconds,\r
555 IN VOID *ProcedureArgument OPTIONAL,\r
556 OUT BOOLEAN *Finished OPTIONAL\r
20ae5774
JF		 557 );\r
558\r
41be0da5
JF		 559/**\r
560 Worker function to switch the requested AP to be the BSP from that point onward.\r
561\r
562 @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
563 @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r
564 enabled AP. Otherwise, it will be disabled.\r
565\r
566 @retval EFI_SUCCESS BSP successfully switched.\r
7367cc6c 567 @retval others Failed to switch BSP.\r
41be0da5
JF		 568\r
569**/\r
570EFI_STATUS\r
571SwitchBSPWorker (\r
053e878b
MK		 572 IN UINTN ProcessorNumber,\r
573 IN BOOLEAN EnableOldBSP\r
41be0da5
JF		 574 );\r
575\r
e37109bc
JF		 576/**\r
577 Worker function to let the caller enable or disable an AP from this point onward.\r
578 This service may only be called from the BSP.\r
579\r
580 @param[in] ProcessorNumber The handle number of AP.\r
581 @param[in] EnableAP Specifies the new state for the processor for\r
582 enabled, FALSE for disabled.\r
583 @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r
584 the new health status of the AP.\r
585\r
586 @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r
587 @retval others Failed to Enable/Disable AP.\r
588\r
589**/\r
590EFI_STATUS\r
591EnableDisableApWorker (\r
053e878b
MK		 592 IN UINTN ProcessorNumber,\r
593 IN BOOLEAN EnableAP,\r
594 IN UINT32 *HealthFlag OPTIONAL\r
e37109bc
JF		 595 );\r
596\r
93ca4c0f
JF		 597/**\r
598 Get pointer to CPU MP Data structure from GUIDed HOB.\r
599\r
600 @return The pointer to CPU MP Data structure.\r
601**/\r
602CPU_MP_DATA *\r
603GetCpuMpDataFromGuidedHob (\r
604 VOID\r
605 );\r
08085f08
JF		 606\r
607/** Checks status of specified AP.\r
608\r
609 This function checks whether the specified AP has finished the task assigned\r
610 by StartupThisAP(), and whether timeout expires.\r
611\r
612 @param[in] ProcessorNumber The handle number of processor.\r
613\r
614 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r
615 @retval EFI_TIMEOUT The timeout expires.\r
616 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r
617**/\r
618EFI_STATUS\r
619CheckThisAP (\r
053e878b 620 IN UINTN ProcessorNumber\r
08085f08
JF		 621 );\r
622\r
623/**\r
624 Checks status of all APs.\r
625\r
626 This function checks whether all APs have finished task assigned by StartupAllAPs(),\r
627 and whether timeout expires.\r
628\r
629 @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r
630 @retval EFI_TIMEOUT The timeout expires.\r
631 @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r
632**/\r
633EFI_STATUS\r
634CheckAllAPs (\r
635 VOID\r
636 );\r
637\r
638/**\r
639 Checks APs status and updates APs status if needed.\r
640\r
641**/\r
642VOID\r
643CheckAndUpdateApsStatus (\r
644 VOID\r
645 );\r
646\r
94f63c76
JF		 647/**\r
648 Detect whether specified processor can find matching microcode patch and load it.\r
649\r
e1ed5573
HW		 650 @param[in] CpuMpData The pointer to CPU MP Data structure.\r
651 @param[in] ProcessorNumber The handle number of the processor. The range is\r
652 from 0 to the total number of logical processors\r
653 minus 1.\r
94f63c76
JF		 654**/\r
655VOID\r
656MicrocodeDetect (\r
053e878b
MK		 657 IN CPU_MP_DATA *CpuMpData,\r
658 IN UINTN ProcessorNumber\r
94f63c76
JF		 659 );\r
660\r
d786a172 661/**\r
dd017041 662 Shadow the required microcode patches data into memory.\r
d786a172
HW		 663\r
664 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
665**/\r
666VOID\r
dd017041 667ShadowMicrocodeUpdatePatch (\r
053e878b 668 IN OUT CPU_MP_DATA *CpuMpData\r
d786a172
HW		 669 );\r
670\r
348a34d9
HW		 671/**\r
672 Get the cached microcode patch base address and size from the microcode patch\r
673 information cache HOB.\r
674\r
675 @param[out] Address Base address of the microcode patches data.\r
676 It will be updated if the microcode patch\r
677 information cache HOB is found.\r
678 @param[out] RegionSize Size of the microcode patches data.\r
679 It will be updated if the microcode patch\r
680 information cache HOB is found.\r
681\r
682 @retval TRUE The microcode patch information cache HOB is found.\r
683 @retval FALSE The microcode patch information cache HOB is not found.\r
684\r
685**/\r
686BOOLEAN\r
687GetMicrocodePatchInfoFromHob (\r
053e878b
MK		 688 UINT64 *Address,\r
689 UINT64 *RegionSize\r
348a34d9
HW		 690 );\r
691\r
4d3314f6
JF		 692/**\r
693 Detect whether Mwait-monitor feature is supported.\r
694\r
695 @retval TRUE Mwait-monitor feature is supported.\r
696 @retval FALSE Mwait-monitor feature is not supported.\r
697**/\r
698BOOLEAN\r
699IsMwaitSupport (\r
700 VOID\r
701 );\r
702\r
43c9fdcc
JF		 703/**\r
704 Enable Debug Agent to support source debugging on AP function.\r
705\r
706**/\r
707VOID\r
708EnableDebugAgent (\r
709 VOID\r
710 );\r
711\r
e1ed5573
HW		 712/**\r
713 Find the current Processor number by APIC ID.\r
714\r
715 @param[in] CpuMpData Pointer to PEI CPU MP Data\r
716 @param[out] ProcessorNumber Return the pocessor number found\r
717\r
718 @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
719 @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
720**/\r
721EFI_STATUS\r
722GetProcessorNumber (\r
053e878b
MK		 723 IN CPU_MP_DATA *CpuMpData,\r
724 OUT UINTN *ProcessorNumber\r
e1ed5573
HW		 725 );\r
726\r
c788c2b1
SF		 727/**\r
728 This funtion will try to invoke platform specific microcode shadow logic to\r
729 relocate microcode update patches into memory.\r
730\r
4ac82ea1 731 @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r
c788c2b1
SF		 732\r
733 @retval EFI_SUCCESS Shadow microcode success.\r
734 @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r
735 @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r
736 PPI/Protocol.\r
737**/\r
738EFI_STATUS\r
739PlatformShadowMicrocode (\r
053e878b 740 IN OUT CPU_MP_DATA *CpuMpData\r
c788c2b1
SF		 741 );\r
742\r
3e8ad6bd 743#endif\r
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