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529a5a86 MK |
1 | /** @file\r |
2 | Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.\r | |
3 | \r | |
3fdc47c6 | 4 | Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR>\r |
241f9149 LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
0acd8697 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
529a5a86 MK |
8 | \r |
9 | **/\r | |
10 | \r | |
11 | #ifndef _CPU_PISMMCPUDXESMM_H_\r | |
12 | #define _CPU_PISMMCPUDXESMM_H_\r | |
13 | \r | |
14 | #include <PiSmm.h>\r | |
15 | \r | |
16 | #include <Protocol/MpService.h>\r | |
17 | #include <Protocol/SmmConfiguration.h>\r | |
18 | #include <Protocol/SmmCpu.h>\r | |
19 | #include <Protocol/SmmAccess2.h>\r | |
529a5a86 MK |
20 | #include <Protocol/SmmReadyToLock.h>\r |
21 | #include <Protocol/SmmCpuService.h>\r | |
827330cc | 22 | #include <Protocol/SmmMemoryAttribute.h>\r |
51dd408a | 23 | #include <Protocol/MmMp.h>\r |
529a5a86 MK |
24 | \r |
25 | #include <Guid/AcpiS3Context.h>\r | |
8a2e1a9d | 26 | #include <Guid/MemoryAttributesTable.h>\r |
717fb604 | 27 | #include <Guid/PiSmmMemoryAttributesTable.h>\r |
529a5a86 MK |
28 | \r |
29 | #include <Library/BaseLib.h>\r | |
30 | #include <Library/IoLib.h>\r | |
31 | #include <Library/TimerLib.h>\r | |
529a5a86 MK |
32 | #include <Library/SynchronizationLib.h>\r |
33 | #include <Library/DebugLib.h>\r | |
34 | #include <Library/BaseMemoryLib.h>\r | |
35 | #include <Library/PcdLib.h>\r | |
529a5a86 MK |
36 | #include <Library/MtrrLib.h>\r |
37 | #include <Library/SmmCpuPlatformHookLib.h>\r | |
38 | #include <Library/SmmServicesTableLib.h>\r | |
39 | #include <Library/MemoryAllocationLib.h>\r | |
40 | #include <Library/UefiBootServicesTableLib.h>\r | |
41 | #include <Library/UefiRuntimeServicesTableLib.h>\r | |
42 | #include <Library/DebugAgentLib.h>\r | |
8a2e1a9d | 43 | #include <Library/UefiLib.h>\r |
529a5a86 MK |
44 | #include <Library/HobLib.h>\r |
45 | #include <Library/LocalApicLib.h>\r | |
46 | #include <Library/UefiCpuLib.h>\r | |
47 | #include <Library/CpuExceptionHandlerLib.h>\r | |
48 | #include <Library/ReportStatusCodeLib.h>\r | |
49 | #include <Library/SmmCpuFeaturesLib.h>\r | |
50 | #include <Library/PeCoffGetEntryPointLib.h>\r | |
93324390 | 51 | #include <Library/RegisterCpuFeaturesLib.h>\r |
529a5a86 MK |
52 | \r |
53 | #include <AcpiCpuData.h>\r | |
54 | #include <CpuHotPlugData.h>\r | |
55 | \r | |
01acb06c RN |
56 | #include <Register/Intel/Cpuid.h>\r |
57 | #include <Register/Intel/Msr.h>\r | |
529a5a86 MK |
58 | \r |
59 | #include "CpuService.h"\r | |
60 | #include "SmmProfile.h"\r | |
61 | \r | |
3eb69b08 JY |
62 | //\r |
63 | // CET definition\r | |
64 | //\r | |
65 | #define CPUID_CET_SS BIT7\r | |
66 | #define CPUID_CET_IBT BIT20\r | |
67 | \r | |
68 | #define CR4_CET_ENABLE BIT23\r | |
69 | \r | |
70 | #define MSR_IA32_S_CET 0x6A2\r | |
71 | #define MSR_IA32_PL0_SSP 0x6A4\r | |
72 | #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8\r | |
73 | \r | |
74 | typedef union {\r | |
75 | struct {\r | |
76 | // enable shadow stacks\r | |
77 | UINT32 SH_STK_ENP:1;\r | |
78 | // enable the WRSS{D,Q}W instructions.\r | |
79 | UINT32 WR_SHSTK_EN:1;\r | |
80 | // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.\r | |
81 | UINT32 ENDBR_EN:1;\r | |
82 | // enable legacy compatibility treatment for indirect call/jmp tracking.\r | |
83 | UINT32 LEG_IW_EN:1;\r | |
84 | // enable use of no-track prefix on indirect call/jmp.\r | |
85 | UINT32 NO_TRACK_EN:1;\r | |
86 | // disable suppression of CET indirect branch tracking on legacy compatibility.\r | |
87 | UINT32 SUPPRESS_DIS:1;\r | |
88 | UINT32 RSVD:4;\r | |
89 | // indirect branch tracking is suppressed.\r | |
90 | // This bit can be written to 1 only if TRACKER is written as IDLE.\r | |
91 | UINT32 SUPPRESS:1;\r | |
92 | // Value of the endbranch state machine\r | |
93 | // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).\r | |
94 | UINT32 TRACKER:1;\r | |
95 | // linear address of a bitmap in memory indicating valid\r | |
96 | // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled\r | |
97 | // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on\r | |
98 | // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are\r | |
99 | // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address\r | |
100 | // (this automatically aligns the address on a 4-Kbyte boundary).\r | |
101 | UINT32 EB_LEG_BITMAP_BASE_low:12;\r | |
102 | UINT32 EB_LEG_BITMAP_BASE_high:32;\r | |
103 | } Bits;\r | |
104 | UINT64 Uint64;\r | |
105 | } MSR_IA32_CET;\r | |
106 | \r | |
529a5a86 MK |
107 | //\r |
108 | // MSRs required for configuration of SMM Code Access Check\r | |
109 | //\r | |
110 | #define EFI_MSR_SMM_MCA_CAP 0x17D\r | |
111 | #define SMM_CODE_ACCESS_CHK_BIT BIT58\r | |
112 | \r | |
113 | #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0\r | |
114 | #define SMM_CODE_CHK_EN_BIT BIT2\r | |
115 | \r | |
116 | ///\r | |
117 | /// Page Table Entry\r | |
118 | ///\r | |
119 | #define IA32_PG_P BIT0\r | |
120 | #define IA32_PG_RW BIT1\r | |
881520ea | 121 | #define IA32_PG_U BIT2\r |
529a5a86 MK |
122 | #define IA32_PG_WT BIT3\r |
123 | #define IA32_PG_CD BIT4\r | |
124 | #define IA32_PG_A BIT5\r | |
881520ea | 125 | #define IA32_PG_D BIT6\r |
529a5a86 MK |
126 | #define IA32_PG_PS BIT7\r |
127 | #define IA32_PG_PAT_2M BIT12\r | |
128 | #define IA32_PG_PAT_4K IA32_PG_PS\r | |
129 | #define IA32_PG_PMNT BIT62\r | |
130 | #define IA32_PG_NX BIT63\r | |
131 | \r | |
717fb604 | 132 | #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)\r |
881520ea JY |
133 | //\r |
134 | // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE\r | |
135 | // X64 PAE PDPTE does not have such restriction\r | |
136 | //\r | |
137 | #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)\r | |
138 | \r | |
717fb604 JY |
139 | #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)\r |
140 | \r | |
141 | #define PAGING_4K_MASK 0xFFF\r | |
142 | #define PAGING_2M_MASK 0x1FFFFF\r | |
143 | #define PAGING_1G_MASK 0x3FFFFFFF\r | |
144 | \r | |
145 | #define PAGING_PAE_INDEX_MASK 0x1FF\r | |
146 | \r | |
147 | #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull\r | |
148 | #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull\r | |
149 | #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r | |
150 | \r | |
7ed6f781 JF |
151 | #define SMRR_MAX_ADDRESS BASE_4GB\r |
152 | \r | |
717fb604 JY |
153 | typedef enum {\r |
154 | PageNone,\r | |
155 | Page4K,\r | |
156 | Page2M,\r | |
157 | Page1G,\r | |
158 | } PAGE_ATTRIBUTE;\r | |
159 | \r | |
160 | typedef struct {\r | |
161 | PAGE_ATTRIBUTE Attribute;\r | |
162 | UINT64 Length;\r | |
163 | UINT64 AddressMask;\r | |
164 | } PAGE_ATTRIBUTE_TABLE;\r | |
165 | \r | |
529a5a86 MK |
166 | //\r |
167 | // Size of Task-State Segment defined in IA32 Manual\r | |
168 | //\r | |
169 | #define TSS_SIZE 104\r | |
3eb69b08 | 170 | #define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP\r |
529a5a86 MK |
171 | #define TSS_X64_IST1_OFFSET 36\r |
172 | #define TSS_IA32_CR3_OFFSET 28\r | |
173 | #define TSS_IA32_ESP_OFFSET 56\r | |
3eb69b08 | 174 | #define TSS_IA32_SSP_OFFSET 104\r |
529a5a86 | 175 | \r |
717fb604 JY |
176 | #define CR0_WP BIT16\r |
177 | \r | |
529a5a86 MK |
178 | //\r |
179 | // Code select value\r | |
180 | //\r | |
181 | #define PROTECT_MODE_CODE_SEGMENT 0x08\r | |
182 | #define LONG_MODE_CODE_SEGMENT 0x38\r | |
183 | \r | |
184 | //\r | |
185 | // The size 0x20 must be bigger than\r | |
186 | // the size of template code of SmmInit. Currently,\r | |
187 | // the size of SmmInit requires the 0x16 Bytes buffer\r | |
188 | // at least.\r | |
189 | //\r | |
190 | #define BACK_BUF_SIZE 0x20\r | |
191 | \r | |
192 | #define EXCEPTION_VECTOR_NUMBER 0x20\r | |
193 | \r | |
194 | #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL\r | |
195 | \r | |
196 | typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS;\r | |
197 | #define ARRIVAL_EXCEPTION_BLOCKED 0x1\r | |
198 | #define ARRIVAL_EXCEPTION_DELAYED 0x2\r | |
199 | #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4\r | |
200 | \r | |
51dd408a ED |
201 | //\r |
202 | // Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.\r | |
203 | //\r | |
204 | typedef struct {\r | |
205 | EFI_AP_PROCEDURE Procedure;\r | |
206 | VOID *ProcedureArgument;\r | |
207 | } PROCEDURE_WRAPPER;\r | |
208 | \r | |
209 | #define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')\r | |
210 | \r | |
211 | typedef struct {\r | |
212 | UINTN Signature;\r | |
213 | LIST_ENTRY Link;\r | |
214 | \r | |
a457823f ED |
215 | SPIN_LOCK *SpinLock;\r |
216 | volatile UINT32 RunningApCount;\r | |
51dd408a ED |
217 | } PROCEDURE_TOKEN;\r |
218 | \r | |
219 | #define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)\r | |
220 | \r | |
9caaa79d ED |
221 | #define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')\r |
222 | \r | |
223 | typedef struct {\r | |
224 | UINTN Signature;\r | |
225 | LIST_ENTRY Link;\r | |
226 | \r | |
227 | UINT8 *Buffer;\r | |
228 | } TOKEN_BUFFER;\r | |
229 | \r | |
230 | #define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)\r | |
231 | \r | |
529a5a86 MK |
232 | //\r |
233 | // Private structure for the SMM CPU module that is stored in DXE Runtime memory\r | |
234 | // Contains the SMM Configuration Protocols that is produced.\r | |
235 | // Contains a mix of DXE and SMM contents. All the fields must be used properly.\r | |
236 | //\r | |
237 | #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')\r | |
238 | \r | |
239 | typedef struct {\r | |
240 | UINTN Signature;\r | |
241 | \r | |
242 | EFI_HANDLE SmmCpuHandle;\r | |
243 | \r | |
244 | EFI_PROCESSOR_INFORMATION *ProcessorInfo;\r | |
245 | SMM_CPU_OPERATION *Operation;\r | |
246 | UINTN *CpuSaveStateSize;\r | |
247 | VOID **CpuSaveState;\r | |
248 | \r | |
249 | EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];\r | |
250 | EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;\r | |
251 | EFI_SMM_ENTRY_POINT SmmCoreEntry;\r | |
252 | \r | |
253 | EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;\r | |
51dd408a ED |
254 | \r |
255 | PROCEDURE_WRAPPER *ApWrapperFunc;\r | |
256 | LIST_ENTRY TokenList;\r | |
3fdc47c6 | 257 | LIST_ENTRY *FirstFreeToken;\r |
529a5a86 MK |
258 | } SMM_CPU_PRIVATE_DATA;\r |
259 | \r | |
260 | extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;\r | |
261 | extern CPU_HOT_PLUG_DATA mCpuHotPlugData;\r | |
262 | extern UINTN mMaxNumberOfCpus;\r | |
263 | extern UINTN mNumberOfCpus;\r | |
529a5a86 | 264 | extern EFI_SMM_CPU_PROTOCOL mSmmCpu;\r |
51dd408a | 265 | extern EFI_MM_MP_PROTOCOL mSmmMp;\r |
404250c8 | 266 | extern UINTN mInternalCr3;\r |
529a5a86 MK |
267 | \r |
268 | ///\r | |
269 | /// The mode of the CPU at the time an SMI occurs\r | |
270 | ///\r | |
271 | extern UINT8 mSmmSaveStateRegisterLma;\r | |
272 | \r | |
529a5a86 MK |
273 | //\r |
274 | // SMM CPU Protocol function prototypes.\r | |
275 | //\r | |
276 | \r | |
277 | /**\r | |
278 | Read information from the CPU save state.\r | |
279 | \r | |
280 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
281 | @param Width The number of bytes to read from the CPU save state.\r | |
282 | @param Register Specifies the CPU register to read form the save state.\r | |
283 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
284 | @param Buffer Upon return, this holds the CPU register value read from the save state.\r | |
285 | \r | |
286 | @retval EFI_SUCCESS The register was read from Save State\r | |
287 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
ef62da4f | 288 | @retval EFI_INVALID_PARAMETER This or Buffer is NULL.\r |
529a5a86 MK |
289 | \r |
290 | **/\r | |
291 | EFI_STATUS\r | |
292 | EFIAPI\r | |
293 | SmmReadSaveState (\r | |
294 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r | |
295 | IN UINTN Width,\r | |
296 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
297 | IN UINTN CpuIndex,\r | |
298 | OUT VOID *Buffer\r | |
299 | );\r | |
300 | \r | |
301 | /**\r | |
302 | Write data to the CPU save state.\r | |
303 | \r | |
304 | @param This EFI_SMM_CPU_PROTOCOL instance\r | |
305 | @param Width The number of bytes to read from the CPU save state.\r | |
306 | @param Register Specifies the CPU register to write to the save state.\r | |
307 | @param CpuIndex Specifies the zero-based index of the CPU save state\r | |
308 | @param Buffer Upon entry, this holds the new CPU register value.\r | |
309 | \r | |
310 | @retval EFI_SUCCESS The register was written from Save State\r | |
311 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor\r | |
ef62da4f | 312 | @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct\r |
529a5a86 MK |
313 | \r |
314 | **/\r | |
315 | EFI_STATUS\r | |
316 | EFIAPI\r | |
317 | SmmWriteSaveState (\r | |
318 | IN CONST EFI_SMM_CPU_PROTOCOL *This,\r | |
319 | IN UINTN Width,\r | |
320 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
321 | IN UINTN CpuIndex,\r | |
322 | IN CONST VOID *Buffer\r | |
323 | );\r | |
324 | \r | |
325 | /**\r | |
326 | Read a CPU Save State register on the target processor.\r | |
327 | \r | |
328 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
329 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
330 | \r | |
331 | This function supports reading a CPU Save State register in SMBase relocation handler.\r | |
332 | \r | |
333 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
334 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
335 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
336 | @param[out] Buffer Upon return, this holds the CPU register value read from the save state.\r | |
337 | \r | |
338 | @retval EFI_SUCCESS The register was read from Save State.\r | |
339 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
ef62da4f | 340 | @retval EFI_INVALID_PARAMETER This or Buffer is NULL.\r |
529a5a86 MK |
341 | \r |
342 | **/\r | |
343 | EFI_STATUS\r | |
344 | EFIAPI\r | |
345 | ReadSaveStateRegister (\r | |
346 | IN UINTN CpuIndex,\r | |
347 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
348 | IN UINTN Width,\r | |
349 | OUT VOID *Buffer\r | |
350 | );\r | |
351 | \r | |
352 | /**\r | |
353 | Write value to a CPU Save State register on the target processor.\r | |
354 | \r | |
355 | This function abstracts the differences that whether the CPU Save State register is in the\r | |
356 | IA32 CPU Save State Map or X64 CPU Save State Map.\r | |
357 | \r | |
358 | This function supports writing a CPU Save State register in SMBase relocation handler.\r | |
359 | \r | |
360 | @param[in] CpuIndex Specifies the zero-based index of the CPU save state.\r | |
361 | @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.\r | |
362 | @param[in] Width The number of bytes to read from the CPU save state.\r | |
363 | @param[in] Buffer Upon entry, this holds the new CPU register value.\r | |
364 | \r | |
365 | @retval EFI_SUCCESS The register was written to Save State.\r | |
366 | @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.\r | |
ef62da4f | 367 | @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.\r |
529a5a86 MK |
368 | \r |
369 | **/\r | |
370 | EFI_STATUS\r | |
371 | EFIAPI\r | |
372 | WriteSaveStateRegister (\r | |
373 | IN UINTN CpuIndex,\r | |
374 | IN EFI_SMM_SAVE_STATE_REGISTER Register,\r | |
375 | IN UINTN Width,\r | |
376 | IN CONST VOID *Buffer\r | |
377 | );\r | |
378 | \r | |
529a5a86 MK |
379 | extern CONST UINT8 gcSmmInitTemplate[];\r |
380 | extern CONST UINT16 gcSmmInitSize;\r | |
f0053e83 LE |
381 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;\r |
382 | extern UINT32 mSmmCr0;\r | |
6b0841c1 | 383 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;\r |
351b49c1 LE |
384 | extern UINT32 mSmmCr4;\r |
385 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;\r | |
5830d2c3 | 386 | X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;\r |
3eb69b08 JY |
387 | X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;\r |
388 | extern BOOLEAN mCetSupported;\r | |
529a5a86 MK |
389 | \r |
390 | /**\r | |
391 | Semaphore operation for all processor relocate SMMBase.\r | |
392 | **/\r | |
393 | VOID\r | |
394 | EFIAPI\r | |
395 | SmmRelocationSemaphoreComplete (\r | |
396 | VOID\r | |
397 | );\r | |
398 | \r | |
399 | ///\r | |
400 | /// The type of SMM CPU Information\r | |
401 | ///\r | |
402 | typedef struct {\r | |
ed3d5ecb | 403 | SPIN_LOCK *Busy;\r |
51dd408a | 404 | volatile EFI_AP_PROCEDURE2 Procedure;\r |
529a5a86 | 405 | volatile VOID *Parameter;\r |
ed3d5ecb JF |
406 | volatile UINT32 *Run;\r |
407 | volatile BOOLEAN *Present;\r | |
a457823f | 408 | PROCEDURE_TOKEN *Token;\r |
51dd408a | 409 | EFI_STATUS *Status;\r |
529a5a86 MK |
410 | } SMM_CPU_DATA_BLOCK;\r |
411 | \r | |
412 | typedef enum {\r | |
413 | SmmCpuSyncModeTradition,\r | |
414 | SmmCpuSyncModeRelaxedAp,\r | |
415 | SmmCpuSyncModeMax\r | |
416 | } SMM_CPU_SYNC_MODE;\r | |
417 | \r | |
418 | typedef struct {\r | |
419 | //\r | |
420 | // Pointer to an array. The array should be located immediately after this structure\r | |
421 | // so that UC cache-ability can be set together.\r | |
422 | //\r | |
423 | SMM_CPU_DATA_BLOCK *CpuData;\r | |
fe3a75bc | 424 | volatile UINT32 *Counter;\r |
529a5a86 | 425 | volatile UINT32 BspIndex;\r |
fe3a75bc JF |
426 | volatile BOOLEAN *InsideSmm;\r |
427 | volatile BOOLEAN *AllCpusInSync;\r | |
529a5a86 MK |
428 | volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;\r |
429 | volatile BOOLEAN SwitchBsp;\r | |
430 | volatile BOOLEAN *CandidateBsp;\r | |
51dd408a ED |
431 | EFI_AP_PROCEDURE StartupProcedure;\r |
432 | VOID *StartupProcArgs;\r | |
529a5a86 MK |
433 | } SMM_DISPATCHER_MP_SYNC_DATA;\r |
434 | \r | |
529a5a86 MK |
435 | #define SMM_PSD_OFFSET 0xfb00\r |
436 | \r | |
1d648531 JF |
437 | ///\r |
438 | /// All global semaphores' pointer\r | |
439 | ///\r | |
440 | typedef struct {\r | |
441 | volatile UINT32 *Counter;\r | |
442 | volatile BOOLEAN *InsideSmm;\r | |
443 | volatile BOOLEAN *AllCpusInSync;\r | |
444 | SPIN_LOCK *PFLock;\r | |
445 | SPIN_LOCK *CodeAccessCheckLock;\r | |
446 | } SMM_CPU_SEMAPHORE_GLOBAL;\r | |
447 | \r | |
4e920581 JF |
448 | ///\r |
449 | /// All semaphores for each processor\r | |
450 | ///\r | |
451 | typedef struct {\r | |
452 | SPIN_LOCK *Busy;\r | |
453 | volatile UINT32 *Run;\r | |
454 | volatile BOOLEAN *Present;\r | |
51dd408a | 455 | SPIN_LOCK *Token;\r |
4e920581 JF |
456 | } SMM_CPU_SEMAPHORE_CPU;\r |
457 | \r | |
1d648531 JF |
458 | ///\r |
459 | /// All semaphores' information\r | |
460 | ///\r | |
461 | typedef struct {\r | |
462 | SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;\r | |
4e920581 | 463 | SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;\r |
1d648531 JF |
464 | } SMM_CPU_SEMAPHORES;\r |
465 | \r | |
529a5a86 | 466 | extern IA32_DESCRIPTOR gcSmiGdtr;\r |
717fb604 JY |
467 | extern EFI_PHYSICAL_ADDRESS mGdtBuffer;\r |
468 | extern UINTN mGdtBufferSize;\r | |
529a5a86 MK |
469 | extern IA32_DESCRIPTOR gcSmiIdtr;\r |
470 | extern VOID *gcSmiIdtrPtr;\r | |
529a5a86 | 471 | extern UINT64 gPhyMask;\r |
529a5a86 | 472 | extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;\r |
529a5a86 MK |
473 | extern UINTN mSmmStackArrayBase;\r |
474 | extern UINTN mSmmStackArrayEnd;\r | |
475 | extern UINTN mSmmStackSize;\r | |
476 | extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;\r | |
477 | extern IA32_DESCRIPTOR gcSmiInitGdtr;\r | |
dc99315b JF |
478 | extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;\r |
479 | extern UINTN mSemaphoreSize;\r | |
fe3a75bc JF |
480 | extern SPIN_LOCK *mPFLock;\r |
481 | extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;\r | |
7ed6f781 JF |
482 | extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;\r |
483 | extern UINTN mSmmCpuSmramRangeCount;\r | |
714c2603 | 484 | extern UINT8 mPhysicalAddressBits;\r |
529a5a86 | 485 | \r |
241f9149 LD |
486 | //\r |
487 | // Copy of the PcdPteMemoryEncryptionAddressOrMask\r | |
488 | //\r | |
489 | extern UINT64 mAddressEncMask;\r | |
490 | \r | |
529a5a86 MK |
491 | /**\r |
492 | Create 4G PageTable in SMRAM.\r | |
493 | \r | |
717fb604 | 494 | @param[in] Is32BitPageTable Whether the page table is 32-bit PAE\r |
529a5a86 MK |
495 | @return PageTable Address\r |
496 | \r | |
497 | **/\r | |
498 | UINT32\r | |
499 | Gen4GPageTable (\r | |
881520ea | 500 | IN BOOLEAN Is32BitPageTable\r |
529a5a86 MK |
501 | );\r |
502 | \r | |
503 | \r | |
504 | /**\r | |
505 | Initialize global data for MP synchronization.\r | |
506 | \r | |
3eb69b08 JY |
507 | @param Stacks Base address of SMI stack buffer for all processors.\r |
508 | @param StackSize Stack size for each processor in SMM.\r | |
509 | @param ShadowStackSize Shadow Stack size for each processor in SMM.\r | |
529a5a86 MK |
510 | \r |
511 | **/\r | |
512 | UINT32\r | |
513 | InitializeMpServiceData (\r | |
514 | IN VOID *Stacks,\r | |
3eb69b08 JY |
515 | IN UINTN StackSize,\r |
516 | IN UINTN ShadowStackSize\r | |
529a5a86 MK |
517 | );\r |
518 | \r | |
519 | /**\r | |
520 | Initialize Timer for SMM AP Sync.\r | |
521 | \r | |
522 | **/\r | |
523 | VOID\r | |
524 | InitializeSmmTimer (\r | |
525 | VOID\r | |
526 | );\r | |
527 | \r | |
528 | /**\r | |
529 | Start Timer for SMM AP Sync.\r | |
530 | \r | |
531 | **/\r | |
532 | UINT64\r | |
533 | EFIAPI\r | |
534 | StartSyncTimer (\r | |
535 | VOID\r | |
536 | );\r | |
537 | \r | |
538 | /**\r | |
539 | Check if the SMM AP Sync timer is timeout.\r | |
540 | \r | |
541 | @param Timer The start timer from the begin.\r | |
542 | \r | |
543 | **/\r | |
544 | BOOLEAN\r | |
545 | EFIAPI\r | |
546 | IsSyncTimerTimeout (\r | |
547 | IN UINT64 Timer\r | |
548 | );\r | |
549 | \r | |
550 | /**\r | |
551 | Initialize IDT for SMM Stack Guard.\r | |
552 | \r | |
553 | **/\r | |
554 | VOID\r | |
555 | EFIAPI\r | |
556 | InitializeIDTSmmStackGuard (\r | |
557 | VOID\r | |
558 | );\r | |
559 | \r | |
fe5f1949 JY |
560 | /**\r |
561 | Initialize Gdt for all processors.\r | |
717fb604 | 562 | \r |
fe5f1949 JY |
563 | @param[in] Cr3 CR3 value.\r |
564 | @param[out] GdtStepSize The step size for GDT table.\r | |
565 | \r | |
566 | @return GdtBase for processor 0.\r | |
567 | GdtBase for processor X is: GdtBase + (GdtStepSize * X)\r | |
568 | **/\r | |
569 | VOID *\r | |
570 | InitGdt (\r | |
571 | IN UINTN Cr3,\r | |
572 | OUT UINTN *GdtStepSize\r | |
573 | );\r | |
574 | \r | |
529a5a86 MK |
575 | /**\r |
576 | \r | |
577 | Register the SMM Foundation entry point.\r | |
578 | \r | |
579 | @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance\r | |
580 | @param SmmEntryPoint SMM Foundation EntryPoint\r | |
581 | \r | |
582 | @retval EFI_SUCCESS Successfully to register SMM foundation entry point\r | |
583 | \r | |
584 | **/\r | |
585 | EFI_STATUS\r | |
586 | EFIAPI\r | |
587 | RegisterSmmEntry (\r | |
588 | IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,\r | |
589 | IN EFI_SMM_ENTRY_POINT SmmEntryPoint\r | |
590 | );\r | |
591 | \r | |
592 | /**\r | |
593 | Create PageTable for SMM use.\r | |
594 | \r | |
595 | @return PageTable Address\r | |
596 | \r | |
597 | **/\r | |
598 | UINT32\r | |
599 | SmmInitPageTable (\r | |
600 | VOID\r | |
601 | );\r | |
602 | \r | |
603 | /**\r | |
604 | Schedule a procedure to run on the specified CPU.\r | |
605 | \r | |
606 | @param Procedure The address of the procedure to run\r | |
607 | @param CpuIndex Target CPU number\r | |
608 | @param ProcArguments The parameter to pass to the procedure\r | |
609 | \r | |
610 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
611 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
612 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
613 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
614 | @retval EFI_SUCCESS - The procedure has been successfully scheduled\r | |
615 | \r | |
616 | **/\r | |
617 | EFI_STATUS\r | |
618 | EFIAPI\r | |
619 | SmmStartupThisAp (\r | |
620 | IN EFI_AP_PROCEDURE Procedure,\r | |
621 | IN UINTN CpuIndex,\r | |
622 | IN OUT VOID *ProcArguments OPTIONAL\r | |
623 | );\r | |
624 | \r | |
625 | /**\r | |
626 | Schedule a procedure to run on the specified CPU in a blocking fashion.\r | |
627 | \r | |
628 | @param Procedure The address of the procedure to run\r | |
629 | @param CpuIndex Target CPU Index\r | |
630 | @param ProcArguments The parameter to pass to the procedure\r | |
631 | \r | |
632 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
633 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
634 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
635 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
636 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
637 | \r | |
638 | **/\r | |
639 | EFI_STATUS\r | |
640 | EFIAPI\r | |
641 | SmmBlockingStartupThisAp (\r | |
642 | IN EFI_AP_PROCEDURE Procedure,\r | |
643 | IN UINTN CpuIndex,\r | |
644 | IN OUT VOID *ProcArguments OPTIONAL\r | |
645 | );\r | |
646 | \r | |
e4435f71 JY |
647 | /**\r |
648 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
649 | Length from their current attributes to the attributes specified by Attributes.\r | |
650 | \r | |
651 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
652 | @param[in] Length The size in bytes of the memory region.\r | |
653 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
654 | \r | |
655 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
656 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
657 | BaseAddress and Length cannot be modified.\r | |
658 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
659 | Attributes specified an illegal combination of attributes that\r | |
660 | cannot be set together.\r | |
661 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
662 | the memory resource range.\r | |
663 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
664 | resource range specified by BaseAddress and Length.\r | |
665 | The bit mask of attributes is not support for the memory resource\r | |
666 | range specified by BaseAddress and Length.\r | |
667 | \r | |
668 | **/\r | |
669 | EFI_STATUS\r | |
670 | EFIAPI\r | |
671 | SmmSetMemoryAttributes (\r | |
672 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
673 | IN UINT64 Length,\r | |
674 | IN UINT64 Attributes\r | |
675 | );\r | |
676 | \r | |
677 | /**\r | |
678 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
679 | Length from their current attributes to the attributes specified by Attributes.\r | |
680 | \r | |
681 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
682 | @param[in] Length The size in bytes of the memory region.\r | |
683 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
684 | \r | |
685 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
686 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
687 | BaseAddress and Length cannot be modified.\r | |
688 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
689 | Attributes specified an illegal combination of attributes that\r | |
690 | cannot be set together.\r | |
691 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
692 | the memory resource range.\r | |
693 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
694 | resource range specified by BaseAddress and Length.\r | |
695 | The bit mask of attributes is not support for the memory resource\r | |
696 | range specified by BaseAddress and Length.\r | |
697 | \r | |
698 | **/\r | |
699 | EFI_STATUS\r | |
700 | EFIAPI\r | |
701 | SmmClearMemoryAttributes (\r | |
702 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
703 | IN UINT64 Length,\r | |
704 | IN UINT64 Attributes\r | |
705 | );\r | |
706 | \r | |
529a5a86 MK |
707 | /**\r |
708 | Initialize MP synchronization data.\r | |
709 | \r | |
710 | **/\r | |
711 | VOID\r | |
712 | EFIAPI\r | |
713 | InitializeMpSyncData (\r | |
714 | VOID\r | |
715 | );\r | |
716 | \r | |
717 | /**\r | |
718 | \r | |
719 | Find out SMRAM information including SMRR base and SMRR size.\r | |
720 | \r | |
721 | @param SmrrBase SMRR base\r | |
722 | @param SmrrSize SMRR size\r | |
723 | \r | |
724 | **/\r | |
725 | VOID\r | |
726 | FindSmramInfo (\r | |
727 | OUT UINT32 *SmrrBase,\r | |
728 | OUT UINT32 *SmrrSize\r | |
729 | );\r | |
730 | \r | |
731 | /**\r | |
0bdc9e75 | 732 | Relocate SmmBases for each processor.\r |
529a5a86 | 733 | \r |
0bdc9e75 | 734 | Execute on first boot and all S3 resumes\r |
529a5a86 MK |
735 | \r |
736 | **/\r | |
737 | VOID\r | |
0bdc9e75 SZ |
738 | EFIAPI\r |
739 | SmmRelocateBases (\r | |
529a5a86 MK |
740 | VOID\r |
741 | );\r | |
742 | \r | |
743 | /**\r | |
744 | Page Fault handler for SMM use.\r | |
745 | \r | |
746 | @param InterruptType Defines the type of interrupt or exception that\r | |
747 | occurred on the processor.This parameter is processor architecture specific.\r | |
748 | @param SystemContext A pointer to the processor context when\r | |
749 | the interrupt occurred on the processor.\r | |
750 | **/\r | |
751 | VOID\r | |
752 | EFIAPI\r | |
753 | SmiPFHandler (\r | |
b8caae19 JF |
754 | IN EFI_EXCEPTION_TYPE InterruptType,\r |
755 | IN EFI_SYSTEM_CONTEXT SystemContext\r | |
529a5a86 MK |
756 | );\r |
757 | \r | |
758 | /**\r | |
759 | Perform the remaining tasks.\r | |
760 | \r | |
761 | **/\r | |
762 | VOID\r | |
763 | PerformRemainingTasks (\r | |
764 | VOID\r | |
765 | );\r | |
766 | \r | |
9f419739 JY |
767 | /**\r |
768 | Perform the pre tasks.\r | |
769 | \r | |
770 | **/\r | |
771 | VOID\r | |
772 | PerformPreTasks (\r | |
773 | VOID\r | |
774 | );\r | |
775 | \r | |
529a5a86 MK |
776 | /**\r |
777 | Initialize MSR spin lock by MSR index.\r | |
778 | \r | |
779 | @param MsrIndex MSR index value.\r | |
780 | \r | |
781 | **/\r | |
782 | VOID\r | |
783 | InitMsrSpinLockByIndex (\r | |
784 | IN UINT32 MsrIndex\r | |
785 | );\r | |
786 | \r | |
787 | /**\r | |
788 | Hook return address of SMM Save State so that semaphore code\r | |
789 | can be executed immediately after AP exits SMM to indicate to\r | |
790 | the BSP that an AP has exited SMM after SMBASE relocation.\r | |
791 | \r | |
792 | @param[in] CpuIndex The processor index.\r | |
793 | @param[in] RebasedFlag A pointer to a flag that is set to TRUE\r | |
794 | immediately after AP exits SMM.\r | |
795 | \r | |
796 | **/\r | |
797 | VOID\r | |
798 | SemaphoreHook (\r | |
799 | IN UINTN CpuIndex,\r | |
800 | IN volatile BOOLEAN *RebasedFlag\r | |
801 | );\r | |
802 | \r | |
803 | /**\r | |
804 | Configure SMM Code Access Check feature for all processors.\r | |
805 | SMM Feature Control MSR will be locked after configuration.\r | |
806 | **/\r | |
807 | VOID\r | |
808 | ConfigSmmCodeAccessCheck (\r | |
809 | VOID\r | |
810 | );\r | |
811 | \r | |
812 | /**\r | |
813 | Hook the code executed immediately after an RSM instruction on the currently\r | |
814 | executing CPU. The mode of code executed immediately after RSM must be\r | |
815 | detected, and the appropriate hook must be selected. Always clear the auto\r | |
816 | HALT restart flag if it is set.\r | |
817 | \r | |
818 | @param[in] CpuIndex The processor index for the currently\r | |
819 | executing CPU.\r | |
820 | @param[in] CpuState Pointer to SMRAM Save State Map for the\r | |
821 | currently executing CPU.\r | |
822 | @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to\r | |
823 | 32-bit mode from 64-bit SMM.\r | |
824 | @param[in] NewInstructionPointer Instruction pointer to use if resuming to\r | |
825 | same mode as SMM.\r | |
826 | \r | |
827 | @retval The value of the original instruction pointer before it was hooked.\r | |
828 | \r | |
829 | **/\r | |
830 | UINT64\r | |
831 | EFIAPI\r | |
832 | HookReturnFromSmm (\r | |
833 | IN UINTN CpuIndex,\r | |
834 | SMRAM_SAVE_STATE_MAP *CpuState,\r | |
835 | UINT64 NewInstructionPointer32,\r | |
836 | UINT64 NewInstructionPointer\r | |
837 | );\r | |
838 | \r | |
839 | /**\r | |
840 | Get the size of the SMI Handler in bytes.\r | |
841 | \r | |
842 | @retval The size, in bytes, of the SMI Handler.\r | |
843 | \r | |
844 | **/\r | |
845 | UINTN\r | |
846 | EFIAPI\r | |
847 | GetSmiHandlerSize (\r | |
848 | VOID\r | |
849 | );\r | |
850 | \r | |
851 | /**\r | |
852 | Install the SMI handler for the CPU specified by CpuIndex. This function\r | |
853 | is called by the CPU that was elected as monarch during System Management\r | |
854 | Mode initialization.\r | |
855 | \r | |
856 | @param[in] CpuIndex The index of the CPU to install the custom SMI handler.\r | |
857 | The value must be between 0 and the NumberOfCpus field\r | |
858 | in the System Management System Table (SMST).\r | |
859 | @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.\r | |
860 | @param[in] SmiStack The stack to use when an SMI is processed by the\r | |
861 | the CPU specified by CpuIndex.\r | |
862 | @param[in] StackSize The size, in bytes, if the stack used when an SMI is\r | |
863 | processed by the CPU specified by CpuIndex.\r | |
864 | @param[in] GdtBase The base address of the GDT to use when an SMI is\r | |
865 | processed by the CPU specified by CpuIndex.\r | |
866 | @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is\r | |
867 | processed by the CPU specified by CpuIndex.\r | |
868 | @param[in] IdtBase The base address of the IDT to use when an SMI is\r | |
869 | processed by the CPU specified by CpuIndex.\r | |
870 | @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is\r | |
871 | processed by the CPU specified by CpuIndex.\r | |
872 | @param[in] Cr3 The base address of the page tables to use when an SMI\r | |
873 | is processed by the CPU specified by CpuIndex.\r | |
874 | **/\r | |
875 | VOID\r | |
876 | EFIAPI\r | |
877 | InstallSmiHandler (\r | |
878 | IN UINTN CpuIndex,\r | |
879 | IN UINT32 SmBase,\r | |
880 | IN VOID *SmiStack,\r | |
881 | IN UINTN StackSize,\r | |
882 | IN UINTN GdtBase,\r | |
883 | IN UINTN GdtSize,\r | |
884 | IN UINTN IdtBase,\r | |
885 | IN UINTN IdtSize,\r | |
886 | IN UINT32 Cr3\r | |
887 | );\r | |
888 | \r | |
889 | /**\r | |
890 | Search module name by input IP address and output it.\r | |
891 | \r | |
892 | @param CallerIpAddress Caller instruction pointer.\r | |
893 | \r | |
894 | **/\r | |
895 | VOID\r | |
896 | DumpModuleInfoByIp (\r | |
897 | IN UINTN CallerIpAddress\r | |
898 | );\r | |
21c17193 | 899 | \r |
717fb604 JY |
900 | /**\r |
901 | This function sets memory attribute according to MemoryAttributesTable.\r | |
902 | **/\r | |
903 | VOID\r | |
904 | SetMemMapAttributes (\r | |
905 | VOID\r | |
906 | );\r | |
907 | \r | |
d2fc7711 JY |
908 | /**\r |
909 | This function sets UEFI memory attribute according to UEFI memory map.\r | |
910 | **/\r | |
911 | VOID\r | |
912 | SetUefiMemMapAttributes (\r | |
913 | VOID\r | |
914 | );\r | |
915 | \r | |
916 | /**\r | |
917 | Return if the Address is forbidden as SMM communication buffer.\r | |
918 | \r | |
919 | @param[in] Address the address to be checked\r | |
920 | \r | |
921 | @return TRUE The address is forbidden as SMM communication buffer.\r | |
922 | @return FALSE The address is allowed as SMM communication buffer.\r | |
923 | **/\r | |
924 | BOOLEAN\r | |
925 | IsSmmCommBufferForbiddenAddress (\r | |
926 | IN UINT64 Address\r | |
927 | );\r | |
928 | \r | |
929 | /**\r | |
930 | This function caches the UEFI memory map information.\r | |
931 | **/\r | |
932 | VOID\r | |
933 | GetUefiMemoryMap (\r | |
934 | VOID\r | |
935 | );\r | |
936 | \r | |
717fb604 JY |
937 | /**\r |
938 | This function sets memory attribute for page table.\r | |
939 | **/\r | |
940 | VOID\r | |
941 | SetPageTableAttributes (\r | |
942 | VOID\r | |
943 | );\r | |
944 | \r | |
945 | /**\r | |
404250c8 | 946 | Get page table base address and the depth of the page table.\r |
717fb604 | 947 | \r |
404250c8 SW |
948 | @param[out] Base Page table base address.\r |
949 | @param[out] FiveLevels TRUE means 5 level paging. FALSE means 4 level paging.\r | |
717fb604 | 950 | **/\r |
404250c8 SW |
951 | VOID\r |
952 | GetPageTable (\r | |
953 | OUT UINTN *Base,\r | |
954 | OUT BOOLEAN *FiveLevels OPTIONAL\r | |
717fb604 JY |
955 | );\r |
956 | \r | |
957 | /**\r | |
958 | This function sets the attributes for the memory region specified by BaseAddress and\r | |
959 | Length from their current attributes to the attributes specified by Attributes.\r | |
960 | \r | |
961 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
962 | @param[in] Length The size in bytes of the memory region.\r | |
963 | @param[in] Attributes The bit mask of attributes to set for the memory region.\r | |
964 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
965 | \r | |
966 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
967 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
968 | BaseAddress and Length cannot be modified.\r | |
969 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
970 | Attributes specified an illegal combination of attributes that\r | |
971 | cannot be set together.\r | |
972 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
973 | the memory resource range.\r | |
974 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
975 | resource range specified by BaseAddress and Length.\r | |
976 | The bit mask of attributes is not support for the memory resource\r | |
977 | range specified by BaseAddress and Length.\r | |
978 | \r | |
979 | **/\r | |
980 | EFI_STATUS\r | |
981 | EFIAPI\r | |
982 | SmmSetMemoryAttributesEx (\r | |
983 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
984 | IN UINT64 Length,\r | |
985 | IN UINT64 Attributes,\r | |
986 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
987 | );\r | |
988 | \r | |
989 | /**\r | |
990 | This function clears the attributes for the memory region specified by BaseAddress and\r | |
991 | Length from their current attributes to the attributes specified by Attributes.\r | |
992 | \r | |
993 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
994 | @param[in] Length The size in bytes of the memory region.\r | |
995 | @param[in] Attributes The bit mask of attributes to clear for the memory region.\r | |
996 | @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.\r | |
997 | \r | |
998 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r | |
999 | @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by\r | |
1000 | BaseAddress and Length cannot be modified.\r | |
1001 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
1002 | Attributes specified an illegal combination of attributes that\r | |
1003 | cannot be set together.\r | |
1004 | @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of\r | |
1005 | the memory resource range.\r | |
1006 | @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory\r | |
1007 | resource range specified by BaseAddress and Length.\r | |
1008 | The bit mask of attributes is not support for the memory resource\r | |
1009 | range specified by BaseAddress and Length.\r | |
1010 | \r | |
1011 | **/\r | |
1012 | EFI_STATUS\r | |
1013 | EFIAPI\r | |
1014 | SmmClearMemoryAttributesEx (\r | |
1015 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1016 | IN UINT64 Length,\r | |
1017 | IN UINT64 Attributes,\r | |
1018 | OUT BOOLEAN *IsSplitted OPTIONAL\r | |
1019 | );\r | |
1020 | \r | |
21c17193 JY |
1021 | /**\r |
1022 | This API provides a way to allocate memory for page table.\r | |
1023 | \r | |
1024 | This API can be called more once to allocate memory for page tables.\r | |
1025 | \r | |
1026 | Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r | |
1027 | allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r | |
1028 | is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r | |
1029 | returned.\r | |
1030 | \r | |
1031 | @param Pages The number of 4 KB pages to allocate.\r | |
1032 | \r | |
1033 | @return A pointer to the allocated buffer or NULL if allocation fails.\r | |
1034 | \r | |
1035 | **/\r | |
1036 | VOID *\r | |
1037 | AllocatePageTableMemory (\r | |
1038 | IN UINTN Pages\r | |
1039 | );\r | |
1040 | \r | |
717fb604 JY |
1041 | /**\r |
1042 | Allocate pages for code.\r | |
1043 | \r | |
1044 | @param[in] Pages Number of pages to be allocated.\r | |
1045 | \r | |
1046 | @return Allocated memory.\r | |
1047 | **/\r | |
1048 | VOID *\r | |
1049 | AllocateCodePages (\r | |
1050 | IN UINTN Pages\r | |
1051 | );\r | |
1052 | \r | |
1053 | /**\r | |
1054 | Allocate aligned pages for code.\r | |
1055 | \r | |
1056 | @param[in] Pages Number of pages to be allocated.\r | |
1057 | @param[in] Alignment The requested alignment of the allocation.\r | |
1058 | Must be a power of two.\r | |
1059 | If Alignment is zero, then byte alignment is used.\r | |
1060 | \r | |
1061 | @return Allocated memory.\r | |
1062 | **/\r | |
1063 | VOID *\r | |
1064 | AllocateAlignedCodePages (\r | |
1065 | IN UINTN Pages,\r | |
1066 | IN UINTN Alignment\r | |
1067 | );\r | |
1068 | \r | |
0bdc9e75 SZ |
1069 | \r |
1070 | //\r | |
1071 | // S3 related global variable and function prototype.\r | |
1072 | //\r | |
1073 | \r | |
1074 | extern BOOLEAN mSmmS3Flag;\r | |
1075 | \r | |
1076 | /**\r | |
1077 | Initialize SMM S3 resume state structure used during S3 Resume.\r | |
1078 | \r | |
1079 | @param[in] Cr3 The base address of the page tables to use in SMM.\r | |
1080 | \r | |
1081 | **/\r | |
1082 | VOID\r | |
1083 | InitSmmS3ResumeState (\r | |
1084 | IN UINT32 Cr3\r | |
1085 | );\r | |
1086 | \r | |
1087 | /**\r | |
1088 | Get ACPI CPU data.\r | |
1089 | \r | |
1090 | **/\r | |
1091 | VOID\r | |
1092 | GetAcpiCpuData (\r | |
1093 | VOID\r | |
1094 | );\r | |
1095 | \r | |
1096 | /**\r | |
1097 | Restore SMM Configuration in S3 boot path.\r | |
1098 | \r | |
1099 | **/\r | |
1100 | VOID\r | |
1101 | RestoreSmmConfigurationInS3 (\r | |
1102 | VOID\r | |
1103 | );\r | |
1104 | \r | |
b10d5ddc SZ |
1105 | /**\r |
1106 | Get ACPI S3 enable flag.\r | |
1107 | \r | |
1108 | **/\r | |
1109 | VOID\r | |
1110 | GetAcpiS3EnableFlag (\r | |
1111 | VOID\r | |
1112 | );\r | |
1113 | \r | |
4a0f88dd JF |
1114 | /**\r |
1115 | Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.\r | |
1116 | \r | |
672b80c8 MK |
1117 | @param[in] ApHltLoopCode The address of the safe hlt-loop function.\r |
1118 | @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.\r | |
1119 | @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.\r | |
4a0f88dd JF |
1120 | \r |
1121 | **/\r | |
1122 | VOID\r | |
1123 | TransferApToSafeState (\r | |
672b80c8 MK |
1124 | IN UINTN ApHltLoopCode,\r |
1125 | IN UINTN TopOfStack,\r | |
1126 | IN UINTN NumberToFinishAddress\r | |
4a0f88dd JF |
1127 | );\r |
1128 | \r | |
3eb69b08 JY |
1129 | /**\r |
1130 | Set ShadowStack memory.\r | |
1131 | \r | |
1132 | @param[in] Cr3 The page table base address.\r | |
1133 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
1134 | @param[in] Length The size in bytes of the memory region.\r | |
1135 | \r | |
1136 | @retval EFI_SUCCESS The shadow stack memory is set.\r | |
1137 | **/\r | |
1138 | EFI_STATUS\r | |
1139 | SetShadowStack (\r | |
1140 | IN UINTN Cr3,\r | |
1141 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1142 | IN UINT64 Length\r | |
1143 | );\r | |
1144 | \r | |
1145 | /**\r | |
1146 | Set not present memory.\r | |
1147 | \r | |
1148 | @param[in] Cr3 The page table base address.\r | |
1149 | @param[in] BaseAddress The physical address that is the start address of a memory region.\r | |
1150 | @param[in] Length The size in bytes of the memory region.\r | |
1151 | \r | |
1152 | @retval EFI_SUCCESS The not present memory is set.\r | |
1153 | **/\r | |
1154 | EFI_STATUS\r | |
1155 | SetNotPresentPage (\r | |
1156 | IN UINTN Cr3,\r | |
1157 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1158 | IN UINT64 Length\r | |
1159 | );\r | |
1160 | \r | |
1161 | /**\r | |
1162 | Initialize the shadow stack related data structure.\r | |
1163 | \r | |
1164 | @param CpuIndex The index of CPU.\r | |
1165 | @param ShadowStack The bottom of the shadow stack for this CPU.\r | |
1166 | **/\r | |
1167 | VOID\r | |
1168 | InitShadowStack (\r | |
1169 | IN UINTN CpuIndex,\r | |
1170 | IN VOID *ShadowStack\r | |
1171 | );\r | |
1172 | \r | |
827330cc JW |
1173 | /**\r |
1174 | This function set given attributes of the memory region specified by\r | |
1175 | BaseAddress and Length.\r | |
1176 | \r | |
1177 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
1178 | @param BaseAddress The physical address that is the start address of\r | |
1179 | a memory region.\r | |
1180 | @param Length The size in bytes of the memory region.\r | |
1181 | @param Attributes The bit mask of attributes to set for the memory\r | |
1182 | region.\r | |
1183 | \r | |
1184 | @retval EFI_SUCCESS The attributes were set for the memory region.\r | |
1185 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
1186 | Attributes specified an illegal combination of\r | |
1187 | attributes that cannot be set together.\r | |
1188 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
1189 | bytes of the memory resource range specified\r | |
1190 | by BaseAddress and Length.\r | |
aae02dcc | 1191 | The bit mask of attributes is not supported for\r |
827330cc JW |
1192 | the memory resource range specified by\r |
1193 | BaseAddress and Length.\r | |
1194 | \r | |
1195 | **/\r | |
1196 | EFI_STATUS\r | |
1197 | EFIAPI\r | |
1198 | EdkiiSmmSetMemoryAttributes (\r | |
1199 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r | |
1200 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1201 | IN UINT64 Length,\r | |
1202 | IN UINT64 Attributes\r | |
1203 | );\r | |
1204 | \r | |
1205 | /**\r | |
1206 | This function clears given attributes of the memory region specified by\r | |
1207 | BaseAddress and Length.\r | |
1208 | \r | |
1209 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
1210 | @param BaseAddress The physical address that is the start address of\r | |
1211 | a memory region.\r | |
1212 | @param Length The size in bytes of the memory region.\r | |
aae02dcc | 1213 | @param Attributes The bit mask of attributes to clear for the memory\r |
827330cc JW |
1214 | region.\r |
1215 | \r | |
aae02dcc | 1216 | @retval EFI_SUCCESS The attributes were cleared for the memory region.\r |
827330cc JW |
1217 | @retval EFI_INVALID_PARAMETER Length is zero.\r |
1218 | Attributes specified an illegal combination of\r | |
aae02dcc | 1219 | attributes that cannot be cleared together.\r |
827330cc JW |
1220 | @retval EFI_UNSUPPORTED The processor does not support one or more\r |
1221 | bytes of the memory resource range specified\r | |
1222 | by BaseAddress and Length.\r | |
aae02dcc | 1223 | The bit mask of attributes is not supported for\r |
827330cc JW |
1224 | the memory resource range specified by\r |
1225 | BaseAddress and Length.\r | |
1226 | \r | |
1227 | **/\r | |
1228 | EFI_STATUS\r | |
1229 | EFIAPI\r | |
1230 | EdkiiSmmClearMemoryAttributes (\r | |
1231 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r | |
1232 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1233 | IN UINT64 Length,\r | |
1234 | IN UINT64 Attributes\r | |
1235 | );\r | |
1236 | \r | |
1237 | /**\r | |
aae02dcc | 1238 | This function retrieves the attributes of the memory region specified by\r |
827330cc JW |
1239 | BaseAddress and Length. If different attributes are got from different part\r |
1240 | of the memory region, EFI_NO_MAPPING will be returned.\r | |
1241 | \r | |
1242 | @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.\r | |
1243 | @param BaseAddress The physical address that is the start address of\r | |
1244 | a memory region.\r | |
1245 | @param Length The size in bytes of the memory region.\r | |
1246 | @param Attributes Pointer to attributes returned.\r | |
1247 | \r | |
1248 | @retval EFI_SUCCESS The attributes got for the memory region.\r | |
1249 | @retval EFI_INVALID_PARAMETER Length is zero.\r | |
1250 | Attributes is NULL.\r | |
1251 | @retval EFI_NO_MAPPING Attributes are not consistent cross the memory\r | |
1252 | region.\r | |
1253 | @retval EFI_UNSUPPORTED The processor does not support one or more\r | |
1254 | bytes of the memory resource range specified\r | |
1255 | by BaseAddress and Length.\r | |
827330cc JW |
1256 | \r |
1257 | **/\r | |
1258 | EFI_STATUS\r | |
1259 | EFIAPI\r | |
1260 | EdkiiSmmGetMemoryAttributes (\r | |
1261 | IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,\r | |
1262 | IN EFI_PHYSICAL_ADDRESS BaseAddress,\r | |
1263 | IN UINT64 Length,\r | |
1264 | IN UINT64 *Attributes\r | |
1265 | );\r | |
1266 | \r | |
e21e355e LG |
1267 | /**\r |
1268 | This function fixes up the address of the global variable or function\r | |
ef62da4f | 1269 | referred in SmmInit assembly files to be the absolute address.\r |
e21e355e LG |
1270 | **/\r |
1271 | VOID\r | |
1272 | EFIAPI\r | |
1273 | PiSmmCpuSmmInitFixupAddress (\r | |
1274 | );\r | |
1275 | \r | |
1276 | /**\r | |
1277 | This function fixes up the address of the global variable or function\r | |
ef62da4f | 1278 | referred in SmiEntry assembly files to be the absolute address.\r |
e21e355e LG |
1279 | **/\r |
1280 | VOID\r | |
1281 | EFIAPI\r | |
1282 | PiSmmCpuSmiEntryFixupAddress (\r | |
1283 | );\r | |
1284 | \r | |
37f9fea5 VN |
1285 | /**\r |
1286 | This function reads CR2 register when on-demand paging is enabled\r | |
1287 | for 64 bit and no action for 32 bit.\r | |
1288 | \r | |
1289 | @param[out] *Cr2 Pointer to variable to hold CR2 register value.\r | |
1290 | **/\r | |
1291 | VOID\r | |
1292 | SaveCr2 (\r | |
1293 | OUT UINTN *Cr2\r | |
1294 | );\r | |
1295 | \r | |
1296 | /**\r | |
1297 | This function writes into CR2 register when on-demand paging is enabled\r | |
1298 | for 64 bit and no action for 32 bit.\r | |
1299 | \r | |
1300 | @param[in] Cr2 Value to write into CR2 register.\r | |
1301 | **/\r | |
1302 | VOID\r | |
1303 | RestoreCr2 (\r | |
1304 | IN UINTN Cr2\r | |
1305 | );\r | |
1306 | \r | |
51dd408a ED |
1307 | /**\r |
1308 | Schedule a procedure to run on the specified CPU.\r | |
1309 | \r | |
1310 | @param[in] Procedure The address of the procedure to run\r | |
1311 | @param[in] CpuIndex Target CPU Index\r | |
1312 | @param[in,out] ProcArguments The parameter to pass to the procedure\r | |
1313 | @param[in,out] Token This is an optional parameter that allows the caller to execute the\r | |
1314 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
1315 | call is blocking, and the call will not return until the AP has\r | |
1316 | completed the procedure. If the token is not NULL, the call will\r | |
1317 | return immediately. The caller can check whether the procedure has\r | |
1318 | completed with CheckOnProcedure or WaitForProcedure.\r | |
1319 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish\r | |
1320 | execution of Procedure, either for blocking or non-blocking mode.\r | |
1321 | Zero means infinity. If the timeout expires before all APs return\r | |
1322 | from Procedure, then Procedure on the failed APs is terminated. If\r | |
1323 | the timeout expires in blocking mode, the call returns EFI_TIMEOUT.\r | |
1324 | If the timeout expires in non-blocking mode, the timeout determined\r | |
1325 | can be through CheckOnProcedure or WaitForProcedure.\r | |
1326 | Note that timeout support is optional. Whether an implementation\r | |
1327 | supports this feature can be determined via the Attributes data\r | |
1328 | member.\r | |
073f2ced | 1329 | @param[in,out] CpuStatus This optional pointer may be used to get the status code returned\r |
51dd408a ED |
1330 | by Procedure when it completes execution on the target AP, or with\r |
1331 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
1332 | timeout. The implementation will update this variable with\r | |
1333 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
1334 | \r | |
1335 | @retval EFI_INVALID_PARAMETER CpuNumber not valid\r | |
1336 | @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP\r | |
1337 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM\r | |
1338 | @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy\r | |
1339 | @retval EFI_SUCCESS The procedure has been successfully scheduled\r | |
1340 | \r | |
1341 | **/\r | |
1342 | EFI_STATUS\r | |
1343 | InternalSmmStartupThisAp (\r | |
1344 | IN EFI_AP_PROCEDURE2 Procedure,\r | |
1345 | IN UINTN CpuIndex,\r | |
1346 | IN OUT VOID *ProcArguments OPTIONAL,\r | |
5ed4c46f | 1347 | IN OUT MM_COMPLETION *Token,\r |
51dd408a ED |
1348 | IN UINTN TimeoutInMicroseconds,\r |
1349 | IN OUT EFI_STATUS *CpuStatus\r | |
1350 | );\r | |
1351 | \r | |
1352 | /**\r | |
1353 | Checks whether the input token is the current used token.\r | |
1354 | \r | |
1355 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
1356 | BroadcastProcedure.\r | |
1357 | \r | |
1358 | @retval TRUE The input token is the current used token.\r | |
1359 | @retval FALSE The input token is not the current used token.\r | |
1360 | **/\r | |
1361 | BOOLEAN\r | |
1362 | IsTokenInUse (\r | |
1363 | IN SPIN_LOCK *Token\r | |
1364 | );\r | |
1365 | \r | |
1366 | /**\r | |
1367 | Checks status of specified AP.\r | |
1368 | \r | |
1369 | This function checks whether the specified AP has finished the task assigned\r | |
1370 | by StartupThisAP(), and whether timeout expires.\r | |
1371 | \r | |
1372 | @param[in] Token This parameter describes the token that was passed into DispatchProcedure or\r | |
1373 | BroadcastProcedure.\r | |
1374 | \r | |
1375 | @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r | |
1376 | @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r | |
1377 | **/\r | |
1378 | EFI_STATUS\r | |
1379 | IsApReady (\r | |
1380 | IN SPIN_LOCK *Token\r | |
1381 | );\r | |
1382 | \r | |
1383 | /**\r | |
1384 | Check whether it is an present AP.\r | |
1385 | \r | |
1386 | @param CpuIndex The AP index which calls this function.\r | |
1387 | \r | |
1388 | @retval TRUE It's a present AP.\r | |
1389 | @retval TRUE This is not an AP or it is not present.\r | |
1390 | \r | |
1391 | **/\r | |
1392 | BOOLEAN\r | |
1393 | IsPresentAp (\r | |
1394 | IN UINTN CpuIndex\r | |
1395 | );\r | |
1396 | \r | |
1397 | /**\r | |
1398 | Worker function to execute a caller provided function on all enabled APs.\r | |
1399 | \r | |
1400 | @param[in] Procedure A pointer to the function to be run on\r | |
1401 | enabled APs of the system.\r | |
1402 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r | |
1403 | APs to return from Procedure, either for\r | |
1404 | blocking or non-blocking mode.\r | |
5ed4c46f | 1405 | @param[in,out] ProcedureArguments The parameter passed into Procedure for\r |
51dd408a ED |
1406 | all APs.\r |
1407 | @param[in,out] Token This is an optional parameter that allows the caller to execute the\r | |
1408 | procedure in a blocking or non-blocking fashion. If it is NULL the\r | |
1409 | call is blocking, and the call will not return until the AP has\r | |
1410 | completed the procedure. If the token is not NULL, the call will\r | |
1411 | return immediately. The caller can check whether the procedure has\r | |
1412 | completed with CheckOnProcedure or WaitForProcedure.\r | |
1413 | @param[in,out] CPUStatus This optional pointer may be used to get the status code returned\r | |
1414 | by Procedure when it completes execution on the target AP, or with\r | |
1415 | EFI_TIMEOUT if the Procedure fails to complete within the optional\r | |
1416 | timeout. The implementation will update this variable with\r | |
1417 | EFI_NOT_READY prior to starting Procedure on the target AP.\r | |
1418 | \r | |
1419 | @retval EFI_SUCCESS In blocking mode, all APs have finished before\r | |
1420 | the timeout expired.\r | |
1421 | @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r | |
1422 | to all enabled APs.\r | |
1423 | @retval others Failed to Startup all APs.\r | |
1424 | \r | |
1425 | **/\r | |
1426 | EFI_STATUS\r | |
1427 | InternalSmmStartupAllAPs (\r | |
1428 | IN EFI_AP_PROCEDURE2 Procedure,\r | |
1429 | IN UINTN TimeoutInMicroseconds,\r | |
1430 | IN OUT VOID *ProcedureArguments OPTIONAL,\r | |
1431 | IN OUT MM_COMPLETION *Token,\r | |
1432 | IN OUT EFI_STATUS *CPUStatus\r | |
1433 | );\r | |
1434 | \r | |
1435 | /**\r | |
1436 | \r | |
1437 | Register the SMM Foundation entry point.\r | |
1438 | \r | |
1439 | @param[in] Procedure A pointer to the code stream to be run on the designated target AP\r | |
1440 | of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2\r | |
1441 | with the related definitions of\r | |
1442 | EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.\r | |
1443 | If caller may pass a value of NULL to deregister any existing\r | |
1444 | startup procedure.\r | |
1445 | @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is\r | |
1446 | run by the AP. It is an optional common mailbox between APs and\r | |
1447 | the caller to share information\r | |
1448 | \r | |
1449 | @retval EFI_SUCCESS The Procedure has been set successfully.\r | |
1450 | @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.\r | |
1451 | \r | |
1452 | **/\r | |
1453 | EFI_STATUS\r | |
1454 | RegisterStartupProcedure (\r | |
073f2ced SZ |
1455 | IN EFI_AP_PROCEDURE Procedure,\r |
1456 | IN OUT VOID *ProcedureArguments OPTIONAL\r | |
51dd408a ED |
1457 | );\r |
1458 | \r | |
1459 | /**\r | |
1460 | Allocate buffer for SpinLock and Wrapper function buffer.\r | |
1461 | \r | |
1462 | **/\r | |
1463 | VOID\r | |
1464 | InitializeDataForMmMp (\r | |
1465 | VOID\r | |
1466 | );\r | |
1467 | \r | |
79186ddc RN |
1468 | /**\r |
1469 | Return whether access to non-SMRAM is restricted.\r | |
1470 | \r | |
1471 | @retval TRUE Access to non-SMRAM is restricted.\r | |
1472 | @retval FALSE Access to non-SMRAM is not restricted.\r | |
9c33f16f | 1473 | **/\r |
79186ddc RN |
1474 | BOOLEAN\r |
1475 | IsRestrictedMemoryAccess (\r | |
1476 | VOID\r | |
1477 | );\r | |
1478 | \r | |
529a5a86 | 1479 | #endif\r |