]>
Commit | Line | Data |
---|---|---|
327d8e4e AJ |
1 | /* |
2 | * OpenPOWER Palmetto BMC | |
3 | * | |
4 | * Andrew Jeffery <andrew@aj.id.au> | |
5 | * | |
6 | * Copyright 2016 IBM Corp. | |
7 | * | |
8 | * This code is licensed under the GPL version 2 or later. See | |
9 | * the COPYING file in the top-level directory. | |
10 | */ | |
11 | ||
12 | #include "qemu/osdep.h" | |
da34e65c | 13 | #include "qapi/error.h" |
4771d756 | 14 | #include "cpu.h" |
327d8e4e | 15 | #include "exec/address-spaces.h" |
12ec8bd5 | 16 | #include "hw/arm/boot.h" |
fca9ca1b | 17 | #include "hw/arm/aspeed.h" |
00442402 | 18 | #include "hw/arm/aspeed_soc.h" |
327d8e4e | 19 | #include "hw/boards.h" |
93198b6c | 20 | #include "hw/i2c/smbus_eeprom.h" |
044475f3 PMD |
21 | #include "hw/misc/pca9552.h" |
22 | #include "hw/misc/tmp105.h" | |
a27bd6c7 | 23 | #include "hw/qdev-properties.h" |
03dd024f | 24 | #include "qemu/log.h" |
e1ad9bc4 | 25 | #include "sysemu/block-backend.h" |
ece09bee | 26 | #include "sysemu/sysemu.h" |
d769a1da CLG |
27 | #include "hw/loader.h" |
28 | #include "qemu/error-report.h" | |
a9df9622 | 29 | #include "qemu/units.h" |
327d8e4e | 30 | |
74fb1f38 | 31 | static struct arm_boot_info aspeed_board_binfo = { |
b033271f | 32 | .board_id = -1, /* device-tree-only board */ |
327d8e4e AJ |
33 | }; |
34 | ||
ea066d39 | 35 | struct AspeedBoardState { |
ff90606f | 36 | AspeedSoCState soc; |
ad1a9782 | 37 | MemoryRegion ram_container; |
327d8e4e | 38 | MemoryRegion ram; |
ebe31c0a | 39 | MemoryRegion max_ram; |
ea066d39 | 40 | }; |
327d8e4e | 41 | |
ef17f836 | 42 | /* Palmetto hardware value: 0x120CE416 */ |
8da33ef7 CLG |
43 | #define PALMETTO_BMC_HW_STRAP1 ( \ |
44 | SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) | \ | |
45 | SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \ | |
46 | SCU_AST2400_HW_STRAP_ACPI_DIS | \ | |
47 | SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) | \ | |
48 | SCU_HW_STRAP_VGA_CLASS_CODE | \ | |
49 | SCU_HW_STRAP_LPC_RESET_PIN | \ | |
50 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) | \ | |
51 | SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \ | |
52 | SCU_HW_STRAP_SPI_WIDTH | \ | |
53 | SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) | \ | |
54 | SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT)) | |
55 | ||
ef17f836 | 56 | /* AST2500 evb hardware value: 0xF100C2E6 */ |
9a7c1750 CLG |
57 | #define AST2500_EVB_HW_STRAP1 (( \ |
58 | AST2500_HW_STRAP1_DEFAULTS | \ | |
59 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
60 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
61 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
62 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
63 | SCU_HW_STRAP_MAC1_RGMII | \ | |
64 | SCU_HW_STRAP_MAC0_RGMII) & \ | |
65 | ~SCU_HW_STRAP_2ND_BOOT_WDT) | |
66 | ||
ef17f836 CLG |
67 | /* Romulus hardware value: 0xF10AD206 */ |
68 | #define ROMULUS_BMC_HW_STRAP1 ( \ | |
69 | AST2500_HW_STRAP1_DEFAULTS | \ | |
70 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
71 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
72 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
73 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
74 | SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ | |
75 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) | |
76 | ||
aae7a18d AK |
77 | /* Swift hardware value: 0xF11AD206 */ |
78 | #define SWIFT_BMC_HW_STRAP1 ( \ | |
79 | AST2500_HW_STRAP1_DEFAULTS | \ | |
80 | SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE | \ | |
81 | SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE | \ | |
82 | SCU_AST2500_HW_STRAP_UART_DEBUG | \ | |
83 | SCU_AST2500_HW_STRAP_DDR4_ENABLE | \ | |
84 | SCU_H_PLL_BYPASS_EN | \ | |
85 | SCU_AST2500_HW_STRAP_ACPI_ENABLE | \ | |
86 | SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER)) | |
87 | ||
62c2c2eb CLG |
88 | /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ |
89 | #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 | |
90 | ||
ccc2c418 CLG |
91 | /* AST2600 evb hardware value */ |
92 | #define AST2600_EVB_HW_STRAP1 0x000000C0 | |
93 | #define AST2600_EVB_HW_STRAP2 0x00000003 | |
94 | ||
63ceb818 CLG |
95 | /* Tacoma hardware value */ |
96 | #define TACOMA_BMC_HW_STRAP1 0x00000000 | |
97 | #define TACOMA_BMC_HW_STRAP2 0x00000000 | |
98 | ||
ebe31c0a CLG |
99 | /* |
100 | * The max ram region is for firmwares that scan the address space | |
101 | * with load/store to guess how much RAM the SoC has. | |
102 | */ | |
103 | static uint64_t max_ram_read(void *opaque, hwaddr offset, unsigned size) | |
104 | { | |
105 | return 0; | |
106 | } | |
107 | ||
108 | static void max_ram_write(void *opaque, hwaddr offset, uint64_t value, | |
109 | unsigned size) | |
110 | { | |
111 | /* Discard writes */ | |
112 | } | |
113 | ||
114 | static const MemoryRegionOps max_ram_ops = { | |
115 | .read = max_ram_read, | |
116 | .write = max_ram_write, | |
117 | .endianness = DEVICE_NATIVE_ENDIAN, | |
118 | }; | |
119 | ||
d769a1da CLG |
120 | #define FIRMWARE_ADDR 0x0 |
121 | ||
122 | static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size, | |
123 | Error **errp) | |
124 | { | |
125 | BlockBackend *blk = blk_by_legacy_dinfo(dinfo); | |
126 | uint8_t *storage; | |
0c7209be CLG |
127 | int64_t size; |
128 | ||
129 | /* The block backend size should have already been 'validated' by | |
130 | * the creation of the m25p80 object. | |
131 | */ | |
132 | size = blk_getlength(blk); | |
133 | if (size <= 0) { | |
134 | error_setg(errp, "failed to get flash size"); | |
135 | return; | |
136 | } | |
d769a1da | 137 | |
0c7209be CLG |
138 | if (rom_size > size) { |
139 | rom_size = size; | |
d769a1da CLG |
140 | } |
141 | ||
142 | storage = g_new0(uint8_t, rom_size); | |
143 | if (blk_pread(blk, 0, storage, rom_size) < 0) { | |
144 | error_setg(errp, "failed to read the initial flash content"); | |
145 | return; | |
146 | } | |
147 | ||
148 | rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr); | |
149 | g_free(storage); | |
150 | } | |
151 | ||
74fb1f38 | 152 | static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype, |
e1ad9bc4 CLG |
153 | Error **errp) |
154 | { | |
155 | int i ; | |
156 | ||
157 | for (i = 0; i < s->num_cs; ++i) { | |
158 | AspeedSMCFlash *fl = &s->flashes[i]; | |
159 | DriveInfo *dinfo = drive_get_next(IF_MTD); | |
160 | qemu_irq cs_line; | |
161 | ||
e1ad9bc4 CLG |
162 | fl->flash = ssi_create_slave_no_init(s->spi, flashtype); |
163 | if (dinfo) { | |
164 | qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo), | |
165 | errp); | |
166 | } | |
167 | qdev_init_nofail(fl->flash); | |
168 | ||
169 | cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0); | |
170 | sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line); | |
171 | } | |
172 | } | |
173 | ||
baa4732b | 174 | static void aspeed_machine_init(MachineState *machine) |
327d8e4e | 175 | { |
74fb1f38 | 176 | AspeedBoardState *bmc; |
baa4732b | 177 | AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(machine); |
b033271f | 178 | AspeedSoCClass *sc; |
d769a1da | 179 | DriveInfo *drive0 = drive_get(IF_MTD, 0, 0); |
ebe31c0a | 180 | ram_addr_t max_ram_size; |
2bea128c | 181 | int i; |
327d8e4e | 182 | |
74fb1f38 | 183 | bmc = g_new0(AspeedBoardState, 1); |
ad1a9782 CLG |
184 | |
185 | memory_region_init(&bmc->ram_container, NULL, "aspeed-ram-container", | |
186 | UINT32_MAX); | |
187 | ||
1b0ad567 | 188 | object_initialize_child(OBJECT(machine), "soc", &bmc->soc, |
baa4732b | 189 | (sizeof(bmc->soc)), amc->soc_name, &error_abort, |
1b0ad567 | 190 | NULL); |
327d8e4e | 191 | |
b033271f CLG |
192 | sc = ASPEED_SOC_GET_CLASS(&bmc->soc); |
193 | ||
19e9cdf0 MAL |
194 | object_property_set_uint(OBJECT(&bmc->soc), ram_size, "ram-size", |
195 | &error_abort); | |
baa4732b | 196 | object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap1, "hw-strap1", |
87e79af0 | 197 | &error_abort); |
baa4732b | 198 | object_property_set_int(OBJECT(&bmc->soc), amc->hw_strap2, "hw-strap2", |
ccc2c418 | 199 | &error_abort); |
baa4732b | 200 | object_property_set_int(OBJECT(&bmc->soc), amc->num_cs, "num-cs", |
26d5df95 | 201 | &error_abort); |
cc7d44c2 | 202 | object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus", |
ece09bee | 203 | &error_abort); |
c4e1f0b4 CLG |
204 | object_property_set_link(OBJECT(&bmc->soc), OBJECT(&bmc->ram_container), |
205 | "dram", &error_abort); | |
b6e70d1d JS |
206 | if (machine->kernel_filename) { |
207 | /* | |
208 | * When booting with a -kernel command line there is no u-boot | |
209 | * that runs to unlock the SCU. In this case set the default to | |
210 | * be unlocked as the kernel expects | |
211 | */ | |
212 | object_property_set_int(OBJECT(&bmc->soc), ASPEED_SCU_PROT_KEY, | |
213 | "hw-prot-key", &error_abort); | |
214 | } | |
327d8e4e AJ |
215 | object_property_set_bool(OBJECT(&bmc->soc), true, "realized", |
216 | &error_abort); | |
217 | ||
de46f5f4 CLG |
218 | /* |
219 | * Allocate RAM after the memory controller has checked the size | |
220 | * was valid. If not, a default value is used. | |
221 | */ | |
19e9cdf0 MAL |
222 | ram_size = object_property_get_uint(OBJECT(&bmc->soc), "ram-size", |
223 | &error_abort); | |
de46f5f4 CLG |
224 | |
225 | memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size); | |
ad1a9782 | 226 | memory_region_add_subregion(&bmc->ram_container, 0, &bmc->ram); |
d783d1fe | 227 | memory_region_add_subregion(get_system_memory(), |
54ecafb7 | 228 | sc->memmap[ASPEED_SDRAM], |
ad1a9782 | 229 | &bmc->ram_container); |
de46f5f4 | 230 | |
ebe31c0a CLG |
231 | max_ram_size = object_property_get_uint(OBJECT(&bmc->soc), "max-ram-size", |
232 | &error_abort); | |
233 | memory_region_init_io(&bmc->max_ram, NULL, &max_ram_ops, NULL, | |
234 | "max_ram", max_ram_size - ram_size); | |
ad1a9782 | 235 | memory_region_add_subregion(&bmc->ram_container, ram_size, &bmc->max_ram); |
ebe31c0a | 236 | |
baa4732b CLG |
237 | aspeed_board_init_flashes(&bmc->soc.fmc, amc->fmc_model, &error_abort); |
238 | aspeed_board_init_flashes(&bmc->soc.spi[0], amc->spi_model, &error_abort); | |
74fb1f38 | 239 | |
d769a1da CLG |
240 | /* Install first FMC flash content as a boot rom. */ |
241 | if (drive0) { | |
242 | AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0]; | |
243 | MemoryRegion *boot_rom = g_new(MemoryRegion, 1); | |
244 | ||
245 | /* | |
246 | * create a ROM region using the default mapping window size of | |
93bf276d CLG |
247 | * the flash module. The window size is 64MB for the AST2400 |
248 | * SoC and 128MB for the AST2500 SoC, which is twice as big as | |
249 | * needed by the flash modules of the Aspeed machines. | |
d769a1da | 250 | */ |
44cf837d | 251 | memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom", |
d769a1da CLG |
252 | fl->size, &error_abort); |
253 | memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR, | |
254 | boot_rom); | |
255 | write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort); | |
256 | } | |
257 | ||
74fb1f38 | 258 | aspeed_board_binfo.ram_size = ram_size; |
54ecafb7 | 259 | aspeed_board_binfo.loader_start = sc->memmap[ASPEED_SDRAM]; |
ece09bee | 260 | aspeed_board_binfo.nb_cpus = bmc->soc.num_cpus; |
e1ad9bc4 | 261 | |
baa4732b CLG |
262 | if (amc->i2c_init) { |
263 | amc->i2c_init(bmc); | |
2cf6cb50 CLG |
264 | } |
265 | ||
0e2c24c6 | 266 | for (i = 0; i < bmc->soc.sdhci.num_slots; i++) { |
2bea128c EJ |
267 | SDHCIState *sdhci = &bmc->soc.sdhci.slots[i]; |
268 | DriveInfo *dinfo = drive_get_next(IF_SD); | |
269 | BlockBackend *blk; | |
270 | DeviceState *card; | |
271 | ||
272 | blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; | |
273 | card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"), | |
274 | TYPE_SD_CARD); | |
275 | qdev_prop_set_drive(card, "drive", blk, &error_fatal); | |
276 | object_property_set_bool(OBJECT(card), true, "realized", &error_fatal); | |
277 | } | |
278 | ||
2744ece8 | 279 | arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo); |
74fb1f38 | 280 | } |
b033271f | 281 | |
2cf6cb50 CLG |
282 | static void palmetto_bmc_i2c_init(AspeedBoardState *bmc) |
283 | { | |
284 | AspeedSoCState *soc = &bmc->soc; | |
a87e81b9 | 285 | DeviceState *dev; |
3d165f12 | 286 | uint8_t *eeprom_buf = g_malloc0(32 * 1024); |
2cf6cb50 CLG |
287 | |
288 | /* The palmetto platform expects a ds3231 RTC but a ds1338 is | |
289 | * enough to provide basic RTC features. Alarms will be missing */ | |
290 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), "ds1338", 0x68); | |
a87e81b9 | 291 | |
3d165f12 CLG |
292 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 0), 0x50, |
293 | eeprom_buf); | |
294 | ||
a87e81b9 CLG |
295 | /* add a TMP423 temperature sensor */ |
296 | dev = i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 2), | |
297 | "tmp423", 0x4c); | |
298 | object_property_set_int(OBJECT(dev), 31000, "temperature0", &error_abort); | |
299 | object_property_set_int(OBJECT(dev), 28000, "temperature1", &error_abort); | |
300 | object_property_set_int(OBJECT(dev), 20000, "temperature2", &error_abort); | |
301 | object_property_set_int(OBJECT(dev), 110000, "temperature3", &error_abort); | |
2cf6cb50 CLG |
302 | } |
303 | ||
2cf6cb50 CLG |
304 | static void ast2500_evb_i2c_init(AspeedBoardState *bmc) |
305 | { | |
306 | AspeedSoCState *soc = &bmc->soc; | |
3d165f12 CLG |
307 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
308 | ||
309 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), 0x50, | |
310 | eeprom_buf); | |
2cf6cb50 CLG |
311 | |
312 | /* The AST2500 EVB expects a LM75 but a TMP105 is compatible */ | |
044475f3 PMD |
313 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), |
314 | TYPE_TMP105, 0x4d); | |
6c4567c7 CLG |
315 | |
316 | /* The AST2500 EVB does not have an RTC. Let's pretend that one is | |
317 | * plugged on the I2C bus header */ | |
318 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
2cf6cb50 CLG |
319 | } |
320 | ||
ccc2c418 CLG |
321 | static void ast2600_evb_i2c_init(AspeedBoardState *bmc) |
322 | { | |
323 | /* Start with some devices on our I2C busses */ | |
324 | ast2500_evb_i2c_init(bmc); | |
325 | } | |
326 | ||
6c4567c7 CLG |
327 | static void romulus_bmc_i2c_init(AspeedBoardState *bmc) |
328 | { | |
329 | AspeedSoCState *soc = &bmc->soc; | |
330 | ||
331 | /* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is | |
332 | * good enough */ | |
333 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
334 | } | |
335 | ||
aae7a18d AK |
336 | static void swift_bmc_i2c_init(AspeedBoardState *bmc) |
337 | { | |
338 | AspeedSoCState *soc = &bmc->soc; | |
339 | ||
340 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), "pca9552", 0x60); | |
341 | ||
342 | /* The swift board expects a TMP275 but a TMP105 is compatible */ | |
343 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "tmp105", 0x48); | |
344 | /* The swift board expects a pca9551 but a pca9552 is compatible */ | |
345 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 7), "pca9552", 0x60); | |
346 | ||
347 | /* The swift board expects an Epson RX8900 RTC but a ds1338 is compatible */ | |
348 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "ds1338", 0x32); | |
349 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 8), "pca9552", 0x60); | |
350 | ||
351 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "tmp423", 0x4c); | |
352 | /* The swift board expects a pca9539 but a pca9552 is compatible */ | |
353 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), "pca9552", 0x74); | |
354 | ||
355 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "tmp423", 0x4c); | |
356 | /* The swift board expects a pca9539 but a pca9552 is compatible */ | |
357 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 10), "pca9552", | |
358 | 0x74); | |
359 | ||
360 | /* The swift board expects a TMP275 but a TMP105 is compatible */ | |
361 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x48); | |
362 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 12), "tmp105", 0x4a); | |
363 | } | |
364 | ||
62c2c2eb CLG |
365 | static void witherspoon_bmc_i2c_init(AspeedBoardState *bmc) |
366 | { | |
367 | AspeedSoCState *soc = &bmc->soc; | |
3d165f12 | 368 | uint8_t *eeprom_buf = g_malloc0(8 * 1024); |
62c2c2eb | 369 | |
63ceb818 CLG |
370 | /* Bus 3: TODO bmp280@77 */ |
371 | /* Bus 3: TODO max31785@52 */ | |
372 | /* Bus 3: TODO dps310@76 */ | |
044475f3 PMD |
373 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 3), TYPE_PCA9552, |
374 | 0x60); | |
8c9a61d7 | 375 | |
62c2c2eb CLG |
376 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 4), "tmp423", 0x4c); |
377 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 5), "tmp423", 0x4c); | |
378 | ||
379 | /* The Witherspoon expects a TMP275 but a TMP105 is compatible */ | |
044475f3 PMD |
380 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 9), TYPE_TMP105, |
381 | 0x4a); | |
6c4567c7 CLG |
382 | |
383 | /* The witherspoon board expects Epson RX8900 I2C RTC but a ds1338 is | |
384 | * good enough */ | |
385 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); | |
3d165f12 CLG |
386 | |
387 | smbus_eeprom_init_one(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), 0x51, | |
388 | eeprom_buf); | |
044475f3 | 389 | i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), TYPE_PCA9552, |
8c9a61d7 | 390 | 0x60); |
63ceb818 | 391 | /* Bus 11: TODO ucd90160@64 */ |
62c2c2eb CLG |
392 | } |
393 | ||
fca9ca1b | 394 | static void aspeed_machine_class_init(ObjectClass *oc, void *data) |
62c2c2eb CLG |
395 | { |
396 | MachineClass *mc = MACHINE_CLASS(oc); | |
397 | ||
fca9ca1b | 398 | mc->init = aspeed_machine_init; |
ece09bee | 399 | mc->max_cpus = ASPEED_CPUS_NUM; |
62c2c2eb CLG |
400 | mc->no_floppy = 1; |
401 | mc->no_cdrom = 1; | |
402 | mc->no_parallel = 1; | |
403 | } | |
404 | ||
baa4732b CLG |
405 | static void aspeed_machine_palmetto_class_init(ObjectClass *oc, void *data) |
406 | { | |
407 | MachineClass *mc = MACHINE_CLASS(oc); | |
408 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
409 | ||
410 | mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)"; | |
411 | amc->soc_name = "ast2400-a1"; | |
412 | amc->hw_strap1 = PALMETTO_BMC_HW_STRAP1; | |
413 | amc->fmc_model = "n25q256a"; | |
414 | amc->spi_model = "mx25l25635e"; | |
415 | amc->num_cs = 1; | |
416 | amc->i2c_init = palmetto_bmc_i2c_init; | |
417 | mc->default_ram_size = 256 * MiB; | |
418 | }; | |
419 | ||
420 | static void aspeed_machine_ast2500_evb_class_init(ObjectClass *oc, void *data) | |
421 | { | |
422 | MachineClass *mc = MACHINE_CLASS(oc); | |
423 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
424 | ||
425 | mc->desc = "Aspeed AST2500 EVB (ARM1176)"; | |
426 | amc->soc_name = "ast2500-a1"; | |
427 | amc->hw_strap1 = AST2500_EVB_HW_STRAP1; | |
428 | amc->fmc_model = "w25q256"; | |
429 | amc->spi_model = "mx25l25635e"; | |
430 | amc->num_cs = 1; | |
431 | amc->i2c_init = ast2500_evb_i2c_init; | |
432 | mc->default_ram_size = 512 * MiB; | |
433 | }; | |
434 | ||
435 | static void aspeed_machine_romulus_class_init(ObjectClass *oc, void *data) | |
436 | { | |
437 | MachineClass *mc = MACHINE_CLASS(oc); | |
438 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
439 | ||
440 | mc->desc = "OpenPOWER Romulus BMC (ARM1176)"; | |
441 | amc->soc_name = "ast2500-a1"; | |
442 | amc->hw_strap1 = ROMULUS_BMC_HW_STRAP1; | |
443 | amc->fmc_model = "n25q256a"; | |
444 | amc->spi_model = "mx66l1g45g"; | |
445 | amc->num_cs = 2; | |
446 | amc->i2c_init = romulus_bmc_i2c_init; | |
447 | mc->default_ram_size = 512 * MiB; | |
fca9ca1b CLG |
448 | }; |
449 | ||
baa4732b CLG |
450 | static void aspeed_machine_swift_class_init(ObjectClass *oc, void *data) |
451 | { | |
452 | MachineClass *mc = MACHINE_CLASS(oc); | |
453 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
454 | ||
455 | mc->desc = "OpenPOWER Swift BMC (ARM1176)"; | |
456 | amc->soc_name = "ast2500-a1"; | |
457 | amc->hw_strap1 = SWIFT_BMC_HW_STRAP1; | |
458 | amc->fmc_model = "mx66l1g45g"; | |
459 | amc->spi_model = "mx66l1g45g"; | |
460 | amc->num_cs = 2; | |
461 | amc->i2c_init = swift_bmc_i2c_init; | |
462 | mc->default_ram_size = 512 * MiB; | |
463 | }; | |
464 | ||
465 | static void aspeed_machine_witherspoon_class_init(ObjectClass *oc, void *data) | |
466 | { | |
467 | MachineClass *mc = MACHINE_CLASS(oc); | |
468 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
469 | ||
470 | mc->desc = "OpenPOWER Witherspoon BMC (ARM1176)"; | |
471 | amc->soc_name = "ast2500-a1"; | |
472 | amc->hw_strap1 = WITHERSPOON_BMC_HW_STRAP1; | |
473 | amc->fmc_model = "mx25l25635e"; | |
474 | amc->spi_model = "mx66l1g45g"; | |
475 | amc->num_cs = 2; | |
476 | amc->i2c_init = witherspoon_bmc_i2c_init; | |
477 | mc->default_ram_size = 512 * MiB; | |
478 | }; | |
479 | ||
480 | static void aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data) | |
481 | { | |
482 | MachineClass *mc = MACHINE_CLASS(oc); | |
483 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
484 | ||
485 | mc->desc = "Aspeed AST2600 EVB (Cortex A7)"; | |
486 | amc->soc_name = "ast2600-a0"; | |
487 | amc->hw_strap1 = AST2600_EVB_HW_STRAP1; | |
488 | amc->hw_strap2 = AST2600_EVB_HW_STRAP2; | |
489 | amc->fmc_model = "w25q512jv"; | |
490 | amc->spi_model = "mx66u51235f"; | |
491 | amc->num_cs = 1; | |
492 | amc->i2c_init = ast2600_evb_i2c_init; | |
493 | mc->default_ram_size = 1 * GiB; | |
494 | }; | |
495 | ||
63ceb818 CLG |
496 | static void aspeed_machine_tacoma_class_init(ObjectClass *oc, void *data) |
497 | { | |
498 | MachineClass *mc = MACHINE_CLASS(oc); | |
499 | AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc); | |
500 | ||
501 | mc->desc = "Aspeed AST2600 EVB (Cortex A7)"; | |
502 | amc->soc_name = "ast2600-a0"; | |
503 | amc->hw_strap1 = TACOMA_BMC_HW_STRAP1; | |
504 | amc->hw_strap2 = TACOMA_BMC_HW_STRAP2; | |
505 | amc->fmc_model = "mx66l1g45g"; | |
506 | amc->spi_model = "mx66l1g45g"; | |
507 | amc->num_cs = 2; | |
508 | amc->i2c_init = witherspoon_bmc_i2c_init; /* Same board layout */ | |
509 | mc->default_ram_size = 1 * GiB; | |
510 | }; | |
511 | ||
baa4732b | 512 | static const TypeInfo aspeed_machine_types[] = { |
fca9ca1b | 513 | { |
baa4732b CLG |
514 | .name = MACHINE_TYPE_NAME("palmetto-bmc"), |
515 | .parent = TYPE_ASPEED_MACHINE, | |
516 | .class_init = aspeed_machine_palmetto_class_init, | |
fca9ca1b | 517 | }, { |
baa4732b CLG |
518 | .name = MACHINE_TYPE_NAME("ast2500-evb"), |
519 | .parent = TYPE_ASPEED_MACHINE, | |
520 | .class_init = aspeed_machine_ast2500_evb_class_init, | |
fca9ca1b | 521 | }, { |
baa4732b CLG |
522 | .name = MACHINE_TYPE_NAME("romulus-bmc"), |
523 | .parent = TYPE_ASPEED_MACHINE, | |
524 | .class_init = aspeed_machine_romulus_class_init, | |
aae7a18d | 525 | }, { |
baa4732b CLG |
526 | .name = MACHINE_TYPE_NAME("swift-bmc"), |
527 | .parent = TYPE_ASPEED_MACHINE, | |
528 | .class_init = aspeed_machine_swift_class_init, | |
fca9ca1b | 529 | }, { |
baa4732b CLG |
530 | .name = MACHINE_TYPE_NAME("witherspoon-bmc"), |
531 | .parent = TYPE_ASPEED_MACHINE, | |
532 | .class_init = aspeed_machine_witherspoon_class_init, | |
ccc2c418 | 533 | }, { |
baa4732b CLG |
534 | .name = MACHINE_TYPE_NAME("ast2600-evb"), |
535 | .parent = TYPE_ASPEED_MACHINE, | |
536 | .class_init = aspeed_machine_ast2600_evb_class_init, | |
63ceb818 CLG |
537 | }, { |
538 | .name = MACHINE_TYPE_NAME("tacoma-bmc"), | |
539 | .parent = TYPE_ASPEED_MACHINE, | |
540 | .class_init = aspeed_machine_tacoma_class_init, | |
baa4732b CLG |
541 | }, { |
542 | .name = TYPE_ASPEED_MACHINE, | |
543 | .parent = TYPE_MACHINE, | |
544 | .instance_size = sizeof(AspeedMachine), | |
545 | .class_size = sizeof(AspeedMachineClass), | |
546 | .class_init = aspeed_machine_class_init, | |
547 | .abstract = true, | |
fca9ca1b | 548 | } |
baa4732b | 549 | }; |
74fb1f38 | 550 | |
baa4732b | 551 | DEFINE_TYPES(aspeed_machine_types) |