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c2d1cf1b | 1 | /** @file NorFlash.h\r |
1e57a462 | 2 | \r |
2dff0c1a | 3 | Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>\r |
1e57a462 | 4 | \r |
f4dfad05 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
1e57a462 | 6 | \r |
7 | **/\r | |
8 | \r | |
c2d1cf1b MK |
9 | #ifndef __NOR_FLASH_H__\r |
10 | #define __NOR_FLASH_H__\r | |
1e57a462 | 11 | \r |
1e57a462 | 12 | #include <Base.h>\r |
13 | #include <PiDxe.h>\r | |
14 | \r | |
1dbbfc17 OM |
15 | #include <Guid/EventGroup.h>\r |
16 | \r | |
1e57a462 | 17 | #include <Protocol/BlockIo.h>\r |
452a9ee1 | 18 | #include <Protocol/DiskIo.h>\r |
1e57a462 | 19 | #include <Protocol/FirmwareVolumeBlock.h>\r |
20 | \r | |
21 | #include <Library/DebugLib.h>\r | |
22 | #include <Library/IoLib.h>\r | |
23 | #include <Library/NorFlashPlatformLib.h>\r | |
24 | #include <Library/UefiLib.h>\r | |
2dff0c1a | 25 | #include <Library/UefiRuntimeLib.h>\r |
1e57a462 | 26 | \r |
40b0b23e | 27 | #define NOR_FLASH_ERASE_RETRY 10\r |
1e57a462 | 28 | \r |
29 | // Device access macros\r | |
30 | // These are necessary because we use 2 x 16bit parts to make up 32bit data\r | |
31 | \r | |
40b0b23e MK |
32 | #define HIGH_16_BITS 0xFFFF0000\r |
33 | #define LOW_16_BITS 0x0000FFFF\r | |
34 | #define LOW_8_BITS 0x000000FF\r | |
1e57a462 | 35 | \r |
40b0b23e | 36 | #define FOLD_32BIT_INTO_16BIT(value) ( ( value >> 16 ) | ( value & LOW_16_BITS ) )\r |
1e57a462 | 37 | \r |
40b0b23e MK |
38 | #define GET_LOW_BYTE(value) ( value & LOW_8_BITS )\r |
39 | #define GET_HIGH_BYTE(value) ( GET_LOW_BYTE( value >> 16 ) )\r | |
1e57a462 | 40 | \r |
41 | // Each command must be sent simultaneously to both chips,\r | |
42 | // i.e. at the lower 16 bits AND at the higher 16 bits\r | |
40b0b23e MK |
43 | #define CREATE_NOR_ADDRESS(BaseAddr, OffsetAddr) ((BaseAddr) + ((OffsetAddr) << 2))\r |
44 | #define CREATE_DUAL_CMD(Cmd) ( ( Cmd << 16) | ( Cmd & LOW_16_BITS) )\r | |
45 | #define SEND_NOR_COMMAND(BaseAddr, Offset, Cmd) MmioWrite32 (CREATE_NOR_ADDRESS(BaseAddr,Offset), CREATE_DUAL_CMD(Cmd))\r | |
46 | #define GET_NOR_BLOCK_ADDRESS(BaseAddr, Lba, LbaSize) ( BaseAddr + (UINTN)((Lba) * LbaSize) )\r | |
1e57a462 | 47 | \r |
48 | // Status Register Bits\r | |
40b0b23e MK |
49 | #define P30_SR_BIT_WRITE (BIT7 << 16 | BIT7)\r |
50 | #define P30_SR_BIT_ERASE_SUSPEND (BIT6 << 16 | BIT6)\r | |
51 | #define P30_SR_BIT_ERASE (BIT5 << 16 | BIT5)\r | |
52 | #define P30_SR_BIT_PROGRAM (BIT4 << 16 | BIT4)\r | |
53 | #define P30_SR_BIT_VPP (BIT3 << 16 | BIT3)\r | |
54 | #define P30_SR_BIT_PROGRAM_SUSPEND (BIT2 << 16 | BIT2)\r | |
55 | #define P30_SR_BIT_BLOCK_LOCKED (BIT1 << 16 | BIT1)\r | |
56 | #define P30_SR_BIT_BEFP (BIT0 << 16 | BIT0)\r | |
1e57a462 | 57 | \r |
58 | // Device Commands for Intel StrataFlash(R) Embedded Memory (P30) Family\r | |
59 | \r | |
60 | // On chip buffer size for buffered programming operations\r | |
61 | // There are 2 chips, each chip can buffer up to 32 (16-bit)words, and each word is 2 bytes.\r | |
62 | // Therefore the total size of the buffer is 2 x 32 x 2 = 128 bytes\r | |
40b0b23e MK |
63 | #define P30_MAX_BUFFER_SIZE_IN_BYTES ((UINTN)128)\r |
64 | #define P30_MAX_BUFFER_SIZE_IN_WORDS (P30_MAX_BUFFER_SIZE_IN_BYTES/((UINTN)4))\r | |
65 | #define MAX_BUFFERED_PROG_ITERATIONS 10000000\r | |
66 | #define BOUNDARY_OF_32_WORDS 0x7F\r | |
1e57a462 | 67 | \r |
68 | // CFI Addresses\r | |
40b0b23e MK |
69 | #define P30_CFI_ADDR_QUERY_UNIQUE_QRY 0x10\r |
70 | #define P30_CFI_ADDR_VENDOR_ID 0x13\r | |
1e57a462 | 71 | \r |
72 | // CFI Data\r | |
40b0b23e | 73 | #define CFI_QRY 0x00595251\r |
1e57a462 | 74 | \r |
75 | // READ Commands\r | |
40b0b23e MK |
76 | #define P30_CMD_READ_DEVICE_ID 0x0090\r |
77 | #define P30_CMD_READ_STATUS_REGISTER 0x0070\r | |
78 | #define P30_CMD_CLEAR_STATUS_REGISTER 0x0050\r | |
79 | #define P30_CMD_READ_ARRAY 0x00FF\r | |
80 | #define P30_CMD_READ_CFI_QUERY 0x0098\r | |
1e57a462 | 81 | \r |
82 | // WRITE Commands\r | |
40b0b23e MK |
83 | #define P30_CMD_WORD_PROGRAM_SETUP 0x0040\r |
84 | #define P30_CMD_ALTERNATE_WORD_PROGRAM_SETUP 0x0010\r | |
85 | #define P30_CMD_BUFFERED_PROGRAM_SETUP 0x00E8\r | |
86 | #define P30_CMD_BUFFERED_PROGRAM_CONFIRM 0x00D0\r | |
87 | #define P30_CMD_BEFP_SETUP 0x0080\r | |
88 | #define P30_CMD_BEFP_CONFIRM 0x00D0\r | |
1e57a462 | 89 | \r |
90 | // ERASE Commands\r | |
40b0b23e MK |
91 | #define P30_CMD_BLOCK_ERASE_SETUP 0x0020\r |
92 | #define P30_CMD_BLOCK_ERASE_CONFIRM 0x00D0\r | |
1e57a462 | 93 | \r |
94 | // SUSPEND Commands\r | |
40b0b23e MK |
95 | #define P30_CMD_PROGRAM_OR_ERASE_SUSPEND 0x00B0\r |
96 | #define P30_CMD_SUSPEND_RESUME 0x00D0\r | |
1e57a462 | 97 | \r |
98 | // BLOCK LOCKING / UNLOCKING Commands\r | |
40b0b23e MK |
99 | #define P30_CMD_LOCK_BLOCK_SETUP 0x0060\r |
100 | #define P30_CMD_LOCK_BLOCK 0x0001\r | |
101 | #define P30_CMD_UNLOCK_BLOCK 0x00D0\r | |
102 | #define P30_CMD_LOCK_DOWN_BLOCK 0x002F\r | |
1e57a462 | 103 | \r |
104 | // PROTECTION Commands\r | |
40b0b23e | 105 | #define P30_CMD_PROGRAM_PROTECTION_REGISTER_SETUP 0x00C0\r |
1e57a462 | 106 | \r |
107 | // CONFIGURATION Commands\r | |
40b0b23e MK |
108 | #define P30_CMD_READ_CONFIGURATION_REGISTER_SETUP 0x0060\r |
109 | #define P30_CMD_READ_CONFIGURATION_REGISTER 0x0003\r | |
1e57a462 | 110 | \r |
40b0b23e MK |
111 | #define NOR_FLASH_SIGNATURE SIGNATURE_32('n', 'o', 'r', '0')\r |
112 | #define INSTANCE_FROM_FVB_THIS(a) CR(a, NOR_FLASH_INSTANCE, FvbProtocol, NOR_FLASH_SIGNATURE)\r | |
113 | #define INSTANCE_FROM_BLKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, BlockIoProtocol, NOR_FLASH_SIGNATURE)\r | |
114 | #define INSTANCE_FROM_DISKIO_THIS(a) CR(a, NOR_FLASH_INSTANCE, DiskIoProtocol, NOR_FLASH_SIGNATURE)\r | |
1e57a462 | 115 | \r |
40b0b23e | 116 | typedef struct _NOR_FLASH_INSTANCE NOR_FLASH_INSTANCE;\r |
1e57a462 | 117 | \r |
4ef11358 | 118 | #pragma pack (1)\r |
1e57a462 | 119 | typedef struct {\r |
40b0b23e MK |
120 | VENDOR_DEVICE_PATH Vendor;\r |
121 | UINT8 Index;\r | |
122 | EFI_DEVICE_PATH_PROTOCOL End;\r | |
1e57a462 | 123 | } NOR_FLASH_DEVICE_PATH;\r |
4ef11358 | 124 | #pragma pack ()\r |
1e57a462 | 125 | \r |
126 | struct _NOR_FLASH_INSTANCE {\r | |
40b0b23e MK |
127 | UINT32 Signature;\r |
128 | EFI_HANDLE Handle;\r | |
1e57a462 | 129 | \r |
40b0b23e MK |
130 | UINTN DeviceBaseAddress;\r |
131 | UINTN RegionBaseAddress;\r | |
132 | UINTN Size;\r | |
133 | EFI_LBA StartLba;\r | |
1e57a462 | 134 | \r |
40b0b23e MK |
135 | EFI_BLOCK_IO_PROTOCOL BlockIoProtocol;\r |
136 | EFI_BLOCK_IO_MEDIA Media;\r | |
137 | EFI_DISK_IO_PROTOCOL DiskIoProtocol;\r | |
1e57a462 | 138 | \r |
40b0b23e MK |
139 | EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL FvbProtocol;\r |
140 | VOID *ShadowBuffer;\r | |
1e57a462 | 141 | \r |
40b0b23e | 142 | NOR_FLASH_DEVICE_PATH DevicePath;\r |
1e57a462 | 143 | };\r |
144 | \r | |
145 | EFI_STATUS\r | |
146 | NorFlashReadCfiData (\r | |
40b0b23e MK |
147 | IN UINTN DeviceBaseAddress,\r |
148 | IN UINTN CFI_Offset,\r | |
149 | IN UINT32 NumberOfBytes,\r | |
150 | OUT UINT32 *Data\r | |
1e57a462 | 151 | );\r |
152 | \r | |
153 | EFI_STATUS\r | |
154 | NorFlashWriteBuffer (\r | |
40b0b23e MK |
155 | IN NOR_FLASH_INSTANCE *Instance,\r |
156 | IN UINTN TargetAddress,\r | |
157 | IN UINTN BufferSizeInBytes,\r | |
158 | IN UINT32 *Buffer\r | |
1e57a462 | 159 | );\r |
160 | \r | |
161 | //\r | |
162 | // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.Reset\r | |
163 | //\r | |
164 | EFI_STATUS\r | |
165 | EFIAPI\r | |
166 | NorFlashBlockIoReset (\r | |
40b0b23e MK |
167 | IN EFI_BLOCK_IO_PROTOCOL *This,\r |
168 | IN BOOLEAN ExtendedVerification\r | |
1e57a462 | 169 | );\r |
170 | \r | |
171 | //\r | |
172 | // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.ReadBlocks\r | |
173 | //\r | |
174 | EFI_STATUS\r | |
175 | EFIAPI\r | |
176 | NorFlashBlockIoReadBlocks (\r | |
40b0b23e MK |
177 | IN EFI_BLOCK_IO_PROTOCOL *This,\r |
178 | IN UINT32 MediaId,\r | |
179 | IN EFI_LBA Lba,\r | |
180 | IN UINTN BufferSizeInBytes,\r | |
181 | OUT VOID *Buffer\r | |
182 | );\r | |
1e57a462 | 183 | \r |
184 | //\r | |
185 | // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.WriteBlocks\r | |
186 | //\r | |
187 | EFI_STATUS\r | |
188 | EFIAPI\r | |
189 | NorFlashBlockIoWriteBlocks (\r | |
40b0b23e MK |
190 | IN EFI_BLOCK_IO_PROTOCOL *This,\r |
191 | IN UINT32 MediaId,\r | |
192 | IN EFI_LBA Lba,\r | |
193 | IN UINTN BufferSizeInBytes,\r | |
194 | IN VOID *Buffer\r | |
195 | );\r | |
1e57a462 | 196 | \r |
197 | //\r | |
198 | // BlockIO Protocol function EFI_BLOCK_IO_PROTOCOL.FlushBlocks\r | |
199 | //\r | |
200 | EFI_STATUS\r | |
201 | EFIAPI\r | |
202 | NorFlashBlockIoFlushBlocks (\r | |
40b0b23e MK |
203 | IN EFI_BLOCK_IO_PROTOCOL *This\r |
204 | );\r | |
1e57a462 | 205 | \r |
452a9ee1 BJ |
206 | //\r |
207 | // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.ReadDisk\r | |
208 | //\r | |
209 | EFI_STATUS\r | |
210 | EFIAPI\r | |
211 | NorFlashDiskIoReadDisk (\r | |
40b0b23e MK |
212 | IN EFI_DISK_IO_PROTOCOL *This,\r |
213 | IN UINT32 MediaId,\r | |
214 | IN UINT64 Offset,\r | |
215 | IN UINTN BufferSize,\r | |
216 | OUT VOID *Buffer\r | |
452a9ee1 BJ |
217 | );\r |
218 | \r | |
219 | //\r | |
220 | // DiskIO Protocol function EFI_DISK_IO_PROTOCOL.WriteDisk\r | |
221 | //\r | |
222 | EFI_STATUS\r | |
223 | EFIAPI\r | |
224 | NorFlashDiskIoWriteDisk (\r | |
40b0b23e MK |
225 | IN EFI_DISK_IO_PROTOCOL *This,\r |
226 | IN UINT32 MediaId,\r | |
227 | IN UINT64 Offset,\r | |
228 | IN UINTN BufferSize,\r | |
229 | IN VOID *Buffer\r | |
452a9ee1 | 230 | );\r |
1e57a462 | 231 | \r |
232 | //\r | |
233 | // NorFlashFvbDxe.c\r | |
234 | //\r | |
235 | \r | |
1e57a462 | 236 | EFI_STATUS\r |
237 | EFIAPI\r | |
40b0b23e MK |
238 | FvbGetAttributes (\r |
239 | IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r | |
240 | OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r | |
1e57a462 | 241 | );\r |
242 | \r | |
243 | EFI_STATUS\r | |
244 | EFIAPI\r | |
40b0b23e MK |
245 | FvbSetAttributes (\r |
246 | IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r | |
247 | IN OUT EFI_FVB_ATTRIBUTES_2 *Attributes\r | |
1e57a462 | 248 | );\r |
249 | \r | |
250 | EFI_STATUS\r | |
251 | EFIAPI\r | |
40b0b23e MK |
252 | FvbGetPhysicalAddress (\r |
253 | IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r | |
254 | OUT EFI_PHYSICAL_ADDRESS *Address\r | |
1e57a462 | 255 | );\r |
256 | \r | |
257 | EFI_STATUS\r | |
258 | EFIAPI\r | |
40b0b23e MK |
259 | FvbGetBlockSize (\r |
260 | IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r | |
261 | IN EFI_LBA Lba,\r | |
262 | OUT UINTN *BlockSize,\r | |
263 | OUT UINTN *NumberOfBlocks\r | |
1e57a462 | 264 | );\r |
265 | \r | |
266 | EFI_STATUS\r | |
267 | EFIAPI\r | |
40b0b23e MK |
268 | FvbRead (\r |
269 | IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r | |
270 | IN EFI_LBA Lba,\r | |
271 | IN UINTN Offset,\r | |
272 | IN OUT UINTN *NumBytes,\r | |
273 | IN OUT UINT8 *Buffer\r | |
1e57a462 | 274 | );\r |
275 | \r | |
276 | EFI_STATUS\r | |
277 | EFIAPI\r | |
40b0b23e MK |
278 | FvbWrite (\r |
279 | IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r | |
280 | IN EFI_LBA Lba,\r | |
281 | IN UINTN Offset,\r | |
282 | IN OUT UINTN *NumBytes,\r | |
283 | IN UINT8 *Buffer\r | |
1e57a462 | 284 | );\r |
285 | \r | |
286 | EFI_STATUS\r | |
287 | EFIAPI\r | |
40b0b23e MK |
288 | FvbEraseBlocks (\r |
289 | IN CONST EFI_FIRMWARE_VOLUME_BLOCK2_PROTOCOL *This,\r | |
1e57a462 | 290 | ...\r |
291 | );\r | |
292 | \r | |
c2d1cf1b MK |
293 | EFI_STATUS\r |
294 | ValidateFvHeader (\r | |
40b0b23e | 295 | IN NOR_FLASH_INSTANCE *Instance\r |
c2d1cf1b MK |
296 | );\r |
297 | \r | |
298 | EFI_STATUS\r | |
299 | InitializeFvAndVariableStoreHeaders (\r | |
40b0b23e | 300 | IN NOR_FLASH_INSTANCE *Instance\r |
c2d1cf1b MK |
301 | );\r |
302 | \r | |
303 | VOID\r | |
304 | EFIAPI\r | |
305 | FvbVirtualNotifyEvent (\r | |
40b0b23e MK |
306 | IN EFI_EVENT Event,\r |
307 | IN VOID *Context\r | |
c2d1cf1b MK |
308 | );\r |
309 | \r | |
1e57a462 | 310 | //\r |
311 | // NorFlashDxe.c\r | |
312 | //\r | |
313 | \r | |
c2d1cf1b MK |
314 | EFI_STATUS\r |
315 | NorFlashWriteFullBlock (\r | |
40b0b23e MK |
316 | IN NOR_FLASH_INSTANCE *Instance,\r |
317 | IN EFI_LBA Lba,\r | |
318 | IN UINT32 *DataBuffer,\r | |
319 | IN UINT32 BlockSizeInWords\r | |
c2d1cf1b MK |
320 | );\r |
321 | \r | |
1e57a462 | 322 | EFI_STATUS\r |
323 | NorFlashUnlockAndEraseSingleBlock (\r | |
40b0b23e MK |
324 | IN NOR_FLASH_INSTANCE *Instance,\r |
325 | IN UINTN BlockAddress\r | |
1e57a462 | 326 | );\r |
327 | \r | |
c2d1cf1b MK |
328 | EFI_STATUS\r |
329 | NorFlashCreateInstance (\r | |
40b0b23e MK |
330 | IN UINTN NorFlashDeviceBase,\r |
331 | IN UINTN NorFlashRegionBase,\r | |
332 | IN UINTN NorFlashSize,\r | |
333 | IN UINT32 Index,\r | |
334 | IN UINT32 BlockSize,\r | |
335 | IN BOOLEAN SupportFvb,\r | |
336 | OUT NOR_FLASH_INSTANCE **NorFlashInstance\r | |
c2d1cf1b MK |
337 | );\r |
338 | \r | |
339 | EFI_STATUS\r | |
340 | EFIAPI\r | |
341 | NorFlashFvbInitialize (\r | |
40b0b23e | 342 | IN NOR_FLASH_INSTANCE *Instance\r |
c2d1cf1b MK |
343 | );\r |
344 | \r | |
c2d1cf1b MK |
345 | //\r |
346 | // NorFlash.c\r | |
347 | //\r | |
1e57a462 | 348 | EFI_STATUS\r |
349 | NorFlashWriteSingleBlock (\r | |
40b0b23e MK |
350 | IN NOR_FLASH_INSTANCE *Instance,\r |
351 | IN EFI_LBA Lba,\r | |
352 | IN UINTN Offset,\r | |
353 | IN OUT UINTN *NumBytes,\r | |
354 | IN UINT8 *Buffer\r | |
1e57a462 | 355 | );\r |
356 | \r | |
357 | EFI_STATUS\r | |
358 | NorFlashWriteBlocks (\r | |
40b0b23e MK |
359 | IN NOR_FLASH_INSTANCE *Instance,\r |
360 | IN EFI_LBA Lba,\r | |
361 | IN UINTN BufferSizeInBytes,\r | |
362 | IN VOID *Buffer\r | |
1e57a462 | 363 | );\r |
364 | \r | |
365 | EFI_STATUS\r | |
366 | NorFlashReadBlocks (\r | |
40b0b23e MK |
367 | IN NOR_FLASH_INSTANCE *Instance,\r |
368 | IN EFI_LBA Lba,\r | |
369 | IN UINTN BufferSizeInBytes,\r | |
370 | OUT VOID *Buffer\r | |
1e57a462 | 371 | );\r |
372 | \r | |
518c243d HL |
373 | EFI_STATUS\r |
374 | NorFlashRead (\r | |
40b0b23e MK |
375 | IN NOR_FLASH_INSTANCE *Instance,\r |
376 | IN EFI_LBA Lba,\r | |
377 | IN UINTN Offset,\r | |
378 | IN UINTN BufferSizeInBytes,\r | |
379 | OUT VOID *Buffer\r | |
518c243d HL |
380 | );\r |
381 | \r | |
452a9ee1 BJ |
382 | EFI_STATUS\r |
383 | NorFlashWrite (\r | |
40b0b23e MK |
384 | IN NOR_FLASH_INSTANCE *Instance,\r |
385 | IN EFI_LBA Lba,\r | |
386 | IN UINTN Offset,\r | |
387 | IN OUT UINTN *NumBytes,\r | |
388 | IN UINT8 *Buffer\r | |
452a9ee1 BJ |
389 | );\r |
390 | \r | |
1e57a462 | 391 | EFI_STATUS\r |
392 | NorFlashReset (\r | |
40b0b23e | 393 | IN NOR_FLASH_INSTANCE *Instance\r |
1e57a462 | 394 | );\r |
395 | \r | |
c2d1cf1b MK |
396 | EFI_STATUS\r |
397 | NorFlashEraseSingleBlock (\r | |
40b0b23e MK |
398 | IN NOR_FLASH_INSTANCE *Instance,\r |
399 | IN UINTN BlockAddress\r | |
c2d1cf1b MK |
400 | );\r |
401 | \r | |
402 | EFI_STATUS\r | |
403 | NorFlashUnlockSingleBlockIfNecessary (\r | |
40b0b23e MK |
404 | IN NOR_FLASH_INSTANCE *Instance,\r |
405 | IN UINTN BlockAddress\r | |
c2d1cf1b MK |
406 | );\r |
407 | \r | |
408 | EFI_STATUS\r | |
409 | NorFlashWriteSingleWord (\r | |
40b0b23e MK |
410 | IN NOR_FLASH_INSTANCE *Instance,\r |
411 | IN UINTN WordAddress,\r | |
412 | IN UINT32 WriteData\r | |
c2d1cf1b MK |
413 | );\r |
414 | \r | |
415 | VOID\r | |
416 | EFIAPI\r | |
417 | NorFlashVirtualNotifyEvent (\r | |
40b0b23e MK |
418 | IN EFI_EVENT Event,\r |
419 | IN VOID *Context\r | |
c2d1cf1b MK |
420 | );\r |
421 | \r | |
422 | #endif /* __NOR_FLASH_H__ */\r |