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1d5d0ae9 | 1 | /** @file\r |
2 | * Main file supporting the transition to PEI Core in Normal World for Versatile Express\r | |
3 | *\r | |
4 | * Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
5 | * \r | |
6 | * This program and the accompanying materials \r | |
7 | * are licensed and made available under the terms and conditions of the BSD License \r | |
8 | * which accompanies this distribution. The full text of the license may be found at \r | |
9 | * http://opensource.org/licenses/bsd-license.php \r | |
10 | *\r | |
11 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
12 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
13 | *\r | |
14 | **/\r | |
15 | \r | |
1d5d0ae9 | 16 | #include <Library/IoLib.h>\r |
17 | #include <Library/BaseLib.h>\r | |
18 | #include <Library/BaseMemoryLib.h>\r | |
f598bf12 | 19 | #include <Library/PrintLib.h>\r |
1d5d0ae9 | 20 | #include <Library/ArmLib.h>\r |
f598bf12 | 21 | #include <Library/SerialPortLib.h>\r |
1d5d0ae9 | 22 | #include <Chipset/ArmV7.h>\r |
23 | \r | |
f598bf12 | 24 | #include "PrePeiCore.h"\r |
1d5d0ae9 | 25 | \r |
80ddb68d | 26 | EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mSecTemporaryRamSupportPpi = {SecTemporaryRamSupport};\r |
1d5d0ae9 | 27 | \r |
28 | EFI_PEI_PPI_DESCRIPTOR gSecPpiTable[] = {\r | |
29 | {\r | |
30 | EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r | |
31 | &gEfiTemporaryRamSupportPpiGuid,\r | |
32 | &mSecTemporaryRamSupportPpi\r | |
33 | }\r | |
34 | };\r | |
35 | \r | |
1d5d0ae9 | 36 | VOID\r |
37 | CEntryPoint (\r | |
38 | IN UINTN CoreId,\r | |
39 | IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint\r | |
40 | )\r | |
41 | {\r | |
42 | //Clean Data cache\r | |
43 | ArmCleanInvalidateDataCache();\r | |
44 | \r | |
45 | //Invalidate instruction cache\r | |
46 | ArmInvalidateInstructionCache();\r | |
47 | \r | |
48 | // Enable Instruction & Data caches\r | |
f598bf12 | 49 | ArmEnableDataCache ();\r |
50 | ArmEnableInstructionCache ();\r | |
1d5d0ae9 | 51 | \r |
52 | //\r | |
53 | // Note: Doesn't have to Enable CPU interface in non-secure world,\r | |
54 | // as Non-secure interface is already enabled in Secure world.\r | |
55 | //\r | |
56 | \r | |
57 | // Write VBAR - The Vector table must be 32-byte aligned\r | |
58 | ASSERT(((UINT32)PeiVectorTable & ((1 << 5)-1)) == 0);\r | |
59 | ArmWriteVBar((UINT32)PeiVectorTable);\r | |
60 | \r | |
61 | //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on.\r | |
62 | \r | |
63 | //If not primary Jump to Secondary Main\r | |
64 | if(0 == CoreId) {\r | |
65 | //Goto primary Main.\r | |
f598bf12 | 66 | PrimaryMain (PeiCoreEntryPoint);\r |
1d5d0ae9 | 67 | } else {\r |
f598bf12 | 68 | SecondaryMain (CoreId);\r |
1d5d0ae9 | 69 | }\r |
70 | \r | |
71 | // PEI Core should always load and never return\r | |
72 | ASSERT (FALSE);\r | |
73 | }\r | |
74 | \r | |
75 | EFI_STATUS\r | |
76 | EFIAPI\r | |
77 | SecTemporaryRamSupport (\r | |
78 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
79 | IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,\r | |
80 | IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,\r | |
81 | IN UINTN CopySize\r | |
82 | )\r | |
83 | {\r | |
84 | //\r | |
85 | // Migrate the whole temporary memory to permenent memory.\r | |
f598bf12 | 86 | //\r |
1d5d0ae9 | 87 | CopyMem (\r |
88 | (VOID*)(UINTN)PermanentMemoryBase, \r | |
89 | (VOID*)(UINTN)TemporaryMemoryBase, \r | |
90 | CopySize\r | |
91 | );\r | |
92 | \r | |
93 | SecSwitchStack((UINTN)(PermanentMemoryBase - TemporaryMemoryBase));\r | |
94 | \r | |
95 | return EFI_SUCCESS;\r | |
96 | }\r | |
97 | \r | |
2637d1ef | 98 | VOID\r |
99 | PeiCommonExceptionEntry (\r | |
100 | IN UINT32 Entry,\r | |
101 | IN UINT32 LR\r | |
102 | )\r | |
103 | {\r | |
104 | CHAR8 Buffer[100];\r | |
105 | UINTN CharCount;\r | |
106 | \r | |
1d5d0ae9 | 107 | switch (Entry) {\r |
108 | case 0:\r | |
2637d1ef | 109 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 110 | break;\r |
111 | case 1:\r | |
2637d1ef | 112 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 113 | break;\r |
114 | case 2:\r | |
2637d1ef | 115 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 116 | break;\r |
117 | case 3:\r | |
2637d1ef | 118 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 119 | break;\r |
120 | case 4:\r | |
2637d1ef | 121 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 122 | break;\r |
123 | case 5:\r | |
2637d1ef | 124 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 125 | break;\r |
126 | case 6:\r | |
2637d1ef | 127 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 128 | break;\r |
129 | case 7:\r | |
2637d1ef | 130 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 131 | break;\r |
132 | default:\r | |
2637d1ef | 133 | CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);\r |
1d5d0ae9 | 134 | break;\r |
135 | }\r | |
2637d1ef | 136 | SerialPortWrite ((UINT8 *) Buffer, CharCount);\r |
1d5d0ae9 | 137 | while(1);\r |
138 | }\r |