ArmPlatformPkg/Sec: Fixed Monitor stack setup
[mirror_edk2.git] / ArmPlatformPkg / Sec / Sec.c
CommitLineData
1d5d0ae9 1/** @file
009f583f 2* Main file supporting the SEC Phase on ARM Platforms
1d5d0ae9 3*
4* Copyright (c) 2011, ARM Limited. All rights reserved.
5*
6* This program and the accompanying materials
7* are licensed and made available under the terms and conditions of the BSD License
8* which accompanies this distribution. The full text of the license may be found at
9* http://opensource.org/licenses/bsd-license.php
10*
11* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13*
14**/
15
a6caee65 16#include <Library/DebugAgentLib.h>
2637d1ef 17#include <Library/PrintLib.h>
1d5d0ae9 18#include <Library/BaseMemoryLib.h>
1d5d0ae9 19#include <Library/SerialPortLib.h>
55a0d64b 20#include <Library/ArmGicLib.h>
90d6a1bb 21#include <Library/ArmCpuLib.h>
0620eec9 22
009f583f 23#include "SecInternal.h"
24
e862cd50 25#define SerialPrint(txt) SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
2637d1ef 26
1d5d0ae9 27extern VOID *monitor_vector_table;
28
1d5d0ae9 29VOID
30CEntryPoint (
0787bc61 31 IN UINTN MpId
1d5d0ae9 32 )
33{
2637d1ef 34 CHAR8 Buffer[100];
35 UINTN CharCount;
a6caee65 36 UINTN JumpAddress;
2637d1ef 37
710b8acb 38 // Invalidate the data cache. Doesn't have to do the Data cache clean.
39 ArmInvalidateDataCache();
40
41 // Invalidate Instruction Cache
42 ArmInvalidateInstructionCache();
43
44 // Invalidate I & D TLBs
45 ArmInvalidateInstructionAndDataTlb();
46
47 // CPU specific settings
48 ArmCpuSetup (MpId);
49
82344416 50 // Enable Floating Point Coprocessor if supported by the platform
51 if (FixedPcdGet32 (PcdVFPEnabled)) {
52 ArmEnableVFP();
53 }
54
1d5d0ae9 55 // Primary CPU clears out the SCU tag RAMs, secondaries wait
0787bc61 56 if (IS_PRIMARY_CORE(MpId)) {
90d6a1bb 57 if (ArmIsMpCore()) {
58 ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT);
1d5d0ae9 59 }
60
61 // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
62 // In non SEC modules the init call is in autogenerated code.
63 SerialPortInitialize ();
2637d1ef 64
1d5d0ae9 65 // Start talking
2637d1ef 66 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__);
67 SerialPortWrite ((UINT8 *) Buffer, CharCount);
1d5d0ae9 68
a6caee65 69 // Initialize the Debug Agent for Source Level Debugging
70 InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
71 SaveAndSetDebugTimerInterrupt (TRUE);
72
1d5d0ae9 73 // Now we've got UART, make the check:
74 // - The Vector table must be 32-byte aligned
75 ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0);
90d6a1bb 76
77 // Enable the GIC distributor and CPU Interface
78 // - no other Interrupts are enabled, doesn't have to worry about the priority.
79 // - all the cores are in secure state, use secure SGI's
80 ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
81 ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
82 } else {
83 // Enable the GIC CPU Interface
84 ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
1d5d0ae9 85 }
86
1d5d0ae9 87 // Enable Full Access to CoProcessors
88 ArmWriteCPACR (CPACR_CP_FULL_ACCESS);
89
0787bc61 90 if (IS_PRIMARY_CORE(MpId)) {
8e06b586 91 // Initialize peripherals that must be done at the early stage
92 // Example: Some L2x0 controllers must be initialized in Secure World
aa01abaa 93 ArmPlatformSecInitialize ();
1d5d0ae9 94
95 // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
96 // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
90d6a1bb 97 if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
1d5d0ae9 98 // Initialize system memory (DRAM)
1ad14bc8 99 ArmPlatformInitializeSystemMemory ();
1d5d0ae9 100 }
1d5d0ae9 101 }
102
103 // Test if Trustzone is supported on this platform
12c5ae23 104 if (FixedPcdGetBool (PcdTrustzoneSupport)) {
009f583f 105 // Ensure the Monitor Stack Base & Size have been set
106 ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0);
107 ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0);
108
90d6a1bb 109 if (ArmIsMpCore()) {
1d5d0ae9 110 // Setup SMP in Non Secure world
90d6a1bb 111 ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
1d5d0ae9 112 }
113
114 // Enter Monitor Mode
fab5507a 115 enter_monitor_mode ((VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
1d5d0ae9 116
117 //Write the monitor mode vector table address
118 ArmWriteVMBar((UINT32) &monitor_vector_table);
119
120 //-------------------- Monitor Mode ---------------------
0620eec9 121 // Setup the Trustzone Chipsets
0787bc61 122 if (IS_PRIMARY_CORE(MpId)) {
009f583f 123 ArmPlatformTrustzoneInit ();
1d5d0ae9 124
90d6a1bb 125 // Waiting for the Primary Core to have finished to initialize the Secure World
126 ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT);
1d5d0ae9 127 } else {
128 // The secondary cores need to wait until the Trustzone chipsets configuration is done
0620eec9 129 // before switching to Non Secure World
1d5d0ae9 130
90d6a1bb 131 // Waiting for the Primary Core to have finished to initialize the Secure World
132 ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT);
1d5d0ae9 133 }
134
135 // Transfer the interrupt to Non-secure World
90d6a1bb 136 ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
1d5d0ae9 137
513aa349 138 // Write to CP15 Non-secure Access Control Register
139 ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
140
141 // CP15 Secure Configuration Register
142 ArmWriteScr (PcdGet32 (PcdArmScr));
1d5d0ae9 143 } else {
0787bc61 144 if (IS_PRIMARY_CORE(MpId)) {
2637d1ef 145 SerialPrint ("Trust Zone Configuration is disabled\n\r");
1d5d0ae9 146 }
147
1d5d0ae9 148 // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
149 // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
150 // Status Register as the the current one (CPSR).
a6caee65 151 copy_cpsr_into_spsr ();
1d5d0ae9 152 }
153
f92b93c9 154 JumpAddress = PcdGet32 (PcdFvBaseAddress);
0787bc61 155 ArmPlatformSecExtraAction (MpId, &JumpAddress);
64e03133 156
513aa349 157 // If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
158 // By not set, the mode for Non Secure World is SVC
159 if (PcdGet32 (PcdArmNonSecModeTransition) != 0) {
160 set_non_secure_mode ((ARM_PROCESSOR_MODE)PcdGet32 (PcdArmNonSecModeTransition));
161 }
162
a6caee65 163 return_from_exception (JumpAddress);
1d5d0ae9 164 //-------------------- Non Secure Mode ---------------------
165
166 // PEI Core should always load and never return
167 ASSERT (FALSE);
168}
169
2637d1ef 170VOID
171SecCommonExceptionEntry (
172 IN UINT32 Entry,
173 IN UINT32 LR
174 )
175{
176 CHAR8 Buffer[100];
177 UINTN CharCount;
178
1d5d0ae9 179 switch (Entry) {
180 case 0:
2637d1ef 181 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);
1d5d0ae9 182 break;
183 case 1:
2637d1ef 184 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);
1d5d0ae9 185 break;
186 case 2:
2637d1ef 187 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);
1d5d0ae9 188 break;
189 case 3:
2637d1ef 190 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);
1d5d0ae9 191 break;
192 case 4:
2637d1ef 193 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);
1d5d0ae9 194 break;
195 case 5:
2637d1ef 196 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);
1d5d0ae9 197 break;
198 case 6:
2637d1ef 199 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);
1d5d0ae9 200 break;
201 case 7:
2637d1ef 202 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);
1d5d0ae9 203 break;
204 default:
2637d1ef 205 CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);
1d5d0ae9 206 break;
207 }
2637d1ef 208 SerialPortWrite ((UINT8 *) Buffer, CharCount);
1d5d0ae9 209 while(1);
210}