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remove duplicated #pragma pack().
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Atapi.h
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8bdadcc8 1/** @file\r
37640ed3 2 This file contains just some basic definitions that are needed by drivers\r
3 that dealing with ATA/ATAPI interface.\r
8bdadcc8 4\r
37640ed3 5Copyright (c) 2007 - 2008, Intel Corporation\r
8bdadcc8 6All rights reserved. This program and the accompanying materials\r
7are licensed and made available under the terms and conditions of the BSD License\r
8which accompanies this distribution. The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php\r
10\r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
42eedea9 16#ifndef _ATAPI_H_\r
17#define _ATAPI_H_\r
8bdadcc8 18\r
766f4bc1 19#pragma pack(1)\r
20\r
1bc5d021 21///\r
22/// ATAPI_IDENTIFY_DATA is defined in ATA-6\r
23///\r
8bdadcc8 24typedef struct {\r
37640ed3 25 UINT16 config; ///< General Configuration\r
8bdadcc8 26 UINT16 obsolete_1;\r
27 UINT16 specific_config;\r
28 UINT16 obsolete_3;\r
29 UINT16 retired_4_5[2];\r
30 UINT16 obsolete_6;\r
31 UINT16 cfa_reserved_7_8[2];\r
32 UINT16 retired_9;\r
37640ed3 33 CHAR8 SerialNo[20]; ///< ASCII\r
8bdadcc8 34 UINT16 retired_20_21[2];\r
35 UINT16 obsolete_22;\r
37640ed3 36 CHAR8 FirmwareVer[8]; ///< ASCII\r
37 CHAR8 ModelName[40]; ///< ASCII\r
8bdadcc8 38 UINT16 multi_sector_cmd_max_sct_cnt;\r
39 UINT16 reserved_48;\r
40 UINT16 capabilities_49;\r
41 UINT16 capabilities_50;\r
42 UINT16 obsolete_51_52[2];\r
43 UINT16 field_validity;\r
44 UINT16 obsolete_54_58[5];\r
45 UINT16 mutil_sector_setting;\r
46 UINT16 user_addressable_sectors_lo;\r
47 UINT16 user_addressable_sectors_hi;\r
48 UINT16 obsolete_62;\r
49 UINT16 multi_word_dma_mode;\r
50 UINT16 advanced_pio_modes;\r
51 UINT16 min_multi_word_dma_cycle_time;\r
52 UINT16 rec_multi_word_dma_cycle_time;\r
53 UINT16 min_pio_cycle_time_without_flow_control;\r
54 UINT16 min_pio_cycle_time_with_flow_control;\r
55 UINT16 reserved_69_74[6];\r
56 UINT16 queue_depth;\r
57 UINT16 reserved_76_79[4];\r
58 UINT16 major_version_no;\r
59 UINT16 minor_version_no;\r
60 UINT16 cmd_set_support_82;\r
61 UINT16 cmd_set_support_83;\r
62 UINT16 cmd_feature_support;\r
63 UINT16 cmd_feature_enable_85;\r
64 UINT16 cmd_feature_enable_86;\r
65 UINT16 cmd_feature_default;\r
66 UINT16 ultra_dma_select;\r
67 UINT16 time_required_for_sec_erase;\r
68 UINT16 time_required_for_enhanced_sec_erase;\r
69 UINT16 current_advanced_power_mgmt_value;\r
70 UINT16 master_pwd_revison_code;\r
71 UINT16 hardware_reset_result;\r
72 UINT16 current_auto_acoustic_mgmt_value;\r
73 UINT16 reserved_95_99[5];\r
74 UINT16 max_user_lba_for_48bit_addr[4];\r
75 UINT16 reserved_104_126[23];\r
76 UINT16 removable_media_status_notification_support;\r
77 UINT16 security_status;\r
78 UINT16 vendor_data_129_159[31];\r
79 UINT16 cfa_power_mode;\r
80 UINT16 cfa_reserved_161_175[15];\r
81 UINT16 current_media_serial_no[30];\r
82 UINT16 reserved_206_254[49];\r
83 UINT16 integrity_word;\r
84} ATAPI_IDENTIFY_DATA;\r
85\r
37640ed3 86///\r
53bbea41 87/// Standard Quiry Data format, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
37640ed3 88///\r
8bdadcc8 89typedef struct {\r
90 UINT8 peripheral_type;\r
91 UINT8 RMB;\r
92 UINT8 version;\r
93 UINT8 response_data_format;\r
53bbea41 94 UINT8 addnl_length; ///< n - 4, Numbers of bytes following this one\r
8bdadcc8 95 UINT8 reserved_5;\r
96 UINT8 reserved_6;\r
97 UINT8 reserved_7;\r
98 UINT8 vendor_info[8];\r
99 UINT8 product_id[16];\r
100 UINT8 product_revision_level[4];\r
37640ed3 101 UINT8 vendor_specific_36_55[55 - 36 + 1];\r
102 UINT8 reserved_56_95[95 - 56 + 1];\r
103 ///\r
53bbea41 104 /// Vendor specific parameters fields, the sizeof (ATAPI_INQUIRY_DATA) is 254\r
37640ed3 105 /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
106 ///\r
53bbea41 107 UINT8 vendor_specific_96_253[253 - 96 + 1];\r
37640ed3 108} ATAPI_INQUIRY_DATA;\r
109\r
db835e01 110///\r
111/// Request Sense Standard Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
112///\r
8bdadcc8 113typedef struct {\r
114 UINT8 error_code : 7;\r
115 UINT8 valid : 1;\r
116 UINT8 reserved_1;\r
117 UINT8 sense_key : 4;\r
37640ed3 118 UINT8 reserved_2 : 1;\r
119 UINT8 Vendor_specifc_1 : 3;\r
8bdadcc8 120 UINT8 vendor_specific_3;\r
121 UINT8 vendor_specific_4;\r
122 UINT8 vendor_specific_5;\r
123 UINT8 vendor_specific_6;\r
37640ed3 124 UINT8 addnl_sense_length; ///< n - 7\r
8bdadcc8 125 UINT8 vendor_specific_8;\r
126 UINT8 vendor_specific_9;\r
127 UINT8 vendor_specific_10;\r
128 UINT8 vendor_specific_11;\r
37640ed3 129 UINT8 addnl_sense_code; ///< mandatory\r
130 UINT8 addnl_sense_code_qualifier; ///< mandatory\r
131 UINT8 field_replaceable_unit_code; ///< optional\r
132 UINT8 sense_key_specific_15 : 7;\r
133 UINT8 SKSV : 1;\r
134 UINT8 sense_key_specific_16;\r
135 UINT8 sense_key_specific_17;\r
8bdadcc8 136} ATAPI_REQUEST_SENSE_DATA;\r
137\r
a2461f6b 138//\r
139// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
140//\r
db835e01 141\r
142///\r
143/// READ CAPACITY Data \r
37640ed3 144///\r
8bdadcc8 145typedef struct {\r
146 UINT8 LastLba3;\r
147 UINT8 LastLba2;\r
148 UINT8 LastLba1;\r
149 UINT8 LastLba0;\r
150 UINT8 BlockSize3;\r
151 UINT8 BlockSize2;\r
152 UINT8 BlockSize1;\r
153 UINT8 BlockSize0;\r
154} ATAPI_READ_CAPACITY_DATA;\r
155\r
37640ed3 156///\r
db835e01 157/// Capacity List Header + Current/Maximum Capacity Descriptor,\r
37640ed3 158///\r
8bdadcc8 159typedef struct {\r
160 UINT8 reserved_0;\r
161 UINT8 reserved_1;\r
162 UINT8 reserved_2;\r
163 UINT8 Capacity_Length;\r
164 UINT8 LastLba3;\r
165 UINT8 LastLba2;\r
166 UINT8 LastLba1;\r
167 UINT8 LastLba0;\r
168 UINT8 DesCode : 2;\r
169 UINT8 reserved_9 : 6;\r
170 UINT8 BlockSize2;\r
171 UINT8 BlockSize1;\r
172 UINT8 BlockSize0;\r
173} ATAPI_READ_FORMAT_CAPACITY_DATA;\r
174\r
37640ed3 175///\r
176/// Test Unit Ready Command\r
177///\r
8bdadcc8 178typedef struct {\r
179 UINT8 opcode;\r
180 UINT8 reserved_1;\r
181 UINT8 reserved_2;\r
182 UINT8 reserved_3;\r
183 UINT8 reserved_4;\r
184 UINT8 reserved_5;\r
185 UINT8 reserved_6;\r
186 UINT8 reserved_7;\r
187 UINT8 reserved_8;\r
188 UINT8 reserved_9;\r
189 UINT8 reserved_10;\r
190 UINT8 reserved_11;\r
191} ATAPI_TEST_UNIT_READY_CMD;\r
192\r
37640ed3 193///\r
194/// INQUIRY Command\r
195///\r
8bdadcc8 196typedef struct {\r
197 UINT8 opcode;\r
37640ed3 198 UINT8 reserved_1 : 5;\r
199 UINT8 lun : 3;\r
200 UINT8 page_code; ///< defined in SFF8090i, V6\r
8bdadcc8 201 UINT8 reserved_3;\r
202 UINT8 allocation_length;\r
203 UINT8 reserved_5;\r
204 UINT8 reserved_6;\r
205 UINT8 reserved_7;\r
206 UINT8 reserved_8;\r
207 UINT8 reserved_9;\r
208 UINT8 reserved_10;\r
209 UINT8 reserved_11;\r
210} ATAPI_INQUIRY_CMD;\r
211\r
37640ed3 212///\r
213/// REQUEST SENSE Command\r
214///\r
8bdadcc8 215typedef struct {\r
216 UINT8 opcode;\r
37640ed3 217 UINT8 reserved_1 : 5;\r
218 UINT8 lun : 3;\r
8bdadcc8 219 UINT8 reserved_2;\r
220 UINT8 reserved_3;\r
221 UINT8 allocation_length;\r
222 UINT8 reserved_5;\r
223 UINT8 reserved_6;\r
224 UINT8 reserved_7;\r
225 UINT8 reserved_8;\r
226 UINT8 reserved_9;\r
227 UINT8 reserved_10;\r
228 UINT8 reserved_11;\r
229} ATAPI_REQUEST_SENSE_CMD;\r
230\r
37640ed3 231///\r
232/// READ (10) Command\r
233///\r
8bdadcc8 234typedef struct {\r
235 UINT8 opcode;\r
236 UINT8 reserved_1 : 5;\r
237 UINT8 lun : 3;\r
238 UINT8 Lba0;\r
239 UINT8 Lba1;\r
240 UINT8 Lba2;\r
241 UINT8 Lba3;\r
242 UINT8 reserved_6;\r
243 UINT8 TranLen0;\r
244 UINT8 TranLen1;\r
245 UINT8 reserved_9;\r
246 UINT8 reserved_10;\r
247 UINT8 reserved_11;\r
248} ATAPI_READ10_CMD;\r
249\r
37640ed3 250///\r
251/// READ Format Capacity Command\r
252///\r
8bdadcc8 253typedef struct {\r
254 UINT8 opcode;\r
37640ed3 255 UINT8 reserved_1 : 5;\r
256 UINT8 lun : 3;\r
8bdadcc8 257 UINT8 reserved_2;\r
258 UINT8 reserved_3;\r
259 UINT8 reserved_4;\r
260 UINT8 reserved_5;\r
261 UINT8 reserved_6;\r
262 UINT8 allocation_length_hi;\r
263 UINT8 allocation_length_lo;\r
264 UINT8 reserved_9;\r
265 UINT8 reserved_10;\r
266 UINT8 reserved_11;\r
267} ATAPI_READ_FORMAT_CAP_CMD;\r
268\r
37640ed3 269///\r
270/// MODE SENSE Command\r
271///\r
8bdadcc8 272typedef struct {\r
273 UINT8 opcode;\r
37640ed3 274 UINT8 reserved_1 : 5;\r
275 UINT8 lun : 3;\r
276 UINT8 page_code : 6;\r
277 UINT8 page_control : 2;\r
8bdadcc8 278 UINT8 reserved_3;\r
279 UINT8 reserved_4;\r
280 UINT8 reserved_5;\r
281 UINT8 reserved_6;\r
282 UINT8 parameter_list_length_hi;\r
283 UINT8 parameter_list_length_lo;\r
284 UINT8 reserved_9;\r
285 UINT8 reserved_10;\r
286 UINT8 reserved_11;\r
287} ATAPI_MODE_SENSE_CMD;\r
288\r
1bc5d021 289///\r
290/// ATAPI_PACKET_COMMAND is not defined in ATA specification.\r
291/// We add it here for the convenience for ATA/ATAPI module writer. \r
292///\r
8bdadcc8 293typedef union {\r
294 UINT16 Data16[6];\r
295 ATAPI_TEST_UNIT_READY_CMD TestUnitReady;\r
296 ATAPI_READ10_CMD Read10;\r
297 ATAPI_REQUEST_SENSE_CMD RequestSence;\r
298 ATAPI_INQUIRY_CMD Inquiry;\r
299 ATAPI_MODE_SENSE_CMD ModeSense;\r
300 ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;\r
301} ATAPI_PACKET_COMMAND;\r
302\r
766f4bc1 303#pragma pack()\r
304\r
8bdadcc8 305\r
306#define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000\r
307#define ATAPI_MAX_DMA_CMD_SECTORS 0x100\r
308\r
309//\r
310// ATA Packet Command Code\r
311//\r
37640ed3 312#define ATA_CMD_SOFT_RESET 0x08 ///< defined in ATA-6\r
313#define ATA_CMD_PACKET 0xA0 ///< defined in ATA-6\r
314#define ATA_CMD_IDENTIFY_DEVICE 0xA1 ///< defined in ATA-6\r
315#define ATA_CMD_SERVICE 0xA2 ///< defined in ATA-6\r
316#define ATA_CMD_TEST_UNIT_READY 0x00 ///< defined in ATA-6\r
317#define ATA_CMD_REQUEST_SENSE 0x03 ///< defined in ATA-6\r
318#define ATA_CMD_INQUIRY 0x12 ///< defined in ATAPI Removable Rewritable Media Devcies\r
319#define ATA_CMD_READ_FORMAT_CAPACITY 0x23 ///< defined in ATAPI Removable Rewritable Media Devcies\r
320#define ATA_CMD_READ_CAPACITY 0x25 ///< defined in ATAPI Removable Rewritable Media Devcies\r
321#define ATA_CMD_READ_10 0x28 ///< defined in ATAPI Removable Rewritable Media Devcies\r
322#define ATA_CMD_WRITE_10 0x2A ///< defined in ATAPI Removable Rewritable Media Devcies\r
8bdadcc8 323\r
324//\r
325// ATA Commands Code\r
326//\r
327\r
328//\r
329// Class 1: PIO Data-In Commands\r
330//\r
331#define ATA_CMD_IDENTIFY_DRIVE 0xec\r
332#define ATA_CMD_READ_BUFFER 0xe4\r
37640ed3 333#define ATA_CMD_READ_SECTORS 0x20 ///< defined in ATA-5 \r
334#define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21 ///< defined in ATA-5\r
335#define ATA_CMD_READ_LONG 0x22 ///< defined in ATA-5\r
336#define ATA_CMD_READ_LONG_WITH_RETRY 0x23 ///< defined in ATA-5\r
337#define ATA_CMD_READ_SECTORS_EXT 0x24 ///< defined in ATA-6\r
8bdadcc8 338\r
8bdadcc8 339//\r
340// Class 2: PIO Data-Out Commands\r
341//\r
37640ed3 342#define ATA_CMD_FORMAT_TRACK 0x50 ///< defined in ATA-3\r
343#define ATA_CMD_WRITE_BUFFER 0xe8 ///< defined in ATA-6 \r
344#define ATA_CMD_WRITE_SECTORS 0x30 ///< defined in ATA-6\r
345#define ATA_CMD_WRITE_SECTORS_WITH_RETRY 0x31 ///< defined in ATA-4\r
346#define ATA_CMD_WRITE_LONG 0x32 ///< defined in ATA-3\r
347#define ATA_CMD_WRITE_LONG_WITH_RETRY 0x33 ///< defined in ATA-3\r
348#define ATA_CMD_WRITE_VERIFY 0x3c ///< defined in ATA-3\r
349#define ATA_CMD_WRITE_SECTORS_EXT 0x34 ///< defined in ATA-6\r
8bdadcc8 350\r
351//\r
352// Class 3 No Data Command\r
353//\r
37640ed3 354#define ATA_CMD_ACK_MEDIA_CHANGE 0xdb ///< defined in ATA-2\r
355#define ATA_CMD_BOOT_POST_BOOT 0xdc ///< defined in ATA-2\r
356#define ATA_CMD_BOOT_PRE_BOOT 0xdd ///< defined in ATA-2\r
357#define ATA_CMD_CHECK_POWER_MODE 0x98 ///< defined in ATA-3\r
358#define ATA_CMD_CHECK_POWER_MODE_ALIAS 0xe5 ///< defined in ATA-6\r
359#define ATA_CMD_DOOR_LOCK 0xde ///< defined in ATA-6\r
360#define ATA_CMD_DOOR_UNLOCK 0xdf ///< defined in ATA-6\r
361#define ATA_CMD_EXEC_DRIVE_DIAG 0x90 ///< defined in ATA-6\r
362#define ATA_CMD_IDLE_ALIAS 0x97 ///< defined in ATA-3\r
363#define ATA_CMD_IDLE 0xe3 ///< defined in ATA-6\r
364#define ATA_CMD_IDLE_IMMEDIATE 0x95 ///< defined in ATA-3\r
365#define ATA_CMD_IDLE_IMMEDIATE_ALIAS 0xe1 ///< defined in ATA-6\r
366#define ATA_CMD_INIT_DRIVE_PARAM 0x91 ///< defined in ATA-5\r
367#define ATA_CMD_RECALIBRATE 0x10 ///< defined in ATA-3\r
368#define ATA_CMD_READ_DRIVE_STATE 0xe9 ///< defined in ATA-2\r
369#define ATA_CMD_SET_MULTIPLE_MODE 0xC6 ///< defined in ATA-6\r
370#define ATA_CMD_READ_VERIFY 0x40 ///< defined in ATA-6\r
371#define ATA_CMD_READ_VERIFY_WITH_RETRY 0x41 ///< defined in ATA-4\r
372#define ATA_CMD_SEEK 0x70 ///< defined in ATA-6\r
373#define ATA_CMD_SET_FEATURES 0xef ///< defined in ATA-6\r
374#define ATA_CMD_STANDBY 0x96 ///< defined in ATA-3\r
375#define ATA_CMD_STANDBY_ALIAS 0xe2 ///< defined in ATA-6\r
376#define ATA_CMD_STANDBY_IMMEDIATE 0x94 ///< defined in ATA-3\r
377#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0 ///< defined in ATA-6\r
a2461f6b 378//\r
379// S.M.A.R.T\r
380//\r
8bdadcc8 381#define ATA_CMD_SMART 0xb0\r
382#define ATA_CONSTANT_C2 0xc2\r
383#define ATA_CONSTANT_4F 0x4f\r
384#define ATA_SMART_ENABLE_OPERATION 0xd8\r
385#define ATA_SMART_RETURN_STATUS 0xda\r
386\r
a2461f6b 387//\r
388// Class 4: DMA Command\r
389//\r
37640ed3 390#define ATA_CMD_READ_DMA 0xc8 ///< defined in ATA-6\r
391#define ATA_CMD_READ_DMA_WITH_RETRY 0xc9 ///< defined in ATA-4\r
392#define ATA_CMD_READ_DMA_EXT 0x25 ///< defined in ATA-6\r
393#define ATA_CMD_WRITE_DMA 0xca ///< defined in ATA-6\r
394#define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb ///< defined in ATA-4\r
395#define ATA_CMD_WRITE_DMA_EXT 0x35 ///< defined in ATA-6\r
a2461f6b 396 \r
37640ed3 397///\r
398/// default content of device control register, disable INT,\r
399/// Bit3 is set to 1 according ATA-1\r
400///\r
401#define ATA_DEFAULT_CTL (0x0a) \r
402///\r
403/// default context of Device/Head Register,\r
404/// Bit7 and Bit5 are set to 1 for back-compatibilities\r
405///\r
8bdadcc8 406#define ATA_DEFAULT_CMD (0xa0)\r
407\r
408#define ATAPI_MAX_BYTE_COUNT (0xfffe)\r
409\r
53bbea41 410#define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i\r
411\r
a2461f6b 412//\r
413// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r
414// defined in MultiMedia Commands (MMC, MMC-2) \r
415//\r
416// Sense Key \r
417//\r
8bdadcc8 418#define ATA_SK_NO_SENSE (0x0)\r
419#define ATA_SK_RECOVERY_ERROR (0x1)\r
420#define ATA_SK_NOT_READY (0x2)\r
421#define ATA_SK_MEDIUM_ERROR (0x3)\r
422#define ATA_SK_HARDWARE_ERROR (0x4)\r
423#define ATA_SK_ILLEGAL_REQUEST (0x5)\r
424#define ATA_SK_UNIT_ATTENTION (0x6)\r
425#define ATA_SK_DATA_PROTECT (0x7)\r
426#define ATA_SK_BLANK_CHECK (0x8)\r
427#define ATA_SK_VENDOR_SPECIFIC (0x9)\r
428#define ATA_SK_RESERVED_A (0xA)\r
429#define ATA_SK_ABORT (0xB)\r
430#define ATA_SK_RESERVED_C (0xC)\r
431#define ATA_SK_OVERFLOW (0xD)\r
432#define ATA_SK_MISCOMPARE (0xE)\r
433#define ATA_SK_RESERVED_F (0xF)\r
434\r
a2461f6b 435//\r
436// Additional Sense Codes\r
437//\r
8bdadcc8 438#define ATA_ASC_NOT_READY (0x04)\r
439#define ATA_ASC_MEDIA_ERR1 (0x10)\r
440#define ATA_ASC_MEDIA_ERR2 (0x11)\r
441#define ATA_ASC_MEDIA_ERR3 (0x14)\r
442#define ATA_ASC_MEDIA_ERR4 (0x30)\r
443#define ATA_ASC_MEDIA_UPSIDE_DOWN (0x06)\r
444#define ATA_ASC_INVALID_CMD (0x20)\r
445#define ATA_ASC_LBA_OUT_OF_RANGE (0x21)\r
446#define ATA_ASC_INVALID_FIELD (0x24)\r
447#define ATA_ASC_WRITE_PROTECTED (0x27)\r
448#define ATA_ASC_MEDIA_CHANGE (0x28)\r
37640ed3 449#define ATA_ASC_RESET (0x29) ///< Power On Reset or Bus Reset occurred\r
8bdadcc8 450#define ATA_ASC_ILLEGAL_FIELD (0x26)\r
451#define ATA_ASC_NO_MEDIA (0x3A)\r
452#define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r
453\r
454//\r
455// Additional Sense Code Qualifier\r
456//\r
457#define ATA_ASCQ_IN_PROGRESS (0x01)\r
458\r
a2461f6b 459//\r
460// Error Register\r
461//\r
37640ed3 462#define ATA_ERRREG_BBK BIT7 ///< Bad block detected defined in ATA-1\r
463#define ATA_ERRREG_UNC BIT6 ///< Uncorrectable Data defined in ATA-3\r
464#define ATA_ERRREG_MC BIT5 ///< Media Change defined in ATA-3\r
465#define ATA_ERRREG_IDNF BIT4 ///< ID Not Found defined in ATA-3\r
466#define ATA_ERRREG_MCR BIT3 ///< Media Change Requested defined in ATA-3\r
467#define ATA_ERRREG_ABRT BIT2 ///< Aborted Command defined in ATA-6\r
468#define ATA_ERRREG_TK0NF BIT1 ///< Track 0 Not Found defined in ATA-3\r
469#define ATA_ERRREG_AMNF BIT0 ///< Address Mark Not Found defined in ATA-3\r
8bdadcc8 470\r
a2461f6b 471//\r
472// Status Register\r
473//\r
37640ed3 474#define ATA_STSREG_BSY BIT7 ///< Controller Busy defined in ATA-6\r
475#define ATA_STSREG_DRDY BIT6 ///< Drive Ready defined in ATA-6\r
476#define ATA_STSREG_DWF BIT5 ///< Drive Write Fault defined in ATA-6\r
477#define ATA_STSREG_DSC BIT4 ///< Disk Seek Complete defined in ATA-3\r
478#define ATA_STSREG_DRQ BIT3 ///< Data Request defined in ATA-6\r
479#define ATA_STSREG_CORR BIT2 ///< Corrected Data defined in ATA-3\r
480#define ATA_STSREG_IDX BIT1 ///< Index defined in ATA-3\r
481#define ATA_STSREG_ERR BIT0 ///< Error defined in ATA-6\r
8bdadcc8 482\r
a2461f6b 483//\r
484// Device Control Register\r
485//\r
37640ed3 486#define ATA_CTLREG_SRST BIT2 ///< Software Reset\r
487#define ATA_CTLREG_IEN_L BIT1 ///< Interrupt Enable #\r
8bdadcc8 488\r
489#endif\r
490\r
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