OvmfPkg/PlatformPei: Add mBootMode driver variable
[mirror_edk2.git] / OvmfPkg / PlatformPei / Platform.c
CommitLineData
49ba9447 1/**@file\r
2 Platform PEI driver\r
3\r
869b17cc 4 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
eec7d420 5 Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>\r
6\r
56d7640a 7 This program and the accompanying materials\r
49ba9447 8 are licensed and made available under the terms and conditions of the BSD License\r
9 which accompanies this distribution. The full text of the license may be found at\r
10 http://opensource.org/licenses/bsd-license.php\r
11\r
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15**/\r
16\r
17//\r
18// The package level header files this module uses\r
19//\r
20#include <PiPei.h>\r
21\r
22//\r
23// The Library classes this module consumes\r
24//\r
25#include <Library/DebugLib.h>\r
26#include <Library/HobLib.h>\r
27#include <Library/IoLib.h>\r
77ba993c 28#include <Library/MemoryAllocationLib.h>\r
29#include <Library/PcdLib.h>\r
49ba9447 30#include <Library/PciLib.h>\r
31#include <Library/PeimEntryPoint.h>\r
9ed65b10 32#include <Library/PeiServicesLib.h>\r
49ba9447 33#include <Library/ResourcePublicationLib.h>\r
34#include <Guid/MemoryTypeInformation.h>\r
9ed65b10 35#include <Ppi/MasterBootMode.h>\r
931a0c74 36#include <IndustryStandard/Pci22.h>\r
49ba9447 37\r
38#include "Platform.h"\r
3ca15914 39#include "Cmos.h"\r
49ba9447 40\r
41EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {\r
42 { EfiACPIMemoryNVS, 0x004 },\r
991d9563 43 { EfiACPIReclaimMemory, 0x008 },\r
55cdb67a 44 { EfiReservedMemoryType, 0x004 },\r
991d9563 45 { EfiRuntimeServicesData, 0x024 },\r
46 { EfiRuntimeServicesCode, 0x030 },\r
47 { EfiBootServicesCode, 0x180 },\r
48 { EfiBootServicesData, 0xF00 },\r
49ba9447 49 { EfiMaxMemoryType, 0x000 }\r
50};\r
51\r
52\r
9ed65b10 53EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {\r
54 {\r
55 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r
56 &gEfiPeiMasterBootModePpiGuid,\r
57 NULL\r
58 }\r
59};\r
60\r
61\r
979420df
JJ
62EFI_BOOT_MODE mBootMode = BOOT_WITH_FULL_CONFIGURATION;\r
63\r
64\r
49ba9447 65VOID\r
66AddIoMemoryBaseSizeHob (\r
67 EFI_PHYSICAL_ADDRESS MemoryBase,\r
68 UINT64 MemorySize\r
69 )\r
70{\r
991d9563 71 BuildResourceDescriptorHob (\r
72 EFI_RESOURCE_MEMORY_MAPPED_IO,\r
49ba9447 73 EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
74 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
75 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
991d9563 76 EFI_RESOURCE_ATTRIBUTE_TESTED,\r
49ba9447 77 MemoryBase,\r
78 MemorySize\r
79 );\r
80}\r
81\r
eec7d420 82VOID\r
83AddReservedMemoryBaseSizeHob (\r
84 EFI_PHYSICAL_ADDRESS MemoryBase,\r
85 UINT64 MemorySize\r
86 )\r
87{\r
88 BuildResourceDescriptorHob (\r
89 EFI_RESOURCE_MEMORY_RESERVED,\r
90 EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
91 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
92 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
93 EFI_RESOURCE_ATTRIBUTE_TESTED,\r
94 MemoryBase,\r
95 MemorySize\r
96 );\r
97}\r
49ba9447 98\r
99VOID\r
100AddIoMemoryRangeHob (\r
101 EFI_PHYSICAL_ADDRESS MemoryBase,\r
102 EFI_PHYSICAL_ADDRESS MemoryLimit\r
103 )\r
104{\r
105 AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
106}\r
107\r
108\r
109VOID\r
110AddMemoryBaseSizeHob (\r
111 EFI_PHYSICAL_ADDRESS MemoryBase,\r
112 UINT64 MemorySize\r
113 )\r
114{\r
991d9563 115 BuildResourceDescriptorHob (\r
116 EFI_RESOURCE_SYSTEM_MEMORY,\r
49ba9447 117 EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
118 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
119 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
120 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
121 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
122 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r
991d9563 123 EFI_RESOURCE_ATTRIBUTE_TESTED,\r
49ba9447 124 MemoryBase,\r
125 MemorySize\r
126 );\r
127}\r
128\r
129\r
130VOID\r
131AddMemoryRangeHob (\r
132 EFI_PHYSICAL_ADDRESS MemoryBase,\r
133 EFI_PHYSICAL_ADDRESS MemoryLimit\r
134 )\r
135{\r
136 AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
137}\r
138\r
c0e10976 139\r
140VOID\r
141AddUntestedMemoryBaseSizeHob (\r
142 EFI_PHYSICAL_ADDRESS MemoryBase,\r
143 UINT64 MemorySize\r
144 )\r
145{\r
146 BuildResourceDescriptorHob (\r
147 EFI_RESOURCE_SYSTEM_MEMORY,\r
148 EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
149 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r
150 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r
151 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r
152 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r
153 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE,\r
154 MemoryBase,\r
155 MemorySize\r
156 );\r
157}\r
158\r
159\r
160VOID\r
161AddUntestedMemoryRangeHob (\r
162 EFI_PHYSICAL_ADDRESS MemoryBase,\r
163 EFI_PHYSICAL_ADDRESS MemoryLimit\r
164 )\r
165{\r
166 AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r
167}\r
168\r
bb6a9a93 169VOID\r
4b455f7b 170MemMapInitialization (\r
bb6a9a93
WL
171 VOID\r
172 )\r
173{\r
bb6a9a93
WL
174 //\r
175 // Create Memory Type Information HOB\r
176 //\r
177 BuildGuidDataHob (\r
178 &gEfiMemoryTypeInformationGuid,\r
179 mDefaultMemoryTypeInformation,\r
180 sizeof(mDefaultMemoryTypeInformation)\r
181 );\r
182\r
183 //\r
184 // Add PCI IO Port space available for PCI resource allocations.\r
185 //\r
186 BuildResourceDescriptorHob (\r
187 EFI_RESOURCE_IO,\r
188 EFI_RESOURCE_ATTRIBUTE_PRESENT |\r
189 EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r
190 0xC000,\r
191 0x4000\r
192 );\r
193\r
194 //\r
195 // Video memory + Legacy BIOS region\r
196 //\r
197 AddIoMemoryRangeHob (0x0A0000, BASE_1MB);\r
198\r
4b455f7b
JJ
199 if (!mXen) {\r
200 UINT32 TopOfLowRam;\r
201 TopOfLowRam = GetSystemMemorySizeBelow4gb ();\r
49ba9447 202\r
4b455f7b
JJ
203 //\r
204 // address purpose size\r
205 // ------------ -------- -------------------------\r
206 // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g)\r
207 // 0xFC000000 gap 44 MB\r
208 // 0xFEC00000 IO-APIC 4 KB\r
209 // 0xFEC01000 gap 1020 KB\r
210 // 0xFED00000 HPET 1 KB\r
211 // 0xFED00400 gap 1023 KB\r
212 // 0xFEE00000 LAPIC 1 MB\r
213 //\r
214 AddIoMemoryRangeHob (TopOfLowRam < BASE_2GB ?\r
215 BASE_2GB : TopOfLowRam, 0xFC000000);\r
216 AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);\r
217 AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);\r
218 AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);\r
4b455f7b 219 }\r
49ba9447 220}\r
221\r
222\r
223VOID\r
224MiscInitialization (\r
0e20a186 225 VOID\r
49ba9447 226 )\r
227{\r
228 //\r
229 // Disable A20 Mask\r
230 //\r
55cdb67a 231 IoOr8 (0x92, BIT1);\r
49ba9447 232\r
233 //\r
234 // Build the CPU hob with 36-bit addressing and 16-bits of IO space.\r
235 //\r
236 BuildCpuHob (36, 16);\r
c756b2ab 237\r
0e20a186 238 //\r
239 // If PMREGMISC/PMIOSE is set, assume the ACPI PMBA has been configured (for\r
240 // example by Xen) and skip the setup here. This matches the logic in\r
241 // AcpiTimerLibConstructor ().\r
242 //\r
243 if ((PciRead8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80)) & 0x01) == 0) {\r
eec7d420 244 //\r
931a0c74 245 // The PEI phase should be exited with fully accessibe PIIX4 IO space:\r
246 // 1. set PMBA\r
eec7d420 247 //\r
931a0c74 248 PciAndThenOr32 (\r
249 PCI_LIB_ADDRESS (0, 1, 3, 0x40),\r
250 (UINT32) ~0xFFC0,\r
251 PcdGet16 (PcdAcpiPmBaseAddress)\r
252 );\r
253\r
254 //\r
255 // 2. set PCICMD/IOSE\r
256 //\r
257 PciOr8 (\r
258 PCI_LIB_ADDRESS (0, 1, 3, PCI_COMMAND_OFFSET),\r
259 EFI_PCI_COMMAND_IO_SPACE\r
260 );\r
261\r
262 //\r
263 // 3. set PMREGMISC/PMIOSE\r
264 //\r
265 PciOr8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80), 0x01);\r
eec7d420 266 }\r
49ba9447 267}\r
268\r
269\r
9ed65b10 270VOID\r
271BootModeInitialization (\r
8f5ca05b 272 VOID\r
9ed65b10 273 )\r
274{\r
8f5ca05b
LE
275 EFI_STATUS Status;\r
276\r
277 if (CmosRead8 (0xF) == 0xFE) {\r
979420df 278 mBootMode = BOOT_ON_S3_RESUME;\r
8f5ca05b 279 }\r
667bf1e4 280\r
979420df 281 Status = PeiServicesSetBootMode (mBootMode);\r
667bf1e4 282 ASSERT_EFI_ERROR (Status);\r
283\r
284 Status = PeiServicesInstallPpi (mPpiBootMode);\r
285 ASSERT_EFI_ERROR (Status);\r
9ed65b10 286}\r
287\r
288\r
77ba993c 289VOID\r
290ReserveEmuVariableNvStore (\r
291 )\r
292{\r
293 EFI_PHYSICAL_ADDRESS VariableStore;\r
294\r
295 //\r
296 // Allocate storage for NV variables early on so it will be\r
297 // at a consistent address. Since VM memory is preserved\r
298 // across reboots, this allows the NV variable storage to survive\r
299 // a VM reboot.\r
300 //\r
301 VariableStore =\r
302 (EFI_PHYSICAL_ADDRESS)(UINTN)\r
9edb2933 303 AllocateAlignedRuntimePages (\r
cce992ac
WL
304 EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)),\r
305 PcdGet32 (PcdFlashNvStorageFtwSpareSize)\r
27f58ea1 306 );\r
77ba993c 307 DEBUG ((EFI_D_INFO,\r
308 "Reserved variable store memory: 0x%lX; size: %dkb\n",\r
309 VariableStore,\r
29a3f139 310 (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024\r
77ba993c 311 ));\r
312 PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore);\r
313}\r
314\r
315\r
3ca15914 316VOID\r
317DebugDumpCmos (\r
318 VOID\r
319 )\r
320{\r
321 UINTN Loop;\r
322\r
323 DEBUG ((EFI_D_INFO, "CMOS:\n"));\r
324\r
325 for (Loop = 0; Loop < 0x80; Loop++) {\r
326 if ((Loop % 0x10) == 0) {\r
327 DEBUG ((EFI_D_INFO, "%02x:", Loop));\r
328 }\r
329 DEBUG ((EFI_D_INFO, " %02x", CmosRead8 (Loop)));\r
330 if ((Loop % 0x10) == 0xf) {\r
331 DEBUG ((EFI_D_INFO, "\n"));\r
332 }\r
333 }\r
334}\r
335\r
336\r
49ba9447 337/**\r
338 Perform Platform PEI initialization.\r
339\r
340 @param FileHandle Handle of the file being invoked.\r
341 @param PeiServices Describes the list of possible PEI Services.\r
342\r
343 @return EFI_SUCCESS The PEIM initialized successfully.\r
344\r
345**/\r
346EFI_STATUS\r
347EFIAPI\r
348InitializePlatform (\r
349 IN EFI_PEI_FILE_HANDLE FileHandle,\r
350 IN CONST EFI_PEI_SERVICES **PeiServices\r
351 )\r
352{\r
353 DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));\r
354\r
3ca15914 355 DebugDumpCmos ();\r
356\r
b98b4941 357 XenDetect ();\r
c7ea55b9 358\r
869b17cc
JJ
359 BootModeInitialization ();\r
360\r
f76e9eba
JJ
361 PublishPeiMemory ();\r
362\r
2818c158 363 InitializeRamRegions ();\r
49ba9447 364\r
b621bb0a 365 if (mXen) {\r
c7ea55b9 366 DEBUG ((EFI_D_INFO, "Xen was detected\n"));\r
b98b4941 367 InitializeXen ();\r
c7ea55b9 368 }\r
eec7d420 369\r
77ba993c 370 ReserveEmuVariableNvStore ();\r
371\r
49ba9447 372 PeiFvInitialization ();\r
373\r
4b455f7b 374 MemMapInitialization ();\r
49ba9447 375\r
0e20a186 376 MiscInitialization ();\r
49ba9447 377\r
378 return EFI_SUCCESS;\r
379}\r