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1f569620 | 1 | /** @file\r |
e48e0742 | 2 | This module produces the EFI_PEI_S3_RESUME2_PPI.\r |
1f569620 | 3 | This module works with StandAloneBootScriptExecutor to S3 resume to OS.\r |
438f1766 | 4 | This module will execute the boot script saved during last boot and after that,\r |
1f569620 | 5 | control is passed to OS waking up handler.\r |
6 | \r | |
6acf7290 | 7 | Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>\r |
787a085b | 8 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
1f569620 | 9 | \r |
0acd8697 | 10 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
1f569620 | 11 | \r |
12 | **/\r | |
13 | \r | |
14 | #include <PiPei.h>\r | |
15 | \r | |
16 | #include <Guid/AcpiS3Context.h>\r | |
17 | #include <Guid/BootScriptExecutorVariable.h>\r | |
582e4e44 | 18 | #include <Guid/ExtendedFirmwarePerformance.h>\r |
a85e7127 | 19 | #include <Guid/EndOfS3Resume.h>\r |
5b29e438 | 20 | #include <Guid/S3SmmInitDone.h>\r |
1f569620 | 21 | #include <Ppi/S3Resume2.h>\r |
22 | #include <Ppi/SmmAccess.h>\r | |
23 | #include <Ppi/PostBootScriptTable.h>\r | |
24 | #include <Ppi/EndOfPeiPhase.h>\r | |
18b13fab ED |
25 | #include <Ppi/SmmCommunication.h>\r |
26 | \r | |
1f569620 | 27 | #include <Library/DebugLib.h>\r |
28 | #include <Library/BaseLib.h>\r | |
1f569620 | 29 | #include <Library/PeimEntryPoint.h>\r |
30 | #include <Library/PeiServicesLib.h>\r | |
31 | #include <Library/HobLib.h>\r | |
32 | #include <Library/PerformanceLib.h>\r | |
33 | #include <Library/PeiServicesTablePointerLib.h>\r | |
34 | #include <Library/IoLib.h>\r | |
35 | #include <Library/BaseMemoryLib.h>\r | |
36 | #include <Library/MemoryAllocationLib.h>\r | |
37 | #include <Library/PcdLib.h>\r | |
38 | #include <Library/DebugAgentLib.h>\r | |
39 | #include <Library/LocalApicLib.h>\r | |
40 | #include <Library/ReportStatusCodeLib.h>\r | |
997731e7 | 41 | \r |
c56b6566 | 42 | #include <Library/HobLib.h>\r |
1f569620 | 43 | #include <Library/LockBoxLib.h>\r |
44 | #include <IndustryStandard/Acpi.h>\r | |
45 | \r | |
f98f5ec3 LE |
46 | /**\r |
47 | This macro aligns the address of a variable with auto storage\r | |
48 | duration down to CPU_STACK_ALIGNMENT.\r | |
49 | \r | |
50 | Since the stack grows downward, the result preserves more of the\r | |
51 | stack than the original address (or the same amount), not less.\r | |
52 | **/\r | |
53 | #define STACK_ALIGN_DOWN(Ptr) \\r | |
54 | ((UINTN)(Ptr) & ~(UINTN)(CPU_STACK_ALIGNMENT - 1))\r | |
55 | \r | |
787a085b LD |
56 | #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull\r |
57 | \r | |
1f569620 | 58 | #pragma pack(1)\r |
59 | typedef union {\r | |
60 | struct {\r | |
053e878b MK |
61 | UINT32 LimitLow : 16;\r |
62 | UINT32 BaseLow : 16;\r | |
63 | UINT32 BaseMid : 8;\r | |
64 | UINT32 Type : 4;\r | |
65 | UINT32 System : 1;\r | |
66 | UINT32 Dpl : 2;\r | |
67 | UINT32 Present : 1;\r | |
68 | UINT32 LimitHigh : 4;\r | |
69 | UINT32 Software : 1;\r | |
70 | UINT32 Reserved : 1;\r | |
71 | UINT32 DefaultSize : 1;\r | |
72 | UINT32 Granularity : 1;\r | |
73 | UINT32 BaseHigh : 8;\r | |
1f569620 | 74 | } Bits;\r |
053e878b | 75 | UINT64 Uint64;\r |
1f569620 | 76 | } IA32_GDT;\r |
77 | \r | |
78 | //\r | |
79 | // Page-Map Level-4 Offset (PML4) and\r | |
80 | // Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB\r | |
81 | //\r | |
82 | typedef union {\r | |
83 | struct {\r | |
053e878b MK |
84 | UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r |
85 | UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r | |
86 | UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r | |
87 | UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r | |
88 | UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r | |
89 | UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r | |
90 | UINT64 Reserved : 1; // Reserved\r | |
91 | UINT64 MustBeZero : 2; // Must Be Zero\r | |
92 | UINT64 Available : 3; // Available for use by system software\r | |
93 | UINT64 PageTableBaseAddress : 40; // Page Table Base Address\r | |
94 | UINT64 AvabilableHigh : 11; // Available for use by system software\r | |
95 | UINT64 Nx : 1; // No Execute bit\r | |
1f569620 | 96 | } Bits;\r |
97 | UINT64 Uint64;\r | |
98 | } PAGE_MAP_AND_DIRECTORY_POINTER;\r | |
99 | \r | |
100 | //\r | |
101 | // Page Table Entry 2MB\r | |
102 | //\r | |
103 | typedef union {\r | |
104 | struct {\r | |
053e878b MK |
105 | UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r |
106 | UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r | |
107 | UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r | |
108 | UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r | |
109 | UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r | |
110 | UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r | |
111 | UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page\r | |
112 | UINT64 MustBe1 : 1; // Must be 1\r | |
113 | UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r | |
114 | UINT64 Available : 3; // Available for use by system software\r | |
115 | UINT64 PAT : 1; //\r | |
116 | UINT64 MustBeZero : 8; // Must be zero;\r | |
117 | UINT64 PageTableBaseAddress : 31; // Page Table Base Address\r | |
118 | UINT64 AvabilableHigh : 11; // Available for use by system software\r | |
119 | UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution\r | |
1f569620 | 120 | } Bits;\r |
121 | UINT64 Uint64;\r | |
122 | } PAGE_TABLE_ENTRY;\r | |
123 | \r | |
c56b6566 JY |
124 | //\r |
125 | // Page Table Entry 1GB\r | |
126 | //\r | |
127 | typedef union {\r | |
128 | struct {\r | |
053e878b MK |
129 | UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r |
130 | UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r | |
131 | UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r | |
132 | UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r | |
133 | UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r | |
134 | UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r | |
135 | UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page\r | |
136 | UINT64 MustBe1 : 1; // Must be 1\r | |
137 | UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r | |
138 | UINT64 Available : 3; // Available for use by system software\r | |
139 | UINT64 PAT : 1; //\r | |
140 | UINT64 MustBeZero : 17; // Must be zero;\r | |
141 | UINT64 PageTableBaseAddress : 22; // Page Table Base Address\r | |
142 | UINT64 AvabilableHigh : 11; // Available for use by system software\r | |
143 | UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution\r | |
c56b6566 JY |
144 | } Bits;\r |
145 | UINT64 Uint64;\r | |
146 | } PAGE_TABLE_1G_ENTRY;\r | |
147 | \r | |
18b13fab ED |
148 | //\r |
149 | // Define two type of smm communicate headers.\r | |
a85e7127 | 150 | // One for 32 bits PEI + 64 bits DXE, the other for 32 bits PEI + 32 bits DXE case.\r |
18b13fab ED |
151 | //\r |
152 | typedef struct {\r | |
053e878b MK |
153 | EFI_GUID HeaderGuid;\r |
154 | UINT32 MessageLength;\r | |
155 | UINT8 Data[1];\r | |
18b13fab ED |
156 | } SMM_COMMUNICATE_HEADER_32;\r |
157 | \r | |
158 | typedef struct {\r | |
053e878b MK |
159 | EFI_GUID HeaderGuid;\r |
160 | UINT64 MessageLength;\r | |
161 | UINT8 Data[1];\r | |
18b13fab ED |
162 | } SMM_COMMUNICATE_HEADER_64;\r |
163 | \r | |
1f569620 | 164 | #pragma pack()\r |
165 | \r | |
166 | //\r | |
167 | // Function prototypes\r | |
168 | //\r | |
053e878b | 169 | \r |
1f569620 | 170 | /**\r |
171 | a ASM function to transfer control to OS.\r | |
7367cc6c | 172 | \r |
1f569620 | 173 | @param S3WakingVector The S3 waking up vector saved in ACPI Facs table\r |
7367cc6c | 174 | @param AcpiLowMemoryBase a buffer under 1M which could be used during the transfer\r |
1f569620 | 175 | **/\r |
176 | typedef\r | |
177 | VOID\r | |
053e878b | 178 | (EFIAPI *ASM_TRANSFER_CONTROL)(\r |
1f569620 | 179 | IN UINT32 S3WakingVector,\r |
180 | IN UINT32 AcpiLowMemoryBase\r | |
181 | );\r | |
182 | \r | |
183 | /**\r | |
184 | Restores the platform to its preboot configuration for an S3 resume and\r | |
185 | jumps to the OS waking vector.\r | |
186 | \r | |
187 | This function will restore the platform to its pre-boot configuration that was\r | |
188 | pre-stored in the boot script table and transfer control to OS waking vector.\r | |
189 | Upon invocation, this function is responsible for locating the following\r | |
190 | information before jumping to OS waking vector:\r | |
191 | - ACPI tables\r | |
192 | - boot script table\r | |
193 | - any other information that it needs\r | |
194 | \r | |
195 | The S3RestoreConfig() function then executes the pre-stored boot script table\r | |
196 | and transitions the platform to the pre-boot state. The boot script is recorded\r | |
197 | during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r | |
198 | EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r | |
199 | transfers control to the OS waking vector. If the OS supports only a real-mode\r | |
200 | waking vector, this function will switch from flat mode to real mode before\r | |
201 | jumping to the waking vector. If all platform pre-boot configurations are\r | |
202 | successfully restored and all other necessary information is ready, this\r | |
203 | function will never return and instead will directly jump to the OS waking\r | |
204 | vector. If this function returns, it indicates that the attempt to resume\r | |
205 | from the ACPI S3 sleep state failed.\r | |
206 | \r | |
207 | @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r | |
208 | \r | |
209 | @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r | |
210 | @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r | |
211 | resume boot path could not be located.\r | |
212 | \r | |
213 | **/\r | |
214 | EFI_STATUS\r | |
215 | EFIAPI\r | |
216 | S3RestoreConfig2 (\r | |
217 | IN EFI_PEI_S3_RESUME2_PPI *This\r | |
218 | );\r | |
219 | \r | |
abef469f | 220 | /**\r |
221 | Set data segment selectors value including DS/ES/FS/GS/SS.\r | |
222 | \r | |
223 | @param[in] SelectorValue Segment selector value to be set.\r | |
224 | \r | |
225 | **/\r | |
226 | VOID\r | |
227 | EFIAPI\r | |
228 | AsmSetDataSelectors (\r | |
053e878b | 229 | IN UINT16 SelectorValue\r |
abef469f | 230 | );\r |
231 | \r | |
1f569620 | 232 | //\r |
233 | // Globals\r | |
234 | //\r | |
053e878b | 235 | EFI_PEI_S3_RESUME2_PPI mS3ResumePpi = { S3RestoreConfig2 };\r |
1f569620 | 236 | \r |
053e878b | 237 | EFI_PEI_PPI_DESCRIPTOR mPpiList = {\r |
1f569620 | 238 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r |
239 | &gEfiPeiS3Resume2PpiGuid,\r | |
240 | &mS3ResumePpi\r | |
241 | };\r | |
242 | \r | |
053e878b | 243 | EFI_PEI_PPI_DESCRIPTOR mPpiListPostScriptTable = {\r |
1f569620 | 244 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r |
245 | &gPeiPostScriptTablePpiGuid,\r | |
246 | 0\r | |
247 | };\r | |
248 | \r | |
053e878b | 249 | EFI_PEI_PPI_DESCRIPTOR mPpiListEndOfPeiTable = {\r |
1f569620 | 250 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r |
251 | &gEfiEndOfPeiSignalPpiGuid,\r | |
252 | 0\r | |
253 | };\r | |
254 | \r | |
053e878b | 255 | EFI_PEI_PPI_DESCRIPTOR mPpiListS3SmmInitDoneTable = {\r |
5b29e438 SZ |
256 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r |
257 | &gEdkiiS3SmmInitDoneGuid,\r | |
258 | 0\r | |
259 | };\r | |
260 | \r | |
1f569620 | 261 | //\r |
262 | // Global Descriptor Table (GDT)\r | |
263 | //\r | |
053e878b MK |
264 | GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r |
265 | /* selector { Global Segment Descriptor } */\r | |
266 | /* 0x00 */ {\r | |
267 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }\r | |
268 | },\r | |
269 | /* 0x08 */ {\r | |
270 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }\r | |
271 | },\r | |
272 | /* 0x10 */ {\r | |
273 | { 0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 1, 1, 0 }\r | |
274 | },\r | |
275 | /* 0x18 */ {\r | |
276 | { 0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 1, 1, 0 }\r | |
277 | },\r | |
278 | /* 0x20 */ {\r | |
279 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }\r | |
280 | },\r | |
281 | /* 0x28 */ {\r | |
282 | { 0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 0, 0, 1, 0 }\r | |
283 | },\r | |
284 | /* 0x30 */ {\r | |
285 | { 0xFFFF, 0, 0, 0x3, 1, 0, 1, 0xF, 0, 0, 0, 1, 0 }\r | |
286 | },\r | |
287 | /* 0x38 */ {\r | |
288 | { 0xFFFF, 0, 0, 0xB, 1, 0, 1, 0xF, 0, 1, 0, 1, 0 }\r | |
289 | },\r | |
290 | /* 0x40 */ {\r | |
291 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }\r | |
292 | },\r | |
1f569620 | 293 | };\r |
294 | \r | |
053e878b | 295 | #define DATA_SEGEMENT_SELECTOR 0x18\r |
abef469f | 296 | \r |
1f569620 | 297 | //\r |
298 | // IA32 Gdt register\r | |
299 | //\r | |
053e878b | 300 | GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR mGdt = {\r |
1f569620 | 301 | sizeof (mGdtEntries) - 1,\r |
053e878b MK |
302 | (UINTN)mGdtEntries\r |
303 | };\r | |
1f569620 | 304 | \r |
d0bf5623 JY |
305 | /**\r |
306 | The function will check if current waking vector is long mode.\r | |
307 | \r | |
308 | @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r | |
309 | \r | |
310 | @retval TRUE Current context need long mode waking vector.\r | |
311 | @retval FALSE Current context need not long mode waking vector.\r | |
312 | **/\r | |
313 | BOOLEAN\r | |
314 | IsLongModeWakingVector (\r | |
053e878b | 315 | IN ACPI_S3_CONTEXT *AcpiS3Context\r |
d0bf5623 JY |
316 | )\r |
317 | {\r | |
318 | EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r | |
319 | \r | |
053e878b | 320 | Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)((UINTN)(AcpiS3Context->AcpiFacsTable));\r |
d0bf5623 JY |
321 | if ((Facs == NULL) ||\r |
322 | (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r | |
053e878b MK |
323 | ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)))\r |
324 | {\r | |
d0bf5623 JY |
325 | // Something wrong with FACS\r |
326 | return FALSE;\r | |
327 | }\r | |
053e878b | 328 | \r |
d0bf5623 JY |
329 | if (Facs->XFirmwareWakingVector != 0) {\r |
330 | if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r | |
331 | ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r | |
053e878b MK |
332 | ((Facs->OspmFlags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0))\r |
333 | {\r | |
d0bf5623 | 334 | // Both BIOS and OS wants 64bit vector\r |
6acf7290 KT |
335 | ASSERT ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) == sizeof (UINT64)));\r |
336 | return TRUE;\r | |
d0bf5623 JY |
337 | }\r |
338 | }\r | |
053e878b | 339 | \r |
d0bf5623 JY |
340 | return FALSE;\r |
341 | }\r | |
342 | \r | |
18b13fab | 343 | /**\r |
5b29e438 SZ |
344 | Signal to SMM through communication buffer way.\r |
345 | \r | |
346 | @param[in] HandlerType SMI handler type to be signaled.\r | |
18b13fab | 347 | \r |
18b13fab | 348 | **/\r |
5b29e438 SZ |
349 | VOID\r |
350 | SignalToSmmByCommunication (\r | |
053e878b | 351 | IN EFI_GUID *HandlerType\r |
18b13fab ED |
352 | )\r |
353 | {\r | |
053e878b MK |
354 | EFI_STATUS Status;\r |
355 | EFI_PEI_SMM_COMMUNICATION_PPI *SmmCommunicationPpi;\r | |
356 | UINTN CommSize;\r | |
357 | SMM_COMMUNICATE_HEADER_32 Header32;\r | |
358 | SMM_COMMUNICATE_HEADER_64 Header64;\r | |
359 | VOID *CommBuffer;\r | |
18b13fab | 360 | \r |
5b29e438 | 361 | DEBUG ((DEBUG_INFO, "Signal %g to SMM - Enter\n", HandlerType));\r |
18b13fab ED |
362 | \r |
363 | //\r | |
364 | // This buffer consumed in DXE phase, so base on DXE mode to prepare communicate buffer.\r | |
365 | // Detect whether DXE is 64 bits mode.\r | |
366 | // if (sizeof(UINTN) == sizeof(UINT64), PEI already 64 bits, assume DXE also 64 bits.\r | |
a85e7127 | 367 | // or (FeaturePcdGet (PcdDxeIplSwitchToLongMode)), DXE will switch to 64 bits.\r |
18b13fab | 368 | //\r |
053e878b MK |
369 | if ((sizeof (UINTN) == sizeof (UINT64)) || (FeaturePcdGet (PcdDxeIplSwitchToLongMode))) {\r |
370 | CommBuffer = &Header64;\r | |
18b13fab | 371 | Header64.MessageLength = 0;\r |
053e878b | 372 | CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_64, Data);\r |
18b13fab | 373 | } else {\r |
053e878b | 374 | CommBuffer = &Header32;\r |
18b13fab | 375 | Header32.MessageLength = 0;\r |
053e878b | 376 | CommSize = OFFSET_OF (SMM_COMMUNICATE_HEADER_32, Data);\r |
18b13fab | 377 | }\r |
053e878b | 378 | \r |
5b29e438 | 379 | CopyGuid (CommBuffer, HandlerType);\r |
18b13fab | 380 | \r |
18b13fab ED |
381 | Status = PeiServicesLocatePpi (\r |
382 | &gEfiPeiSmmCommunicationPpiGuid,\r | |
383 | 0,\r | |
384 | NULL,\r | |
385 | (VOID **)&SmmCommunicationPpi\r | |
386 | );\r | |
152e8d76 ED |
387 | if (EFI_ERROR (Status)) {\r |
388 | DEBUG ((DEBUG_ERROR, "Locate Smm Communicate Ppi failed (%r)!\n", Status));\r | |
5b29e438 | 389 | return;\r |
152e8d76 | 390 | }\r |
18b13fab | 391 | \r |
18b13fab ED |
392 | Status = SmmCommunicationPpi->Communicate (\r |
393 | SmmCommunicationPpi,\r | |
394 | (VOID *)CommBuffer,\r | |
395 | &CommSize\r | |
396 | );\r | |
152e8d76 ED |
397 | if (EFI_ERROR (Status)) {\r |
398 | DEBUG ((DEBUG_ERROR, "SmmCommunicationPpi->Communicate return failure (%r)!\n", Status));\r | |
399 | }\r | |
18b13fab | 400 | \r |
5b29e438 SZ |
401 | DEBUG ((DEBUG_INFO, "Signal %g to SMM - Exit (%r)\n", HandlerType, Status));\r |
402 | return;\r | |
18b13fab ED |
403 | }\r |
404 | \r | |
1f569620 | 405 | /**\r |
406 | Jump to OS waking vector.\r | |
407 | The function will install boot script done PPI, report S3 resume status code, and then jump to OS waking vector.\r | |
408 | \r | |
409 | @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r | |
410 | @param PeiS3ResumeState a pointer to a structure of PEI_S3_RESUME_STATE\r | |
411 | **/\r | |
412 | VOID\r | |
413 | EFIAPI\r | |
414 | S3ResumeBootOs (\r | |
053e878b MK |
415 | IN ACPI_S3_CONTEXT *AcpiS3Context,\r |
416 | IN PEI_S3_RESUME_STATE *PeiS3ResumeState\r | |
1f569620 | 417 | )\r |
418 | {\r | |
419 | EFI_STATUS Status;\r | |
420 | EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r | |
421 | ASM_TRANSFER_CONTROL AsmTransferControl;\r | |
422 | UINTN TempStackTop;\r | |
423 | UINTN TempStack[0x10];\r | |
424 | \r | |
425 | //\r | |
426 | // Restore IDT\r | |
427 | //\r | |
428 | AsmWriteIdtr (&PeiS3ResumeState->Idtr);\r | |
429 | \r | |
f6d5cbe7 | 430 | if (PeiS3ResumeState->ReturnStatus != EFI_SUCCESS) {\r |
431 | //\r | |
432 | // Report Status code that boot script execution is failed\r | |
433 | //\r | |
434 | REPORT_STATUS_CODE (\r | |
435 | EFI_ERROR_CODE | EFI_ERROR_MINOR,\r | |
436 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)\r | |
437 | );\r | |
438 | }\r | |
439 | \r | |
f5c941b1 | 440 | //\r |
7367cc6c | 441 | // NOTE: Because Debug Timer interrupt and system interrupts will be disabled\r |
f5c941b1 | 442 | // in BootScriptExecuteDxe, the rest code in S3ResumeBootOs() cannot be halted\r |
443 | // by soft debugger.\r | |
444 | //\r | |
445 | \r | |
e5735040 | 446 | PERF_INMODULE_END ("ScriptExec");\r |
5c0687cc | 447 | \r |
1f569620 | 448 | //\r |
449 | // Install BootScriptDonePpi\r | |
450 | //\r | |
e5735040 | 451 | PERF_INMODULE_BEGIN ("BootScriptDonePpi");\r |
582e4e44 | 452 | \r |
1f569620 | 453 | Status = PeiServicesInstallPpi (&mPpiListPostScriptTable);\r |
454 | ASSERT_EFI_ERROR (Status);\r | |
455 | \r | |
e5735040 | 456 | PERF_INMODULE_END ("BootScriptDonePpi");\r |
582e4e44 | 457 | \r |
1f569620 | 458 | //\r |
459 | // Get ACPI Table Address\r | |
460 | //\r | |
053e878b | 461 | Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)((UINTN)(AcpiS3Context->AcpiFacsTable));\r |
1f569620 | 462 | \r |
463 | if ((Facs == NULL) ||\r | |
464 | (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r | |
053e878b MK |
465 | ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)))\r |
466 | {\r | |
f6d5cbe7 | 467 | //\r |
468 | // Report Status code that no valid vector is found\r | |
469 | //\r | |
470 | REPORT_STATUS_CODE (\r | |
471 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
472 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r | |
473 | );\r | |
1f569620 | 474 | CpuDeadLoop ();\r |
053e878b | 475 | return;\r |
1f569620 | 476 | }\r |
477 | \r | |
1f569620 | 478 | //\r |
479 | // Install EndOfPeiPpi\r | |
480 | //\r | |
053e878b | 481 | PERF_INMODULE_BEGIN ("EndOfPeiPpi");\r |
582e4e44 | 482 | \r |
1f569620 | 483 | Status = PeiServicesInstallPpi (&mPpiListEndOfPeiTable);\r |
484 | ASSERT_EFI_ERROR (Status);\r | |
485 | \r | |
053e878b | 486 | PERF_INMODULE_END ("EndOfPeiPpi");\r |
582e4e44 | 487 | \r |
053e878b | 488 | PERF_INMODULE_BEGIN ("EndOfS3Resume");\r |
582e4e44 | 489 | \r |
5b29e438 SZ |
490 | DEBUG ((DEBUG_INFO, "Signal EndOfS3Resume\n"));\r |
491 | //\r | |
492 | // Signal EndOfS3Resume to SMM.\r | |
493 | //\r | |
494 | SignalToSmmByCommunication (&gEdkiiEndOfS3ResumeGuid);\r | |
18b13fab | 495 | \r |
e5735040 | 496 | PERF_INMODULE_END ("EndOfS3Resume");\r |
582e4e44 | 497 | \r |
26c0ba77 SZ |
498 | //\r |
499 | // report status code on S3 resume\r | |
500 | //\r | |
501 | REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE);\r | |
502 | \r | |
1f569620 | 503 | AsmTransferControl = (ASM_TRANSFER_CONTROL)(UINTN)PeiS3ResumeState->AsmTransferControl;\r |
504 | if (Facs->XFirmwareWakingVector != 0) {\r | |
505 | //\r | |
506 | // Switch to native waking vector\r | |
507 | //\r | |
053e878b | 508 | TempStackTop = (UINTN)&TempStack + sizeof (TempStack);\r |
af34c106 JF |
509 | DEBUG ((\r |
510 | DEBUG_INFO,\r | |
511 | "%a() Stack Base: 0x%x, Stack Size: 0x%x\n",\r | |
512 | __FUNCTION__,\r | |
513 | TempStackTop,\r | |
514 | sizeof (TempStack)\r | |
515 | ));\r | |
1f569620 | 516 | if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r |
517 | ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r | |
053e878b MK |
518 | ((Facs->OspmFlags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0))\r |
519 | {\r | |
1f569620 | 520 | //\r |
521 | // X64 long mode waking vector\r | |
522 | //\r | |
6acf7290 | 523 | DEBUG ((DEBUG_INFO, "Transfer from PEI to 64bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r |
1f569620 | 524 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r |
6acf7290 KT |
525 | //\r |
526 | // 32bit PEI calls to 64bit OS S3 waking vector\r | |
527 | //\r | |
1f569620 | 528 | AsmEnablePaging64 (\r |
529 | 0x38,\r | |
530 | Facs->XFirmwareWakingVector,\r | |
531 | 0,\r | |
532 | 0,\r | |
533 | (UINT64)(UINTN)TempStackTop\r | |
534 | );\r | |
535 | } else {\r | |
6acf7290 KT |
536 | if (sizeof (UINTN) == sizeof (UINT64)) {\r |
537 | //\r | |
538 | // 64bit PEI calls to 64bit OS S3 waking vector\r | |
539 | //\r | |
540 | SwitchStack (\r | |
541 | (SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,\r | |
542 | NULL,\r | |
543 | NULL,\r | |
544 | (VOID *)(UINTN)TempStackTop\r | |
545 | );\r | |
546 | } else {\r | |
547 | //\r | |
548 | // Report Status code that no valid waking vector is found.\r | |
549 | // Note: 32bit PEI + 32bit DXE firmware calling to 64bit OS S3 waking vector is an invalid configuration.\r | |
550 | //\r | |
551 | REPORT_STATUS_CODE (\r | |
552 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
553 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r | |
554 | );\r | |
555 | DEBUG ((DEBUG_ERROR, "Unsupported for 32bit DXE transfer to 64bit OS waking vector!\r\n"));\r | |
556 | ASSERT (FALSE);\r | |
557 | CpuDeadLoop ();\r | |
558 | return;\r | |
559 | }\r | |
1f569620 | 560 | }\r |
561 | } else {\r | |
562 | //\r | |
563 | // IA32 protected mode waking vector (Page disabled)\r | |
564 | //\r | |
c5719579 | 565 | DEBUG ((DEBUG_INFO, "Transfer to 32bit OS waking vector - %x\r\n", (UINTN)Facs->XFirmwareWakingVector));\r |
6acf7290 KT |
566 | if (sizeof (UINTN) == sizeof (UINT64)) {\r |
567 | //\r | |
568 | // 64bit PEI calls to 32bit OS S3 waking vector\r | |
569 | //\r | |
570 | AsmDisablePaging64 (\r | |
571 | 0x10,\r | |
572 | (UINT32)Facs->XFirmwareWakingVector,\r | |
573 | 0,\r | |
574 | 0,\r | |
575 | (UINT32)TempStackTop\r | |
576 | );\r | |
577 | } else {\r | |
578 | //\r | |
579 | // 32bit PEI calls to 32bit OS S3 waking vector\r | |
580 | //\r | |
581 | SwitchStack (\r | |
582 | (SWITCH_STACK_ENTRY_POINT)(UINTN)Facs->XFirmwareWakingVector,\r | |
583 | NULL,\r | |
584 | NULL,\r | |
585 | (VOID *)(UINTN)TempStackTop\r | |
586 | );\r | |
587 | }\r | |
1f569620 | 588 | }\r |
589 | } else {\r | |
590 | //\r | |
591 | // 16bit Realmode waking vector\r | |
592 | //\r | |
c5719579 | 593 | DEBUG ((DEBUG_INFO, "Transfer to 16bit OS waking vector - %x\r\n", (UINTN)Facs->FirmwareWakingVector));\r |
1f569620 | 594 | AsmTransferControl (Facs->FirmwareWakingVector, 0x0);\r |
595 | }\r | |
596 | \r | |
f6d5cbe7 | 597 | //\r |
598 | // Report Status code the failure of S3Resume\r | |
599 | //\r | |
600 | REPORT_STATUS_CODE (\r | |
601 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
602 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)\r | |
603 | );\r | |
604 | \r | |
1f569620 | 605 | //\r |
606 | // Never run to here\r | |
607 | //\r | |
053e878b | 608 | CpuDeadLoop ();\r |
1f569620 | 609 | }\r |
610 | \r | |
611 | /**\r | |
612 | Restore S3 page table because we do not trust ACPINvs content.\r | |
6acf7290 | 613 | If BootScriptExecutor driver will not run in 64-bit mode, this function will do nothing.\r |
1f569620 | 614 | \r |
615 | @param S3NvsPageTableAddress PageTableAddress in ACPINvs\r | |
d0bf5623 | 616 | @param Build4GPageTableOnly If BIOS just build 4G page table only\r |
1f569620 | 617 | **/\r |
618 | VOID\r | |
619 | RestoreS3PageTables (\r | |
053e878b MK |
620 | IN UINTN S3NvsPageTableAddress,\r |
621 | IN BOOLEAN Build4GPageTableOnly\r | |
1f569620 | 622 | )\r |
623 | {\r | |
6acf7290 | 624 | if ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) == sizeof (UINT64))) {\r |
053e878b MK |
625 | UINT32 RegEax;\r |
626 | UINT32 RegEdx;\r | |
627 | UINT8 PhysicalAddressBits;\r | |
628 | EFI_PHYSICAL_ADDRESS PageAddress;\r | |
629 | UINTN IndexOfPml4Entries;\r | |
630 | UINTN IndexOfPdpEntries;\r | |
631 | UINTN IndexOfPageDirectoryEntries;\r | |
632 | UINT32 NumberOfPml4EntriesNeeded;\r | |
633 | UINT32 NumberOfPdpEntriesNeeded;\r | |
634 | PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;\r | |
635 | PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;\r | |
636 | PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;\r | |
637 | PAGE_TABLE_ENTRY *PageDirectoryEntry;\r | |
638 | VOID *Hob;\r | |
639 | BOOLEAN Page1GSupport;\r | |
640 | PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;\r | |
641 | UINT64 AddressEncMask;\r | |
787a085b LD |
642 | \r |
643 | //\r | |
644 | // Make sure AddressEncMask is contained to smallest supported address field\r | |
645 | //\r | |
646 | AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;\r | |
1f569620 | 647 | \r |
648 | //\r | |
649 | // NOTE: We have to ASSUME the page table generation format, because we do not know whole page table information.\r | |
650 | // The whole page table is too large to be saved in SMRAM.\r | |
651 | //\r | |
438f1766 | 652 | // The assumption is : whole page table is allocated in CONTINUOUS memory and CR3 points to TOP page.\r |
1f569620 | 653 | //\r |
c5719579 | 654 | DEBUG ((DEBUG_INFO, "S3NvsPageTableAddress - %x (%x)\n", (UINTN)S3NvsPageTableAddress, (UINTN)Build4GPageTableOnly));\r |
1f569620 | 655 | \r |
656 | //\r | |
438f1766 | 657 | // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.\r |
1f569620 | 658 | //\r |
053e878b | 659 | PageMap = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r |
1f569620 | 660 | S3NvsPageTableAddress += SIZE_4KB;\r |
7367cc6c | 661 | \r |
c56b6566 | 662 | Page1GSupport = FALSE;\r |
053e878b | 663 | if (PcdGetBool (PcdUse1GPageTable)) {\r |
378175d2 JY |
664 | AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r |
665 | if (RegEax >= 0x80000001) {\r | |
666 | AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r | |
667 | if ((RegEdx & BIT26) != 0) {\r | |
668 | Page1GSupport = TRUE;\r | |
669 | }\r | |
c56b6566 JY |
670 | }\r |
671 | }\r | |
7367cc6c | 672 | \r |
1f569620 | 673 | //\r |
674 | // Get physical address bits supported.\r | |
675 | //\r | |
c56b6566 JY |
676 | Hob = GetFirstHob (EFI_HOB_TYPE_CPU);\r |
677 | if (Hob != NULL) {\r | |
053e878b | 678 | PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;\r |
1f569620 | 679 | } else {\r |
c56b6566 JY |
680 | AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r |
681 | if (RegEax >= 0x80000008) {\r | |
682 | AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r | |
053e878b | 683 | PhysicalAddressBits = (UINT8)RegEax;\r |
c56b6566 JY |
684 | } else {\r |
685 | PhysicalAddressBits = 36;\r | |
686 | }\r | |
1f569620 | 687 | }\r |
7367cc6c | 688 | \r |
c56b6566 JY |
689 | //\r |
690 | // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.\r | |
691 | //\r | |
692 | ASSERT (PhysicalAddressBits <= 52);\r | |
693 | if (PhysicalAddressBits > 48) {\r | |
694 | PhysicalAddressBits = 48;\r | |
695 | }\r | |
696 | \r | |
d0bf5623 JY |
697 | //\r |
698 | // NOTE: In order to save time to create full page table, we just create 4G page table by default.\r | |
699 | // And let PF handler in BootScript driver to create more on request.\r | |
700 | //\r | |
701 | if (Build4GPageTableOnly) {\r | |
702 | PhysicalAddressBits = 32;\r | |
053e878b | 703 | ZeroMem (PageMap, EFI_PAGES_TO_SIZE (2));\r |
d0bf5623 | 704 | }\r |
053e878b | 705 | \r |
1f569620 | 706 | //\r |
707 | // Calculate the table entries needed.\r | |
708 | //\r | |
709 | if (PhysicalAddressBits <= 39) {\r | |
710 | NumberOfPml4EntriesNeeded = 1;\r | |
053e878b | 711 | NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));\r |
1f569620 | 712 | } else {\r |
c56b6566 | 713 | NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));\r |
053e878b | 714 | NumberOfPdpEntriesNeeded = 512;\r |
1f569620 | 715 | }\r |
7367cc6c | 716 | \r |
1f569620 | 717 | PageMapLevel4Entry = PageMap;\r |
718 | PageAddress = 0;\r | |
719 | for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {\r | |
720 | //\r | |
721 | // Each PML4 entry points to a page of Page Directory Pointer entires.\r | |
722 | // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.\r | |
723 | //\r | |
724 | PageDirectoryPointerEntry = (PAGE_MAP_AND_DIRECTORY_POINTER *)S3NvsPageTableAddress;\r | |
053e878b | 725 | S3NvsPageTableAddress += SIZE_4KB;\r |
7367cc6c | 726 | \r |
1f569620 | 727 | //\r |
728 | // Make a PML4 Entry\r | |
729 | //\r | |
053e878b | 730 | PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;\r |
1f569620 | 731 | PageMapLevel4Entry->Bits.ReadWrite = 1;\r |
053e878b | 732 | PageMapLevel4Entry->Bits.Present = 1;\r |
c56b6566 JY |
733 | \r |
734 | if (Page1GSupport) {\r | |
053e878b | 735 | PageDirectory1GEntry = (VOID *)PageDirectoryPointerEntry;\r |
7367cc6c | 736 | \r |
c56b6566 | 737 | for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {\r |
1f569620 | 738 | //\r |
739 | // Fill in the Page Directory entries\r | |
740 | //\r | |
053e878b | 741 | PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r |
c56b6566 | 742 | PageDirectory1GEntry->Bits.ReadWrite = 1;\r |
053e878b MK |
743 | PageDirectory1GEntry->Bits.Present = 1;\r |
744 | PageDirectory1GEntry->Bits.MustBe1 = 1;\r | |
c56b6566 JY |
745 | }\r |
746 | } else {\r | |
747 | for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {\r | |
748 | //\r | |
749 | // Each Directory Pointer entries points to a page of Page Directory entires.\r | |
750 | // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.\r | |
7367cc6c | 751 | //\r |
053e878b | 752 | PageDirectoryEntry = (PAGE_TABLE_ENTRY *)S3NvsPageTableAddress;\r |
c56b6566 | 753 | S3NvsPageTableAddress += SIZE_4KB;\r |
7367cc6c | 754 | \r |
c56b6566 JY |
755 | //\r |
756 | // Fill in a Page Directory Pointer Entries\r | |
757 | //\r | |
053e878b | 758 | PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;\r |
c56b6566 | 759 | PageDirectoryPointerEntry->Bits.ReadWrite = 1;\r |
053e878b | 760 | PageDirectoryPointerEntry->Bits.Present = 1;\r |
7367cc6c | 761 | \r |
c56b6566 JY |
762 | for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += SIZE_2MB) {\r |
763 | //\r | |
764 | // Fill in the Page Directory entries\r | |
765 | //\r | |
053e878b | 766 | PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;\r |
c56b6566 | 767 | PageDirectoryEntry->Bits.ReadWrite = 1;\r |
053e878b MK |
768 | PageDirectoryEntry->Bits.Present = 1;\r |
769 | PageDirectoryEntry->Bits.MustBe1 = 1;\r | |
c56b6566 | 770 | }\r |
1f569620 | 771 | }\r |
772 | }\r | |
773 | }\r | |
053e878b MK |
774 | \r |
775 | return;\r | |
1f569620 | 776 | } else {\r |
7367cc6c LG |
777 | //\r |
778 | // If DXE is running 32-bit mode, no need to establish page table.\r | |
779 | //\r | |
053e878b | 780 | return;\r |
1f569620 | 781 | }\r |
782 | }\r | |
783 | \r | |
784 | /**\r | |
785 | Jump to boot script executor driver.\r | |
786 | \r | |
787 | The function will close and lock SMRAM and then jump to boot script execute driver to executing S3 boot script table.\r | |
788 | \r | |
789 | @param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r | |
790 | @param EfiBootScriptExecutorVariable The function entry to executing S3 boot Script table. This function is build in\r | |
791 | boot script execute driver\r | |
792 | **/\r | |
793 | VOID\r | |
794 | EFIAPI\r | |
795 | S3ResumeExecuteBootScript (\r | |
796 | IN ACPI_S3_CONTEXT *AcpiS3Context,\r | |
797 | IN BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable\r | |
798 | )\r | |
799 | {\r | |
053e878b MK |
800 | EFI_STATUS Status;\r |
801 | PEI_SMM_ACCESS_PPI *SmmAccess;\r | |
802 | UINTN Index;\r | |
803 | VOID *GuidHob;\r | |
804 | PEI_S3_RESUME_STATE *PeiS3ResumeState;\r | |
805 | BOOLEAN InterruptStatus;\r | |
1f569620 | 806 | \r |
c5719579 | 807 | DEBUG ((DEBUG_INFO, "S3ResumeExecuteBootScript()\n"));\r |
1f569620 | 808 | \r |
809 | //\r | |
810 | // Attempt to use content from SMRAM first\r | |
811 | //\r | |
812 | GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r | |
813 | if (GuidHob != NULL) {\r | |
814 | //\r | |
815 | // Last step for SMM - send SMI for initialization\r | |
816 | //\r | |
817 | \r | |
818 | //\r | |
819 | // Send SMI to APs\r | |
7367cc6c | 820 | //\r |
1f569620 | 821 | SendSmiIpiAllExcludingSelf ();\r |
822 | //\r | |
823 | // Send SMI to BSP\r | |
824 | //\r | |
825 | SendSmiIpi (GetApicId ());\r | |
826 | \r | |
827 | Status = PeiServicesLocatePpi (\r | |
053e878b MK |
828 | &gPeiSmmAccessPpiGuid,\r |
829 | 0,\r | |
830 | NULL,\r | |
831 | (VOID **)&SmmAccess\r | |
832 | );\r | |
40ef06fc | 833 | if (!EFI_ERROR (Status)) {\r |
c5719579 | 834 | DEBUG ((DEBUG_INFO, "Close all SMRAM regions before executing boot script\n"));\r |
7367cc6c | 835 | \r |
40ef06fc SZ |
836 | for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r |
837 | Status = SmmAccess->Close ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r | |
838 | }\r | |
1f569620 | 839 | \r |
c5719579 | 840 | DEBUG ((DEBUG_INFO, "Lock all SMRAM regions before executing boot script\n"));\r |
7367cc6c | 841 | \r |
40ef06fc SZ |
842 | for (Index = 0, Status = EFI_SUCCESS; !EFI_ERROR (Status); Index++) {\r |
843 | Status = SmmAccess->Lock ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r | |
844 | }\r | |
1f569620 | 845 | }\r |
5b29e438 SZ |
846 | \r |
847 | DEBUG ((DEBUG_INFO, "Signal S3SmmInitDone\n"));\r | |
848 | //\r | |
849 | // Install S3SmmInitDone PPI.\r | |
850 | //\r | |
851 | Status = PeiServicesInstallPpi (&mPpiListS3SmmInitDoneTable);\r | |
852 | ASSERT_EFI_ERROR (Status);\r | |
853 | //\r | |
854 | // Signal S3SmmInitDone to SMM.\r | |
855 | //\r | |
856 | SignalToSmmByCommunication (&gEdkiiS3SmmInitDoneGuid);\r | |
1f569620 | 857 | }\r |
858 | \r | |
6acf7290 | 859 | if ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) == sizeof (UINT64))) {\r |
1f569620 | 860 | AsmWriteCr3 ((UINTN)AcpiS3Context->S3NvsPageTableAddress);\r |
861 | }\r | |
862 | \r | |
abef469f | 863 | InterruptStatus = SaveAndDisableInterrupts ();\r |
1f569620 | 864 | //\r |
865 | // Need to make sure the GDT is loaded with values that support long mode and real mode.\r | |
866 | //\r | |
867 | AsmWriteGdtr (&mGdt);\r | |
abef469f | 868 | //\r |
869 | // update segment selectors per the new GDT.\r | |
870 | //\r | |
871 | AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r | |
872 | //\r | |
873 | // Restore interrupt state.\r | |
874 | //\r | |
875 | SetInterruptState (InterruptStatus);\r | |
1f569620 | 876 | \r |
877 | //\r | |
878 | // Prepare data for return back\r | |
879 | //\r | |
053e878b | 880 | PeiS3ResumeState = AllocatePool (sizeof (*PeiS3ResumeState));\r |
6f9760d8 SZ |
881 | if (PeiS3ResumeState == NULL) {\r |
882 | REPORT_STATUS_CODE (\r | |
883 | EFI_ERROR_CODE | EFI_ERROR_MAJOR,\r | |
884 | (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)\r | |
885 | );\r | |
886 | ASSERT (FALSE);\r | |
887 | }\r | |
053e878b | 888 | \r |
c5719579 | 889 | DEBUG ((DEBUG_INFO, "PeiS3ResumeState - %x\r\n", PeiS3ResumeState));\r |
1f569620 | 890 | PeiS3ResumeState->ReturnCs = 0x10;\r |
891 | PeiS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeBootOs;\r | |
f98f5ec3 | 892 | PeiS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r |
1f569620 | 893 | //\r |
894 | // Save IDT\r | |
895 | //\r | |
896 | AsmReadIdtr (&PeiS3ResumeState->Idtr);\r | |
7367cc6c | 897 | \r |
f6d5cbe7 | 898 | //\r |
899 | // Report Status Code to indicate S3 boot script execution\r | |
900 | //\r | |
901 | REPORT_STATUS_CODE (EFI_PROGRESS_CODE, EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT);\r | |
1f569620 | 902 | \r |
e5735040 | 903 | PERF_INMODULE_BEGIN ("ScriptExec");\r |
5c0687cc | 904 | \r |
1f569620 | 905 | if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r |
906 | //\r | |
907 | // X64 S3 Resume\r | |
908 | //\r | |
c5719579 | 909 | DEBUG ((DEBUG_INFO, "Enable X64 and transfer control to Standalone Boot Script Executor\r\n"));\r |
1f569620 | 910 | \r |
911 | //\r | |
912 | // Switch to long mode to complete resume.\r | |
913 | //\r | |
914 | AsmEnablePaging64 (\r | |
915 | 0x38,\r | |
916 | EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r | |
917 | (UINT64)(UINTN)AcpiS3Context,\r | |
918 | (UINT64)(UINTN)PeiS3ResumeState,\r | |
919 | (UINT64)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r | |
920 | );\r | |
921 | } else {\r | |
922 | //\r | |
923 | // IA32 S3 Resume\r | |
924 | //\r | |
c5719579 | 925 | DEBUG ((DEBUG_INFO, "transfer control to Standalone Boot Script Executor\r\n"));\r |
1f569620 | 926 | SwitchStack (\r |
053e878b | 927 | (SWITCH_STACK_ENTRY_POINT)(UINTN)EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint,\r |
1f569620 | 928 | (VOID *)AcpiS3Context,\r |
929 | (VOID *)PeiS3ResumeState,\r | |
930 | (VOID *)(UINTN)(AcpiS3Context->BootScriptStackBase + AcpiS3Context->BootScriptStackSize)\r | |
931 | );\r | |
932 | }\r | |
933 | \r | |
934 | //\r | |
935 | // Never run to here\r | |
936 | //\r | |
053e878b | 937 | CpuDeadLoop ();\r |
1f569620 | 938 | }\r |
053e878b | 939 | \r |
1f569620 | 940 | /**\r |
941 | Restores the platform to its preboot configuration for an S3 resume and\r | |
942 | jumps to the OS waking vector.\r | |
943 | \r | |
944 | This function will restore the platform to its pre-boot configuration that was\r | |
945 | pre-stored in the boot script table and transfer control to OS waking vector.\r | |
946 | Upon invocation, this function is responsible for locating the following\r | |
947 | information before jumping to OS waking vector:\r | |
948 | - ACPI tables\r | |
949 | - boot script table\r | |
950 | - any other information that it needs\r | |
951 | \r | |
952 | The S3RestoreConfig() function then executes the pre-stored boot script table\r | |
953 | and transitions the platform to the pre-boot state. The boot script is recorded\r | |
954 | during regular boot using the EFI_S3_SAVE_STATE_PROTOCOL.Write() and\r | |
955 | EFI_S3_SMM_SAVE_STATE_PROTOCOL.Write() functions. Finally, this function\r | |
956 | transfers control to the OS waking vector. If the OS supports only a real-mode\r | |
957 | waking vector, this function will switch from flat mode to real mode before\r | |
958 | jumping to the waking vector. If all platform pre-boot configurations are\r | |
959 | successfully restored and all other necessary information is ready, this\r | |
960 | function will never return and instead will directly jump to the OS waking\r | |
961 | vector. If this function returns, it indicates that the attempt to resume\r | |
962 | from the ACPI S3 sleep state failed.\r | |
963 | \r | |
964 | @param[in] This Pointer to this instance of the PEI_S3_RESUME_PPI\r | |
965 | \r | |
966 | @retval EFI_ABORTED Execution of the S3 resume boot script table failed.\r | |
967 | @retval EFI_NOT_FOUND Some necessary information that is used for the S3\r | |
968 | resume boot path could not be located.\r | |
969 | \r | |
970 | **/\r | |
971 | EFI_STATUS\r | |
972 | EFIAPI\r | |
973 | S3RestoreConfig2 (\r | |
974 | IN EFI_PEI_S3_RESUME2_PPI *This\r | |
975 | )\r | |
976 | {\r | |
053e878b MK |
977 | EFI_STATUS Status;\r |
978 | PEI_SMM_ACCESS_PPI *SmmAccess;\r | |
979 | UINTN Index;\r | |
980 | ACPI_S3_CONTEXT *AcpiS3Context;\r | |
981 | EFI_PHYSICAL_ADDRESS TempEfiBootScriptExecutorVariable;\r | |
982 | EFI_PHYSICAL_ADDRESS TempAcpiS3Context;\r | |
983 | BOOT_SCRIPT_EXECUTOR_VARIABLE *EfiBootScriptExecutorVariable;\r | |
984 | UINTN VarSize;\r | |
985 | EFI_SMRAM_DESCRIPTOR *SmramDescriptor;\r | |
986 | SMM_S3_RESUME_STATE *SmmS3ResumeState;\r | |
987 | VOID *GuidHob;\r | |
988 | BOOLEAN Build4GPageTableOnly;\r | |
989 | BOOLEAN InterruptStatus;\r | |
990 | IA32_CR0 Cr0;\r | |
991 | \r | |
992 | TempAcpiS3Context = 0;\r | |
48ee8e3e SZ |
993 | TempEfiBootScriptExecutorVariable = 0;\r |
994 | \r | |
c5719579 | 995 | DEBUG ((DEBUG_INFO, "Enter S3 PEIM\r\n"));\r |
1f569620 | 996 | \r |
1f569620 | 997 | VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r |
053e878b MK |
998 | Status = RestoreLockBox (\r |
999 | &gEfiAcpiVariableGuid,\r | |
1000 | &TempAcpiS3Context,\r | |
1001 | &VarSize\r | |
1002 | );\r | |
1f569620 | 1003 | ASSERT_EFI_ERROR (Status);\r |
1004 | \r | |
1f569620 | 1005 | Status = RestoreLockBox (\r |
1006 | &gEfiAcpiS3ContextGuid,\r | |
1007 | NULL,\r | |
1008 | NULL\r | |
1009 | );\r | |
1010 | ASSERT_EFI_ERROR (Status);\r | |
1011 | \r | |
48ee8e3e SZ |
1012 | AcpiS3Context = (ACPI_S3_CONTEXT *)(UINTN)TempAcpiS3Context;\r |
1013 | ASSERT (AcpiS3Context != NULL);\r | |
1014 | \r | |
053e878b MK |
1015 | VarSize = sizeof (EFI_PHYSICAL_ADDRESS);\r |
1016 | Status = RestoreLockBox (\r | |
1017 | &gEfiBootScriptExecutorVariableGuid,\r | |
1018 | &TempEfiBootScriptExecutorVariable,\r | |
1019 | &VarSize\r | |
1020 | );\r | |
1f569620 | 1021 | ASSERT_EFI_ERROR (Status);\r |
1022 | \r | |
1023 | Status = RestoreLockBox (\r | |
1024 | &gEfiBootScriptExecutorContextGuid,\r | |
1025 | NULL,\r | |
1026 | NULL\r | |
1027 | );\r | |
1028 | ASSERT_EFI_ERROR (Status);\r | |
1029 | \r | |
053e878b | 1030 | EfiBootScriptExecutorVariable = (BOOT_SCRIPT_EXECUTOR_VARIABLE *)(UINTN)TempEfiBootScriptExecutorVariable;\r |
48ee8e3e | 1031 | ASSERT (EfiBootScriptExecutorVariable != NULL);\r |
1f569620 | 1032 | \r |
053e878b MK |
1033 | DEBUG ((DEBUG_INFO, "AcpiS3Context = %x\n", AcpiS3Context));\r |
1034 | DEBUG ((DEBUG_INFO, "Waking Vector = %x\n", ((EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *)((UINTN)(AcpiS3Context->AcpiFacsTable)))->FirmwareWakingVector));\r | |
1035 | DEBUG ((DEBUG_INFO, "AcpiS3Context->AcpiFacsTable = %x\n", AcpiS3Context->AcpiFacsTable));\r | |
1036 | DEBUG ((DEBUG_INFO, "AcpiS3Context->IdtrProfile = %x\n", AcpiS3Context->IdtrProfile));\r | |
1037 | DEBUG ((DEBUG_INFO, "AcpiS3Context->S3NvsPageTableAddress = %x\n", AcpiS3Context->S3NvsPageTableAddress));\r | |
1038 | DEBUG ((DEBUG_INFO, "AcpiS3Context->S3DebugBufferAddress = %x\n", AcpiS3Context->S3DebugBufferAddress));\r | |
1039 | DEBUG ((DEBUG_INFO, "AcpiS3Context->BootScriptStackBase = %x\n", AcpiS3Context->BootScriptStackBase));\r | |
1040 | DEBUG ((DEBUG_INFO, "AcpiS3Context->BootScriptStackSize = %x\n", AcpiS3Context->BootScriptStackSize));\r | |
1041 | DEBUG ((DEBUG_INFO, "EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint = %x\n", EfiBootScriptExecutorVariable->BootScriptExecutorEntrypoint));\r | |
1f569620 | 1042 | \r |
1043 | //\r | |
1044 | // Additional step for BootScript integrity - we only handle BootScript and BootScriptExecutor.\r | |
1045 | // Script dispatch image and context (parameter) are handled by platform.\r | |
1046 | // We just use restore all lock box in place, no need restore one by one.\r | |
1047 | //\r | |
1048 | Status = RestoreAllLockBoxInPlace ();\r | |
1049 | ASSERT_EFI_ERROR (Status);\r | |
1050 | if (EFI_ERROR (Status)) {\r | |
1051 | // Something wrong\r | |
1052 | CpuDeadLoop ();\r | |
1053 | }\r | |
1054 | \r | |
6acf7290 | 1055 | if ((FeaturePcdGet (PcdDxeIplSwitchToLongMode)) || (sizeof (UINTN) == sizeof (UINT64))) {\r |
3a69f7cb | 1056 | //\r |
1057 | // Need reconstruct page table here, since we do not trust ACPINvs.\r | |
1058 | //\r | |
d0bf5623 JY |
1059 | if (IsLongModeWakingVector (AcpiS3Context)) {\r |
1060 | Build4GPageTableOnly = FALSE;\r | |
1061 | } else {\r | |
1062 | Build4GPageTableOnly = TRUE;\r | |
1063 | }\r | |
053e878b | 1064 | \r |
d0bf5623 | 1065 | RestoreS3PageTables ((UINTN)AcpiS3Context->S3NvsPageTableAddress, Build4GPageTableOnly);\r |
3a69f7cb | 1066 | }\r |
1067 | \r | |
1f569620 | 1068 | //\r |
1069 | // Attempt to use content from SMRAM first\r | |
1070 | //\r | |
1071 | GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r | |
1072 | if (GuidHob != NULL) {\r | |
40ef06fc | 1073 | Status = PeiServicesLocatePpi (\r |
053e878b MK |
1074 | &gPeiSmmAccessPpiGuid,\r |
1075 | 0,\r | |
1076 | NULL,\r | |
1077 | (VOID **)&SmmAccess\r | |
1078 | );\r | |
40ef06fc SZ |
1079 | for (Index = 0; !EFI_ERROR (Status); Index++) {\r |
1080 | Status = SmmAccess->Open ((EFI_PEI_SERVICES **)GetPeiServicesTablePointer (), SmmAccess, Index);\r | |
1081 | }\r | |
1082 | \r | |
053e878b | 1083 | SmramDescriptor = (EFI_SMRAM_DESCRIPTOR *)GET_GUID_HOB_DATA (GuidHob);\r |
1f569620 | 1084 | SmmS3ResumeState = (SMM_S3_RESUME_STATE *)(UINTN)SmramDescriptor->CpuStart;\r |
1085 | \r | |
1086 | SmmS3ResumeState->ReturnCs = AsmReadCs ();\r | |
1087 | SmmS3ResumeState->ReturnEntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)S3ResumeExecuteBootScript;\r | |
1088 | SmmS3ResumeState->ReturnContext1 = (EFI_PHYSICAL_ADDRESS)(UINTN)AcpiS3Context;\r | |
1089 | SmmS3ResumeState->ReturnContext2 = (EFI_PHYSICAL_ADDRESS)(UINTN)EfiBootScriptExecutorVariable;\r | |
f98f5ec3 | 1090 | SmmS3ResumeState->ReturnStackPointer = (EFI_PHYSICAL_ADDRESS)STACK_ALIGN_DOWN (&Status);\r |
1f569620 | 1091 | \r |
053e878b MK |
1092 | DEBUG ((DEBUG_INFO, "SMM S3 Signature = %x\n", SmmS3ResumeState->Signature));\r |
1093 | DEBUG ((DEBUG_INFO, "SMM S3 Stack Base = %x\n", SmmS3ResumeState->SmmS3StackBase));\r | |
1094 | DEBUG ((DEBUG_INFO, "SMM S3 Stack Size = %x\n", SmmS3ResumeState->SmmS3StackSize));\r | |
1095 | DEBUG ((DEBUG_INFO, "SMM S3 Resume Entry Point = %x\n", SmmS3ResumeState->SmmS3ResumeEntryPoint));\r | |
1096 | DEBUG ((DEBUG_INFO, "SMM S3 CR0 = %x\n", SmmS3ResumeState->SmmS3Cr0));\r | |
1097 | DEBUG ((DEBUG_INFO, "SMM S3 CR3 = %x\n", SmmS3ResumeState->SmmS3Cr3));\r | |
1098 | DEBUG ((DEBUG_INFO, "SMM S3 CR4 = %x\n", SmmS3ResumeState->SmmS3Cr4));\r | |
1099 | DEBUG ((DEBUG_INFO, "SMM S3 Return CS = %x\n", SmmS3ResumeState->ReturnCs));\r | |
1100 | DEBUG ((DEBUG_INFO, "SMM S3 Return Entry Point = %x\n", SmmS3ResumeState->ReturnEntryPoint));\r | |
1101 | DEBUG ((DEBUG_INFO, "SMM S3 Return Context1 = %x\n", SmmS3ResumeState->ReturnContext1));\r | |
1102 | DEBUG ((DEBUG_INFO, "SMM S3 Return Context2 = %x\n", SmmS3ResumeState->ReturnContext2));\r | |
1103 | DEBUG ((DEBUG_INFO, "SMM S3 Return Stack Pointer = %x\n", SmmS3ResumeState->ReturnStackPointer));\r | |
1104 | DEBUG ((DEBUG_INFO, "SMM S3 Smst = %x\n", SmmS3ResumeState->Smst));\r | |
1f569620 | 1105 | \r |
6acf7290 KT |
1106 | //\r |
1107 | // Directly do the switch stack when PEI and SMM env run in the same execution mode.\r | |
1108 | //\r | |
1109 | if (((SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_32) && (sizeof (UINTN) == sizeof (UINT32))) ||\r | |
1110 | ((SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) && (sizeof (UINTN) == sizeof (UINT64))))\r | |
1111 | {\r | |
1f569620 | 1112 | SwitchStack (\r |
1113 | (SWITCH_STACK_ENTRY_POINT)(UINTN)SmmS3ResumeState->SmmS3ResumeEntryPoint,\r | |
1114 | (VOID *)AcpiS3Context,\r | |
1115 | 0,\r | |
1116 | (VOID *)(UINTN)(SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize)\r | |
1117 | );\r | |
1118 | }\r | |
053e878b | 1119 | \r |
1f569620 | 1120 | if (SmmS3ResumeState->Signature == SMM_S3_RESUME_SMM_64) {\r |
1121 | //\r | |
1122 | // Switch to long mode to complete resume.\r | |
1123 | //\r | |
1124 | \r | |
abef469f | 1125 | InterruptStatus = SaveAndDisableInterrupts ();\r |
1f569620 | 1126 | //\r |
1127 | // Need to make sure the GDT is loaded with values that support long mode and real mode.\r | |
1128 | //\r | |
1129 | AsmWriteGdtr (&mGdt);\r | |
abef469f | 1130 | //\r |
1131 | // update segment selectors per the new GDT.\r | |
7367cc6c | 1132 | //\r |
abef469f | 1133 | AsmSetDataSelectors (DATA_SEGEMENT_SELECTOR);\r |
1134 | //\r | |
1135 | // Restore interrupt state.\r | |
1136 | //\r | |
1137 | SetInterruptState (InterruptStatus);\r | |
1138 | \r | |
55e8ff01 ED |
1139 | Cr0.UintN = AsmReadCr0 ();\r |
1140 | if (Cr0.Bits.PG != 0) {\r | |
1141 | //\r | |
1142 | // We're in 32-bit mode, with paging enabled. We can't set CR3 to\r | |
1143 | // the 64-bit page tables without first disabling paging.\r | |
1144 | //\r | |
1145 | Cr0.Bits.PG = 0;\r | |
1146 | AsmWriteCr0 (Cr0.UintN);\r | |
1147 | }\r | |
053e878b | 1148 | \r |
1f569620 | 1149 | AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);\r |
f5c941b1 | 1150 | \r |
1151 | //\r | |
1152 | // Disable interrupt of Debug timer, since IDT table cannot work in long mode.\r | |
1153 | // NOTE: On x64 platforms, because DisablePaging64() will disable interrupts,\r | |
1154 | // the code in S3ResumeExecuteBootScript() cannot be halted by soft debugger.\r | |
1155 | //\r | |
1156 | SaveAndSetDebugTimerInterrupt (FALSE);\r | |
1157 | \r | |
1f569620 | 1158 | AsmEnablePaging64 (\r |
1159 | 0x38,\r | |
1160 | SmmS3ResumeState->SmmS3ResumeEntryPoint,\r | |
1161 | (UINT64)(UINTN)AcpiS3Context,\r | |
1162 | 0,\r | |
1163 | SmmS3ResumeState->SmmS3StackBase + SmmS3ResumeState->SmmS3StackSize\r | |
1164 | );\r | |
1165 | }\r | |
1f569620 | 1166 | }\r |
1167 | \r | |
053e878b | 1168 | S3ResumeExecuteBootScript (AcpiS3Context, EfiBootScriptExecutorVariable);\r |
1f569620 | 1169 | return EFI_SUCCESS;\r |
1170 | }\r | |
053e878b | 1171 | \r |
1f569620 | 1172 | /**\r |
1173 | Main entry for S3 Resume PEIM.\r | |
1174 | \r | |
1175 | This routine is to install EFI_PEI_S3_RESUME2_PPI.\r | |
7367cc6c | 1176 | \r |
1f569620 | 1177 | @param FileHandle Handle of the file being invoked.\r |
1178 | @param PeiServices Pointer to PEI Services table.\r | |
1179 | \r | |
1180 | @retval EFI_SUCCESS S3Resume Ppi is installed successfully.\r | |
1181 | \r | |
1182 | **/\r | |
1183 | EFI_STATUS\r | |
1184 | EFIAPI\r | |
1185 | PeimS3ResumeEntryPoint (\r | |
053e878b MK |
1186 | IN EFI_PEI_FILE_HANDLE FileHandle,\r |
1187 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
1f569620 | 1188 | )\r |
1189 | {\r | |
1190 | EFI_STATUS Status;\r | |
1191 | \r | |
1192 | //\r | |
1193 | // Install S3 Resume Ppi\r | |
1194 | //\r | |
1195 | Status = (**PeiServices).InstallPpi (PeiServices, &mPpiList);\r | |
1196 | ASSERT_EFI_ERROR (Status);\r | |
1197 | \r | |
1198 | return EFI_SUCCESS;\r | |
1199 | }\r |